Fix a really old buglet in AMD Au1xx0 restart code: instead of
modifying the whole CP0 Config.K0 field to 010b (meaning KSEG0 uncached)
before flushing the caches and resetting a board, it only sets bit 1 of that
reg. which is effectively a NOP since Config.K0 == 011b as the kernel sets it
up (which is also its default value for Au1xx0).
Signed-off-by: Sergei Shtylyov <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
}
set_c0_status(ST0_BEV | ST0_ERL);
- set_c0_config(CONF_CM_UNCACHED);
+ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
flush_cache_all();
write_c0_wired(0);