ipq40xx: dts: convert WIA3300-20 SPI chipselect to hardware mode

On ipq40xx platform, some specific GPIO can be configured as hardware
controlled SPI CS pin. This commit is an example of how to convert the
chipselect pin to the hardware CS mode.

Signed-off-by: Shiji Yang <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/20478
Signed-off-by: Hauke Mehrtens <[email protected]>

diff --git a/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts b/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts
index efcbe962d20a6d52855cf02e4b0a38a186dd8638..eb45f234b4dc81e94edf9f43d37340be936796a8 100644 (file)
--- a/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts
+++ b/target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4019-wia3300-20.dts
@@ -126,8 +126,6 @@
        pinctrl-0 = <&spi0_pins>;
        pinctrl-names = "default";
 
-       cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
-
        flash@0 {
                compatible = "jedec,spi-nor";
                spi-max-frequency = <24000000>;
@@ -398,19 +396,11 @@
 
        spi0_pins: spi0_pinmux {
                blsp_spi0 {
-                       pins = "gpio13", "gpio14", "gpio15";
+                       pins = "gpio12", "gpio13", "gpio14", "gpio15";
                        function = "blsp_spi0";
                        drive-strength = <4>;
                        bias-disable;
                };
-
-               gpio {
-                       pins = "gpio12";
-                       function = "gpio";
-                       drive-strength = <4>;
-                       bias-disable;
-                       output-high;
-               };
        };
 };