mediatek: mt7987: sync mt7987.dtsi with MediaTek SDK

Make sure uart0 got all required clocks assigned.

Fixes: 1c3b32c45a ("mediatek: fix uart clocks in MT7987 infracfg clock driver")
Signed-off-by: Daniel Golle <[email protected]>

diff --git a/target/linux/mediatek/dts/mt7987.dtsi b/target/linux/mediatek/dts/mt7987.dtsi
index e9c76853158d44bbe5c0f1dfe01f56753894cac7..ba13e9e20007dc50196e693aabd0327c26ce526c 100644 (file)
--- a/target/linux/mediatek/dts/mt7987.dtsi
+++ b/target/linux/mediatek/dts/mt7987.dtsi
@@ -679,9 +679,14 @@
                                     "mediatek,mt6577-uart";
                        reg = <0 0x11000000 0 0x100>;
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&topckgen CLK_TOP_UART_SEL>,
-                                <&infracfg CLK_INFRA_52M_UART0_CK>;
+                       clocks = <&infracfg CLK_INFRA_52M_UART0_CK>,
+                                <&infracfg CLK_INFRA_66M_UART0_PCK>;
                        clock-names = "baud", "bus";
+                       assigned-clocks = <&topckgen CLK_TOP_UART_SEL>,
+                                         <&infracfg CLK_INFRA_MUX_UART0_SEL>;
+                       assigned-clock-parents = <&topckgen
+                                                 CLK_TOP_CB_CKSQ_40M>,
+                                                 <&topckgen CLK_TOP_UART_SEL>;
                        status = "disabled";
                };