clk: scmi: Fix the rounding of clock rate
authorAmit Daniel Kachhap <[email protected]>
Tue, 31 Jul 2018 05:55:55 +0000 (11:25 +0530)
committerStephen Boyd <[email protected]>
Thu, 2 Aug 2018 20:43:48 +0000 (13:43 -0700)
This fix rounds the clock rate properly by using quotient and not
remainder in the calculation. This issue was found while testing HDMI
in the Juno platform.

Fixes: 6d6a1d82eaef7 ("clk: add support for clocks provided by SCMI")
Acked-by: Sudeep Holla <[email protected]>
Signed-off-by: Amit Daniel Kachhap <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
drivers/clk/clk-scmi.c

index bb2a6f2f5516756c6050b4977964c4746901f6e4..a985bf5e1ac61e6df1a56e153ed75640e0161072 100644 (file)
@@ -38,7 +38,6 @@ static unsigned long scmi_clk_recalc_rate(struct clk_hw *hw,
 static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
                                unsigned long *parent_rate)
 {
-       int step;
        u64 fmin, fmax, ftmp;
        struct scmi_clk *clk = to_scmi_clk(hw);
 
@@ -60,9 +59,9 @@ static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
 
        ftmp = rate - fmin;
        ftmp += clk->info->range.step_size - 1; /* to round up */
-       step = do_div(ftmp, clk->info->range.step_size);
+       do_div(ftmp, clk->info->range.step_size);
 
-       return step * clk->info->range.step_size + fmin;
+       return ftmp * clk->info->range.step_size + fmin;
 }
 
 static int scmi_clk_set_rate(struct clk_hw *hw, unsigned long rate,