rcar_gen3: drivers: qos: H3: Drop MD pin check

The DBSC_SCFCTST2 is always written with the same value, no matter
what the MD pin value is, drop the entire check and just write the
register with the one and only possible value.

Signed-off-by: Marek Vasut <[email protected]>
Change-Id: I4d8926eb3c44c61ec777c05c581ce8247f13daa6

diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
index db337b6736911b1622cddd2ffcc016a414eb6bf7..631294834906d44497dfbaaf6dd0970b7244a2e6 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
@@ -20,8 +20,6 @@
 
 static void dbsc_setting(void)
 {
-       uint32_t md = 0;
-
        /* BUFCAM settings */
        /* DBSC_DBCAM0CNF0 not set */
        io_write_32(DBSC_DBCAM0CNF1, 0x00044218);
@@ -32,26 +30,8 @@ static void dbsc_setting(void)
        io_write_32(DBSC_DBSCHSZ0, 0x00000001);
        io_write_32(DBSC_DBSCHRW0, 0x22421111);
 
-       md = (*((volatile uint32_t *)RST_MODEMR) & 0x000A0000) >> 17;
-
-       switch (md) {
-       case 0x0:
-               /* DDR3200 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123);
-               break;
-       case 0x1:               /* MD19=0,MD17=1 : LPDDR4-3000, 4GByte(1GByte x4) */
-               /* DDR2800 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123);
-               break;
-       case 0x4:               /* MD19=1,MD17=0 : LPDDR4-2400, 4GByte(1GByte x4) */
-               /* DDR2400 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123);
-               break;
-       default:                /* MD19=1,MD17=1 : LPDDR4-1600, 4GByte(1GByte x4) */
-               /* DDR1600 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123);
-               break;
-       }
+       /* DDR3 */
+       io_write_32(DBSC_SCFCTST2, 0x012F1123);
 
        /* QoS Settings */
        io_write_32(DBSC_DBSCHQOS00, 0x0000F000);

diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
index 9c64e5137efecff8beba794813ac139b6b4462f3..c54aca0bc00751f4ecf1b7e1f9c4fe9019ca2031 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
@@ -57,8 +57,6 @@
 
 static void dbsc_setting(void)
 {
-       uint32_t md = 0;
-
        /* Register write enable */
        io_write_32(DBSC_DBSYSCNT0, 0x00001234U);
 
@@ -70,26 +68,8 @@ static void dbsc_setting(void)
        io_write_32(DBSC_DBSCHSZ0, 0x00000001U);
        io_write_32(DBSC_DBSCHRW0, 0x22421111U);
 
-       md = (*((volatile uint32_t *)RST_MODEMR) & 0x000A0000) >> 17;
-
-       switch (md) {
-       case 0x0:
-               /* DDR3200 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       case 0x1:               /* MD19=0,MD17=1 : LPDDR4-3000, 4GByte(1GByte x4) */
-               /* DDR2800 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       case 0x4:               /* MD19=1,MD17=0 : LPDDR4-2400, 4GByte(1GByte x4) */
-               /* DDR2400 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       default:                /* MD19=1,MD17=1 : LPDDR4-1600, 4GByte(1GByte x4) */
-               /* DDR1600 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       }
+       /* DDR3 */
+       io_write_32(DBSC_SCFCTST2, 0x012F1123U);
 
        /* QoS Settings */
        io_write_32(DBSC_DBSCHQOS00, 0x00000F00U);

diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
index 730ef0da8820854f0a494f137ba47ca8f29b32de..44b58cbb4a689c162da123817741f70fba138155 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
@@ -57,8 +57,6 @@
 
 static void dbsc_setting(void)
 {
-       uint32_t md = 0;
-
        /* Register write enable */
        io_write_32(DBSC_DBSYSCNT0, 0x00001234U);
 
@@ -70,26 +68,8 @@ static void dbsc_setting(void)
        io_write_32(DBSC_DBSCHSZ0, 0x00000001U);
        io_write_32(DBSC_DBSCHRW0, 0x22421111U);
 
-       md = (*((volatile uint32_t *)RST_MODEMR) & 0x000A0000) >> 17;
-
-       switch (md) {
-       case 0x0:
-               /* DDR3200 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       case 0x1:               /* MD19=0,MD17=1 : LPDDR4-3000, 4GByte(1GByte x4) */
-               /* DDR2800 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       case 0x4:               /* MD19=1,MD17=0 : LPDDR4-2400, 4GByte(1GByte x4) */
-               /* DDR2400 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       default:                /* MD19=1,MD17=1 : LPDDR4-1600, 4GByte(1GByte x4) */
-               /* DDR1600 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       }
+       /* DDR3 */
+       io_write_32(DBSC_SCFCTST2, 0x012F1123U);
 
        /* QoS Settings */
        io_write_32(DBSC_DBSCHQOS00, 0x00000F00U);

diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
index f03f0c0ce3d8b434d4d7409aee94157c519ca6ae..80870fbf994044f4d36ec256cfc095fc83884629 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
@@ -57,8 +57,6 @@
 
 static void dbsc_setting(void)
 {
-       uint32_t md = 0;
-
        /* Register write enable */
        io_write_32(DBSC_DBSYSCNT0, 0x00001234U);
 
@@ -70,26 +68,8 @@ static void dbsc_setting(void)
        io_write_32(DBSC_DBSCHSZ0, 0x00000001U);
        io_write_32(DBSC_DBSCHRW0, 0x22421111U);
 
-       md = (*((volatile uint32_t *)RST_MODEMR) & 0x000A0000) >> 17;
-
-       switch (md) {
-       case 0x0:
-               /* DDR3200 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       case 0x1:               /* MD19=0,MD17=1 : LPDDR4-3000, 4GByte(1GByte x4) */
-               /* DDR2800 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       case 0x4:               /* MD19=1,MD17=0 : LPDDR4-2400, 4GByte(1GByte x4) */
-               /* DDR2400 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       default:                /* MD19=1,MD17=1 : LPDDR4-1600, 4GByte(1GByte x4) */
-               /* DDR1600 */
-               io_write_32(DBSC_SCFCTST2, 0x012F1123U);
-               break;
-       }
+       /* DDR3 */
+       io_write_32(DBSC_SCFCTST2, 0x012F1123U);
 
        /* QoS Settings */
        io_write_32(DBSC_DBSCHQOS00, 0x00000F00U);