};
};
- spi_ctrl: spi_controller@1fa10000 {
- compatible = "airoha,en7523-snand";
+ spi_ctrl: spi@1fa10000 {
+ compatible = "airoha,en7523-snand", "airoha,en7581-snand";
reg = <0x1fa10000 0x140>,
<0x1fa11000 0x160>;
--- /dev/null
+From 86f88e604305186aec1fb6eebbf8f0a42c2435d3 Mon Sep 17 00:00:00 2001
+Date: Thu, 9 Oct 2025 19:33:23 +0300
+Subject: [PATCH] spi: airoha-snfi: en7523: workaround flash damaging
+ if UART_TXD was short to GND
+
+We found that some serial console may pull TX line to GROUND during board
+boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
+to booting in RESERVED boot mode.
+
+It was found that some flashes operates incorrectly in RESERVED mode.
+Micron and Skyhigh flashes are definitely affected by the issue,
+Winbond flashes are NOT affected.
+
+Details:
+--------
+DMA reading of odd pages on affected flashes operates incorrectly. Page
+reading offset (start of the page) on hardware level is replaced by 0x10.
+Thus results in incorrect data reading. Usage of UBI make things even
+worse. Any attempt to access UBI leads to ubi damaging. As result OS loading
+becomes impossible.
+
+Non-DMA reading is OK.
+
+This patch detects booting in reserved mode, turn off DMA and print big
+fat warning.
+
+---
+ drivers/spi/spi-airoha-snfi.c | 40 ++++++++++++++++++++++++++++++-----
+ 1 file changed, 35 insertions(+), 5 deletions(-)
+
+--- a/drivers/spi/spi-airoha-snfi.c
++++ b/drivers/spi/spi-airoha-snfi.c
+@@ -1013,6 +1013,11 @@ static const struct spi_controller_mem_o
+ .dirmap_write = airoha_snand_dirmap_write,
+ };
+
++static const struct spi_controller_mem_ops airoha_snand_nodma_mem_ops = {
++ .supports_op = airoha_snand_supports_op,
++ .exec_op = airoha_snand_exec_op,
++};
++
+ static int airoha_snand_setup(struct spi_device *spi)
+ {
+ struct airoha_snand_ctrl *as_ctrl;
+@@ -1058,7 +1063,8 @@ static int airoha_snand_probe(struct pla
+ struct device *dev = &pdev->dev;
+ struct spi_controller *ctrl;
+ void __iomem *base;
+- int err;
++ int err, dma_enabled;
++ u32 sfc_strap;
+
+ ctrl = devm_spi_alloc_host(dev, sizeof(*as_ctrl));
+ if (!ctrl)
+@@ -1092,12 +1098,36 @@ static int airoha_snand_probe(struct pla
+ return dev_err_probe(dev, PTR_ERR(as_ctrl->spi_clk),
+ "unable to get spi clk\n");
+
+- err = dma_set_mask(as_ctrl->dev, DMA_BIT_MASK(32));
+- if (err)
+- return err;
++ dma_enabled = 1;
++ if (device_is_compatible(dev, "airoha,en7523-snand")) {
++ err = regmap_read(as_ctrl->regmap_ctrl,
++ REG_SPI_CTRL_SFC_STRAP, &sfc_strap);
++ if (err)
++ return err;
++
++ if (!(sfc_strap & 0x04)) {
++ dma_enabled = 0;
++ printk(KERN_WARNING "\n"
++ "=== WARNING ======================================================\n"
++ "Detected booting in RESERVED mode (UART_TXD was short to GND).\n"
++ "This mode is known for incorrect DMA reading of some flashes.\n"
++ "Usage of DMA for flash operations will be disabled to prevent data\n"
++ "damage. Unplug your serial console and power cycle the board\n"
++ "to boot with full performance.\n"
++ "==================================================================\n\n");
++ }
++ }
++
++ if (dma_enabled) {
++ err = dma_set_mask(as_ctrl->dev, DMA_BIT_MASK(32));
++ if (err)
++ return err;
++ }
+
+ ctrl->num_chipselect = 2;
+- ctrl->mem_ops = &airoha_snand_mem_ops;
++ ctrl->mem_ops = dma_enabled ?
++ &airoha_snand_mem_ops :
++ &airoha_snand_nodma_mem_ops;
+ ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
+ ctrl->mode_bits = SPI_RX_DUAL;
+ ctrl->setup = airoha_snand_setup;
+++ /dev/null
-From 12664d09a94bd0f50f31a3811447f70275ea9bb8 Mon Sep 17 00:00:00 2001
-Date: Thu, 9 Oct 2025 19:49:18 +0300
-Subject: [PATCH 1/2] spi: airoha-snfi: make compatible with EN7523 SoC
-
-The driver is fully compatible with EN7523 based SoCs, so add
-corresponding compatible string.
-
-This driver is better than en7523-spi because it supports DMA.
-Measurements shows that DMA based flash reading is 4 times faster
-than non-dma one.
-
----
- drivers/spi/spi-airoha-snfi.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/spi/spi-airoha-snfi.c
-+++ b/drivers/spi/spi-airoha-snfi.c
-@@ -1047,6 +1047,7 @@ static const struct regmap_config spi_nf
- };
-
- static const struct of_device_id airoha_snand_ids[] = {
-+ { .compatible = "airoha,en7523-snand" },
- { .compatible = "airoha,en7581-snand" },
- { /* sentinel */ }
- };
+++ /dev/null
-From 0299de52cbb2274345e12518298a8014adb56411 Mon Sep 17 00:00:00 2001
-Date: Thu, 9 Oct 2025 19:33:23 +0300
-Subject: [PATCH 2/2] spi: airoha-snfi: en7523: workaround flash damaging if
- UART_TXD was short to GND
-
-We found that some serial console may pull TX line to GROUND during board
-boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
-to booting in RESERVED boot mode.
-
-It was found that some flashes operates incorrectly in RESERVED mode.
-Micron and Skyhigh flashes are definitely affected by the issue,
-Winbond flashes are NOT affected.
-
-Details:
---------
-DMA reading of odd pages on affected flashes operates incorrectly. Page
-reading offset (start of the page) on hardware level is replaced by 0x10.
-Thus results in incorrect data reading. Usage of UBI make things even
-worse. Any attempt to access UBI leads to ubi damaging. As result OS loading
-becomes impossible.
-
-Non-DMA reading is OK.
-
-This patch detects booting in reserved mode, turn off DMA and print big
-fat warning.
-
----
- drivers/spi/spi-airoha-snfi.c | 38 ++++++++++++++++++++++++++++++++---
- 1 file changed, 35 insertions(+), 3 deletions(-)
-
---- a/drivers/spi/spi-airoha-snfi.c
-+++ b/drivers/spi/spi-airoha-snfi.c
-@@ -1013,6 +1013,11 @@ static const struct spi_controller_mem_o
- .dirmap_write = airoha_snand_dirmap_write,
- };
-
-+static const struct spi_controller_mem_ops airoha_snand_nodma_mem_ops = {
-+ .supports_op = airoha_snand_supports_op,
-+ .exec_op = airoha_snand_exec_op,
-+};
-+
- static int airoha_snand_setup(struct spi_device *spi)
- {
- struct airoha_snand_ctrl *as_ctrl;
-@@ -1059,7 +1064,10 @@ static int airoha_snand_probe(struct pla
- struct device *dev = &pdev->dev;
- struct spi_controller *ctrl;
- void __iomem *base;
-- int err;
-+ int err, dma_enabled;
-+#if defined(CONFIG_ARM)
-+ u32 sfc_strap;
-+#endif
-
- ctrl = devm_spi_alloc_host(dev, sizeof(*as_ctrl));
- if (!ctrl)
-@@ -1093,12 +1101,36 @@ static int airoha_snand_probe(struct pla
- return dev_err_probe(dev, PTR_ERR(as_ctrl->spi_clk),
- "unable to get spi clk\n");
-
-- err = dma_set_mask(as_ctrl->dev, DMA_BIT_MASK(32));
-+ dma_enabled = 1;
-+#if defined(CONFIG_ARM)
-+ err = regmap_read(as_ctrl->regmap_ctrl,
-+ REG_SPI_CTRL_SFC_STRAP, &sfc_strap);
- if (err)
- return err;
-
-+ if (!(sfc_strap & 0x04)) {
-+ dma_enabled = 0;
-+ printk(KERN_WARNING "\n"
-+ "=== WARNING ======================================================\n"
-+ "Detected booting in RESERVED mode (UART_TXD was short to GND).\n"
-+ "This mode is known for incorrect DMA reading of some flashes.\n"
-+ "Usage of DMA for flash operations will be disabled to prevent data\n"
-+ "damage. Unplug your serial console and power cycle the board\n"
-+ "to boot with full performance.\n"
-+ "==================================================================\n\n");
-+ }
-+#endif
-+
-+ if (dma_enabled) {
-+ err = dma_set_mask(as_ctrl->dev, DMA_BIT_MASK(32));
-+ if (err)
-+ return err;
-+ }
-+
- ctrl->num_chipselect = 2;
-- ctrl->mem_ops = &airoha_snand_mem_ops;
-+ ctrl->mem_ops = dma_enabled ?
-+ &airoha_snand_mem_ops :
-+ &airoha_snand_nodma_mem_ops;
- ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
- ctrl->mode_bits = SPI_RX_DUAL;
- ctrl->setup = airoha_snand_setup;