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RDMA/hns: Configure fence attribute in hip08 RoCE
author
oulijun
<
[email protected]
>
Fri, 10 Nov 2017 08:55:45 +0000
(16:55 +0800)
committer
Doug Ledford
<
[email protected]
>
Fri, 10 Nov 2017 17:30:10 +0000
(12:30 -0500)
When post wr for mixed rdma operation, we need to use fence
mechanism to keep the correct execute order.
Signed-off-by: Lijun Ou <
[email protected]
>
Signed-off-by: Wei Hu (Xavier) <
[email protected]
>
Signed-off-by: Shaobo Xu <
[email protected]
>
Signed-off-by: Yixian Liu <
[email protected]
>
Signed-off-by: Doug Ledford <
[email protected]
>
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
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diff --git
a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 8ed81644e0225b87a7475fc31ce9beae61feae1b..049a0dfd207e359ba823c1232bf317d7a75f739f 100644
(file)
--- a/
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@
-104,7
+104,6
@@
static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
qp->sq.wrid[(qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1)] =
wr->wr_id;
-
rc_sq_wqe = wqe;
memset(rc_sq_wqe, 0, sizeof(*rc_sq_wqe));
for (i = 0; i < wr->num_sge; i++)
@@
-112,6
+111,9
@@
static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
rc_sq_wqe->inv_key_immtdata = send_ieth(wr);
+ roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_FENCE_S,
+ (wr->send_flags & IB_SEND_FENCE) ? 1 : 0);
+
switch (wr->opcode) {
case IB_WR_RDMA_READ:
roce_set_field(rc_sq_wqe->byte_4,