aspeed: ast2500: fix missing break in D2PLL clock enablement
authorCédric Le Goater <[email protected]>
Mon, 29 Oct 2018 06:06:37 +0000 (07:06 +0100)
committerJoe Hershberger <[email protected]>
Mon, 5 Nov 2018 16:41:57 +0000 (10:41 -0600)
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
drivers/clk/aspeed/clk_ast2500.c

index 526470051c5d2e35a3d57aace3c99f67fd04bff4..2182320f607fecb10b7326dc99b7162fe97f853c 100644 (file)
@@ -411,6 +411,7 @@ static int ast2500_clk_enable(struct clk *clk)
                break;
        case PLL_D2PLL:
                ast2500_configure_d2pll(priv->scu, D2PLL_DEFAULT_RATE);
+               break;
        default:
                return -ENOENT;
        }