cxo_board: cxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
-@@ -587,7 +593,7 @@
+@@ -570,7 +576,7 @@
};
- saw0: regulator@2089000 {
-- compatible = "qcom,saw2";
-+ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
+ saw0: power-manager@2089000 {
+- compatible = "qcom,ipq8064-saw2-cpu", "qcom,saw2";
++ compatible = "qcom,ipq8064-saw2-cpu", "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
- regulator;
};
-@@ -602,11 +608,27 @@
+
+@@ -584,10 +590,26 @@
};
- saw1: regulator@2099000 {
-- compatible = "qcom,saw2";
-+ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
+ saw1: power-manager@2099000 {
+- compatible = "qcom,ipq8064-saw2-cpu", "qcom,saw2";
++ compatible = "qcom,ipq8064-saw2-cpu", "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
- regulator;
};
+ saw_l2: regulator@02012000 {
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
-@@ -600,12 +600,9 @@
+@@ -588,12 +588,9 @@
};
- nand_pins: nand_pins {
-- mux {
+ nand_pins: nand-state {
+- nand-pins {
+ disable {
pins = "gpio34", "gpio35", "gpio36",
- "gpio37", "gpio38", "gpio39",
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts
-@@ -25,131 +25,6 @@
+@@ -52,131 +52,6 @@
device_type = "memory";
};
mdio1: mdio-1 {
status = "okay";
compatible = "virtual,mdio-gpio";
-@@ -337,6 +212,131 @@
+@@ -336,6 +211,131 @@
status = "okay";
};
--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
-@@ -1429,6 +1429,20 @@
+@@ -1438,6 +1438,20 @@
status = "disabled";
};
};
opp_table_l2: opp_table_l2 {
-@@ -1392,6 +1381,17 @@
+@@ -1401,6 +1390,17 @@
#reset-cells = <1>;
};
thermal-zones {
sensor0-thermal {
polling-delay-passive = <0>;
-@@ -1392,6 +1404,13 @@
+@@ -1401,6 +1413,13 @@
operating-points-v2 = <&opp_table_l2>;
};
--- a/drivers/clk/qcom/krait-cc.c
+++ b/drivers/clk/qcom/krait-cc.c
-@@ -348,7 +348,7 @@ static int krait_cc_probe(struct platfor
+@@ -347,17 +347,25 @@ MODULE_DEVICE_TABLE(of, krait_cc_match_t
+ static int krait_cc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
- const struct of_device_id *id;
- unsigned long cur_rate, aux_rate;
+ unsigned long cur_rate, aux_rate, qsb_rate;
int cpu;
struct clk_hw *mux, *l2_pri_mux;
struct clk *clk, **clks;
-@@ -357,11 +357,19 @@ static int krait_cc_probe(struct platfor
- if (!id)
- return -ENODEV;
+ bool unique_aux = !!device_get_match_data(dev);
- /* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */
- clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);
+ qsb_rate = clk_get_rate(clk);
+
- if (!id->data) {
+ if (!unique_aux) {
clk = clk_register_fixed_factor(dev, "acpu_aux",
"gpll0_vote", 0, 1, 2);
static unsigned int sec_mux_map[] = {
2,
0,
-@@ -364,7 +366,7 @@ static int krait_cc_probe(struct platfor
+@@ -360,7 +362,7 @@ static int krait_cc_probe(struct platfor
*/
clk = clk_get(dev, "qsb");
if (IS_ERR(clk))
--- a/drivers/clk/qcom/krait-cc.c
+++ b/drivers/clk/qcom/krait-cc.c
-@@ -423,25 +423,25 @@ static int krait_cc_probe(struct platfor
+@@ -419,25 +419,25 @@ static int krait_cc_probe(struct platfor
cur_rate = clk_get_rate(clks[l2_mux]);
aux_rate = 384000000;
if (cur_rate < aux_rate) {
static unsigned int sec_mux_map[] = {
2,
-@@ -350,7 +352,7 @@ static int krait_cc_probe(struct platfor
+@@ -349,7 +351,7 @@ MODULE_DEVICE_TABLE(of, krait_cc_match_t
+ static int krait_cc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
- const struct of_device_id *id;
- unsigned long cur_rate, aux_rate, qsb_rate;
+ unsigned long cur_rate, qsb_rate;
int cpu;
struct clk_hw *mux, *l2_pri_mux;
struct clk *clk, **clks;
-@@ -420,28 +422,29 @@ static int krait_cc_probe(struct platfor
+@@ -416,28 +418,29 @@ static int krait_cc_probe(struct platfor
* two different rates to force a HFPLL reinit under all
* circumstances.
*/
Subject: SoC: add qualcomm syscon
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
-@@ -26,6 +26,7 @@ obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
+@@ -32,6 +32,7 @@ obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
obj-$(CONFIG_QCOM_SPM) += spm.o
obj-$(CONFIG_QCOM_STATS) += qcom_stats.o
obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
-@@ -252,6 +252,13 @@ config QCOM_STATS
+@@ -247,6 +247,13 @@ config QCOM_STATS
various SoC level low power modes statistics and export to debugfs
interface.
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -1568,6 +1568,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
+@@ -1505,6 +1505,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
endchoice
default ""
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
-@@ -1190,6 +1190,17 @@ int __init early_init_dt_scan_chosen(cha
+@@ -1053,6 +1053,17 @@ int __init early_init_dt_scan_chosen(cha
if (p != NULL && l > 0)
strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE));
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -1549,6 +1549,18 @@ config ARM_ATAG_DTB_COMPAT
- bootloaders, this option allows zImage to extract the information
- from the ATAG list and store it at run time into the appended DTB.
+@@ -1523,6 +1523,18 @@ config CMDLINE
+ time by entering them here. As a minimum, you should specify the
+ memory size and the root device (e.g., mem=64M root=/dev/nfs).
+config ARM_ATAG_DTB_COMPAT_IGNORE_MEM
+ bool "Ignore MEM ATAG information from bootloader"
+ node in the appended DTB should NOT be augumented.
+
choice
- prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
- default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
+ prompt "Kernel command line type"
+ depends on CMDLINE != ""
--- a/arch/arm/boot/compressed/atags_to_fdt.c
+++ b/arch/arm/boot/compressed/atags_to_fdt.c
@@ -170,6 +170,10 @@ int atags_to_fdt(void *atag_list, void *
+++ /dev/null
-From 1e019e728800d4033b4b3b1b5570f5da5ed309f2 Mon Sep 17 00:00:00 2001
-Date: Thu, 15 Dec 2022 01:49:20 -0800
-Subject: [PATCH] mtd: spi-nor: micron-st: Add n25q064a WP support
-
-These flash chips are used on Google / TP-Link / ASUS OnHub devices, and
-OnHub devices are write-protected by default (same as any other
-ChromeOS/Chromebook system).
-
----
-Submitted upstream at:
-
- drivers/mtd/spi-nor/micron-st.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/mtd/spi-nor/micron-st.c
-+++ b/drivers/mtd/spi-nor/micron-st.c
-@@ -183,6 +183,8 @@ static const struct flash_info st_nor_pa
- { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) },
- { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128)
-+ FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
-+ SPI_NOR_BP3_SR_BIT6)
- NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) },
- { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256)
- FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -1578,6 +1578,16 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
+@@ -1503,6 +1503,16 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
The command-line arguments provided by the boot loader will be
appended to the the device tree bootargs property.
*ptr = '\0';
--- a/init/main.c
+++ b/init/main.c
-@@ -28,6 +28,7 @@
- #include <linux/initrd.h>
- #include <linux/memblock.h>
- #include <linux/acpi.h>
-+#include <linux/of.h>
+@@ -31,6 +31,7 @@
#include <linux/bootconfig.h>
#include <linux/console.h>
#include <linux/nmi.h>
-@@ -931,6 +932,17 @@ void start_kernel(void)
++#include <linux/of.h>
+ #include <linux/percpu.h>
+ #include <linux/kmod.h>
+ #include <linux/kprobes.h>
+@@ -961,6 +962,17 @@ void start_kernel(void)
+
pr_notice("Kernel command line: %s\n", saved_command_line);
/* parameters may set static keys */
- jump_label_init();
+
+ /* Show bootloader's original command line for reference */
+ if (IS_ENABLED(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) && of_chosen) {
projects / openwrt / staging / nbd.git / commitdiff