Bridge irqs are edge-triggered, i.e. they get asserted on low-to-high
transitions and not on the level of the downstream interrupt line.
This replaces handle_level_irq by the more appropriate handle_edge_irq.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Tested-by: Ezequiel Garcia <[email protected]>
Cc: <[email protected]>: f56c0738b5c2: "irqchip: orion: clear bridge cause register on init"
Cc: <[email protected]> # v3.10+
Signed-off-by: Jason Cooper <[email protected]>
}
ret = irq_alloc_domain_generic_chips(domain, nrirqs, 1, np->name,
- handle_level_irq, clr, 0, IRQ_GC_INIT_MASK_CACHE);
+ handle_edge_irq, clr, 0, IRQ_GC_INIT_MASK_CACHE);
if (ret) {
pr_err("%s: unable to alloc irq domain gc\n", np->name);
return ret;