MIPS: dump_tlb: Only dump PageGrain if interesting

The PageGrain register may not exist if certain architectural features
aren't present, therefore only print out its value when dumping the TLB
registers if it is expected to contain fields relevant to the TLB.

Fixes: d1e9a4f54735 ("MIPS: Add SysRq operation to dump TLBs on all CPUs")
Reported-by: Joshua Kinard <[email protected]>
Reported-by: Maciej W. Rozycki <[email protected]>
Signed-off-by: James Hogan <[email protected]>
Cc: Joshua Kinard <[email protected]>
Cc: Maciej W. Rozycki <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10723/
Signed-off-by: Ralf Baechle <[email protected]>

diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 519ededbf9a4cc4d6879fdb9856e2076e2506e2f..2ab83be14ffaab2175c8dacfd161adbd6aae9d6d 100644 (file)
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -23,7 +23,8 @@ void dump_tlb_regs(void)
        pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());
        pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());
        pr_info("Wired    : %0x\n", read_c0_wired());
-       pr_info("PageGrain: %0x\n", read_c0_pagegrain());
+       if (cpu_has_small_pages || cpu_has_rixi || cpu_has_xpa)
+               pr_info("PageGrain: %0x\n", read_c0_pagegrain());
        if (cpu_has_htw) {
                pr_info("PWField  : %0*lx\n", field, read_c0_pwfield());
                pr_info("PWSize   : %0*lx\n", field, read_c0_pwsize());