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drm/i915: implement WaForceL3Serialization on VLV and IVB
author
Jesse Barnes
<
[email protected]
>
Thu, 25 Oct 2012 19:15:43 +0000
(12:15 -0700)
committer
Daniel Vetter
<
[email protected]
>
Sun, 11 Nov 2012 22:51:35 +0000
(23:51 +0100)
References: https://bugs.freedesktop.org/show_bug.cgi?id=50250
Reviewed-by: Ben Widawsky <
[email protected]
>
Signed-off-by: Jesse Barnes <
[email protected]
>
Reviewed-by: Antti Koskipää <
[email protected]
>
Signed-off-by: Daniel Vetter <
[email protected]
>
drivers/gpu/drm/i915/intel_pm.c
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diff --git
a/drivers/gpu/drm/i915/intel_pm.c
b/drivers/gpu/drm/i915/intel_pm.c
index aef23641fbcccab4e7f28bb3c112a7956f963bcd..871bfe49b913695d16116b8c7e0ab496ac4a23ad 100644
(file)
--- a/
drivers/gpu/drm/i915/intel_pm.c
+++ b/
drivers/gpu/drm/i915/intel_pm.c
@@
-3695,6
+3695,10
@@
static void valleyview_init_clock_gating(struct drm_device *dev)
I915_WRITE(GEN7_ROW_CHICKEN2,
_MASKED_BIT_ENABLE(DOP_CLOCK_GATING_DISABLE));
+ /* WaForceL3Serialization */
+ I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) &
+ ~L3SQ_URB_READ_CAM_MATCH_DISABLE);
+
/* This is required by WaCatErrorRejectionIssue */
I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |