--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "ipq5018.dtsi"
+#include "ipq5018-ess.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "CMCC PZ-L8";
+ compatible = "cmcc,pz-l8", "qcom,ipq5018";
+
+ aliases {
+ serial0 = &blsp1_uart1;
+ led-boot = &led_wan;
+ led-failsafe = &led_lan;
+ led-running = &led_wan;
+ led-upgrade = &led_lan;
+ label-mac-device = <&dp1>;
+ };
+
+ chosen {
+ bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&button_pins>;
+ pinctrl-names = "default";
+
+ reset-button {
+ label = "reset";
+ gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ wps-button {
+ label = "wps";
+ gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&led_pins>;
+ pinctrl-names = "default";
+
+ led_wan: led-0 {
+ gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_WAN;
+ default-state = "off";
+ };
+
+ led_lan: led-1 {
+ gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_LAN;
+ };
+ };
+
+ reserved-memory {
+ q6_mem_regions: q6_mem_regions@4b000000 {
+ no-map;
+ reg = <0x0 0x4b000000 0x0 0x3000000>;
+ status = "disabled";
+ };
+ };
+};
+
+&sleep_clk {
+ clock-frequency = <32000>;
+};
+
+&xo_board_clk {
+ clock-div = <4>;
+ clock-mult = <1>;
+};
+
+&blsp1_uart1 {
+ status = "okay";
+
+ pinctrl-0 = <&serial_0_pins>;
+ pinctrl-names = "default";
+};
+
+&crypto {
+ status = "okay";
+};
+
+&cryptobam {
+ status = "okay";
+};
+
+&prng {
+ status = "okay";
+};
+
+&qfprom {
+ status = "okay";
+};
+
+&qpic_bam {
+ status = "okay";
+};
+
+&qpic_nand {
+ pinctrl-0 = <&qpic_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ nand-ecc-engine = <&qpic_nand>;
+ nand-bus-width = <8>;
+
+ partitions {
+ compatible = "qcom,smem-part";
+
+ partition-art {
+ label = "0:art";
+ read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ hw_mac_addr: mac-address@0 {
+ compatible = "mac-base";
+ reg = <0x0 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+ };
+ };
+ };
+ };
+};
+
+&switch {
+ status = "okay";
+
+ switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
+
+ qcom,port_phyinfo {
+ // MAC0 -> GE Phy --- MDI --- QCA8337 Phy4(Port5)
+ port@0 {
+ port_id = <1>;
+ mdiobus = <&mdio0>;
+ phy_address = <7>;
+ };
+
+ // MAC1 -> Uniphy --- SGMII --- QCA8337 SerDes(Port6)
+ port@1 {
+ port_id = <2>;
+ mdiobus = <&mdio1>;
+ forced-speed = <1000>;
+ forced-duplex = <1>;
+ };
+ };
+};
+
+// MAC0 -> GE Phy
+&dp1 {
+ status = "okay";
+
+ nvmem-cells = <&hw_mac_addr 0>;
+ nvmem-cell-names = "mac-address";
+};
+
+// MAC1 -> SGMII
+&dp2 {
+ status = "okay";
+
+ nvmem-cells = <&hw_mac_addr 1>;
+ nvmem-cell-names = "mac-address";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&mdio0 {
+ status = "okay";
+};
+
+// MAC0 -> GE Phy -> QCA8337 Phy4
+&ge_phy {
+ qcom,dac-preset-short-cable;
+};
+
+&mdio1 {
+ status = "okay";
+
+ pinctrl-0 = <&mdio1_pins>;
+ pinctrl-names = "default";
+ reset-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
+
+ // QCA8337 Phy0 -> LAN3
+ qca8337_0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ // QCA8337 Phy1 -> LAN2
+ qca8337_1: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ // QCA8337 Phy2 -> LAN1
+ qca8337_2: ethernet-phy@2 {
+ reg = <2>;
+ };
+
+ // QCA8337 Phy3 -> WAN
+ qca8337_3: ethernet-phy@3 {
+ reg = <3>;
+ };
+
+ // QCA8337 Phy4 -> IPQ5018 GE Phy
+ qca8337_4: ethernet-phy@4 {
+ reg = <4>;
+ };
+
+ // QCA8337 switch
+ switch1: ethernet-switch@17 {
+ compatible = "qca,qca8337";
+ reg = <17>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+ label = "lan3";
+ phy-handle = <&qca8337_0>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-handle = <&qca8337_1>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan1";
+ phy-handle = <&qca8337_2>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ phy-handle = <&qca8337_3>;
+ };
+
+ /*
+ * WAN cannot work if added
+ * port@5 {
+ * reg = <5>;
+ * phy-handle = <&qca8337_4>;
+ * phy-mode = "gmii";
+ * ethernet = <&dp1>;
+ * };
+ */
+
+ port@6 {
+ reg = <6>;
+ phy-mode = "sgmii";
+ ethernet = <&dp2>;
+ qca,sgmii-enable-pll;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+};
+
+&tlmm {
+ button_pins: button-state {
+ button-pins {
+ pins = "gpio34", "gpio33";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ };
+
+ led_pins: led-state {
+ pins = "gpio35", "gpio30";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ mdio1_pins: mdio-state {
+ mdc-pins {
+ pins = "gpio36";
+ function = "mdc";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ mdio-pins {
+ pins = "gpio37";
+ function = "mdio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+
+ qpic_pins: qpic-state {
+ clock-pins {
+ pins = "gpio9";
+ function = "qspi_clk";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ cs-pins {
+ pins = "gpio8";
+ function = "qspi_cs";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio4", "gpio5", "gpio6", "gpio7";
+ function = "qspi_data";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ serial_0_pins: uart0-state {
+ pins = "gpio28", "gpio29";
+ function = "blsp0_uart1";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ switch_reset_pins: switch-reset-state {
+ pins = "gpio26";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+};
+
+/*
+ * ath11k Wi-Fi consumes too large memory spaces and too few spaces are
+ * available for users. To prevent OOM when using LuCI or other softwares,
+ * disable Wi-Fi related peripherals at the moment.
+ */
+&q6v5_wcss {
+ status = "disabled";
+
+ memory-region = <&q6_mem_regions>;
+ firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt",
+ "ath11k/IPQ5018/hw1.0/m3_fw.mdt",
+ "ath11k/QCN6122/hw1.0/m3_fw.mdt";
+
+ /* The QCN6102 radio should map to UPD ID 2. Without */
+ /* bootargs, the firmware will expect it to be on UPD ID 3 */
+ boot-args = <0x2 4 2 27 0 0>; /* pcie:2, len:4, updid:2, reset:gpio27 */
+
+ // IPQ5018
+ q6_wcss_pd1: pd-1 {
+ firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
+
+ resets =
+ <&gcc GCC_WCSSAON_RESET>,
+ <&gcc GCC_WCSS_BCR>,
+ <&gcc GCC_CE_BCR>;
+ reset-names =
+ "wcss_aon_reset",
+ "wcss_reset",
+ "ce_reset";
+
+ clocks =
+ <&gcc GCC_WCSS_AHB_S_CLK>,
+ <&gcc GCC_WCSS_ACMT_CLK>,
+ <&gcc GCC_WCSS_AXI_M_CLK>;
+ clock-names =
+ "gcc_wcss_ahb_s_clk",
+ "gcc_wcss_acmt_clk",
+ "gcc_wcss_axi_m_clk";
+
+ interrupts-extended =
+ <&wcss_smp2p_in 8 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 9 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 12 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 11 IRQ_TYPE_NONE>;
+ interrupt-names =
+ "fatal",
+ "ready",
+ "spawn-ack",
+ "stop-ack";
+
+ qcom,smem-states =
+ <&wcss_smp2p_out 8>,
+ <&wcss_smp2p_out 9>,
+ <&wcss_smp2p_out 10>;
+ qcom,smem-state-names =
+ "shutdown",
+ "stop",
+ "spawn";
+
+ status = "disabled";
+ };
+
+ // QCN6102 5G
+ q6_wcss_pd2: pd-2 {
+ firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
+
+ interrupts-extended =
+ <&wcss_smp2p_in 16 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 17 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 20 IRQ_TYPE_NONE>,
+ <&wcss_smp2p_in 19 IRQ_TYPE_NONE>;
+ interrupt-names =
+ "fatal",
+ "ready",
+ "spawn-ack",
+ "stop-ack";
+
+ qcom,smem-states =
+ <&wcss_smp2p_out 16>,
+ <&wcss_smp2p_out 17>,
+ <&wcss_smp2p_out 18>;
+ qcom,smem-state-names =
+ "shutdown",
+ "stop",
+ "spawn";
+
+ status = "disabled";
+ };
+};
+
+&wifi0 {
+ // IPQ5018
+ qcom,rproc = <&q6_wcss_pd1>;
+ qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
+ qcom,ath11k-calibration-variant = "CMCC-PZ-L8";
+ qcom,ath11k-fw-memory-mode = <1>;
+ qcom,bdf-addr = <0x4c400000>;
+
+ ieee80211-freq-limit = <2400000 2483000>;
+
+ status = "disabled";
+};
+
+&wifi1 {
+ // QCN6102 5G
+ qcom,rproc = <&q6_wcss_pd2>;
+ qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
+ qcom,ath11k-calibration-variant = "CMCC-PZ-L8";
+ qcom,ath11k-fw-memory-mode = <1>;
+ qcom,bdf-addr = <0x4d100000>;
+ qcom,m3-dump-addr = <0x4df00000>;
+
+ ieee80211-freq-limit = <5150000 5730000>;
+
+ status = "disabled";
+};
projects / openwrt / staging / blocktrron.git / commitdiff