clk: tegra: Fix periph_clk_to_bit macro

The parameter name should be "gate", not "periph".  This worked, however,
because it happens that everywhere periph_clk_to_bit is called, "gate" was
in the local scope.

Signed-off-by: Yen Lin <[email protected]>
Signed-off-by: Andrew Chew <[email protected]>
Reviewed-by: Thierry Reding <[email protected]>
Reviewed-by: Prashant Gaikwad <[email protected]>
Acked-by: Peter De Schrijver <[email protected]>
Acked-by: Mike Turquette <[email protected]>
Signed-off-by: Stephen Warren <[email protected]>

diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c
index 6dd533251e7b103255e8edb2bb0cc87cfa60ca97..d87e1cece9fa58f72146fb09792e30884848945f 100644 (file)
--- a/drivers/clk/tegra/clk-periph-gate.c
+++ b/drivers/clk/tegra/clk-periph-gate.c
@@ -41,7 +41,7 @@ static DEFINE_SPINLOCK(periph_ref_lock);
 #define write_rst_clr(val, gate) \
        writel_relaxed(val, gate->clk_base + (gate->regs->rst_clr_reg))
 
-#define periph_clk_to_bit(periph) (1 << (gate->clk_num % 32))
+#define periph_clk_to_bit(gate) (1 << (gate->clk_num % 32))
 
 /* Peripheral gate clock ops */
 static int clk_periph_is_enabled(struct clk_hw *hw)