ASoC: Intel: bxtn: Disable interrupt when DSP is in D3

When DSP is in D3, no interrupts are expected, so disable
interrupt while entering D3.

Signed-off-by: Jeeja KP <[email protected]>
Acked-by: Vinod Koul <[email protected]>
Signed-off-by: Mark Brown <[email protected]>

diff --git a/sound/soc/intel/skylake/bxt-sst.c b/sound/soc/intel/skylake/bxt-sst.c
index d3be1be5a372f72e15e6605e1c34b1cf7a005e1c..b34c965086058e099f8e7e0d12ff557400d80657 100644 (file)
--- a/sound/soc/intel/skylake/bxt-sst.c
+++ b/sound/soc/intel/skylake/bxt-sst.c
@@ -537,6 +537,11 @@ static int bxt_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id)
                "Failed to set DSP to D3:core id = %d;Continue reset\n",
                core_id);
 
+       if (core_id == SKL_DSP_CORE0_ID) {
+               /* disable Interrupt */
+               skl_ipc_op_int_disable(ctx);
+               skl_ipc_int_disable(ctx);
+       }
        ret = skl_dsp_disable_core(ctx, core_mask);
        if (ret < 0) {
                dev_err(ctx->dev, "Failed to disable core %d\n", ret);