net_work->priv = priv;
net_work->mac = ether_addr_to_u64(n->ha);
- net_work->gw_addr = *(__be32 *) n->primary_key;
+ net_work->gw_addr = *(__be32 *)n->primary_key;
pr_debug("%s: updating neighbour on port %d, mac %016llx\n",
__func__, port, net_work->mac);
if (!e->valid)
return 0;
- return (((u64) r[1]) << 32) | (r[2]); /* mac and vid concatenated as hash seed */
+ return (((u64)r[1]) << 32) | (r[2]); /* mac and vid concatenated as hash seed */
}
static void rtl838x_write_l2_entry_using_hash(u32 hash, u32 pos, struct rtl838x_l2_entry *e)
pr_debug("Found in CAM: R1 %x R2 %x R3 %x\n", r[0], r[1], r[2]);
/* Return MAC with concatenated VID ac concatenated ID */
- return (((u64) r[1]) << 32) | r[2];
+ return (((u64)r[1]) << 32) | r[2];
}
static void rtl838x_write_cam(int idx, struct rtl838x_l2_entry *e)
static void rtl838x_write_pie_fixed_fields(u32 r[], struct pie_rule *pr)
{
- r[6] = ((u32) (pr->spmmask_fix & 0x3)) << 22;
- r[6] |= ((u32) (pr->spn & 0x3f)) << 16;
+ r[6] = ((u32)(pr->spmmask_fix & 0x3)) << 22;
+ r[6] |= ((u32)(pr->spn & 0x3f)) << 16;
r[6] |= pr->mgnt_vlan ? BIT(15) : 0;
r[6] |= pr->dmac_hit_sw ? BIT(14) : 0;
r[6] |= pr->not_first_frag ? BIT(13) : 0;
- r[6] |= ((u32) (pr->frame_type_l4 & 0x7)) << 10;
- r[6] |= ((u32) (pr->frame_type & 0x3)) << 8;
+ r[6] |= ((u32)(pr->frame_type_l4 & 0x7)) << 10;
+ r[6] |= ((u32)(pr->frame_type & 0x3)) << 8;
r[6] |= pr->otag_fmt ? BIT(7) : 0;
r[6] |= pr->itag_fmt ? BIT(6) : 0;
r[6] |= pr->otag_exist ? BIT(5) : 0;
r[6] |= pr->itag_exist ? BIT(4) : 0;
- r[6] |= ((u32) (pr->frame_type_l2 & 0x3)) << 2;
- r[6] |= ((u32) (pr->tid & 0x3));
+ r[6] |= ((u32)(pr->frame_type_l2 & 0x3)) << 2;
+ r[6] |= ((u32)(pr->tid & 0x3));
- r[13] = ((u32) (pr->spmmask_fix_m & 0x3)) << 22;
- r[13] |= ((u32) (pr->spn_m & 0x3f)) << 16;
+ r[13] = ((u32)(pr->spmmask_fix_m & 0x3)) << 22;
+ r[13] |= ((u32)(pr->spn_m & 0x3f)) << 16;
r[13] |= pr->mgnt_vlan_m ? BIT(15) : 0;
r[13] |= pr->dmac_hit_sw_m ? BIT(14) : 0;
r[13] |= pr->not_first_frag_m ? BIT(13) : 0;
- r[13] |= ((u32) (pr->frame_type_l4_m & 0x7)) << 10;
- r[13] |= ((u32) (pr->frame_type_m & 0x3)) << 8;
+ r[13] |= ((u32)(pr->frame_type_l4_m & 0x7)) << 10;
+ r[13] |= ((u32)(pr->frame_type_m & 0x3)) << 8;
r[13] |= pr->otag_fmt_m ? BIT(7) : 0;
r[13] |= pr->itag_fmt_m ? BIT(6) : 0;
r[13] |= pr->otag_exist_m ? BIT(5) : 0;
r[13] |= pr->itag_exist_m ? BIT(4) : 0;
- r[13] |= ((u32) (pr->frame_type_l2_m & 0x3)) << 2;
- r[13] |= ((u32) (pr->tid_m & 0x3));
+ r[13] |= ((u32)(pr->frame_type_l2_m & 0x3)) << 2;
+ r[13] |= ((u32)(pr->tid_m & 0x3));
r[14] = pr->valid ? BIT(31) : 0;
r[14] |= pr->cond_not ? BIT(30) : 0;
static void rtl839x_write_pie_fixed_fields(u32 r[], struct pie_rule *pr)
{
- r[6] = ((u32) (pr->spmmask_fix & 0x3)) << 30;
- r[6] |= ((u32) (pr->spn & 0x3f)) << 24;
+ r[6] = ((u32)(pr->spmmask_fix & 0x3)) << 30;
+ r[6] |= ((u32)(pr->spn & 0x3f)) << 24;
r[6] |= pr->mgnt_vlan ? BIT(23) : 0;
r[6] |= pr->dmac_hit_sw ? BIT(22) : 0;
r[6] |= pr->not_first_frag ? BIT(21) : 0;
- r[6] |= ((u32) (pr->frame_type_l4 & 0x7)) << 18;
- r[6] |= ((u32) (pr->frame_type & 0x3)) << 16;
+ r[6] |= ((u32)(pr->frame_type_l4 & 0x7)) << 18;
+ r[6] |= ((u32)(pr->frame_type & 0x3)) << 16;
r[6] |= pr->otag_fmt ? BIT(15) : 0;
r[6] |= pr->itag_fmt ? BIT(14) : 0;
r[6] |= pr->otag_exist ? BIT(13) : 0;
r[6] |= pr->itag_exist ? BIT(12) : 0;
- r[6] |= ((u32) (pr->frame_type_l2 & 0x3)) << 10;
- r[6] |= ((u32) (pr->tid & 0x3)) << 8;
+ r[6] |= ((u32)(pr->frame_type_l2 & 0x3)) << 10;
+ r[6] |= ((u32)(pr->tid & 0x3)) << 8;
- r[12] |= ((u32) (pr->spmmask_fix_m & 0x3)) << 6;
- r[12] |= (u32) (pr->spn_m & 0x3f);
+ r[12] |= ((u32)(pr->spmmask_fix_m & 0x3)) << 6;
+ r[12] |= (u32)(pr->spn_m & 0x3f);
r[13] |= pr->mgnt_vlan_m ? BIT(31) : 0;
r[13] |= pr->dmac_hit_sw_m ? BIT(30) : 0;
r[13] |= pr->not_first_frag_m ? BIT(29) : 0;
- r[13] |= ((u32) (pr->frame_type_l4_m & 0x7)) << 26;
- r[13] |= ((u32) (pr->frame_type_m & 0x3)) << 24;
+ r[13] |= ((u32)(pr->frame_type_l4_m & 0x7)) << 26;
+ r[13] |= ((u32)(pr->frame_type_m & 0x3)) << 24;
r[13] |= pr->otag_fmt_m ? BIT(23) : 0;
r[13] |= pr->itag_fmt_m ? BIT(22) : 0;
r[13] |= pr->otag_exist_m ? BIT(21) : 0;
r[13] |= pr->itag_exist_m ? BIT(20) : 0;
- r[13] |= ((u32) (pr->frame_type_l2_m & 0x3)) << 18;
- r[13] |= ((u32) (pr->tid_m & 0x3)) << 16;
+ r[13] |= ((u32)(pr->frame_type_l2_m & 0x3)) << 18;
+ r[13] |= ((u32)(pr->tid_m & 0x3)) << 16;
r[13] |= pr->valid ? BIT(15) : 0;
r[13] |= pr->cond_not ? BIT(14) : 0;
static void rtl930x_write_pie_fixed_fields(u32 r[], struct pie_rule *pr)
{
r[6] = pr->stacking_port ? BIT(31) : 0;
- r[6] |= ((u32) (pr->spn & 0x7f)) << 24;
+ r[6] |= ((u32)(pr->spn & 0x7f)) << 24;
r[6] |= pr->mgnt_vlan ? BIT(23) : 0;
if (pr->phase == PHASE_IACL)
r[6] |= pr->dmac_hit_sw ? BIT(22) : 0;
else
r[6] |= pr->content_too_deep ? BIT(22) : 0;
r[6] |= pr->not_first_frag ? BIT(21) : 0;
- r[6] |= ((u32) (pr->frame_type_l4 & 0x7)) << 18;
- r[6] |= ((u32) (pr->frame_type & 0x3)) << 16;
+ r[6] |= ((u32)(pr->frame_type_l4 & 0x7)) << 18;
+ r[6] |= ((u32)(pr->frame_type & 0x3)) << 16;
r[6] |= pr->otag_fmt ? BIT(15) : 0;
r[6] |= pr->itag_fmt ? BIT(14) : 0;
r[6] |= pr->otag_exist ? BIT(13) : 0;
r[6] |= pr->itag_exist ? BIT(12) : 0;
- r[6] |= ((u32) (pr->frame_type_l2 & 0x3)) << 10;
+ r[6] |= ((u32)(pr->frame_type_l2 & 0x3)) << 10;
r[6] |= pr->igr_normal_port ? BIT(9) : 0;
- r[6] |= ((u32) (pr->tid & 0x1)) << 8;
+ r[6] |= ((u32)(pr->tid & 0x1)) << 8;
r[12] |= pr->stacking_port_m ? BIT(7) : 0;
- r[12] |= (u32) (pr->spn_m & 0x7f);
+ r[12] |= (u32)(pr->spn_m & 0x7f);
r[13] |= pr->mgnt_vlan_m ? BIT(31) : 0;
if (pr->phase == PHASE_IACL)
r[13] |= pr->dmac_hit_sw_m ? BIT(30) : 0;
else
r[13] |= pr->content_too_deep_m ? BIT(30) : 0;
r[13] |= pr->not_first_frag_m ? BIT(29) : 0;
- r[13] |= ((u32) (pr->frame_type_l4_m & 0x7)) << 26;
- r[13] |= ((u32) (pr->frame_type_m & 0x3)) << 24;
+ r[13] |= ((u32)(pr->frame_type_l4_m & 0x7)) << 26;
+ r[13] |= ((u32)(pr->frame_type_m & 0x3)) << 24;
r[13] |= pr->otag_fmt_m ? BIT(23) : 0;
r[13] |= pr->itag_fmt_m ? BIT(22) : 0;
r[13] |= pr->otag_exist_m ? BIT(21) : 0;
r[13] |= pr->itag_exist_m ? BIT(20) : 0;
- r[13] |= ((u32) (pr->frame_type_l2_m & 0x3)) << 18;
+ r[13] |= ((u32)(pr->frame_type_l2_m & 0x3)) << 18;
r[13] |= pr->igr_normal_port_m ? BIT(17) : 0;
- r[13] |= ((u32) (pr->tid_m & 0x1)) << 16;
+ r[13] |= ((u32)(pr->tid_m & 0x1)) << 16;
r[13] |= pr->valid ? BIT(15) : 0;
r[13] |= pr->cond_not ? BIT(14) : 0;
(sw_r32(RTL931X_VLAN_PROFILE_SET(index) + 24) & 0xFFFFFFFF);
pr_debug("VLAN %d: L2 learning: %d, L2 Unknown MultiCast Field %llx, IPv4 Unknown MultiCast Field %llx, IPv6 Unknown MultiCast Field: %llx\n",
- index, (u32) (profile[0] & (3 << 14)), profile[1], profile[2], profile[3]);
+ index, (u32)(profile[0] & (3 << 14)), profile[1], profile[2], profile[3]);
}
static void rtl931x_stp_get(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[])
rtl_table_release(r);
pr_debug("VLAN_READ %d: %08x %08x %08x %08x\n", vlan, v, w, x, y);
- info->member_ports = ((u64) v) << 25 | (w >> 7);
+ info->member_ports = ((u64)v) << 25 | (w >> 7);
info->profile_id = (x >> 16) & 0xf;
info->fid = w & 0x7f; /* AKA MSTI depending on context */
info->hash_uc_fid = !!(x & BIT(31));
else
r[7] |= pr->content_too_deep ? BIT(30) : 0;
r[7] |= pr->not_first_frag ? BIT(29) : 0;
- r[7] |= ((u32) (pr->frame_type_l4 & 0x7)) << 26;
- r[7] |= ((u32) (pr->frame_type & 0x3)) << 24;
+ r[7] |= ((u32)(pr->frame_type_l4 & 0x7)) << 26;
+ r[7] |= ((u32)(pr->frame_type & 0x3)) << 24;
r[7] |= pr->otag_fmt ? BIT(23) : 0;
r[7] |= pr->itag_fmt ? BIT(22) : 0;
r[7] |= pr->otag_exist ? BIT(21) : 0;
r[7] |= pr->itag_exist ? BIT(20) : 0;
- r[7] |= ((u32) (pr->frame_type_l2 & 0x3)) << 18;
+ r[7] |= ((u32)(pr->frame_type_l2 & 0x3)) << 18;
r[7] |= pr->igr_normal_port ? BIT(17) : 0;
- r[7] |= ((u32) (pr->tid & 0x1)) << 16;
+ r[7] |= ((u32)(pr->tid & 0x1)) << 16;
r[14] |= pr->mgnt_vlan_m ? BIT(15) : 0;
if (pr->phase == PHASE_IACL)
else
r[14] |= pr->content_too_deep_m ? BIT(14) : 0;
r[14] |= pr->not_first_frag_m ? BIT(13) : 0;
- r[14] |= ((u32) (pr->frame_type_l4_m & 0x7)) << 10;
- r[14] |= ((u32) (pr->frame_type_m & 0x3)) << 8;
+ r[14] |= ((u32)(pr->frame_type_l4_m & 0x7)) << 10;
+ r[14] |= ((u32)(pr->frame_type_m & 0x3)) << 8;
r[14] |= pr->otag_fmt_m ? BIT(7) : 0;
r[14] |= pr->itag_fmt_m ? BIT(6) : 0;
r[14] |= pr->otag_exist_m ? BIT(5) : 0;
r[14] |= pr->itag_exist_m ? BIT(4) : 0;
- r[14] |= ((u32) (pr->frame_type_l2_m & 0x3)) << 2;
+ r[14] |= ((u32)(pr->frame_type_l2_m & 0x3)) << 2;
r[14] |= pr->igr_normal_port_m ? BIT(1) : 0;
- r[14] |= (u32) (pr->tid_m & 0x1);
+ r[14] |= (u32)(pr->tid_m & 0x1);
r[15] |= pr->valid ? BIT(31) : 0;
r[15] |= pr->cond_not ? BIT(30) : 0;
for (int i = 0; i < NOTIFY_BLOCKS; i++)
b->ring[i] = KSEG1ADDR(&b->blocks[i]) | 1 | (i == (NOTIFY_BLOCKS - 1) ? WRAP : 0);
- sw_w32((u32) b->ring, RTL839X_DMA_IF_NBUF_BASE_DESC_ADDR_CTRL);
+ sw_w32((u32)b->ring, RTL839X_DMA_IF_NBUF_BASE_DESC_ADDR_CTRL);
sw_w32_mask(0x3ff << 2, 100 << 2, RTL839X_L2_NOTIFICATION_CTRL);
/* Setup notification events */
{
struct rtl838x_eth_priv *priv = netdev_priv(dev);
const struct sockaddr *addr = p;
- u8 *mac = (u8 *) (addr->sa_data);
+ u8 *mac = (u8 *)(addr->sa_data);
if (!is_valid_ether_addr(addr->sa_data))
return -EADDRNOTAVAIL;
goto out;
}
- h = (struct fw_header *) fw->data;
+ h = (struct fw_header *)fw->data;
pr_info("Firmware loaded. Size %d, magic: %08x\n", fw->size, h->magic);
if (h->magic != 0x83808380) {