return NULL;
}
-
static struct rtl83xx_route *rtl83xx_host_route_alloc(struct rtl838x_switch_priv *priv, u32 ip)
{
struct rtl83xx_route *r;
{ /* sentinel */ }
};
-
MODULE_DEVICE_TABLE(of, rtl83xx_switch_of_ids);
static struct platform_driver rtl83xx_switch_driver = {
.write = port_egress_rate_write,
};
-
static const struct debugfs_reg32 port_ctrl_regs[] = {
{ .name = "port_isolation", .offset = RTL838X_PORT_ISO_CTRL(0), },
{ .name = "mac_force_mode", .offset = RTL838X_MAC_FORCE_MODE_CTRL, },
.list = rtldsa_931x_mib_list
};
-
/* DSA callbacks */
-
static enum dsa_tag_protocol rtl83xx_get_tag_protocol(struct dsa_switch *ds,
int port,
enum dsa_tag_protocol mprot)
return mib_desc->list_count;
}
-
static void rtldsa_get_eth_phy_stats(struct dsa_switch *ds, int port,
struct ethtool_eth_phy_stats *phy_stats)
{
rmon_stats->hist[i] = counters->rx_pkts[i].val;
}
-
for (int i = 0; i < ARRAY_SIZE(mib_desc->tx_pkts); i++) {
if (mib_desc->tx_pkts[i].reg == MIB_REG_INVALID)
break;
}
-
static void rtl838x_setup_prio2queue_matrix(int *min_queues)
{
u32 v = 0;
*/
#define N_FIXED_TEMPLATES 5
static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] = {
-
{
TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_OTAG,
TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
static void rtl838x_enable_mcast_flood(int port, bool enable)
{
-
}
static void rtl838x_enable_bcast_flood(int port, bool enable)
{
-
}
static void rtl838x_set_static_move_action(int port, bool forward)
/* Number of fixed templates predefined in the SoC */
#define N_FIXED_TEMPLATES 5
static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] = {
-
{
TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_ITAG,
TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
static void rtl839x_enable_mcast_flood(int port, bool enable)
{
-
}
static void rtl839x_enable_bcast_flood(int port, bool enable)
{
-
}
static void rtl839x_set_static_move_action(int port, bool forward)
#include <net/dsa.h>
#include "rtl838x.h"
-
#define RTL8380_VERSION_A 'A'
#define RTL8390_VERSION_A 'A'
#define RTL8380_VERSION_B 'B'
#define N_FIXED_TEMPLATES 5
/* RTL9300 specific predefined templates */
static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] = {
-
{
TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
rtl_table_release(r);
}
-
/* Get the destination MAC and L3 egress interface ID of a nexthop entry from
* the SoC's L3_NEXTHOP table
*/
template_selectors = 2 | (3 << 4);
for (int i = priv->n_pie_blocks * 3 / 4; i < priv->n_pie_blocks; i++)
sw_w32(template_selectors, RTL930X_PIE_BLK_TMPLTE_CTRL(i));
-
}
#ifdef CONFIG_NET_DSA_RTL83XX_RTL930X_L3_OFFLOAD
#define N_FIXED_TEMPLATES 5
/* RTL931x specific predefined templates */
static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS_RTL931X] = {
-
{
TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
rtl_table_release(q);
}
-
static int rtl931x_set_ageing_time(unsigned long msec)
{
int t = sw_r32(RTL931X_L2_AGE_CTRL);
template_selectors = 2 | (3 << 4);
for (int i = priv->n_pie_blocks * 3 / 4; i < priv->n_pie_blocks; i++)
sw_w32(template_selectors, RTL931X_PIE_BLK_TMPLTE_CTRL(i));
-
}
static void rtl931x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
}
}
-
static int rtl83xx_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
void *cb_priv)
{
/* We can send this packet if CPU owns the descriptor */
if (!(ring->tx_r[q][ring->c_tx[q]] & 0x1)) {
-
/* Set descriptor for tx */
h = &ring->tx_header[q][ring->c_tx[q]];
h->size = len;
return (speed & 0x3);
}
-
inline u32 rtl930x_get_mac_link_spd_sts(int port)
{
int r = RTL930X_MAC_LINK_SPD_STS + ((port >> 3) << 2);
rtpcs_930x_sds_submode_set(ctrl, sds, submode);
}
-
static void rtpcs_930x_sds_tx_config(struct rtpcs_ctrl *ctrl, int sds,
phy_interface_t phy_if)
{
rtpcs_930x_sds_do_rx_calibration_5_2(ctrl, sds_num);
}
-
static void rtpcs_930x_sds_do_rx_calibration_dfe_disable(struct rtpcs_ctrl *ctrl, u32 sds_num)
{
u32 tap1_list[4] = {0};
static void rtpcs_931x_sds_symerr_clear(struct rtpcs_ctrl *ctrl, u32 sds,
phy_interface_t mode)
{
-
switch (mode) {
case PHY_INTERFACE_MODE_NA:
break;
val = 0x39;
break; */
-
case PHY_INTERFACE_MODE_USXGMII:
val = 0x1B;
break;
rtpcs_sds_write_bits(ctrl, sds, 0x81, 0x1, 7, 4, 0xf);
rtpcs_sds_write_bits(ctrl, sds, 0x81, 0x1, 3, 0, 0xf);
-
}
rtpcs_sds_write_bits(ctrl, sds, 0x40, 0xE, 12, 12, 1);
rtpcs_sds_write_bits(ctrl, sds, 0x6, 0x2, 12, 12, 0);
} else {
-
rtpcs_sds_write_bits(ctrl, sds, 0x2e, 0xd, 6, 0, 0x0);
rtpcs_sds_write_bits(ctrl, sds, 0x2e, 0xd, 7, 7, 0x1);
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