Cortex-A55: Implement workaround for erratum 903758

Change-Id: I07e69061ba7a918cdfaaa83fa3a42dee910887d7
Signed-off-by: Ambroise Vincent <[email protected]>

diff --git a/docs/cpu-specific-build-macros.rst b/docs/cpu-specific-build-macros.rst
index 85e5642481d2b10624b9bdf16059ebea74b33088..ea831b70108df9b718475439e43a8b0df39ade67 100644 (file)
--- a/docs/cpu-specific-build-macros.rst
+++ b/docs/cpu-specific-build-macros.rst
@@ -111,6 +111,9 @@ For Cortex-A55, the following errata build flags are defined :
 -  ``ERRATA_A55_846532``: This applies errata 846532 workaround to Cortex-A55
    CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
 
+-  ``ERRATA_A55_903758``: This applies errata 903758 workaround to Cortex-A55
+   CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
+
 For Cortex-A57, the following errata build flags are defined :
 
 -  ``ERRATA_A57_806969``: This applies errata 806969 workaround to Cortex-A57

diff --git a/lib/cpus/aarch64/cortex_a55.S b/lib/cpus/aarch64/cortex_a55.S
index 3099971dcb3f41c54e00bba68849812b213ba016..1da80efa28d098168a13fc92c10fa7f0108c482a 100644 (file)
--- a/lib/cpus/aarch64/cortex_a55.S
+++ b/lib/cpus/aarch64/cortex_a55.S
@@ -142,6 +142,34 @@ func check_errata_846532
        b       cpu_rev_var_ls
 endfunc check_errata_846532
 
+       /* -----------------------------------------------------
+        * Errata Workaround for Cortex A55 Errata #903758.
+        * This applies only to revisions <= r0p1 of Cortex A55.
+        * Inputs:
+        * x0: variant[4:7] and revision[0:3] of current cpu.
+        * Shall clobber: x0-x17
+        * -----------------------------------------------------
+        */
+func errata_a55_903758_wa
+       /*
+        * Compare x0 against revision r0p1
+        */
+       mov     x17, x30
+       bl      check_errata_903758
+       cbz     x0, 1f
+       mrs     x1, CORTEX_A55_CPUACTLR_EL1
+       orr     x1, x1, #CORTEX_A55_CPUACTLR_EL1_DISABLE_L1_PAGEWALKS
+       msr     CORTEX_A55_CPUACTLR_EL1, x1
+       isb
+1:
+       ret     x17
+endfunc errata_a55_903758_wa
+
+func check_errata_903758
+       mov     x1, #0x01
+       b       cpu_rev_var_ls
+endfunc check_errata_903758
+
 func cortex_a55_reset_func
        mov     x19, x30
 
@@ -172,6 +200,11 @@ func cortex_a55_reset_func
        bl      errata_a55_846532_wa
 #endif
 
+#if ERRATA_A55_903758
+       mov     x0, x18
+       bl      errata_a55_903758_wa
+#endif
+
        ret     x19
 endfunc cortex_a55_reset_func
 
@@ -209,6 +242,7 @@ func cortex_a55_errata_report
        report_errata ERRATA_A55_778703, cortex_a55, 778703
        report_errata ERRATA_A55_798797, cortex_a55, 798797
        report_errata ERRATA_A55_846532, cortex_a55, 846532
+       report_errata ERRATA_A55_903758, cortex_a55, 903758
 
        ldp     x8, x30, [sp], #16
        ret

diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 644c9cdf18b71e3a56934cd110bcf57f85307d42..98d59ef5bb2601d75817988a9df4811685479f64 100644 (file)
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -95,6 +95,10 @@ ERRATA_A55_798797    ?=0
 # only to revision <= r0p1 of the Cortex A55 cpu.
 ERRATA_A55_846532      ?=0
 
+# Flag to apply erratum 903758 workaround during reset. This erratum applies
+# only to revision <= r0p1 of the Cortex A55 cpu.
+ERRATA_A55_903758      ?=0
+
 # Flag to apply erratum 806969 workaround during reset. This erratum applies
 # only to revision r0p0 of the Cortex A57 cpu.
 ERRATA_A57_806969      ?=0
@@ -180,6 +184,10 @@ $(eval $(call add_define,ERRATA_A55_798797))
 $(eval $(call assert_boolean,ERRATA_A55_846532))
 $(eval $(call add_define,ERRATA_A55_846532))
 
+# Process ERRATA_A55_903758 flag
+$(eval $(call assert_boolean,ERRATA_A55_903758))
+$(eval $(call add_define,ERRATA_A55_903758))
+
 # Process ERRATA_A57_806969 flag
 $(eval $(call assert_boolean,ERRATA_A57_806969))
 $(eval $(call add_define,ERRATA_A57_806969))