projects
/
openwrt
/
staging
/
blogic.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
3d5155e
)
clk: renesas: r8a7795: Add CCREE clock
author
Gilad Ben-Yossef
<
[email protected]
>
Thu, 24 May 2018 14:19:09 +0000
(15:19 +0100)
committer
Geert Uytterhoeven
<
[email protected]
>
Tue, 19 Jun 2018 08:19:51 +0000
(10:19 +0200)
This patch adds the clock used by the CryptoCell 630p instance in the
SoC.
Signed-off-by: Gilad Ben-Yossef <
[email protected]
>
Signed-off-by: Geert Uytterhoeven <
[email protected]
>
drivers/clk/renesas/r8a7795-cpg-mssr.c
patch
|
blob
|
history
diff --git
a/drivers/clk/renesas/r8a7795-cpg-mssr.c
b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index e5b186566c097dd0fef7fb10907637e12d8a1ea6..a85dd50e89110d5d4c571c791a5a8cb87a4d537a 100644
(file)
--- a/
drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/
drivers/clk/renesas/r8a7795-cpg-mssr.c
@@
-133,6
+133,7
@@
static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
DEF_MOD("sys-dmac2", 217, R8A7795_CLK_S0D3),
DEF_MOD("sys-dmac1", 218, R8A7795_CLK_S0D3),
DEF_MOD("sys-dmac0", 219, R8A7795_CLK_S0D3),
+ DEF_MOD("sceg-pub", 229, R8A7795_CLK_CR),
DEF_MOD("cmt3", 300, R8A7795_CLK_R),
DEF_MOD("cmt2", 301, R8A7795_CLK_R),
DEF_MOD("cmt1", 302, R8A7795_CLK_R),