[ARM] 4710/1: Fix coprocessor 14 usage for debug messages via ICEDCC

According to ARM7TDMI Technical Reference Manual (ARM DDI 0210C) writing
to the DCC data write register coproc dest registers are 1 and 0, not 0
and 1.

ARM920T TRM (ARM DDI 0151C) agrees on that.

Cc: Ben Dooks <[email protected]>
Signed-off-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Russell King <[email protected]>

diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index b9b03eda70e5a370b02b3c276cd9db69405af3d7..5cac46a19bb781609b1940c7cde7d353641d246f 100644 (file)
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -31,7 +31,7 @@
                .macro  loadsp, rb
                .endm
                .macro  writeb, ch, rb
-               mcr     p14, 0, \ch, c0, c1, 0
+               mcr     p14, 0, \ch, c1, c0, 0
                .endm
 #endif