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Blackfin arch: Add missing definitions for BF561
author
Mike Frysinger
<
[email protected]
>
Tue, 30 Oct 2007 04:03:47 +0000
(12:03 +0800)
committer
Bryan Wu
<
[email protected]
>
Tue, 30 Oct 2007 04:03:47 +0000
(12:03 +0800)
Signed-off-by: Mike Frysinger <
[email protected]
>
Signed-off-by: Bryan Wu <
[email protected]
>
include/asm-blackfin/mach-bf561/defBF561.h
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diff --git
a/include/asm-blackfin/mach-bf561/defBF561.h
b/include/asm-blackfin/mach-bf561/defBF561.h
index bf7dc4e00065d2023c2133c8f018c1a3f960e02c..7945e8a3a8412fffa55c7b12ddd87773873e8bc4 100644
(file)
--- a/
include/asm-blackfin/mach-bf561/defBF561.h
+++ b/
include/asm-blackfin/mach-bf561/defBF561.h
@@
-55,6
+55,9
@@
/* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */
#define SWRST SICA_SWRST
#define SYSCR SICA_SYSCR
+#define RESET_DOUBLE (SWRST_DBL_FAULT_B|SWRST_DBL_FAULT_A)
+#define RESET_WDOG (SWRST_WDT_B|SWRST_WDT_A)
+#define RESET_SOFTWARE (SWRST_OCCURRED)
/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
#define SICA_SWRST 0xFFC00100 /* Software Reset register */