clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188

Now that the rockchip clock subsystem does clock gating with GPIO banks,
these are no longer enabled once during probe and no longer stay enabled
for eternity. When all these clocks are disabled, the parent clock pclk_peri
might be disabled too, as no other child claims it. So, we need to add pclk_peri
to the critical clocks.

Signed-off-by: Romain Perier <[email protected]>
Tested-by: Michael Niewoehner <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>

diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index fa2f36b2abe7d67cdcbf20bc506f2e4ff31038a3..abb47608713bc39a8fddbdf915f29955b10a497f 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -717,6 +717,7 @@ static const char *const rk3188_critical_clocks[] __initconst = {
        "aclk_peri",
        "hclk_peri",
        "pclk_cpu",
+       "pclk_peri",
 };
 
 static void __init rk3188_common_clk_init(struct device_node *np)