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Revert "armv8: Enable CPUECTLR.SMPEN for coherency"
author
Tom Rini
<
[email protected]
>
Thu, 14 Jul 2016 21:36:18 +0000
(17:36 -0400)
committer
Tom Rini
<
[email protected]
>
Thu, 14 Jul 2016 21:36:18 +0000
(17:36 -0400)
Upon further review this breaks most other platforms as we need to check
what core we're running on before touching it at all.
This reverts commit
d73718f3236c520a92efa401084c658e6cc067f3
.
Signed-off-by: Tom Rini <
[email protected]
>
arch/arm/cpu/armv8/start.S
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diff --git
a/arch/arm/cpu/armv8/start.S
b/arch/arm/cpu/armv8/start.S
index dfce469206681acf558760c4faa9d6ef22c00010..670e323b61b37bc56bce5972fb80f13541263f94 100644
(file)
--- a/
arch/arm/cpu/armv8/start.S
+++ b/
arch/arm/cpu/armv8/start.S
@@
-81,14
+81,6
@@
reset:
msr cpacr_el1, x0 /* Enable FP/SIMD */
0:
- /* Enalbe SMPEN bit for coherency.
- * This register is not architectural but at the moment
- * this bit should be set for A53/A57/A72.
- */
- mrs x0, S3_1_c15_c2_1 /* cpuactlr_el1 */
- orr x0, x0, #0x40
- msr S3_1_c15_c2_1, x0
-
/* Apply ARM core specific erratas */
bl apply_core_errata