drm/i915/icl: Wa_1406680159

Disable GWL clock gating to prevent an issue that might
cause hangs.

v2: Rebased on top of the WA refactoring
v3: Wa_2201832410 officially merged with Wa_1406680159
v4: Added References (Mika)
v5:
  - Rebased
  - C, not lisp (Chris)
  - Add reference where WA is better explained (Rodrigo)
  - Add reference to WA that got merged with this

References: HSDES#1406681710
References: HSDES#1406680159
References: HSDES#2201832410
Signed-off-by: Oscar Mateo <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Mika Kuoppala <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index 469a83d521ae7f507bd06ad63165bd81510d2158..a3fa01a47c86561afa188d5f7d986cc4456db312 100644 (file)
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -745,6 +745,11 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
                I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE,
                           I915_READ(SLICE_UNIT_LEVEL_CLKGATE) |
                           MSCUNIT_CLKGATE_DIS);
+
+       /* Wa_1406680159:icl */
+       I915_WRITE(SUBSLICE_UNIT_LEVEL_CLKGATE,
+                  I915_READ(SUBSLICE_UNIT_LEVEL_CLKGATE) |
+                  GWUNIT_CLKGATE_DIS);
 }
 
 void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)