drm/amd/powerplay: enable fclk ss by default

Set fclk ss as enabled on default.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c
index 32d24a48a947c3bb6cdf31c32eb59f5c5fd9e518..5f1f7a32ac2479279c9a3ee2552831327b407071 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c
@@ -810,7 +810,7 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable
        ppsmc_pptable->UclkSpreadPercent = smc_dpm_table->uclkspreadpercent;
        ppsmc_pptable->UclkSpreadFreq = smc_dpm_table->uclkspreadfreq;
 
-       ppsmc_pptable->FclkSpreadEnabled = 0;
+       ppsmc_pptable->FclkSpreadEnabled = smc_dpm_table->fclkspreadenabled;
        ppsmc_pptable->FclkSpreadPercent = smc_dpm_table->fclkspreadpercent;
        ppsmc_pptable->FclkSpreadFreq = smc_dpm_table->fclkspreadfreq;