powerpc: mpc85xx: Use symbolic names for cache control bits

We should use the symbolic names for the cache control bits.

Signed-off-by: Mark Marshall <[email protected]>
Reviewed-by: Thomas Graziadei <[email protected]>
Reviewed-by: York Sun <[email protected]>

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 932216c237f9d2a8b96905027018f5d51a55fc23..eb817f1e86fd78d11e45051b8a4173995f0d4466 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1373,8 +1373,8 @@ icache_enable:
        mtlr    r8
        isync
        mfspr   r4,L1CSR1
-       ori     r4,r4,0x0001
-       oris    r4,r4,0x0001
+       ori     r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@l
+       oris    r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@h
        mtspr   L1CSR1,r4
        isync
        blr
@@ -1402,8 +1402,8 @@ dcache_enable:
        mtlr    r8
        isync
        mfspr   r0,L1CSR0
-       ori     r0,r0,0x0001
-       oris    r0,r0,0x0001
+       ori     r0,r0,(L1CSR0_CPE |  L1CSR0_DCE)@l
+       oris    r0,r0,(L1CSR0_CPE |  L1CSR0_DCE)@h
        msync
        isync
        mtspr   L1CSR0,r0