zynqmp: pm: Implemented pm API functions to load the bitstream into PL

This patch adds pm_fpga_load() and pm_fpga_get_status() API's to provide
the Access to the xilfpga library to load the bitstream into zynqmp
PL region.

Signed-off-by: Nava kishore Manne <[email protected]>

diff --git a/plat/xilinx/zynqmp/pm_service/pm_api_sys.c b/plat/xilinx/zynqmp/pm_service/pm_api_sys.c
index 52d917111e40390858d63ef183bfdf57b7100a47..efadbd200ee19346b0337ab2227ae41ea21df027 100644 (file)
--- a/plat/xilinx/zynqmp/pm_service/pm_api_sys.c
+++ b/plat/xilinx/zynqmp/pm_service/pm_api_sys.c
@@ -497,3 +497,47 @@ enum pm_ret_status pm_mmio_read(uintptr_t address, unsigned int *value)
        PM_PACK_PAYLOAD2(payload, PM_MMIO_READ, address);
        return pm_ipi_send_sync(primary_proc, payload, value);
 }
+
+/**
+ * pm_fpga_load() - Load the bitstream into the PL.
+ *
+ * This function provides access to the xilfpga library to load
+ * the Bit-stream into PL.
+ *
+ * address_low: lower 32-bit Linear memory space address
+ *
+ * address_high: higher 32-bit Linear memory space address
+ *
+ * size:       Number of 32bit words
+ *
+ * @return      Returns status, either success or error+reason
+ */
+enum pm_ret_status pm_fpga_load(uint32_t address_low,
+                               uint32_t address_high,
+                               uint32_t size,
+                               uint32_t flags)
+{
+       uint32_t payload[PAYLOAD_ARG_CNT];
+
+       /* Send request to the PMU */
+       PM_PACK_PAYLOAD5(payload, PM_FPGA_LOAD, address_high, address_low,
+                                               size, flags);
+       return pm_ipi_send(primary_proc, payload);
+}
+
+/**
+ * pm_fpga_get_status() - Read value from fpga status register
+ * @value       Value to read
+ *
+ * This function provides access to the xilfpga library to get
+ * the fpga status
+ * @return      Returns status, either success or error+reason
+ */
+enum pm_ret_status pm_fpga_get_status(unsigned int *value)
+{
+       uint32_t payload[PAYLOAD_ARG_CNT];
+
+       /* Send request to the PMU */
+       PM_PACK_PAYLOAD1(payload, PM_FPGA_GET_STATUS);
+       return pm_ipi_send_sync(primary_proc, payload, value);
+}

diff --git a/plat/xilinx/zynqmp/pm_service/pm_api_sys.h b/plat/xilinx/zynqmp/pm_service/pm_api_sys.h
index 22bdb4774f293d52d900507e245ae0c871472a48..26d83e75a8dfcaa70faf23584a029e3e3e84de31 100644 (file)
--- a/plat/xilinx/zynqmp/pm_service/pm_api_sys.h
+++ b/plat/xilinx/zynqmp/pm_service/pm_api_sys.h
@@ -109,4 +109,10 @@ enum pm_ret_status pm_mmio_write(uintptr_t address,
                                 unsigned int mask,
                                 unsigned int value);
 enum pm_ret_status pm_mmio_read(uintptr_t address, unsigned int *value);
+enum pm_ret_status pm_fpga_load(uint32_t address_high,
+                               uint32_t address_low,
+                               uint32_t size,
+                               uint32_t flags);
+enum pm_ret_status pm_fpga_get_status(unsigned int *value);
+
 #endif /* _PM_API_SYS_H_ */

diff --git a/plat/xilinx/zynqmp/pm_service/pm_defs.h b/plat/xilinx/zynqmp/pm_service/pm_defs.h
index ddce1525b66744f820419c06d4a2386a4aa2284c..7fe5d37d301d7f656378f7c196d7df8c1010a180 100644 (file)
--- a/plat/xilinx/zynqmp/pm_service/pm_defs.h
+++ b/plat/xilinx/zynqmp/pm_service/pm_defs.h
@@ -87,6 +87,8 @@ enum pm_api_id {
        PM_MMIO_WRITE,
        PM_MMIO_READ,
        PM_INIT,
+       PM_FPGA_LOAD,
+       PM_FPGA_GET_STATUS,
        PM_API_MAX
 };
 

diff --git a/plat/xilinx/zynqmp/pm_service/pm_svc_main.c b/plat/xilinx/zynqmp/pm_service/pm_svc_main.c
index e3c25c31cc301fe9dddf4dbf5ff6d3e22df14e51..ccb4df8cdf812e694a77beebd4d238cabb930349 100644 (file)
--- a/plat/xilinx/zynqmp/pm_service/pm_svc_main.c
+++ b/plat/xilinx/zynqmp/pm_service/pm_svc_main.c
@@ -228,6 +228,19 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
                ret = pm_mmio_read(pm_arg[0], &value);
                SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
        }
+
+       case PM_FPGA_LOAD:
+               ret = pm_fpga_load(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]);
+               SMC_RET1(handle, (uint64_t)ret);
+
+       case PM_FPGA_GET_STATUS:
+       {
+               uint32_t value;
+
+               ret = pm_fpga_get_status(&value);
+               SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
+       }
+
        default:
                WARN("Unimplemented PM Service Call: 0x%x\n", smc_fid);
                SMC_RET1(handle, SMC_UNK);