perf/x86/intel/uncore: Correct num_boxes for IIO and IRP
authorKan Liang <[email protected]>
Mon, 11 Sep 2017 17:10:15 +0000 (10:10 -0700)
committerThomas Gleixner <[email protected]>
Mon, 25 Sep 2017 10:43:56 +0000 (12:43 +0200)
There are 6 IIO/IRP boxes for CBDMA, PCIe0-2, MCP 0 and MCP 1
separately. Correct the num_boxes.

Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Link: http://lkml.kernel.org/r/[email protected]
arch/x86/events/intel/uncore_snbep.c

index db1fe377e6dd9ddfcfbc006a7346879f263d408a..a7196818416a57381b513254628206a9660ed578 100644 (file)
@@ -3462,7 +3462,7 @@ static struct intel_uncore_ops skx_uncore_iio_ops = {
 static struct intel_uncore_type skx_uncore_iio = {
        .name                   = "iio",
        .num_counters           = 4,
-       .num_boxes              = 5,
+       .num_boxes              = 6,
        .perf_ctr_bits          = 48,
        .event_ctl              = SKX_IIO0_MSR_PMON_CTL0,
        .perf_ctr               = SKX_IIO0_MSR_PMON_CTR0,
@@ -3492,7 +3492,7 @@ static const struct attribute_group skx_uncore_format_group = {
 static struct intel_uncore_type skx_uncore_irp = {
        .name                   = "irp",
        .num_counters           = 2,
-       .num_boxes              = 5,
+       .num_boxes              = 6,
        .perf_ctr_bits          = 48,
        .event_ctl              = SKX_IRP0_MSR_PMON_CTL0,
        .perf_ctr               = SKX_IRP0_MSR_PMON_CTR0,