SPEAr sdhci driver expects the clock to be set to 50 MHz for proper
functioning. This patch sets clk to 50 MHz in probe.
Signed-off-by: Vipul Kumar Samar <[email protected]>
Signed-off-by: Viresh Kumar <[email protected]>
Signed-off-by: Chris Ball <[email protected]>
goto put_clk;
}
+ ret = clk_set_rate(sdhci->clk, 50000000);
+ if (ret)
+ dev_dbg(&pdev->dev, "Error setting desired clk, clk=%lu\n",
+ clk_get_rate(sdhci->clk));
+
if (np) {
sdhci->data = sdhci_probe_config_dt(pdev);
if (IS_ERR(sdhci->data)) {