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EDAC, altera: Fix S10 persistent register offset
author
Thor Thayer
<
[email protected]
>
Tue, 22 Jan 2019 17:48:04 +0000
(11:48 -0600)
committer
Borislav Petkov
<
[email protected]
>
Thu, 24 Jan 2019 16:13:59 +0000
(17:13 +0100)
Correct the persistent register offset where address and status are
stored.
Fixes: 08f08bfb7b4c ("EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine")
Signed-off-by: Thor Thayer <
[email protected]
>
Signed-off-by: Borislav Petkov <
[email protected]
>
Cc: James Morse <
[email protected]
>
Cc: Mauro Carvalho Chehab <
[email protected]
>
Cc:
[email protected]
Cc:
[email protected]
Cc: linux-edac <
[email protected]
>
Cc:
[email protected]
Cc:
[email protected]
Cc: stable <
[email protected]
>
Link:
https://lkml.kernel.org/r/
[email protected]
drivers/edac/altera_edac.h
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diff --git
a/drivers/edac/altera_edac.h
b/drivers/edac/altera_edac.h
index 4213cb0bb2a792cc6bdb2da5e2cc2ff621687654..f8664bac9fa82bae6d1bf7be616c3a3a83b562bb 100644
(file)
--- a/
drivers/edac/altera_edac.h
+++ b/
drivers/edac/altera_edac.h
@@
-295,8
+295,8
@@
struct altr_sdram_mc_data {
#define S10_SYSMGR_ECC_INTSTAT_DERR_OFST 0xA0
/* Sticky registers for Uncorrected Errors */
-#define S10_SYSMGR_UE_VAL_OFST 0x
1
20
-#define S10_SYSMGR_UE_ADDR_OFST 0x
1
24
+#define S10_SYSMGR_UE_VAL_OFST 0x
2
20
+#define S10_SYSMGR_UE_ADDR_OFST 0x
2
24
#define S10_DDR0_IRQ_MASK BIT(16)