realtek: Clean up global array definitions
authorSven Eckelmann <[email protected]>
Sun, 23 Nov 2025 15:50:29 +0000 (16:50 +0100)
committerHauke Mehrtens <[email protected]>
Mon, 24 Nov 2025 23:28:50 +0000 (00:28 +0100)
Global array initialization must have the open brace on the first
line and the next lines must be intended by one level. The closing
brace must be one a separate line.

Signed-off-by: Sven Eckelmann <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/20906
Signed-off-by: Hauke Mehrtens <[email protected]>
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c
target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c

index 79923d2d14df52dcf86b556d3d2f618e4f3bbe0e..afe49657b2884da3400c497e55425f9cc2d71aa3 100644 (file)
@@ -7,14 +7,21 @@
 
 #include "rtl83xx.h"
 
-static const u8 ipv4_ll_mcast_addr_base[ETH_ALEN] =
-{ 0x01, 0x00, 0x5e, 0x00, 0x00, 0x00 };
-static const u8 ipv4_ll_mcast_addr_mask[ETH_ALEN] =
-{ 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
-static const u8 ipv6_all_hosts_mcast_addr_base[ETH_ALEN] =
-{ 0x33, 0x33, 0x00, 0x00, 0x00, 0x01 };
-static const u8 ipv6_all_hosts_mcast_addr_mask[ETH_ALEN] =
-{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+static const u8 ipv4_ll_mcast_addr_base[ETH_ALEN] = {
+       0x01, 0x00, 0x5e, 0x00, 0x00, 0x00
+};
+
+static const u8 ipv4_ll_mcast_addr_mask[ETH_ALEN] = {
+       0xff, 0xff, 0xff, 0xff, 0xff, 0x00
+};
+
+static const u8 ipv6_all_hosts_mcast_addr_base[ETH_ALEN] = {
+       0x33, 0x33, 0x00, 0x00, 0x00, 0x01
+};
+
+static const u8 ipv6_all_hosts_mcast_addr_mask[ETH_ALEN] = {
+       0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+};
 
 static void rtldsa_init_counters(struct rtl838x_switch_priv *priv);
 static void rtldsa_port_xstp_state_set(struct rtl838x_switch_priv *priv, int port,
index 2fe0fc9a7281248f51bea44063996ab58912ddd3..413a78ba2ab5c90ff7ea12ded5eb6206946bf25f 100644 (file)
@@ -82,8 +82,8 @@ enum template_field_id {
  * TODO: See all src/app/diag_v2/src/diag_pie.c
  */
 #define N_FIXED_TEMPLATES 5
-static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] =
-{
+static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] = {
+
        {
          TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_OTAG,
          TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
index 0ba20339c549b50412c49dba386e8ab3420ac5ab..3e058ebfcd57772bf57bf724a2190f6b24f3f98c 100644 (file)
@@ -88,8 +88,8 @@ enum template_field_id {
 
 /* Number of fixed templates predefined in the SoC */
 #define N_FIXED_TEMPLATES 5
-static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] =
-{
+static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] = {
+
        {
          TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_ITAG,
          TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
index 65b989bf12882ccdc0f55e8570d615691cea7231..ed298eab13e35074ddadebe91861707537ea3ca0 100644 (file)
@@ -95,8 +95,8 @@ enum template_field_id {
 /* Number of fixed templates predefined in the RTL9300 SoC */
 #define N_FIXED_TEMPLATES 5
 /* RTL9300 specific predefined templates */
-static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] =
-{
+static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] = {
+
        {
          TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
          TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
index 5d513b2875f712c75a2239107bf1e3f7657168fc..3b67b1c486177f3a54f66c48dcd6a0386ebd2924 100644 (file)
@@ -81,8 +81,8 @@ enum template_field_id {
 /* Number of fixed templates predefined in the RTL9300 SoC */
 #define N_FIXED_TEMPLATES 5
 /* RTL931x specific predefined templates */
-static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS_RTL931X] =
-{
+static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS_RTL931X] = {
+
        {
                TEMPLATE_FIELD_DMAC0, TEMPLATE_FIELD_DMAC1, TEMPLATE_FIELD_DMAC2,
                TEMPLATE_FIELD_SMAC0, TEMPLATE_FIELD_SMAC1, TEMPLATE_FIELD_SMAC2,
index 9133379b6c9370a0e71827444180ef58cd9853fd..462dff0859072e587b02e09cb5c132cdff45d5a2 100644 (file)
@@ -1642,8 +1642,7 @@ static int rtpcs_930x_sds_set_polarity(struct rtpcs_ctrl *ctrl, u32 sds,
        return rtpcs_sds_write_bits(ctrl, sds, 0x0, 0x0, 9, 8, val);
 }
 
-static const sds_config rtpcs_930x_sds_cfg_10gr_even[] =
-{
+static const sds_config rtpcs_930x_sds_cfg_10gr_even[] = {
        /* 1G */
        {0x00, 0x0E, 0x3053}, {0x01, 0x14, 0x0100}, {0x21, 0x03, 0x8206},
        {0x21, 0x05, 0x40B0}, {0x21, 0x06, 0x0010}, {0x21, 0x07, 0xF09F},
@@ -1690,8 +1689,7 @@ static const sds_config rtpcs_930x_sds_cfg_10gr_even[] =
        {0x2F, 0x19, 0x4902}, {0x2F, 0x1D, 0x76E1},
 };
 
-static const sds_config rtpcs_930x_sds_cfg_10gr_odd[] =
-{
+static const sds_config rtpcs_930x_sds_cfg_10gr_odd[] = {
        /* 1G */
        {0x00, 0x0E, 0x3053}, {0x01, 0x14, 0x0100}, {0x21, 0x03, 0x8206},
        {0x21, 0x06, 0x0010}, {0x21, 0x07, 0xF09F}, {0x21, 0x0A, 0x0003},
@@ -1733,8 +1731,7 @@ static const sds_config rtpcs_930x_sds_cfg_10gr_odd[] =
        {0x2B, 0x14, 0x3108}, {0x2D, 0x13, 0x3C87}, {0x2D, 0x14, 0x1808},
 };
 
-static const sds_config rtpcs_930x_sds_cfg_10g_2500bx_even[] =
-{
+static const sds_config rtpcs_930x_sds_cfg_10g_2500bx_even[] = {
        {0x00, 0x0E, 0x3053}, {0x01, 0x14, 0x0100},
        {0x21, 0x03, 0x8206}, {0x21, 0x05, 0x40B0}, {0x21, 0x06, 0x0010}, {0x21, 0x07, 0xF09F},
        {0x21, 0x0C, 0x0007}, {0x21, 0x0D, 0x6009}, {0x21, 0x0E, 0x0000}, {0x21, 0x0F, 0x0008},
@@ -1756,8 +1753,7 @@ static const sds_config rtpcs_930x_sds_cfg_10g_2500bx_even[] =
        {0x2F, 0x13, 0x0050}, {0x2F, 0x18, 0x8E88}, {0x2F, 0x19, 0x4902}, {0x2F, 0x1D, 0x66E1},
 };
 
-static const sds_config rtpcs_930x_sds_cfg_10g_2500bx_odd[] =
-{
+static const sds_config rtpcs_930x_sds_cfg_10g_2500bx_odd[] = {
        {0x00, 0x0E, 0x3053}, {0x01, 0x14, 0x0100},
        {0x21, 0x03, 0x8206}, {0x21, 0x06, 0x0010}, {0x21, 0x07, 0xF09F}, {0x21, 0x0A, 0x0003},
        {0x21, 0x0B, 0x0005}, {0x21, 0x0C, 0x0007}, {0x21, 0x0D, 0x6009}, {0x21, 0x0E, 0x0000},