drm/amdgpu/si: fix ring size for compute

We switched the other asics, but missed this.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index a1484b8f7eb24871fa956ebc7d8ebde96572d3d8..9697994d3fff4127e4eec281c269e67c5cc8e190 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -2779,7 +2779,7 @@ static int gfx_v6_0_sw_init(void *handle)
                ring->queue = i;
                sprintf(ring->name, "comp %d.%d.%d", ring->me, ring->pipe, ring->queue);
                irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe;
-               r = amdgpu_ring_init(adev, ring, 1024 * 1024,
+               r = amdgpu_ring_init(adev, ring, 1024,
                                     0x80000000, 0xf,
                                     &adev->gfx.eop_irq, irq_type,
                                     AMDGPU_RING_TYPE_COMPUTE);