rcar_gen3: drivers: qos: M3W: Drop extra level of nesting
authorMarek Vasut <[email protected]>
Thu, 13 Jun 2019 23:39:27 +0000 (01:39 +0200)
committerMarek Vasut <[email protected]>
Mon, 17 Jun 2019 13:05:49 +0000 (15:05 +0200)
The extra level of nesting is not necessary, drop it.
No functional change.

Signed-off-by: Marek Vasut <[email protected]>
Change-Id: I086ab1f457866f0e2c3ccd67609c0be35631f893

drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v10.c
drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c
drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c

index fb69eaa077a98176e92f67ea9f107b7c8530f2f3..2887228879726847413dbf2f132986babeea8e83 100644 (file)
@@ -168,17 +168,15 @@ void qos_init_m3_v10(void)
        io_write_32(QOSCTRL_REF_ARS, 0x00330000U);
 
        /* QOSBW SRAM setting */
-       {
-               uint32_t i;
-
-               for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
-                       io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
-                       io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
-               }
-               for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
-                       io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
-                       io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
-               }
+       uint32_t i;
+
+       for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
+               io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+               io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
+       }
+       for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
+               io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+               io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
        }
 
        /* 3DG bus Leaf setting */
index 30cbc939f558a2f0daa88379151e0efe7211c9c1..8e2e18116899202ff1e3d7e219d499ae0ee4fb36 100644 (file)
@@ -175,30 +175,26 @@ void qos_init_m3_v11(void)
        io_write_32(QOSCTRL_REF_ARS, 0x00330000U);
 #endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
 
-       {
-               uint32_t i;
-
-               for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
-                       io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
-                       io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
-               }
-               for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
-                       io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
-                       io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
-               }
+       uint32_t i;
+
+       for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
+               io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+               io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
+       }
+       for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
+               io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+               io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
+       }
 #if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
-               for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
-                       io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
-                                   qoswt_fix[i]);
-                       io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
-                                   qoswt_fix[i]);
-               }
-               for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
-                       io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
-                       io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
-               }
-#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
+       for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
+               io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8, qoswt_fix[i]);
+               io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8, qoswt_fix[i]);
+       }
+       for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
+               io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
+               io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
        }
+#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
 
        /* 3DG bus Leaf setting */
        io_write_32(GPU_ACT_GRD, 0x00001234U);
index 585e37753e807d4e0841d4c42c035a4705f8925d..5a8d69fb0693365dc3fd1bb982b8e3fd86007656 100644 (file)
@@ -179,36 +179,26 @@ void qos_init_m3_v30(void)
        io_write_32(QOSCTRL_SL_INIT, SL_INIT_REFFSSLOT | SL_INIT_SLOTSSLOT | SL_INIT_SSLOTCLK_M3_30);
        io_write_32(QOSCTRL_REF_ARS, ((QOSCTRL_REF_ARS_ARBSTOPCYCLE_M3_30 << 16)));
 
-       {
        uint32_t i;
 
        for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
-               io_write_64(QOSBW_FIX_QOS_BANK0 + i*8,
-                               mstat_fix[i]);
-               io_write_64(QOSBW_FIX_QOS_BANK1 + i*8,
-                               mstat_fix[i]);
+               io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+               io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
        }
        for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
-               io_write_64(QOSBW_BE_QOS_BANK0 + i*8,
-                               mstat_be[i]);
-               io_write_64(QOSBW_BE_QOS_BANK1 + i*8,
-                               mstat_be[i]);
+               io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+               io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
        }
 #if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
        for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
-               io_write_64(QOSWT_FIX_WTQOS_BANK0 + i*8,
-                               qoswt_fix[i]);
-               io_write_64(QOSWT_FIX_WTQOS_BANK1 + i*8,
-                               qoswt_fix[i]);
+               io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8, qoswt_fix[i]);
+               io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8, qoswt_fix[i]);
        }
        for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
-               io_write_64(QOSWT_BE_WTQOS_BANK0 + i*8,
-                               qoswt_be[i]);
-               io_write_64(QOSWT_BE_WTQOS_BANK1 + i*8,
-                               qoswt_be[i]);
+               io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
+               io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
        }
 #endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
-       }
 
        /* RT bus Leaf setting */
        io_write_32(RT_ACT0, 0x00000000U);