ath79: fix QCA953x DDR and GPIO compatible bindings

The memory as well as GPIO controller had the wrong SoC name used for
their compatible binding.

Signed-off-by: David Bauer <[email protected]>

diff --git a/target/linux/ath79/dts/qca953x.dtsi b/target/linux/ath79/dts/qca953x.dtsi
index f7e0703e4eef74bd2f9f848d3cbba9aeedbaff10..af85e8482ac1d1c0a1447cc9fcada0bbbdc3044c 100644 (file)
--- a/target/linux/ath79/dts/qca953x.dtsi
+++ b/target/linux/ath79/dts/qca953x.dtsi
@@ -34,7 +34,7 @@
        ahb {
                apb {
                        ddr_ctrl: memory-controller@18000000 {
-                               compatible = "qca,ar9530-ddr-controller",
+                               compatible = "qca,qca9530-ddr-controller",
                                                "qca,ar7240-ddr-controller";
                                reg = <0x18000000 0x128>;
 
@@ -69,7 +69,7 @@
                        };
 
                        gpio: gpio@18040000 {
-                               compatible = "qca,ar9530-gpio",
+                               compatible = "qca,qca9530-gpio",
                                                "qca,ar9340-gpio";
                                reg = <0x18040000 0x28>;