reg = <5>;
label = "wifi";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@8 {
reg = <8>;
- phy-mode = "rgmii-txid";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port4>;
fixed-link {
reg = <4>;
label = "extsw";
- phy-mode = "rgmii-txid";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@8 {
reg = <0x8>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port6>;
fixed-link {
reg = <6>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@8 {
reg = <8>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port4>;
fixed-link {
reg = <4>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@8 {
reg = <8>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port4>;
fixed-link {
reg = <4>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@8 {
reg = <8>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port6>;
fixed-link {
reg = <6>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
reg = <4>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@8 {
reg = <8>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port4>;
fixed-link {
reg = <4>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
label = "wan";
phy-handle = <&phy24>;
- phy-mode = "rgmii-txid";
+ phy-mode = "rgmii-id";
};
};
};
port@8 {
reg = <8>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port4>;
fixed-link {
reg = <4>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@8 {
reg = <8>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port5>;
fixed-link {
reg = <5>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@8 {
reg = <8>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port5>;
fixed-link {
reg = <5>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@5 {
reg = <5>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port4>;
fixed-link {
reg = <4>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
port@8 {
reg = <8>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
ethernet = <&switch0port5>;
fixed-link {
reg = <5>;
label = "extsw";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
+++ /dev/null
-From 2ba8f6d6759ec0bb1eaf3840eb2201a5d4931126 Mon Sep 17 00:00:00 2001
-Date: Mon, 19 May 2025 19:45:48 +0200
-Subject: [PATCH] net: dsa: b53: do not enable EEE on bcm63xx
-
-BCM63xx internal switches do not support EEE, but provide multiple RGMII
-ports where external PHYs may be connected. If one of these PHYs are EEE
-capable, we may try to enable EEE for the MACs, which then hangs the
-system on access of the (non-existent) EEE registers.
-
-Fix this by checking if the switch actually supports EEE before
-attempting to configure it.
-
-Fixes: 22256b0afb12 ("net: dsa: b53: Move EEE functions to b53")
----
- drivers/net/dsa/b53/b53_common.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/net/dsa/b53/b53_common.c
-+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -2353,6 +2353,9 @@ int b53_eee_init(struct dsa_switch *ds,
- {
- int ret;
-
-+ if (!b53_support_eee(ds, port))
-+ return 0;
-+
- ret = phy_init_eee(phy, false);
- if (ret)
- return 0;
-@@ -2367,7 +2370,7 @@ bool b53_support_eee(struct dsa_switch *
- {
- struct b53_device *dev = ds->priv;
-
-- return !is5325(dev) && !is5365(dev);
-+ return !is5325(dev) && !is5365(dev) && !is63xx(dev);
- }
- EXPORT_SYMBOL(b53_support_eee);
-
--- /dev/null
+From eb9e6142ac5f42beee48c9ec8edf1da3a3d7ff81 Mon Sep 17 00:00:00 2001
+Date: Thu, 5 Jun 2025 16:39:20 +0200
+Subject: [PATCH] net: dsa: b53: invert bcm531x5 rgmii delay heuristic
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+When configuring the RGMII port for BCM531x5, we are only doing so in
+MLO_AN_FIXED, i.e. fixed link mode. This implies this port is used as
+cpu port and thus connected to an ethernet mac, so the switch takes the
+role of the PHY.
+
+Therefore we need to enable delays when the interface mode is rgmii-id,
+and not rgmii. Enabling delays for rgmii is wrong in any case.
+
+Also update the comment with the incomplete sentence to match what we
+are now doing, and add a comment about rgmii-id.
+
+Luckily there are at least no in-tree users of rgmii or rgmii-id mode
+that would be affected, as the only user with a defined link mode uses
+rgmii-txid, which we already handle correctly.
+
+Fixes: 967dd82ffc52 ("net: dsa: b53: Add support for Broadcom RoboSwitch")
+---
+ drivers/net/dsa/b53/b53_common.c | 13 ++++++-------
+ 1 file changed, 6 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/dsa/b53/b53_common.c
++++ b/drivers/net/dsa/b53/b53_common.c
+@@ -1363,16 +1363,15 @@ static void b53_adjust_531x5_rgmii(struc
+ *
+ * PHY_INTERFACE_MODE_RGMII means that we are not introducing
+ * any delay neither on transmission nor reception, so the
+- * BCM53125 must also be configured accordingly to account for
+- * the lack of delay and introduce
+- *
+- * The BCM53125 switch has its RX clock and TX clock control
+- * swapped, hence the reason why we modify the TX clock path in
+- * the "RGMII" case
++ * BCM53125 must also be configured accordingly, and not enable
++ * either delay.
++ *
++ * PHY_INTERFACE_MODE_RGMII_ID means both TX internal delay and RX
++ * interal delay, so enable delay on both paths.
+ */
+ if (interface == PHY_INTERFACE_MODE_RGMII_TXID)
+ rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
+- if (interface == PHY_INTERFACE_MODE_RGMII)
++ if (interface == PHY_INTERFACE_MODE_RGMII_ID)
+ rgmii_ctrl |= RGMII_CTRL_DLL_TXC | RGMII_CTRL_DLL_RXC;
+
+ if (dev->chip_id != BCM53115_DEVICE_ID)
+++ /dev/null
-From b1308c8642f6a75b4494370784fba86dd2f0b0e0 Mon Sep 17 00:00:00 2001
-Date: Mon, 19 May 2025 19:45:50 +0200
-Subject: [PATCH] net: dsa: b53: allow RGMII for bcm63xx RGMII ports
-
-Add RGMII to supported interfaces for BCM63xx RGMII ports so they can be
-actually used in RGMII mode.
-
-Without this, phylink will fail to configure them:
-
-[ 3.580000] b53-switch 10700000.switch GbE3 (uninitialized): validation of rgmii with support 0000000,00000000,00000000,000062ff and advertisement 0000000,00000000,00000000,000062ff failed: -EINVAL
-[ 3.600000] b53-switch 10700000.switch GbE3 (uninitialized): failed to connect to PHY: -EINVAL
-[ 3.610000] b53-switch 10700000.switch GbE3 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 4
-
-Fixes: ce3bf94871f7 ("net: dsa: b53: add support for BCM63xx RGMIIs")
----
- drivers/net/dsa/b53/b53_common.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/net/dsa/b53/b53_common.c
-+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -1462,6 +1462,10 @@ static void b53_phylink_get_caps(struct
- __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces);
- __set_bit(PHY_INTERFACE_MODE_REVMII, config->supported_interfaces);
-
-+ /* BCM63xx RGMII ports support RGMII */
-+ if (is63xx(dev) && port >= B53_63XX_RGMII0)
-+ phy_interface_set_rgmii(config->supported_interfaces);
-+
- config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
- MAC_10 | MAC_100;
-
This driver adds support for Broadcom managed switch chips. It supports
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -2266,8 +2266,11 @@ enum dsa_tag_protocol b53_get_tag_protoc
+@@ -2244,8 +2244,11 @@ enum dsa_tag_protocol b53_get_tag_protoc
goto out;
}
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -1760,13 +1760,15 @@ static int b53_arl_read(struct b53_devic
+@@ -1738,13 +1738,15 @@ static int b53_arl_read(struct b53_devic
/* Read the bins */
for (i = 0; i < dev->num_arl_bins; i++) {
u64 mac_vid;
if (!(fwd_entry & ARLTBL_VALID)) {
set_bit(i, free_bins);
-@@ -1799,7 +1801,8 @@ static int b53_arl_op(struct b53_device
+@@ -1777,7 +1779,8 @@ static int b53_arl_op(struct b53_device
/* Perform a read for the given MAC and VID */
b53_write48(dev, B53_ARLIO_PAGE, B53_MAC_ADDR_IDX, mac);
/* Issue a read operation for this MAC */
ret = b53_arl_rw_op(dev, 1);
-@@ -1850,12 +1853,14 @@ static int b53_arl_op(struct b53_device
+@@ -1828,12 +1831,14 @@ static int b53_arl_op(struct b53_device
ent.is_static = true;
ent.is_age = false;
memcpy(ent.mac, addr, ETH_ALEN);
return b53_arl_rw_op(dev, 0);
}
-@@ -1867,12 +1872,6 @@ int b53_fdb_add(struct dsa_switch *ds, i
+@@ -1845,12 +1850,6 @@ int b53_fdb_add(struct dsa_switch *ds, i
struct b53_device *priv = ds->priv;
int ret;
mutex_lock(&priv->arl_mutex);
ret = b53_arl_op(priv, 0, port, addr, vid, true);
mutex_unlock(&priv->arl_mutex);
-@@ -1899,10 +1898,15 @@ EXPORT_SYMBOL(b53_fdb_del);
+@@ -1877,10 +1876,15 @@ EXPORT_SYMBOL(b53_fdb_del);
static int b53_arl_search_wait(struct b53_device *dev)
{
unsigned int timeout = 1000;
if (!(reg & ARL_SRCH_STDN))
return 0;
-@@ -1919,13 +1923,21 @@ static void b53_arl_search_rd(struct b53
+@@ -1897,13 +1901,21 @@ static void b53_arl_search_rd(struct b53
struct b53_arl_entry *ent)
{
u64 mac_vid;
}
static int b53_fdb_copy(int port, const struct b53_arl_entry *ent,
-@@ -1946,14 +1958,20 @@ int b53_fdb_dump(struct dsa_switch *ds,
+@@ -1924,14 +1936,20 @@ int b53_fdb_dump(struct dsa_switch *ds,
struct b53_device *priv = ds->priv;
struct b53_arl_entry results[2];
unsigned int count = 0;
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -486,6 +486,9 @@ static int b53_flush_arl(struct b53_devi
+@@ -487,6 +487,9 @@ static int b53_flush_arl(struct b53_devi
{
unsigned int i;
b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
FAST_AGE_DONE | FAST_AGE_DYNAMIC | mask);
-@@ -510,6 +513,9 @@ out:
+@@ -511,6 +514,9 @@ out:
static int b53_fast_age_port(struct b53_device *dev, int port)
{
b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_PORT_CTRL, port);
return b53_flush_arl(dev, FAST_AGE_PORT);
-@@ -517,6 +523,9 @@ static int b53_fast_age_port(struct b53_
+@@ -518,6 +524,9 @@ static int b53_fast_age_port(struct b53_
static int b53_fast_age_vlan(struct b53_device *dev, u16 vid)
{
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -360,11 +360,12 @@ static void b53_set_forwarding(struct b5
+@@ -361,11 +361,12 @@ static void b53_set_forwarding(struct b5
b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -367,11 +367,16 @@ static void b53_set_forwarding(struct b5
+@@ -368,11 +368,16 @@ static void b53_set_forwarding(struct b5
b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, mgmt);
}
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -593,6 +593,9 @@ static void b53_port_set_learning(struct
+@@ -594,6 +594,9 @@ static void b53_port_set_learning(struct
{
u16 reg;
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -730,6 +730,10 @@ void b53_brcm_hdr_setup(struct dsa_switc
+@@ -731,6 +731,10 @@ void b53_brcm_hdr_setup(struct dsa_switc
hdr_ctl |= GC_FRM_MGMT_PORT_M;
b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, hdr_ctl);
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -1278,6 +1278,8 @@ static void b53_force_link(struct b53_de
+@@ -1279,6 +1279,8 @@ static void b53_force_link(struct b53_de
if (port == dev->imp_port) {
off = B53_PORT_OVERRIDE_CTRL;
val = PORT_OVERRIDE_EN;
} else {
off = B53_GMII_PORT_OVERRIDE_CTRL(port);
val = GMII_PO_EN;
-@@ -1302,6 +1304,8 @@ static void b53_force_port_config(struct
+@@ -1303,6 +1305,8 @@ static void b53_force_port_config(struct
if (port == dev->imp_port) {
off = B53_PORT_OVERRIDE_CTRL;
val = PORT_OVERRIDE_EN;
} else {
off = B53_GMII_PORT_OVERRIDE_CTRL(port);
val = GMII_PO_EN;
-@@ -1332,10 +1336,19 @@ static void b53_force_port_config(struct
+@@ -1333,10 +1337,19 @@ static void b53_force_port_config(struct
return;
}
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -560,12 +560,36 @@ static void b53_port_set_ucast_flood(str
+@@ -561,12 +561,36 @@ static void b53_port_set_ucast_flood(str
{
u16 uc;
}
static void b53_port_set_mcast_flood(struct b53_device *dev, int port,
-@@ -573,19 +597,44 @@ static void b53_port_set_mcast_flood(str
+@@ -574,19 +598,44 @@ static void b53_port_set_mcast_flood(str
{
u16 mc;
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -543,6 +543,10 @@ void b53_imp_vlan_setup(struct dsa_switc
+@@ -544,6 +544,10 @@ void b53_imp_vlan_setup(struct dsa_switc
unsigned int i;
u16 pvlan;
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -1299,6 +1299,9 @@ static int b53_setup(struct dsa_switch *
+@@ -1300,6 +1300,9 @@ static int b53_setup(struct dsa_switch *
b53_reset_mib(dev);
--- /dev/null
+From 1237c2d4a8db79dfd4369bff6930b0e385ed7d5c Mon Sep 17 00:00:00 2001
+Date: Mon, 2 Jun 2025 21:39:49 +0200
+Subject: [PATCH] net: dsa: b53: do not enable EEE on bcm63xx
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM63xx internal switches do not support EEE, but provide multiple RGMII
+ports where external PHYs may be connected. If one of these PHYs are EEE
+capable, we may try to enable EEE for the MACs, which then hangs the
+system on access of the (non-existent) EEE registers.
+
+Fix this by checking if the switch actually supports EEE before
+attempting to configure it.
+
+Fixes: 22256b0afb12 ("net: dsa: b53: Move EEE functions to b53")
+---
+ drivers/net/dsa/b53/b53_common.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/dsa/b53/b53_common.c
++++ b/drivers/net/dsa/b53/b53_common.c
+@@ -2353,6 +2353,9 @@ int b53_eee_init(struct dsa_switch *ds,
+ {
+ int ret;
+
++ if (!b53_support_eee(ds, port))
++ return 0;
++
+ ret = phy_init_eee(phy, false);
+ if (ret)
+ return 0;
+@@ -2367,7 +2370,7 @@ bool b53_support_eee(struct dsa_switch *
+ {
+ struct b53_device *dev = ds->priv;
+
+- return !is5325(dev) && !is5365(dev);
++ return !is5325(dev) && !is5365(dev) && !is63xx(dev);
+ }
+ EXPORT_SYMBOL(b53_support_eee);
+
--- /dev/null
+From 4af523551d876ab8b8057d1e5303a860fd736fcb Mon Sep 17 00:00:00 2001
+Date: Mon, 2 Jun 2025 21:39:50 +0200
+Subject: [PATCH] net: dsa: b53: do not enable RGMII delay on bcm63xx
+
+bcm63xx's RGMII ports are always in MAC mode, never in PHY mode, so we
+shouldn't enable any delays and let the PHY handle any delays as
+necessary.
+
+This fixes using RGMII ports with normal PHYs like BCM54612E, which will
+handle the delay in the PHY.
+
+Fixes: ce3bf94871f7 ("net: dsa: b53: add support for BCM63xx RGMIIs")
+---
+ drivers/net/dsa/b53/b53_common.c | 19 +------------------
+ 1 file changed, 1 insertion(+), 18 deletions(-)
+
+--- a/drivers/net/dsa/b53/b53_common.c
++++ b/drivers/net/dsa/b53/b53_common.c
+@@ -1330,24 +1330,7 @@ static void b53_adjust_63xx_rgmii(struct
+ off = B53_RGMII_CTRL_P(port);
+
+ b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
+-
+- switch (interface) {
+- case PHY_INTERFACE_MODE_RGMII_ID:
+- rgmii_ctrl |= (RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
+- break;
+- case PHY_INTERFACE_MODE_RGMII_RXID:
+- rgmii_ctrl &= ~(RGMII_CTRL_DLL_TXC);
+- rgmii_ctrl |= RGMII_CTRL_DLL_RXC;
+- break;
+- case PHY_INTERFACE_MODE_RGMII_TXID:
+- rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC);
+- rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
+- break;
+- case PHY_INTERFACE_MODE_RGMII:
+- default:
+- rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
+- break;
+- }
++ rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
+
+ if (port != dev->imp_port) {
+ if (is63268(dev))
--- /dev/null
+From 75f4f7b2b13008803f84768ff90396f9d7553221 Mon Sep 17 00:00:00 2001
+Date: Mon, 2 Jun 2025 21:39:51 +0200
+Subject: [PATCH] net: dsa: b53: do not configure bcm63xx's IMP port interface
+
+The IMP port is not a valid RGMII interface, but hard wired to internal,
+so we shouldn't touch the undefined register B53_RGMII_CTRL_IMP.
+
+While this does not seem to have any side effects, let's not touch it at
+all, so limit RGMII configuration on bcm63xx to the actual RGMII ports.
+
+Fixes: ce3bf94871f7 ("net: dsa: b53: add support for BCM63xx RGMIIs")
+---
+ drivers/net/dsa/b53/b53_common.c | 22 ++++++++--------------
+ 1 file changed, 8 insertions(+), 14 deletions(-)
+
+--- a/drivers/net/dsa/b53/b53_common.c
++++ b/drivers/net/dsa/b53/b53_common.c
+@@ -22,6 +22,7 @@
+ #include <linux/gpio.h>
+ #include <linux/kernel.h>
+ #include <linux/math.h>
++#include <linux/minmax.h>
+ #include <linux/module.h>
+ #include <linux/platform_data/b53.h>
+ #include <linux/phy.h>
+@@ -1322,24 +1323,17 @@ static void b53_adjust_63xx_rgmii(struct
+ phy_interface_t interface)
+ {
+ struct b53_device *dev = ds->priv;
+- u8 rgmii_ctrl = 0, off;
++ u8 rgmii_ctrl = 0;
+
+- if (port == dev->imp_port)
+- off = B53_RGMII_CTRL_IMP;
+- else
+- off = B53_RGMII_CTRL_P(port);
+-
+- b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
++ b53_read8(dev, B53_CTRL_PAGE, B53_RGMII_CTRL_P(port), &rgmii_ctrl);
+ rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
+
+- if (port != dev->imp_port) {
+- if (is63268(dev))
+- rgmii_ctrl |= RGMII_CTRL_MII_OVERRIDE;
++ if (is63268(dev))
++ rgmii_ctrl |= RGMII_CTRL_MII_OVERRIDE;
+
+- rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;
+- }
++ rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;
+
+- b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);
++ b53_write8(dev, B53_CTRL_PAGE, B53_RGMII_CTRL_P(port), rgmii_ctrl);
+
+ dev_dbg(ds->dev, "Configured port %d for %s\n", port,
+ phy_modes(interface));
+@@ -1484,7 +1478,7 @@ static void b53_phylink_mac_config(struc
+ struct b53_device *dev = ds->priv;
+ int port = dp->index;
+
+- if (is63xx(dev) && port >= B53_63XX_RGMII0)
++ if (is63xx(dev) && in_range(port, B53_63XX_RGMII0, 4))
+ b53_adjust_63xx_rgmii(ds, port, interface);
+
+ if (mode == MLO_AN_FIXED) {
--- /dev/null
+From 5ea0d42c1980e6d10e5cb56a78021db5bfcebaaf Mon Sep 17 00:00:00 2001
+Date: Mon, 2 Jun 2025 21:39:52 +0200
+Subject: [PATCH] net: dsa: b53: allow RGMII for bcm63xx RGMII ports
+
+Add RGMII to supported interfaces for BCM63xx RGMII ports so they can be
+actually used in RGMII mode.
+
+Without this, phylink will fail to configure them:
+
+[ 3.580000] b53-switch 10700000.switch GbE3 (uninitialized): validation of rgmii with support 0000000,00000000,00000000,000062ff and advertisement 0000000,00000000,00000000,000062ff failed: -EINVAL
+[ 3.600000] b53-switch 10700000.switch GbE3 (uninitialized): failed to connect to PHY: -EINVAL
+[ 3.610000] b53-switch 10700000.switch GbE3 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 4
+
+Fixes: ce3bf94871f7 ("net: dsa: b53: add support for BCM63xx RGMIIs")
+---
+ drivers/net/dsa/b53/b53_common.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/dsa/b53/b53_common.c
++++ b/drivers/net/dsa/b53/b53_common.c
+@@ -1439,6 +1439,10 @@ static void b53_phylink_get_caps(struct
+ __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces);
+ __set_bit(PHY_INTERFACE_MODE_REVMII, config->supported_interfaces);
+
++ /* BCM63xx RGMII ports support RGMII */
++ if (is63xx(dev) && in_range(port, B53_63XX_RGMII0, 4))
++ phy_interface_set_rgmii(config->supported_interfaces);
++
+ config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
+ MAC_10 | MAC_100;
+
--- /dev/null
+From bc1a65eb81a21e2aa3c3dca058ee8adf687b6ef5 Mon Sep 17 00:00:00 2001
+Date: Mon, 2 Jun 2025 21:39:53 +0200
+Subject: [PATCH] net: dsa: b53: do not touch DLL_IQQD on bcm53115
+
+According to OpenMDK, bit 2 of the RGMII register has a different
+meaning for BCM53115 [1]:
+
+"DLL_IQQD 1: In the IDDQ mode, power is down0: Normal function
+ mode"
+
+Configuring RGMII delay works without setting this bit, so let's keep it
+at the default. For other chips, we always set it, so not clearing it
+is not an issue.
+
+One would assume BCM53118 works the same, but OpenMDK is not quite sure
+what this bit actually means [2]:
+
+"BYPASS_IMP_2NS_DEL #1: In the IDDQ mode, power is down#0: Normal
+ function mode1: Bypass dll65_2ns_del IP0: Use
+ dll65_2ns_del IP"
+
+So lets keep setting it for now.
+
+[1] https://github.com/Broadcom-Network-Switching-Software/OpenMDK/blob/master/cdk/PKG/chip/bcm53115/bcm53115_a0_defs.h#L19871
+[2] https://github.com/Broadcom-Network-Switching-Software/OpenMDK/blob/master/cdk/PKG/chip/bcm53118/bcm53118_a0_defs.h#L14392
+
+Fixes: 967dd82ffc52 ("net: dsa: b53: Add support for Broadcom RoboSwitch")
+---
+ drivers/net/dsa/b53/b53_common.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/dsa/b53/b53_common.c
++++ b/drivers/net/dsa/b53/b53_common.c
+@@ -1354,8 +1354,7 @@ static void b53_adjust_531x5_rgmii(struc
+ * tx_clk aligned timing (restoring to reset defaults)
+ */
+ b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
+- rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC |
+- RGMII_CTRL_TIMING_SEL);
++ rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
+
+ /* PHY_INTERFACE_MODE_RGMII_TXID means TX internal delay, make
+ * sure that we enable the port TX clock internal delay to
+@@ -1375,7 +1374,10 @@ static void b53_adjust_531x5_rgmii(struc
+ rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
+ if (interface == PHY_INTERFACE_MODE_RGMII)
+ rgmii_ctrl |= RGMII_CTRL_DLL_TXC | RGMII_CTRL_DLL_RXC;
+- rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;
++
++ if (dev->chip_id != BCM53115_DEVICE_ID)
++ rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;
++
+ b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);
+
+ dev_info(ds->dev, "Configured port %d for %s\n", port,
projects / openwrt / staging / pepe2k.git / commitdiff