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drm/nouveau/pm: track mr2 for gddr3
author
Ben Skeggs
<
[email protected]
>
Tue, 24 Jan 2012 00:24:05 +0000
(10:24 +1000)
committer
Ben Skeggs
<
[email protected]
>
Tue, 13 Mar 2012 07:08:44 +0000
(17:08 +1000)
There's some "extended" GDDR3 chipsets out there with EMRS2 settings that
change the layout of MRS/EMRS1 bitmaps.. Sigh.. Still need to track down
how exactly we're supposed to handle this.
Signed-off-by: Ben Skeggs <
[email protected]
>
Signed-off-by: Martin Peres <
[email protected]
>
drivers/gpu/drm/nouveau/nouveau_mem.c
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diff --git
a/drivers/gpu/drm/nouveau/nouveau_mem.c
b/drivers/gpu/drm/nouveau/nouveau_mem.c
index cf82f17cf03a18357c9153bce0af4e7f95d13562..3d43098de25be300505debe9c69942100524de6c 100644
(file)
--- a/
drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/
drivers/gpu/drm/nouveau/nouveau_mem.c
@@
-766,8
+766,10
@@
nouveau_mem_gddr3_mr(struct drm_device *dev, u32 freq,
t->mr[1] = (boot->mr[1] & 0x100f40) | t->drive_strength |
(t->odt << 2) |
(nv_mem_wr_lut_gddr3[e->tWR] & 0xf) << 4;
+ t->mr[2] = boot->mr[2];
- NV_DEBUG(dev, "(%u) MR: %08x %08x", t->id, t->mr[0], t->mr[1]);
+ NV_DEBUG(dev, "(%u) MR: %08x %08x %08x", t->id,
+ t->mr[0], t->mr[1], t->mr[2]);
return 0;
}
@@
-963,6
+965,7
@@
nouveau_mem_exec(struct nouveau_mem_exec_func *exec,
/* fetch current MRs */
switch (dev_priv->vram_type) {
+ case NV_MEM_TYPE_GDDR3:
case NV_MEM_TYPE_DDR3:
mr[2] = exec->mrg(exec, 2);
default: