WIP: treewide: add kernel 6.0 support to ipq806x

This add testing kernel 6.0 support to ipq806x. STILL VERY WIP

TODO:
- Wait for 6.1 LTS (if 6.1 will be LTS)
- Split this to correct commits number
- Check all modules
- Refresh configs
- Add all missing patch from generic as this is based on an old commit

Signed-off-by: Christian Marangi <[email protected]>

diff --git a/include/kernel-6.0 b/include/kernel-6.0
new file mode 100644 (file)
index 0000000..e9f3eea
--- /dev/null
+++ b/include/kernel-6.0
@@ -0,0 +1,2 @@
+LINUX_VERSION-6.0 = -rc5
+LINUX_KERNEL_HASH-6.0-rc5 = 1842d4d5910e339806509c46e78268888f6a2d05c9d8277f93238b729d005a07
\ No newline at end of file

diff --git a/include/kernel-defaults.mk b/include/kernel-defaults.mk
index 2e2139201689fc7a1befb5a5b7794fb5c3e80c35..dc5fdf3375d1b697467b93996ae73ceb7fe8aa64 100644 (file)
--- a/include/kernel-defaults.mk
+++ b/include/kernel-defaults.mk
@@ -75,6 +75,7 @@ endif
        rm -f $(LINUX_DIR)/.config.prev
        mv $(LINUX_DIR)/.config $(LINUX_DIR)/.config.old
        $(call Kernel/SetInitramfs/PreConfigure)
+       echo "# CONFIG_INITRAMFS_PRESERVE_MTIME is not set" >> $(LINUX_DIR)/.config
   ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS_SEPARATE),y)
        echo 'CONFIG_INITRAMFS_ROOT_UID=$(shell id -u)' >> $(LINUX_DIR)/.config
        echo 'CONFIG_INITRAMFS_ROOT_GID=$(shell id -g)' >> $(LINUX_DIR)/.config
@@ -99,6 +100,7 @@ define Kernel/SetNoInitramfs
        grep -v INITRAMFS $(LINUX_DIR)/.config.old > $(LINUX_DIR)/.config.set
        echo 'CONFIG_INITRAMFS_SOURCE=""' >> $(LINUX_DIR)/.config.set
        echo '# CONFIG_INITRAMFS_FORCE is not set' >> $(LINUX_DIR)/.config.set
+       echo "# CONFIG_INITRAMFS_PRESERVE_MTIME is not set" >> $(LINUX_DIR)/.config.set
 endef
 
 define Kernel/Configure/Default

diff --git a/target/linux/generic/backport-6.0/011-kbuild-export-SUBARCH.patch b/target/linux/generic/backport-6.0/011-kbuild-export-SUBARCH.patch
new file mode 100644 (file)
index 0000000..657c9df
--- /dev/null
+++ b/target/linux/generic/backport-6.0/011-kbuild-export-SUBARCH.patch
@@ -0,0 +1,21 @@
+From 173019b66dcc9d68ad9333aa744dad1e369b5aa8 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Sun, 9 Jul 2017 00:26:53 +0200
+Subject: [PATCH 34/34] kernel: add compile fix for linux 4.9 on x86
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ Makefile | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/Makefile
++++ b/Makefile
+@@ -523,7 +523,7 @@ KBUILD_LDFLAGS_MODULE :=
+ KBUILD_LDFLAGS :=
+ CLANG_FLAGS :=
+ 
+-export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC HOSTPKG_CONFIG
++export ARCH SRCARCH SUBARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC HOSTPKG_CONFIG
+ export CPP AR NM STRIP OBJCOPY OBJDUMP READELF PAHOLE RESOLVE_BTFIDS LEX YACC AWK INSTALLKERNEL
+ export PERL PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX
+ export KGZIP KBZIP2 KLZOP LZMA LZ4 XZ ZSTD

diff --git a/target/linux/generic/backport-6.0/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch b/target/linux/generic/backport-6.0/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch
new file mode 100644 (file)
index 0000000..3de0201
--- /dev/null
+++ b/target/linux/generic/backport-6.0/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch
@@ -0,0 +1,116 @@
+From: Pablo Neira Ayuso <[email protected]>
+Date: Thu, 25 Jan 2018 12:58:55 +0100
+Subject: [PATCH] netfilter: nft_flow_offload: handle netdevice events from
+ nf_flow_table
+
+Move the code that deals with device events to the core.
+
+Signed-off-by: Pablo Neira Ayuso <[email protected]>
+---
+
+--- a/net/netfilter/nf_flow_table_core.c
++++ b/net/netfilter/nf_flow_table_core.c
+@@ -608,28 +608,52 @@ void nf_flow_table_free(struct nf_flowta
+       .exit_batch = nf_flow_table_pernet_exit,
+ };
+ 
++static int nf_flow_table_netdev_event(struct notifier_block *this,
++                                    unsigned long event, void *ptr)
++{
++      struct net_device *dev = netdev_notifier_info_to_dev(ptr);
++
++      if (event != NETDEV_DOWN)
++              return NOTIFY_DONE;
++
++      nf_flow_table_cleanup(dev);
++
++      return NOTIFY_DONE;
++}
++
++static struct notifier_block flow_offload_netdev_notifier = {
++      .notifier_call  = nf_flow_table_netdev_event,
++};
++
+ static int __init nf_flow_table_module_init(void)
+ {
+       int ret;
+ 
+       ret = register_pernet_subsys(&nf_flow_table_net_ops);
+       if (ret < 0)
+               return ret;
+ 
+       ret = nf_flow_table_offload_init();
+       if (ret)
+               goto out_offload;
++
++      ret = register_netdevice_notifier(&flow_offload_netdev_notifier);
++      if (ret)
++              goto out_offload_init;
+ 
+       return 0;
+ 
++out_offload_init:
++      nf_flow_table_offload_exit();
+ out_offload:
+       unregister_pernet_subsys(&nf_flow_table_net_ops);
+       return ret;
+ }
+ 
+ static void __exit nf_flow_table_module_exit(void)
+ {
++      unregister_netdevice_notifier(&flow_offload_netdev_notifier);
+       nf_flow_table_offload_exit();
+       unregister_pernet_subsys(&nf_flow_table_net_ops);
+ }
+ 
+--- a/net/netfilter/nft_flow_offload.c
++++ b/net/netfilter/nft_flow_offload.c
+@@ -444,47 +444,14 @@ static struct nft_expr_type nft_flow_off
+       .owner          = THIS_MODULE,
+ };
+ 
+-static int flow_offload_netdev_event(struct notifier_block *this,
+-                                   unsigned long event, void *ptr)
+-{
+-      struct net_device *dev = netdev_notifier_info_to_dev(ptr);
+-
+-      if (event != NETDEV_DOWN)
+-              return NOTIFY_DONE;
+-
+-      nf_flow_table_cleanup(dev);
+-
+-      return NOTIFY_DONE;
+-}
+-
+-static struct notifier_block flow_offload_netdev_notifier = {
+-      .notifier_call  = flow_offload_netdev_event,
+-};
+-
+ static int __init nft_flow_offload_module_init(void)
+ {
+-      int err;
+-
+-      err = register_netdevice_notifier(&flow_offload_netdev_notifier);
+-      if (err)
+-              goto err;
+-
+-      err = nft_register_expr(&nft_flow_offload_type);
+-      if (err < 0)
+-              goto register_expr;
+-
+-      return 0;
+-
+-register_expr:
+-      unregister_netdevice_notifier(&flow_offload_netdev_notifier);
+-err:
+-      return err;
++      return nft_register_expr(&nft_flow_offload_type);
+ }
+ 
+ static void __exit nft_flow_offload_module_exit(void)
+ {
+       nft_unregister_expr(&nft_flow_offload_type);
+-      unregister_netdevice_notifier(&flow_offload_netdev_notifier);
+ }
+ 
+ module_init(nft_flow_offload_module_init);

diff --git a/target/linux/generic/backport-6.0/9999-net-dsa-qca8k-convert-to-regmap-read-write-API.patch b/target/linux/generic/backport-6.0/9999-net-dsa-qca8k-convert-to-regmap-read-write-API.patch
new file mode 100644 (file)
index 0000000..ad382ca
--- /dev/null
+++ b/target/linux/generic/backport-6.0/9999-net-dsa-qca8k-convert-to-regmap-read-write-API.patch
@@ -0,0 +1,278 @@
+From 354fb5884deb13e0c353d5a181877fe76199f1d7 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Sat, 6 Aug 2022 16:09:39 +0200
+Subject: [PATCH] net: dsa: qca8k: convert to regmap read/write API
+
+Convert qca8k to regmap read/write bulk API. The mgmt eth can write up
+to 16 bytes of data at times. Currently we use a custom function to do
+it but regmap now supports declaration of read/write bulk even without a
+bus.
+
+Drop the custom function and rework the regmap function to this new
+implementation.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/net/dsa/qca/qca8k-8xxx.c   | 94 +++++++++++++++++++++++-------
+ drivers/net/dsa/qca/qca8k-common.c | 49 ++--------------
+ drivers/net/dsa/qca/qca8k.h        |  5 +-
+ 3 files changed, 82 insertions(+), 66 deletions(-)
+
+--- a/drivers/net/dsa/qca/qca8k-8xxx.c
++++ b/drivers/net/dsa/qca/qca8k-8xxx.c
+@@ -342,16 +342,12 @@ qca8k_regmap_update_bits_eth(struct qca8
+ }
+ 
+ static int
+-qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
++qca8k_read_mii(struct qca8k_priv *priv, uint32_t reg, uint32_t *val)
+ {
+-      struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
+       struct mii_bus *bus = priv->bus;
+       u16 r1, r2, page;
+       int ret;
+ 
+-      if (!qca8k_read_eth(priv, reg, val, sizeof(*val)))
+-              return 0;
+-
+       qca8k_split_addr(reg, &r1, &r2, &page);
+ 
+       mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
+@@ -368,16 +364,12 @@ exit:
+ }
+ 
+ static int
+-qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val)
++qca8k_write_mii(struct qca8k_priv *priv, uint32_t reg, uint32_t val)
+ {
+-      struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
+       struct mii_bus *bus = priv->bus;
+       u16 r1, r2, page;
+       int ret;
+ 
+-      if (!qca8k_write_eth(priv, reg, &val, sizeof(val)))
+-              return 0;
+-
+       qca8k_split_addr(reg, &r1, &r2, &page);
+ 
+       mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
+@@ -394,17 +386,14 @@ exit:
+ }
+ 
+ static int
+-qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val)
++qca8k_regmap_update_bits_mii(struct qca8k_priv *priv, uint32_t reg,
++                           uint32_t mask, uint32_t write_val)
+ {
+-      struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
+       struct mii_bus *bus = priv->bus;
+       u16 r1, r2, page;
+       u32 val;
+       int ret;
+ 
+-      if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val))
+-              return 0;
+-
+       qca8k_split_addr(reg, &r1, &r2, &page);
+ 
+       mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
+@@ -427,17 +416,84 @@ exit:
+       return ret;
+ }
+ 
++static int
++qca8k_bulk_read(void *ctx, const void *reg_buf, size_t reg_len,
++              void *val_buf, size_t val_len)
++{
++      int i, count = val_len / sizeof(u32), ret;
++      u32 reg = *(u32 *)reg_buf & 0xffff;
++      struct qca8k_priv *priv = ctx;
++
++      if (priv->mgmt_master &&
++          !qca8k_read_eth(priv, reg, val_buf, val_len))
++              return 0;
++
++      /* loop count times and increment reg of 4 */
++      for (i = 0; i < count; i++, reg += sizeof(u32)) {
++              ret = qca8k_read_mii(priv, reg, val_buf + i);
++              if (ret < 0)
++                      return ret;
++      }
++
++      return 0;
++}
++
++static int
++qca8k_bulk_gather_write(void *ctx, const void *reg_buf, size_t reg_len,
++                      const void *val_buf, size_t val_len)
++{
++      int i, count = val_len / sizeof(u32), ret;
++      u32 reg = *(u32 *)reg_buf & 0xffff;
++      struct qca8k_priv *priv = ctx;
++      u32 *val = (u32 *)val_buf;
++
++      if (priv->mgmt_master &&
++          !qca8k_write_eth(priv, reg, val, val_len))
++              return 0;
++
++      /* loop count times, increment reg of 4 and increment val ptr to
++       * the next value
++       */
++      for (i = 0; i < count; i++, reg += sizeof(u32), val++) {
++              ret = qca8k_write_mii(priv, reg, *val);
++              if (ret < 0)
++                      return ret;
++      }
++
++      return 0;
++}
++
++static int
++qca8k_bulk_write(void *ctx, const void *data, size_t bytes)
++{
++      return qca8k_bulk_gather_write(ctx, data, sizeof(u32), data + sizeof(u32),
++                                     bytes - sizeof(u32));
++}
++
++static int
++qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val)
++{
++      struct qca8k_priv *priv = (struct qca8k_priv *)ctx;
++
++      if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val))
++              return 0;
++
++      return qca8k_regmap_update_bits_mii(priv, reg, mask, write_val);
++}
++
+ static struct regmap_config qca8k_regmap_config = {
+-      .reg_bits = 16,
++      .reg_bits = 32,
+       .val_bits = 32,
+       .reg_stride = 4,
+       .max_register = 0x16ac, /* end MIB - Port6 range */
+-      .reg_read = qca8k_regmap_read,
+-      .reg_write = qca8k_regmap_write,
++      .read = qca8k_bulk_read,
++      .write = qca8k_bulk_write,
+       .reg_update_bits = qca8k_regmap_update_bits,
+       .rd_table = &qca8k_readable_table,
+       .disable_locking = true, /* Locking is handled by qca8k read/write */
+       .cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */
++      .max_raw_read = 16, /* mgmt eth can read/write up to 4 bytes at times */
++      .max_raw_write = 16,
+ };
+ 
+ static int
+@@ -1960,8 +2016,6 @@ static SIMPLE_DEV_PM_OPS(qca8k_pm_ops,
+ 
+ static const struct qca8k_info_ops qca8xxx_ops = {
+       .autocast_mib = qca8k_get_ethtool_stats_eth,
+-      .read_eth = qca8k_read_eth,
+-      .write_eth = qca8k_write_eth,
+ };
+ 
+ static const struct qca8k_match_data qca8327 = {
+--- a/drivers/net/dsa/qca/qca8k-common.c
++++ b/drivers/net/dsa/qca/qca8k-common.c
+@@ -102,45 +102,6 @@ const struct regmap_access_table qca8k_r
+       .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges),
+ };
+ 
+-/* TODO: remove these extra ops when we can support regmap bulk read/write */
+-static int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
+-{
+-      int i, count = len / sizeof(u32), ret;
+-
+-      if (priv->mgmt_master && priv->info->ops->read_eth &&
+-          !priv->info->ops->read_eth(priv, reg, val, len))
+-              return 0;
+-
+-      for (i = 0; i < count; i++) {
+-              ret = regmap_read(priv->regmap, reg + (i * 4), val + i);
+-              if (ret < 0)
+-                      return ret;
+-      }
+-
+-      return 0;
+-}
+-
+-/* TODO: remove these extra ops when we can support regmap bulk read/write */
+-static int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len)
+-{
+-      int i, count = len / sizeof(u32), ret;
+-      u32 tmp;
+-
+-      if (priv->mgmt_master && priv->info->ops->write_eth &&
+-          !priv->info->ops->write_eth(priv, reg, val, len))
+-              return 0;
+-
+-      for (i = 0; i < count; i++) {
+-              tmp = val[i];
+-
+-              ret = regmap_write(priv->regmap, reg + (i * 4), tmp);
+-              if (ret < 0)
+-                      return ret;
+-      }
+-
+-      return 0;
+-}
+-
+ static int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask)
+ {
+       u32 val;
+@@ -151,11 +112,12 @@ static int qca8k_busy_wait(struct qca8k_
+ 
+ static int qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb)
+ {
+-      u32 reg[3];
++      u32 reg[QCA8K_ATU_TABLE_SIZE];
+       int ret;
+ 
+       /* load the ARL table into an array */
+-      ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg));
++      ret = regmap_bulk_read(priv->regmap, QCA8K_REG_ATU_DATA0, reg,
++                             QCA8K_ATU_TABLE_SIZE);
+       if (ret)
+               return ret;
+ 
+@@ -179,7 +141,7 @@ static int qca8k_fdb_read(struct qca8k_p
+ static void qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask,
+                           const u8 *mac, u8 aging)
+ {
+-      u32 reg[3] = { 0 };
++      u32 reg[QCA8K_ATU_TABLE_SIZE] = { 0 };
+ 
+       /* vid - 83:72 */
+       reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid);
+@@ -196,7 +158,8 @@ static void qca8k_fdb_write(struct qca8k
+       reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]);
+ 
+       /* load the array into the ARL table */
+-      qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg));
++      regmap_bulk_write(priv->regmap, QCA8K_REG_ATU_DATA0, reg,
++                        QCA8K_ATU_TABLE_SIZE);
+ }
+ 
+ static int qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd,
+--- a/drivers/net/dsa/qca/qca8k.h
++++ b/drivers/net/dsa/qca/qca8k.h
+@@ -148,6 +148,8 @@
+ #define QCA8K_REG_IPV4_PRI_ADDR_MASK                  0x474
+ 
+ /* Lookup registers */
++#define QCA8K_ATU_TABLE_SIZE                          3 /* 12 bytes wide table / sizeof(u32) */
++
+ #define QCA8K_REG_ATU_DATA0                           0x600
+ #define   QCA8K_ATU_ADDR2_MASK                                GENMASK(31, 24)
+ #define   QCA8K_ATU_ADDR3_MASK                                GENMASK(23, 16)
+@@ -328,9 +330,6 @@ struct qca8k_priv;
+ 
+ struct qca8k_info_ops {
+       int (*autocast_mib)(struct dsa_switch *ds, int port, u64 *data);
+-      /* TODO: remove these extra ops when we can support regmap bulk read/write */
+-      int (*read_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
+-      int (*write_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len);
+ };
+ 
+ struct qca8k_match_data {

diff --git a/target/linux/generic/config-6.0 b/target/linux/generic/config-6.0
new file mode 100644 (file)
index 0000000..c46cade
--- /dev/null
+++ b/target/linux/generic/config-6.0
@@ -0,0 +1,7536 @@
+# CONFIG_104_QUAD_8 is not set
+CONFIG_32BIT=y
+CONFIG_64BIT_TIME=y
+# CONFIG_6LOWPAN is not set
+# CONFIG_6LOWPAN_DEBUGFS is not set
+# CONFIG_6PACK is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_9P_FS is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_AB8500_CORE is not set
+# CONFIG_ABP060MG is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_ACENIC is not set
+# CONFIG_ACERHDF is not set
+# CONFIG_ACER_WIRELESS is not set
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_ACPI_ALS is not set
+# CONFIG_ACPI_APEI is not set
+# CONFIG_ACPI_APEI_PCIEAER is not set
+# CONFIG_ACPI_BUTTON is not set
+# CONFIG_ACPI_CONFIGFS is not set
+# CONFIG_ACPI_CUSTOM_METHOD is not set
+# CONFIG_ACPI_EXTLOG is not set
+# CONFIG_ACPI_HED is not set
+# CONFIG_ACPI_NFIT is not set
+# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set
+# CONFIG_ACPI_TABLE_UPGRADE is not set
+# CONFIG_ACPI_VIDEO is not set
+# CONFIG_AD2S1200 is not set
+# CONFIG_AD2S1210 is not set
+# CONFIG_AD2S90 is not set
+# CONFIG_AD5064 is not set
+# CONFIG_AD5110 is not set
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_AD5272 is not set
+# CONFIG_AD5360 is not set
+# CONFIG_AD5380 is not set
+# CONFIG_AD5421 is not set
+# CONFIG_AD5446 is not set
+# CONFIG_AD5449 is not set
+# CONFIG_AD5504 is not set
+# CONFIG_AD5592R is not set
+# CONFIG_AD5593R is not set
+# CONFIG_AD5624R_SPI is not set
+# CONFIG_AD5686 is not set
+# CONFIG_AD5686_SPI is not set
+# CONFIG_AD5696_I2C is not set
+# CONFIG_AD5755 is not set
+# CONFIG_AD5758 is not set
+# CONFIG_AD5761 is not set
+# CONFIG_AD5764 is not set
+# CONFIG_AD5766 is not set
+# CONFIG_AD5770R is not set
+# CONFIG_AD5791 is not set
+# CONFIG_AD5933 is not set
+# CONFIG_AD7091R5 is not set
+# CONFIG_AD7124 is not set
+# CONFIG_AD7150 is not set
+# CONFIG_AD7152 is not set
+# CONFIG_AD7192 is not set
+# CONFIG_AD7266 is not set
+# CONFIG_AD7280 is not set
+# CONFIG_AD7291 is not set
+# CONFIG_AD7292 is not set
+# CONFIG_AD7298 is not set
+# CONFIG_AD7303 is not set
+# CONFIG_AD7476 is not set
+# CONFIG_AD7606 is not set
+# CONFIG_AD7606_IFACE_PARALLEL is not set
+# CONFIG_AD7606_IFACE_SPI is not set
+# CONFIG_AD7746 is not set
+# CONFIG_AD7766 is not set
+# CONFIG_AD7768_1 is not set
+# CONFIG_AD7780 is not set
+# CONFIG_AD7791 is not set
+# CONFIG_AD7793 is not set
+# CONFIG_AD7816 is not set
+# CONFIG_AD7887 is not set
+# CONFIG_AD7923 is not set
+# CONFIG_AD7949 is not set
+# CONFIG_AD799X is not set
+# CONFIG_AD8366 is not set
+# CONFIG_AD8801 is not set
+# CONFIG_AD9467 is not set
+# CONFIG_AD9523 is not set
+# CONFIG_AD9832 is not set
+# CONFIG_AD9834 is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_ADE7854 is not set
+# CONFIG_ADF4350 is not set
+# CONFIG_ADF4371 is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADIN_PHY is not set
+# CONFIG_ADIS16080 is not set
+# CONFIG_ADIS16130 is not set
+# CONFIG_ADIS16136 is not set
+# CONFIG_ADIS16201 is not set
+# CONFIG_ADIS16203 is not set
+# CONFIG_ADIS16209 is not set
+# CONFIG_ADIS16240 is not set
+# CONFIG_ADIS16260 is not set
+# CONFIG_ADIS16400 is not set
+# CONFIG_ADIS16460 is not set
+# CONFIG_ADIS16475 is not set
+# CONFIG_ADIS16480 is not set
+# CONFIG_ADI_AXI_ADC is not set
+# CONFIG_ADJD_S311 is not set
+# CONFIG_ADM6996_PHY is not set
+# CONFIG_ADM8211 is not set
+# CONFIG_ADT7316 is not set
+# CONFIG_ADUX1020 is not set
+CONFIG_ADVISE_SYSCALLS=y
+# CONFIG_ADXL345_I2C is not set
+# CONFIG_ADXL345_SPI is not set
+# CONFIG_ADXL372_I2C is not set
+# CONFIG_ADXL372_SPI is not set
+# CONFIG_ADXRS290 is not set
+# CONFIG_ADXRS450 is not set
+CONFIG_AEABI=y
+# CONFIG_AFE4403 is not set
+# CONFIG_AFE4404 is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_AFS_DEBUG_CURSOR is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_AF_KCM is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_AF_RXRPC_INJECT_LOSS is not set
+# CONFIG_AF_RXRPC_IPV6 is not set
+CONFIG_AF_UNIX_OOB=y
+# CONFIG_AGP is not set
+# CONFIG_AHCI_CEVA is not set
+# CONFIG_AHCI_IMX is not set
+# CONFIG_AHCI_MVEBU is not set
+# CONFIG_AHCI_QORIQ is not set
+# CONFIG_AHCI_XGENE is not set
+CONFIG_AIO=y
+# CONFIG_AIRO is not set
+# CONFIG_AIRO_CS is not set
+# CONFIG_AIX_PARTITION is not set
+# CONFIG_AK09911 is not set
+# CONFIG_AK8974 is not set
+# CONFIG_AK8975 is not set
+# CONFIG_AL3010 is not set
+# CONFIG_AL3320A is not set
+# CONFIG_ALIM7101_WDT is not set
+CONFIG_ALLOW_DEV_COREDUMP=y
+# CONFIG_ALTERA_MBOX is not set
+# CONFIG_ALTERA_MSGDMA is not set
+# CONFIG_ALTERA_STAPL is not set
+# CONFIG_ALTERA_TSE is not set
+# CONFIG_ALX is not set
+# CONFIG_AL_FIC is not set
+# CONFIG_AM2315 is not set
+# CONFIG_AM335X_PHY_USB is not set
+# CONFIG_AMBA_PL08X is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_AMD_MEM_ENCRYPT is not set
+# CONFIG_AMD_PHY is not set
+# CONFIG_AMD_XGBE is not set
+# CONFIG_AMD_XGBE_HAVE_ECC is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_AMILO_RFKILL is not set
+# CONFIG_ANDROID is not set
+CONFIG_ANON_INODES=y
+# CONFIG_APDS9300 is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_APDS9960 is not set
+# CONFIG_APM8018X is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_APPLE_GMUX is not set
+# CONFIG_APPLE_MFI_FASTCHARGE is not set
+# CONFIG_APPLE_PROPERTIES is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_AQTION is not set
+# CONFIG_AQUANTIA_PHY is not set
+# CONFIG_AR5523 is not set
+# CONFIG_AR7 is not set
+# CONFIG_AR8216_PHY is not set
+# CONFIG_AR8216_PHY_LEDS is not set
+# CONFIG_ARCH_ACTIONS is not set
+# CONFIG_ARCH_AGILEX is not set
+# CONFIG_ARCH_ALPINE is not set
+# CONFIG_ARCH_APPLE is not set
+# CONFIG_ARCH_ARTPEC is not set
+# CONFIG_ARCH_ASPEED is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_AXXIA is not set
+# CONFIG_ARCH_BCM is not set
+# CONFIG_ARCH_BCM2835 is not set
+# CONFIG_ARCH_BCM4908 is not set
+# CONFIG_ARCH_BCM_21664 is not set
+# CONFIG_ARCH_BCM_23550 is not set
+# CONFIG_ARCH_BCM_281XX is not set
+# CONFIG_ARCH_BCM_5301X is not set
+# CONFIG_ARCH_BCM_53573 is not set
+# CONFIG_ARCH_BCM_63XX is not set
+# CONFIG_ARCH_BCM_CYGNUS is not set
+# CONFIG_ARCH_BCM_IPROC is not set
+# CONFIG_ARCH_BCM_NSP is not set
+# CONFIG_ARCH_BERLIN is not set
+CONFIG_ARCH_BINFMT_ELF_STATE=y
+# CONFIG_ARCH_BITMAIN is not set
+# CONFIG_ARCH_BRCMSTB is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CNS3XXX is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_DIGICOLOR is not set
+# CONFIG_ARCH_DMA_ADDR_T_64BIT is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_EXYNOS is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_HI3xxx is not set
+# CONFIG_ARCH_HIGHBANK is not set
+# CONFIG_ARCH_HISI is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_INTEL_SOCFPGA is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_K3 is not set
+# CONFIG_ARCH_KEEMBAY is not set
+# CONFIG_ARCH_KEYSTONE is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_LAYERSCAPE is not set
+# CONFIG_ARCH_LG1K is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_MEDIATEK is not set
+# CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_MILBEAUT is not set
+CONFIG_ARCH_MMAP_RND_BITS=8
+CONFIG_ARCH_MMAP_RND_BITS_MAX=16
+CONFIG_ARCH_MMAP_RND_BITS_MIN=8
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_MSTARV7 is not set
+# CONFIG_ARCH_MULTIPLATFORM is not set
+# CONFIG_ARCH_MULTI_V6 is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MVEBU is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_MXS is not set
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_NPCM is not set
+# CONFIG_ARCH_NSPIRE is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_OMAP1 is not set
+# CONFIG_ARCH_OMAP2 is not set
+# CONFIG_ARCH_OMAP2PLUS is not set
+# CONFIG_ARCH_OMAP3 is not set
+# CONFIG_ARCH_OMAP4 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_OXNAS is not set
+# CONFIG_ARCH_PICOXCELL is not set
+# CONFIG_ARCH_PRIMA2 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_RANDOM is not set
+# CONFIG_ARCH_RDA is not set
+# CONFIG_ARCH_REALTEK is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_ROCKCHIP is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_S32 is not set
+# CONFIG_ARCH_S3C24XX is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_SEATTLE is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_SIRF is not set
+# CONFIG_ARCH_SOCFPGA is not set
+# CONFIG_ARCH_SPARX5 is not set
+# CONFIG_ARCH_SPRD is not set
+# CONFIG_ARCH_STI is not set
+# CONFIG_ARCH_STM32 is not set
+# CONFIG_ARCH_STRATIX10 is not set
+# CONFIG_ARCH_SUNXI is not set
+# CONFIG_ARCH_SYNQUACER is not set
+# CONFIG_ARCH_TANGO is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_THUNDER is not set
+# CONFIG_ARCH_THUNDER2 is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_UNIPHIER is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_VIRT is not set
+# CONFIG_ARCH_VISCONTI is not set
+# CONFIG_ARCH_VT8500 is not set
+# CONFIG_ARCH_VULCAN is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_WANTS_THP_SWAP is not set
+# CONFIG_ARCH_WM8505 is not set
+# CONFIG_ARCH_WM8750 is not set
+# CONFIG_ARCH_WM8850 is not set
+# CONFIG_ARCH_XGENE is not set
+# CONFIG_ARCH_ZX is not set
+# CONFIG_ARCH_ZYNQ is not set
+# CONFIG_ARCH_ZYNQMP is not set
+# CONFIG_ARCNET is not set
+# CONFIG_ARC_EMAC is not set
+# CONFIG_ARC_IRQ_NO_AUTOSAVE is not set
+# CONFIG_ARM64_16K_PAGES is not set
+# CONFIG_ARM64_64K_PAGES is not set
+# CONFIG_ARM64_AMU_EXTN is not set
+# CONFIG_ARM64_BTI is not set
+# CONFIG_ARM64_CRYPTO is not set
+# CONFIG_ARM64_E0PD is not set
+# CONFIG_ARM64_ERRATUM_1024718 is not set
+# CONFIG_ARM64_ERRATUM_1165522 is not set
+# CONFIG_ARM64_ERRATUM_1286807 is not set
+# CONFIG_ARM64_ERRATUM_1319367 is not set
+# CONFIG_ARM64_ERRATUM_1418040 is not set
+# CONFIG_ARM64_ERRATUM_1463225 is not set
+# CONFIG_ARM64_ERRATUM_1508412 is not set
+# CONFIG_ARM64_ERRATUM_1530923 is not set
+# CONFIG_ARM64_ERRATUM_1542419 is not set
+# CONFIG_ARM64_ERRATUM_819472 is not set
+# CONFIG_ARM64_ERRATUM_824069 is not set
+# CONFIG_ARM64_ERRATUM_826319 is not set
+# CONFIG_ARM64_ERRATUM_827319 is not set
+# CONFIG_ARM64_ERRATUM_832075 is not set
+# CONFIG_ARM64_ERRATUM_834220 is not set
+# CONFIG_ARM64_ERRATUM_843419 is not set
+# CONFIG_ARM64_ERRATUM_845719 is not set
+# CONFIG_ARM64_ERRATUM_858921 is not set
+# CONFIG_ARM64_HW_AFDBM is not set
+# CONFIG_ARM64_LSE_ATOMICS is not set
+# CONFIG_ARM64_MODULE_PLTS is not set
+# CONFIG_ARM64_MTE is not set
+# CONFIG_ARM64_PAN is not set
+# CONFIG_ARM64_PMEM is not set
+# CONFIG_ARM64_PSEUDO_NMI is not set
+# CONFIG_ARM64_PTDUMP_DEBUGFS is not set
+# CONFIG_ARM64_PTR_AUTH is not set
+# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
+# CONFIG_ARM64_RAS_EXTN is not set
+# CONFIG_ARM64_RELOC_TEST is not set
+# CONFIG_ARM64_SVE is not set
+CONFIG_ARM64_SW_TTBR0_PAN=y
+# CONFIG_ARM64_TLB_RANGE is not set
+# CONFIG_ARM64_UAO is not set
+# CONFIG_ARM64_USE_LSE_ATOMICS is not set
+# CONFIG_ARM64_VA_BITS_48 is not set
+# CONFIG_ARM64_VHE is not set
+# CONFIG_ARM_APPENDED_DTB is not set
+# CONFIG_ARM_ARCH_TIMER is not set
+# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
+# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
+# CONFIG_ARM_CCI is not set
+# CONFIG_ARM_CCI400_PMU is not set
+# CONFIG_ARM_CCI5xx_PMU is not set
+# CONFIG_ARM_CCI_PMU is not set
+# CONFIG_ARM_CCN is not set
+# CONFIG_ARM_CMN is not set
+# CONFIG_ARM_CPUIDLE is not set
+CONFIG_ARM_CPU_TOPOLOGY=y
+# CONFIG_ARM_CRYPTO is not set
+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
+# CONFIG_ARM_DSU_PMU is not set
+# CONFIG_ARM_ERRATA_326103 is not set
+# CONFIG_ARM_ERRATA_364296 is not set
+# CONFIG_ARM_ERRATA_411920 is not set
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+# CONFIG_ARM_ERRATA_643719 is not set
+# CONFIG_ARM_ERRATA_720789 is not set
+# CONFIG_ARM_ERRATA_742230 is not set
+# CONFIG_ARM_ERRATA_742231 is not set
+# CONFIG_ARM_ERRATA_743622 is not set
+# CONFIG_ARM_ERRATA_751472 is not set
+# CONFIG_ARM_ERRATA_754322 is not set
+# CONFIG_ARM_ERRATA_754327 is not set
+# CONFIG_ARM_ERRATA_764369 is not set
+# CONFIG_ARM_ERRATA_773022 is not set
+# CONFIG_ARM_ERRATA_775420 is not set
+# CONFIG_ARM_ERRATA_798181 is not set
+# CONFIG_ARM_ERRATA_814220 is not set
+# CONFIG_ARM_ERRATA_818325_852422 is not set
+# CONFIG_ARM_ERRATA_821420 is not set
+# CONFIG_ARM_ERRATA_825619 is not set
+# CONFIG_ARM_ERRATA_852421 is not set
+# CONFIG_ARM_ERRATA_852423 is not set
+# CONFIG_ARM_ERRATA_857271 is not set
+# CONFIG_ARM_ERRATA_857272 is not set
+# CONFIG_ARM_FFA_TRANSPORT is not set
+CONFIG_ARM_GIC_MAX_NR=1
+# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set
+# CONFIG_ARM_KPROBES_TEST is not set
+# CONFIG_ARM_LPAE is not set
+# CONFIG_ARM_MEDIATEK_CPUFREQ_HW is not set
+# CONFIG_ARM_MHU is not set
+# CONFIG_ARM_MODULE_PLTS is not set
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+# CONFIG_ARM_PSCI is not set
+# CONFIG_ARM_PSCI_CHECKER is not set
+# CONFIG_ARM_PSCI_CPUIDLE is not set
+# CONFIG_ARM_PTDUMP_DEBUGFS is not set
+# CONFIG_ARM_SBSA_WATCHDOG is not set
+# CONFIG_ARM_SCMI_PROTOCOL is not set
+# CONFIG_ARM_SCPI_PROTOCOL is not set
+# CONFIG_ARM_SDE_INTERFACE is not set
+# CONFIG_ARM_SMCCC_SOC_ID is not set
+# CONFIG_ARM_SMC_WATCHDOG is not set
+# CONFIG_ARM_SP805_WATCHDOG is not set
+# CONFIG_ARM_SPE_PMU is not set
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_ARM_TIMER_SP804 is not set
+# CONFIG_ARM_UNWIND is not set
+# CONFIG_ARM_VIRT_EXT is not set
+# CONFIG_AS3935 is not set
+# CONFIG_AS73211 is not set
+# CONFIG_ASM9260_TIMER is not set
+# CONFIG_ASN1 is not set
+# CONFIG_ASUS_LAPTOP is not set
+# CONFIG_ASUS_WIRELESS is not set
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+# CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE is not set
+# CONFIG_ASYNC_RAID6_TEST is not set
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_AT76C50X_USB is not set
+# CONFIG_AT803X_PHY is not set
+# CONFIG_AT91_SAMA5D2_ADC is not set
+# CONFIG_ATA is not set
+# CONFIG_ATAGS is not set
+CONFIG_ATAGS_PROC=y
+# CONFIG_ATALK is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_ATA_ACPI is not set
+CONFIG_ATA_BMDMA=y
+# CONFIG_ATA_FORCE is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_ATA_LEDS is not set
+# CONFIG_ATA_NONSTANDARD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_ATA_PIIX is not set
+CONFIG_ATA_SFF=y
+# CONFIG_ATA_VERBOSE_ERROR is not set
+# CONFIG_ATH10K is not set
+# CONFIG_ATH25 is not set
+# CONFIG_ATH5K is not set
+# CONFIG_ATH6KL is not set
+# CONFIG_ATH79 is not set
+# CONFIG_ATH9K is not set
+# CONFIG_ATH9K_HTC is not set
+# CONFIG_ATH_DEBUG is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1C is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL2 is not set
+# CONFIG_ATLAS_EZO_SENSOR is not set
+# CONFIG_ATLAS_PH_SENSOR is not set
+# CONFIG_ATM is not set
+# CONFIG_ATMEL is not set
+# CONFIG_ATMEL_PIT is not set
+# CONFIG_ATMEL_SSC is not set
+# CONFIG_ATM_AMBASSADOR is not set
+# CONFIG_ATM_BR2684 is not set
+CONFIG_ATM_BR2684_IPFILTER=y
+# CONFIG_ATM_CLIP is not set
+CONFIG_ATM_CLIP_NO_ICMP=y
+# CONFIG_ATM_DRIVERS is not set
+# CONFIG_ATM_DUMMY is not set
+# CONFIG_ATM_ENI is not set
+# CONFIG_ATM_FIRESTREAM is not set
+# CONFIG_ATM_FORE200E is not set
+# CONFIG_ATM_HE is not set
+# CONFIG_ATM_HORIZON is not set
+# CONFIG_ATM_IA is not set
+# CONFIG_ATM_IDT77252 is not set
+# CONFIG_ATM_LANAI is not set
+# CONFIG_ATM_LANE is not set
+# CONFIG_ATM_MPOA is not set
+# CONFIG_ATM_NICSTAR is not set
+# CONFIG_ATM_SOLOS is not set
+# CONFIG_ATM_TCP is not set
+# CONFIG_ATM_ZATM is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_ATP is not set
+# CONFIG_AUDIT is not set
+# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
+# CONFIG_AURORA_NB8800 is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTO_ZRELADDR is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_AX25 is not set
+# CONFIG_AX25_DAMA_SLAVE is not set
+# CONFIG_AX88796 is not set
+# CONFIG_AX88796B_PHY is not set
+# CONFIG_AXP20X_ADC is not set
+# CONFIG_AXP20X_POWER is not set
+# CONFIG_AXP288_ADC is not set
+# CONFIG_AXP288_FUEL_GAUGE is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_B44 is not set
+# CONFIG_B53 is not set
+# CONFIG_B53_MDIO_DRIVER is not set
+# CONFIG_B53_MMAP_DRIVER is not set
+# CONFIG_B53_SERDES is not set
+# CONFIG_B53_SPI_DRIVER is not set
+# CONFIG_B53_SRAB_DRIVER is not set
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+# CONFIG_BACKLIGHT_APPLE is not set
+# CONFIG_BACKLIGHT_ARCXCNN is not set
+# CONFIG_BACKLIGHT_BD6107 is not set
+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+# CONFIG_BACKLIGHT_GENERIC is not set
+# CONFIG_BACKLIGHT_GPIO is not set
+# CONFIG_BACKLIGHT_KTD253 is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_BACKLIGHT_LED is not set
+# CONFIG_BACKLIGHT_LM3630A is not set
+# CONFIG_BACKLIGHT_LM3639 is not set
+# CONFIG_BACKLIGHT_LP855X is not set
+# CONFIG_BACKLIGHT_LV5207LP is not set
+# CONFIG_BACKLIGHT_PANDORA is not set
+# CONFIG_BACKLIGHT_PM8941_WLED is not set
+# CONFIG_BACKLIGHT_PWM is not set
+# CONFIG_BACKLIGHT_QCOM_WLED is not set
+# CONFIG_BACKLIGHT_RPI is not set
+# CONFIG_BACKLIGHT_SAHARA is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_BAREUDP is not set
+CONFIG_BASE_FULL=y
+CONFIG_BASE_SMALL=0
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_BATTERY_BQ27XXX is not set
+# CONFIG_BATTERY_BQ27XXX_HDQ is not set
+# CONFIG_BATTERY_CW2015 is not set
+# CONFIG_BATTERY_DS2760 is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_GAUGE_LTC2941 is not set
+# CONFIG_BATTERY_GOLDFISH is not set
+# CONFIG_BATTERY_LEGO_EV3 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_BATTERY_MAX1721X is not set
+# CONFIG_BATTERY_RT5033 is not set
+# CONFIG_BATTERY_SBS is not set
+# CONFIG_BAYCOM_EPP is not set
+# CONFIG_BAYCOM_PAR is not set
+# CONFIG_BAYCOM_SER_FDX is not set
+# CONFIG_BAYCOM_SER_HDX is not set
+# CONFIG_BCACHE is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM54140_PHY is not set
+# CONFIG_BCM63XX is not set
+# CONFIG_BCM63XX_PHY is not set
+# CONFIG_BCM7038_WDT is not set
+# CONFIG_BCM7XXX_PHY is not set
+# CONFIG_BCM84881_PHY is not set
+# CONFIG_BCM87XX_PHY is not set
+# CONFIG_BCMA is not set
+# CONFIG_BCMA_DRIVER_GPIO is not set
+CONFIG_BCMA_POSSIBLE=y
+# CONFIG_BCMGENET is not set
+# CONFIG_BCM_IPROC_ADC is not set
+# CONFIG_BCM_KONA_USB2_PHY is not set
+# CONFIG_BCM_SBA_RAID is not set
+# CONFIG_BCM_VK is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_BE2ISCSI is not set
+# CONFIG_BE2NET is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_BGMAC is not set
+# CONFIG_BH1750 is not set
+# CONFIG_BH1780 is not set
+# CONFIG_BIG_KEYS is not set
+# CONFIG_BIG_LITTLE is not set
+CONFIG_BINARY_PRINTF=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_ELF_FDPIC is not set
+# CONFIG_BINFMT_FLAT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_BINFMT_SCRIPT=y
+CONFIG_BITREVERSE=y
+# CONFIG_BLK_CGROUP_IOCOST is not set
+# CONFIG_BLK_CGROUP_IOLATENCY is not set
+# CONFIG_BLK_CGROUP_IOPRIO is not set
+# CONFIG_BLK_CMDLINE_PARSER is not set
+# CONFIG_BLK_DEBUG_FS is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_BLK_DEV_4DRIVES is not set
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI14XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_ATIIXP is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_BSGLIB is not set
+# CONFIG_BLK_DEV_CMD640 is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_CS5535 is not set
+# CONFIG_BLK_DEV_CS5536 is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_DELKIN is not set
+# CONFIG_BLK_DEV_DM is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_DTC2278 is not set
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_GENERIC is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_HT6560B is not set
+# CONFIG_BLK_DEV_IDEACPI is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDECS is not set
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_BLK_DEV_IDEPNP is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDE_AU1XXX is not set
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_BLK_DEV_INTEGRITY is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_IT8172 is not set
+# CONFIG_BLK_DEV_IT8213 is not set
+# CONFIG_BLK_DEV_IT821X is not set
+# CONFIG_BLK_DEV_JMICRON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_NULL_BLK is not set
+# CONFIG_BLK_DEV_NVME is not set
+# CONFIG_BLK_DEV_OFFBOARD is not set
+# CONFIG_BLK_DEV_OPTI621 is not set
+# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_PLATFORM is not set
+# CONFIG_BLK_DEV_PMEM is not set
+# CONFIG_BLK_DEV_QD65XX is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_BLK_DEV_RSXX is not set
+# CONFIG_BLK_DEV_RZ1000 is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_SD is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SIS5513 is not set
+# CONFIG_BLK_DEV_SKD is not set
+# CONFIG_BLK_DEV_SL82C105 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_TC86C001 is not set
+# CONFIG_BLK_DEV_THROTTLING is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_UMC8672 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+# CONFIG_BLK_DEV_ZONED is not set
+# CONFIG_BLK_INLINE_ENCRYPTION is not set
+# CONFIG_BLK_SED_OPAL is not set
+# CONFIG_BLK_WBT is not set
+CONFIG_BLOCK=y
+# CONFIG_BMA180 is not set
+# CONFIG_BMA220 is not set
+# CONFIG_BMA400 is not set
+# CONFIG_BMC150_ACCEL is not set
+# CONFIG_BMC150_MAGN is not set
+# CONFIG_BMC150_MAGN_I2C is not set
+# CONFIG_BMC150_MAGN_SPI is not set
+# CONFIG_BME680 is not set
+# CONFIG_BMG160 is not set
+# CONFIG_BMI088_ACCEL is not set
+# CONFIG_BMI160_I2C is not set
+# CONFIG_BMI160_SPI is not set
+# CONFIG_BMIPS_GENERIC is not set
+# CONFIG_BMP280 is not set
+# CONFIG_BNA is not set
+# CONFIG_BNX2 is not set
+# CONFIG_BNX2X is not set
+# CONFIG_BNX2X_SRIOV is not set
+# CONFIG_BNXT is not set
+# CONFIG_BONDING is not set
+# CONFIG_BOOKE_WDT is not set
+CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT=3
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+# CONFIG_BOOTTIME_TRACING is not set
+# CONFIG_BOOT_CONFIG is not set
+# CONFIG_INITRAMFS_PRESERVE_MTIME is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+CONFIG_BOOT_RAW=y
+# CONFIG_BOUNCE is not set
+CONFIG_BPF=y
+# CONFIG_BPFILTER is not set
+CONFIG_BPF_JIT=y
+# CONFIG_BPF_JIT_ALWAYS_ON is not set
+CONFIG_BPF_JIT_DEFAULT_ON=y
+# CONFIG_BPF_PRELOAD is not set
+# CONFIG_BPF_STREAM_PARSER is not set
+CONFIG_BPF_SYSCALL=y
+CONFIG_BPF_UNPRIV_DEFAULT_OFF=y
+# CONFIG_BPQETHER is not set
+CONFIG_BQL=y
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_BRCMFMAC is not set
+# CONFIG_BRCMSMAC is not set
+# CONFIG_BRCMSTB_GISB_ARB is not set
+CONFIG_BRIDGE=y
+# CONFIG_BRIDGE_CFM is not set
+# CONFIG_BRIDGE_EBT_802_3 is not set
+# CONFIG_BRIDGE_EBT_AMONG is not set
+# CONFIG_BRIDGE_EBT_ARP is not set
+# CONFIG_BRIDGE_EBT_ARPREPLY is not set
+# CONFIG_BRIDGE_EBT_BROUTE is not set
+# CONFIG_BRIDGE_EBT_DNAT is not set
+# CONFIG_BRIDGE_EBT_IP is not set
+# CONFIG_BRIDGE_EBT_IP6 is not set
+# CONFIG_BRIDGE_EBT_LIMIT is not set
+# CONFIG_BRIDGE_EBT_LOG is not set
+# CONFIG_BRIDGE_EBT_MARK is not set
+# CONFIG_BRIDGE_EBT_MARK_T is not set
+# CONFIG_BRIDGE_EBT_NFLOG is not set
+# CONFIG_BRIDGE_EBT_PKTTYPE is not set
+# CONFIG_BRIDGE_EBT_REDIRECT is not set
+# CONFIG_BRIDGE_EBT_SNAT is not set
+# CONFIG_BRIDGE_EBT_STP is not set
+# CONFIG_BRIDGE_EBT_T_FILTER is not set
+# CONFIG_BRIDGE_EBT_T_NAT is not set
+# CONFIG_BRIDGE_EBT_VLAN is not set
+CONFIG_BRIDGE_IGMP_SNOOPING=y
+# CONFIG_BRIDGE_MRP is not set
+# CONFIG_BRIDGE_NETFILTER is not set
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+CONFIG_BRIDGE_VLAN_FILTERING=y
+# CONFIG_BROADCOM_PHY is not set
+CONFIG_BROKEN_ON_SMP=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_BT is not set
+# CONFIG_BTRFS_ASSERT is not set
+# CONFIG_BTRFS_DEBUG is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_BTRFS_FS_POSIX_ACL is not set
+# CONFIG_BTRFS_FS_REF_VERIFY is not set
+# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
+# CONFIG_BT_AOSPEXT is not set
+# CONFIG_BT_ATH3K is not set
+# CONFIG_BT_BNEP is not set
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+# CONFIG_BT_BREDR is not set
+# CONFIG_BT_CMTP is not set
+# CONFIG_BT_FEATURE_DEBUG is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIBLUECARD is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBT3C is not set
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set
+# CONFIG_BT_HCIBTUSB_MTK is not set
+# CONFIG_BT_HCIBTUSB_RTL is not set
+# CONFIG_BT_HCIDTL1 is not set
+# CONFIG_BT_HCIUART is not set
+# CONFIG_BT_HCIUART_3WIRE is not set
+# CONFIG_BT_HCIUART_AG6XX is not set
+# CONFIG_BT_HCIUART_ATH3K is not set
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_H4=y
+# CONFIG_BT_HCIUART_LL is not set
+# CONFIG_BT_HCIUART_MRVL is not set
+# CONFIG_BT_HCIUART_QCA is not set
+# CONFIG_BT_HCIUART_RTL is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_BT_HIDP is not set
+# CONFIG_BT_HS is not set
+# CONFIG_BT_LE is not set
+# CONFIG_BT_LEDS is not set
+# CONFIG_BT_MRVL is not set
+# CONFIG_BT_MSFTEXT is not set
+# CONFIG_BT_MTKSDIO is not set
+# CONFIG_BT_MTKUART is not set
+# CONFIG_BT_RFCOMM is not set
+CONFIG_BT_RFCOMM_TTY=y
+# CONFIG_BT_SELFTEST is not set
+# CONFIG_BT_VIRTIO is not set
+CONFIG_BUG=y
+# CONFIG_BUG_ON_DATA_CORRUPTION is not set
+CONFIG_BUILDTIME_EXTABLE_SORT=y
+CONFIG_BUILDTIME_TABLE_SORT=y
+# CONFIG_BUILD_BIN2C is not set
+CONFIG_BUILD_SALT=""
+# CONFIG_C2PORT is not set
+CONFIG_CACHE_L2X0_PMU=y
+# CONFIG_CADENCE_WATCHDOG is not set
+# CONFIG_CAIF is not set
+# CONFIG_CAN is not set
+# CONFIG_CAN_BCM is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# CONFIG_CAN_DEV is not set
+# CONFIG_CAN_ETAS_ES58X is not set
+# CONFIG_CAN_GS_USB is not set
+# CONFIG_CAN_GW is not set
+# CONFIG_CAN_HI311X is not set
+# CONFIG_CAN_IFI_CANFD is not set
+# CONFIG_CAN_ISOTP is not set
+# CONFIG_CAN_J1939 is not set
+# CONFIG_CAN_KVASER_PCIEFD is not set
+# CONFIG_CAN_MCBA_USB is not set
+# CONFIG_CAN_MCP251XFD is not set
+# CONFIG_CAN_M_CAN is not set
+# CONFIG_CAN_PEAK_PCIEFD is not set
+# CONFIG_CAN_RAW is not set
+# CONFIG_CAN_RCAR is not set
+# CONFIG_CAN_RCAR_CANFD is not set
+# CONFIG_CAN_SLCAN is not set
+# CONFIG_CAN_SUN4I is not set
+# CONFIG_CAN_UCAN is not set
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_VXCAN is not set
+# CONFIG_CAPI_AVM is not set
+# CONFIG_CAPI_EICON is not set
+# CONFIG_CAPI_TRACE is not set
+CONFIG_CARDBUS=y
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_CARL9170 is not set
+# CONFIG_CASSINI is not set
+# CONFIG_CAVIUM_CPT is not set
+# CONFIG_CAVIUM_ERRATUM_22375 is not set
+# CONFIG_CAVIUM_ERRATUM_23144 is not set
+# CONFIG_CAVIUM_ERRATUM_23154 is not set
+# CONFIG_CAVIUM_ERRATUM_27456 is not set
+# CONFIG_CAVIUM_ERRATUM_30115 is not set
+# CONFIG_CAVIUM_OCTEON_SOC is not set
+# CONFIG_CAVIUM_PTP is not set
+# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set
+# CONFIG_CB710_CORE is not set
+# CONFIG_CC10001_ADC is not set
+# CONFIG_CCS811 is not set
+CONFIG_CC_CAN_LINK=y
+CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_CFG80211 is not set
+# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_CGROUP_FAVOR_DYNMODS is not set
+# CONFIG_CGROUP_MISC is not set
+# CONFIG_CHARGER_ADP5061 is not set
+# CONFIG_CHARGER_BD99954 is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_BQ24190 is not set
+# CONFIG_CHARGER_BQ24257 is not set
+# CONFIG_CHARGER_BQ24735 is not set
+# CONFIG_CHARGER_BQ2515X is not set
+# CONFIG_CHARGER_BQ256XX is not set
+# CONFIG_CHARGER_BQ25890 is not set
+# CONFIG_CHARGER_BQ25980 is not set
+# CONFIG_CHARGER_DETECTOR_MAX14656 is not set
+# CONFIG_CHARGER_GPIO is not set
+# CONFIG_CHARGER_ISP1704 is not set
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_LT3651 is not set
+# CONFIG_CHARGER_LTC3651 is not set
+# CONFIG_CHARGER_LTC4162L is not set
+# CONFIG_CHARGER_MANAGER is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_RT9455 is not set
+# CONFIG_CHARGER_SBS is not set
+# CONFIG_CHARGER_SMB347 is not set
+# CONFIG_CHARGER_TWL4030 is not set
+# CONFIG_CHARGER_UCS1002 is not set
+# CONFIG_CHASH_SELFTEST is not set
+# CONFIG_CHASH_STATS is not set
+# CONFIG_CHECKPOINT_RESTORE is not set
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_CHELSIO_T4 is not set
+# CONFIG_CHELSIO_T4VF is not set
+# CONFIG_CHROME_PLATFORMS is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_CIFS is not set
+# CONFIG_CIFS_ACL is not set
+CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y
+# CONFIG_CIFS_DEBUG is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_FSCACHE is not set
+# CONFIG_CIFS_NFSD_EXPORT is not set
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_SMB2 is not set
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_STATS2 is not set
+# CONFIG_CIFS_SWN_UPCALL is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+CONFIG_CIFS_XATTR=y
+# CONFIG_CIO_DAC is not set
+# CONFIG_CLEANCACHE is not set
+# CONFIG_CLKSRC_PISTACHIO is not set
+# CONFIG_CLKSRC_VERSATILE is not set
+# CONFIG_CLKSRC_PISTACHIO is not set
+# CONFIG_CLK_GFM_LPASS_SM8250 is not set
+# CONFIG_CLK_HSDK is not set
+# CONFIG_CLK_QORIQ is not set
+# CONFIG_CLK_SP810 is not set
+# CONFIG_CLOCK_THERMAL is not set
+CONFIG_CLS_U32_MARK=y
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_CM32181 is not set
+# CONFIG_CM3232 is not set
+# CONFIG_CM3323 is not set
+# CONFIG_CM3605 is not set
+# CONFIG_CM36651 is not set
+# CONFIG_CMA is not set
+CONFIG_CMDLINE=""
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_EXTEND is not set
+# CONFIG_CMDLINE_FORCE is not set
+# CONFIG_CMDLINE_FROM_BOOTLOADER is not set
+# CONFIG_CMDLINE_PARTITION is not set
+# CONFIG_CNIC is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_CODE_PATCHING_SELFTEST is not set
+# CONFIG_COMEDI is not set
+# CONFIG_COMMON_CLK_AXI_CLKGEN is not set
+# CONFIG_COMMON_CLK_BOSTON is not set
+# CONFIG_COMMON_CLK_CDCE706 is not set
+# CONFIG_COMMON_CLK_CDCE925 is not set
+# CONFIG_COMMON_CLK_CS2000_CP is not set
+# CONFIG_COMMON_CLK_FIXED_MMIO is not set
+# CONFIG_COMMON_CLK_IPROC is not set
+# CONFIG_COMMON_CLK_MAX9485 is not set
+# CONFIG_COMMON_CLK_MT6765 is not set
+# CONFIG_COMMON_CLK_MT8167 is not set
+# CONFIG_COMMON_CLK_MT8167_AUDSYS is not set
+# CONFIG_COMMON_CLK_MT8167_IMGSYS is not set
+# CONFIG_COMMON_CLK_MT8167_MFGCFG is not set
+# CONFIG_COMMON_CLK_MT8167_MMSYS is not set
+# CONFIG_COMMON_CLK_MT8167_VDECSYS is not set
+# CONFIG_COMMON_CLK_MT8192 is not set
+# CONFIG_COMMON_CLK_NXP is not set
+# CONFIG_COMMON_CLK_PIC32 is not set
+# CONFIG_COMMON_CLK_PISTACHIO is not set
+# CONFIG_COMMON_CLK_PWM is not set
+# CONFIG_COMMON_CLK_PXA is not set
+# CONFIG_COMMON_CLK_QCOM is not set
+# CONFIG_COMMON_CLK_SI514 is not set
+# CONFIG_COMMON_CLK_SI5341 is not set
+# CONFIG_COMMON_CLK_SI5351 is not set
+# CONFIG_COMMON_CLK_SI544 is not set
+# CONFIG_COMMON_CLK_SI570 is not set
+# CONFIG_COMMON_CLK_VC5 is not set
+# CONFIG_COMMON_CLK_XGENE is not set
+# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
+CONFIG_COMPACTION=y
+# CONFIG_COMPAL_LAPTOP is not set
+# CONFIG_COMPAT is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_COMPILE_TEST is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
+CONFIG_CONSOLE_LOGLEVEL_QUIET=4
+CONFIG_CONSTRUCTORS=y
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_COPS is not set
+# CONFIG_CORDIC is not set
+# CONFIG_COREDUMP is not set
+# CONFIG_CORESIGHT is not set
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_CORTINA_PHY is not set
+# CONFIG_COUNTER is not set
+# CONFIG_CPA_DEBUG is not set
+# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+# CONFIG_CPU_FREQ_THERMAL is not set
+# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND is not set
+# CONFIG_CPU_IDLE is not set
+# CONFIG_CPU_IDLE_GOV_LADDER is not set
+# CONFIG_CPU_IDLE_GOV_MENU is not set
+# CONFIG_CPU_IDLE_GOV_TEO is not set
+# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
+# CONFIG_CPU_ISOLATION is not set
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_NO_EFFICIENT_FFS is not set
+CONFIG_CPU_SW_DOMAIN_PAN=y
+# CONFIG_CPU_THERMAL is not set
+# CONFIG_CRAMFS is not set
+CONFIG_CRAMFS_BLOCKDEV=y
+# CONFIG_CRAMFS_MTD is not set
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_CRC32_BIT is not set
+CONFIG_CRC32_SARWATE=y
+# CONFIG_CRC32_SELFTEST is not set
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SLICEBY8 is not set
+# CONFIG_CRC4 is not set
+# CONFIG_CRC64 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_CRC8 is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CROSS_COMPILE=""
+# CONFIG_CROSS_MEMORY_ATTACH is not set
+CONFIG_CRYPTO=y
+# CONFIG_CRYPTO_842 is not set
+CONFIG_CRYPTO_ACOMP2=y
+# CONFIG_CRYPTO_ADIANTUM is not set
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+# CONFIG_CRYPTO_AEGIS128 is not set
+# CONFIG_CRYPTO_AEGIS128L is not set
+# CONFIG_CRYPTO_AEGIS128L_AESNI_SSE2 is not set
+# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set
+# CONFIG_CRYPTO_AEGIS256 is not set
+# CONFIG_CRYPTO_AEGIS256_AESNI_SSE2 is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_AES_586 is not set
+# CONFIG_CRYPTO_AES_ARM is not set
+# CONFIG_CRYPTO_AES_ARM64 is not set
+# CONFIG_CRYPTO_AES_ARM64_BS is not set
+# CONFIG_CRYPTO_AES_ARM64_CE is not set
+# CONFIG_CRYPTO_AES_ARM64_CE_BLK is not set
+# CONFIG_CRYPTO_AES_ARM64_CE_CCM is not set
+# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set
+# CONFIG_CRYPTO_AES_ARM_BS is not set
+# CONFIG_CRYPTO_AES_ARM_CE is not set
+# CONFIG_CRYPTO_AES_NI_INTEL is not set
+# CONFIG_CRYPTO_AES_TI is not set
+CONFIG_CRYPTO_AKCIPHER=y
+CONFIG_CRYPTO_AKCIPHER2=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_BLAKE2B is not set
+# CONFIG_CRYPTO_BLAKE2B_NEON is not set
+# CONFIG_CRYPTO_BLAKE2S is not set
+# CONFIG_CRYPTO_BLAKE2S_ARM is not set
+# CONFIG_CRYPTO_BLAKE2S_X86 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_CBC is not set
+CONFIG_CRYPTO_CCM=y
+# CONFIG_CRYPTO_CFB is not set
+# CONFIG_CRYPTO_CHACHA20 is not set
+# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
+# CONFIG_CRYPTO_CHACHA20_NEON is not set
+# CONFIG_CRYPTO_CHACHA20_X86_64 is not set
+# CONFIG_CRYPTO_CHACHA_MIPS is not set
+# CONFIG_CRYPTO_CMAC is not set
+# CONFIG_CRYPTO_CRC32 is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CRC32C_INTEL is not set
+# CONFIG_CRYPTO_CRC32_ARM_CE is not set
+# CONFIG_CRYPTO_CRCT10DIF is not set
+# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set
+# CONFIG_CRYPTO_CRCT10DIF_ARM_CE is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_CTR=y
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_CURVE25519 is not set
+# CONFIG_CRYPTO_CURVE25519_NEON is not set
+# CONFIG_CRYPTO_CURVE25519_X86 is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set
+# CONFIG_CRYPTO_DEV_ATMEL_AES is not set
+# CONFIG_CRYPTO_DEV_ATMEL_AUTHENC is not set
+# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
+# CONFIG_CRYPTO_DEV_ATMEL_SHA is not set
+# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
+# CONFIG_CRYPTO_DEV_ATMEL_TDES is not set
+# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set
+# CONFIG_CRYPTO_DEV_CCP is not set
+# CONFIG_CRYPTO_DEV_CCP_DEBUGFS is not set
+# CONFIG_CRYPTO_DEV_CCREE is not set
+# CONFIG_CRYPTO_DEV_FSL_CAAM is not set
+# CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC is not set
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_CRYPTO_DEV_HISI_SEC is not set
+# CONFIG_CRYPTO_DEV_HISI_ZIP is not set
+# CONFIG_CRYPTO_DEV_IMGTEC_HASH is not set
+# CONFIG_CRYPTO_DEV_MARVELL_CESA is not set
+# CONFIG_CRYPTO_DEV_MEDIATEK is not set
+# CONFIG_CRYPTO_DEV_MV_CESA is not set
+# CONFIG_CRYPTO_DEV_MXC_SCC is not set
+# CONFIG_CRYPTO_DEV_MXS_DCP is not set
+# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set
+# CONFIG_CRYPTO_DEV_OCTEONTX_CPT is not set
+# CONFIG_CRYPTO_DEV_QAT_4XXX is not set
+# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set
+# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set
+# CONFIG_CRYPTO_DEV_QAT_C62X is not set
+# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set
+# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set
+# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set
+# CONFIG_CRYPTO_DEV_QCE is not set
+# CONFIG_CRYPTO_DEV_S5P is not set
+# CONFIG_CRYPTO_DEV_SAFEXCEL is not set
+# CONFIG_CRYPTO_DEV_SAHARA is not set
+# CONFIG_CRYPTO_DEV_SP_PSP is not set
+# CONFIG_CRYPTO_DEV_TALITOS is not set
+# CONFIG_CRYPTO_DEV_VIRTIO is not set
+# CONFIG_CRYPTO_DH is not set
+# CONFIG_CRYPTO_DRBG_CTR is not set
+# CONFIG_CRYPTO_DRBG_HASH is not set
+# CONFIG_CRYPTO_DRBG_MENU is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_ECDH is not set
+# CONFIG_CRYPTO_ECDSA is not set
+# CONFIG_CRYPTO_ECHAINIV is not set
+# CONFIG_CRYPTO_ECRDSA is not set
+# CONFIG_CRYPTO_ESSIV is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_GF128MUL=y
+CONFIG_CRYPTO_GHASH=y
+# CONFIG_CRYPTO_GHASH_ARM64_CE is not set
+# CONFIG_CRYPTO_GHASH_ARM_CE is not set
+# CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_CRYPTO_JITTERENTROPY is not set
+# CONFIG_CRYPTO_KEYWRAP is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+CONFIG_CRYPTO_KPP=y
+CONFIG_CRYPTO_KPP2=y
+CONFIG_CRYPTO_LIB_AES=y
+CONFIG_CRYPTO_LIB_ARC4=y
+# CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC is not set
+# CONFIG_CRYPTO_LIB_CHACHA is not set
+# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set
+# CONFIG_CRYPTO_LIB_CURVE25519 is not set
+# CONFIG_CRYPTO_LIB_POLY1305 is not set
+CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_LZ4 is not set
+# CONFIG_CRYPTO_LZ4HC is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+# CONFIG_CRYPTO_MCRYPTD is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_MORUS1280 is not set
+# CONFIG_CRYPTO_MORUS1280_AVX2 is not set
+# CONFIG_CRYPTO_MORUS1280_SSE2 is not set
+# CONFIG_CRYPTO_MORUS640 is not set
+# CONFIG_CRYPTO_MORUS640_SSE2 is not set
+# CONFIG_CRYPTO_NHPOLY1305_NEON is not set
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_NULL2=y
+# CONFIG_CRYPTO_OFB is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_PCOMP is not set
+# CONFIG_CRYPTO_PCOMP2 is not set
+CONFIG_CRYPTO_PCRYPT=y
+# CONFIG_CRYPTO_POLY1305 is not set
+# CONFIG_CRYPTO_POLY1305_ARM is not set
+# CONFIG_CRYPTO_POLY1305_MIPS is not set
+# CONFIG_CRYPTO_POLY1305_NEON is not set
+# CONFIG_CRYPTO_POLY1305_X86_64 is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_RNG is not set
+# CONFIG_CRYPTO_RSA is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SALSA20_586 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SEQIV is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA1_ARM is not set
+# CONFIG_CRYPTO_SHA1_ARM64_CE is not set
+# CONFIG_CRYPTO_SHA1_ARM_CE is not set
+# CONFIG_CRYPTO_SHA1_ARM_NEON is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA256_ARM is not set
+# CONFIG_CRYPTO_SHA256_ARM64 is not set
+# CONFIG_CRYPTO_SHA2_ARM64_CE is not set
+# CONFIG_CRYPTO_SHA2_ARM_CE is not set
+# CONFIG_CRYPTO_SHA3 is not set
+# CONFIG_CRYPTO_SHA3_ARM64 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_SHA512_ARM is not set
+# CONFIG_CRYPTO_SHA512_ARM64 is not set
+# CONFIG_CRYPTO_SHA512_ARM64_CE is not set
+# CONFIG_CRYPTO_SIMD is not set
+CONFIG_CRYPTO_SKCIPHER=y
+CONFIG_CRYPTO_SKCIPHER2=y
+# CONFIG_CRYPTO_SM2 is not set
+# CONFIG_CRYPTO_SM3 is not set
+# CONFIG_CRYPTO_SM3_ARM64_CE is not set
+# CONFIG_CRYPTO_SM4 is not set
+# CONFIG_CRYPTO_SM4_ARM64_CE is not set
+# CONFIG_CRYPTO_SPECK is not set
+# CONFIG_CRYPTO_STATS is not set
+# CONFIG_CRYPTO_STREEBOG is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TEST is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_TWOFISH_586 is not set
+# CONFIG_CRYPTO_TWOFISH_COMMON is not set
+# CONFIG_CRYPTO_USER is not set
+# CONFIG_CRYPTO_USER_API_AEAD is not set
+# CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_RNG is not set
+# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_VMAC is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+# CONFIG_CRYPTO_XXHASH is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_ZSTD is not set
+# CONFIG_CS5535_MFGPT is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_CS89x0_PLATFORM is not set
+# CONFIG_CSD_LOCK_WAIT_DEBUG is not set
+# CONFIG_CUSE is not set
+# CONFIG_CW1200 is not set
+# CONFIG_CXD2880_SPI_DRV is not set
+# CONFIG_CXL_AFU_DRIVER_OPS is not set
+# CONFIG_CXL_BASE is not set
+# CONFIG_CXL_BUS is not set
+# CONFIG_CXL_EEH is not set
+# CONFIG_CXL_KERNEL_API is not set
+# CONFIG_CXL_LIB is not set
+# CONFIG_CYPRESS_FIRMWARE is not set
+# CONFIG_DA280 is not set
+# CONFIG_DA311 is not set
+# CONFIG_DAMON is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_DAX is not set
+# CONFIG_DCB is not set
+# CONFIG_DDR is not set
+# CONFIG_DEBUG_ALIGN_RODATA is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_EFI is not set
+# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set
+# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_FS_ALLOW_ALL=y
+# CONFIG_DEBUG_FS_ALLOW_NONE is not set
+# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_INFO_BTF is not set
+# CONFIG_DEBUG_INFO_COMPRESSED is not set
+# CONFIG_DEBUG_INFO_DWARF4 is not set
+# CONFIG_DEBUG_INFO_DWARF5 is not set
+CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+# CONFIG_DEBUG_INFO_SPLIT is not set
+# CONFIG_DEBUG_IRQFLAGS is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_KMAP_LOCAL is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_KOBJECT_RELEASE is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_DEBUG_LL_UART_8250 is not set
+# CONFIG_DEBUG_LL_UART_PL01X is not set
+# CONFIG_DEBUG_LOCKDEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_MISC is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_NX_TEST is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUG_PAGE_REF is not set
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+# CONFIG_DEBUG_PER_CPU_MAPS is not set
+# CONFIG_DEBUG_PINCTRL is not set
+# CONFIG_DEBUG_PI_LIST is not set
+# CONFIG_DEBUG_PLIST is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_DEBUG_RODATA_TEST is not set
+# CONFIG_DEBUG_RSEQ is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_DEBUG_RWSEMS is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+# CONFIG_DEBUG_SEMIHOSTING is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
+# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
+# CONFIG_DEBUG_TIMEKEEPING is not set
+# CONFIG_DEBUG_UART_8250_PALMCHIP is not set
+# CONFIG_DEBUG_UART_8250_WORD is not set
+# CONFIG_DEBUG_UART_BCM63XX is not set
+# CONFIG_DEBUG_UART_FLOW_CONTROL is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_VIRTUAL is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_VM_PGTABLE is not set
+# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
+# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
+# CONFIG_DEBUG_WX is not set
+# CONFIG_DEBUG_ZBOOT is not set
+# CONFIG_DECNET is not set
+# CONFIG_DEFAULT_CODEL is not set
+CONFIG_DEFAULT_CUBIC=y
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_FQ is not set
+CONFIG_DEFAULT_FQ_CODEL=y
+CONFIG_DEFAULT_HOSTNAME="(none)"
+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
+CONFIG_DEFAULT_INIT=""
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_DEFAULT_NET_SCH="fq_codel"
+# CONFIG_DEFAULT_NOOP is not set
+# CONFIG_DEFAULT_PFIFO_FAST is not set
+# CONFIG_DEFAULT_RENO is not set
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_DEFAULT_SECURITY_DAC=y
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SFQ is not set
+CONFIG_DEFAULT_TCP_CONG="cubic"
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
+# CONFIG_DELL_LAPTOP is not set
+# CONFIG_DELL_RBTN is not set
+# CONFIG_DELL_SMBIOS is not set
+# CONFIG_DELL_SMO8800 is not set
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_DEVMEM is not set
+CONFIG_DEVPORT=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_DEVTMPFS is not set
+# CONFIG_DEVTMPFS_MOUNT is not set
+# CONFIG_DEV_DAX is not set
+# CONFIG_DGAP is not set
+# CONFIG_DGNC is not set
+# CONFIG_DHT11 is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_DISPLAY_CONNECTOR_ANALOG_TV is not set
+# CONFIG_DISPLAY_CONNECTOR_DVI is not set
+# CONFIG_DISPLAY_CONNECTOR_HDMI is not set
+# CONFIG_DISPLAY_ENCODER_TFP410 is not set
+# CONFIG_DISPLAY_ENCODER_TPD12S015 is not set
+# CONFIG_DISPLAY_PANEL_DPI is not set
+# CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02 is not set
+# CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1 is not set
+# CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1 is not set
+# CONFIG_DL2K is not set
+# CONFIG_DLHL60D is not set
+# CONFIG_DLM is not set
+# CONFIG_DM9000 is not set
+# CONFIG_DMABUF_DEBUG is not set
+# CONFIG_DMABUF_HEAPS is not set
+# CONFIG_DMABUF_MOVE_NOTIFY is not set
+# CONFIG_DMABUF_SELFTESTS is not set
+# CONFIG_DMABUF_SYSFS_STATS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_DMADEVICES_DEBUG is not set
+# CONFIG_DMARD06 is not set
+# CONFIG_DMARD09 is not set
+# CONFIG_DMARD10 is not set
+# CONFIG_DMASCC is not set
+# CONFIG_DMATEST is not set
+# CONFIG_DMA_API_DEBUG is not set
+CONFIG_DMA_COHERENT_POOL=y
+CONFIG_DMA_DECLARE_COHERENT=y
+# CONFIG_DMA_ENGINE is not set
+# CONFIG_DMA_FENCE_TRACE is not set
+# CONFIG_DMA_JZ4780 is not set
+# CONFIG_DMA_MAP_BENCHMARK is not set
+CONFIG_DMA_NONCOHERENT_MMAP=y
+# CONFIG_DMA_NOOP_OPS is not set
+# CONFIG_DMA_PERNUMA_CMA is not set
+# CONFIG_DMA_RESTRICTED_POOL is not set
+# CONFIG_DMA_SHARED_BUFFER is not set
+# CONFIG_DMA_VIRT_OPS is not set
+# CONFIG_DM_CACHE is not set
+# CONFIG_DM_CLONE is not set
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_DUST is not set
+# CONFIG_DM_EBS is not set
+# CONFIG_DM_ERA is not set
+# CONFIG_DM_FLAKEY is not set
+# CONFIG_DM_INTEGRITY is not set
+# CONFIG_DM_LOG_USERSPACE is not set
+# CONFIG_DM_LOG_WRITES is not set
+# CONFIG_DM_MQ_DEFAULT is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_RAID is not set
+# CONFIG_DM_SWITCH is not set
+# CONFIG_DM_THIN_PROVISIONING is not set
+# CONFIG_DM_UEVENT is not set
+# CONFIG_DM_UNSTRIPED is not set
+# CONFIG_DM_VERITY is not set
+# CONFIG_DM_WRITECACHE is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DNET is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_DNS_RESOLVER is not set
+CONFIG_DOUBLEFAULT=y
+# CONFIG_DP83640_PHY is not set
+# CONFIG_DP83822_PHY is not set
+# CONFIG_DP83848_PHY is not set
+# CONFIG_DP83867_PHY is not set
+# CONFIG_DP83869_PHY is not set
+# CONFIG_DP83TC811_PHY is not set
+# CONFIG_DPOT_DAC is not set
+# CONFIG_DPS310 is not set
+CONFIG_DQL=y
+# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_DRM is not set
+# CONFIG_DRM_AMDGPU is not set
+# CONFIG_DRM_AMDGPU_CIK is not set
+# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set
+# CONFIG_DRM_AMDGPU_SI is not set
+# CONFIG_DRM_AMDGPU_USERPTR is not set
+# CONFIG_DRM_AMD_ACP is not set
+# CONFIG_DRM_AMD_DC_DCN2_0 is not set
+# CONFIG_DRM_AMD_DC_DCN3_0 is not set
+# CONFIG_DRM_AMD_DC_HDCP is not set
+# CONFIG_DRM_AMD_DC_SI is not set
+# CONFIG_DRM_AMD_SECURE_DISPLAY is not set
+# CONFIG_DRM_ANALOGIX_ANX6345 is not set
+# CONFIG_DRM_ANALOGIX_ANX7625 is not set
+# CONFIG_DRM_ANALOGIX_ANX78XX is not set
+# CONFIG_DRM_ARCPGU is not set
+# CONFIG_DRM_ARMADA is not set
+# CONFIG_DRM_AST is not set
+# CONFIG_DRM_BOCHS is not set
+# CONFIG_DRM_CDNS_DSI is not set
+# CONFIG_DRM_CDNS_MHDP8546 is not set
+# CONFIG_DRM_CHIPONE_ICN6211 is not set
+# CONFIG_DRM_CHRONTEL_CH7033 is not set
+# CONFIG_DRM_CIRRUS_QEMU is not set
+# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set
+# CONFIG_DRM_DEBUG_MM is not set
+# CONFIG_DRM_DEBUG_SELFTEST is not set
+# CONFIG_DRM_DISPLAY_CONNECTOR is not set
+# CONFIG_DRM_DP_AUX_CHARDEV is not set
+# CONFIG_DRM_DP_CEC is not set
+# CONFIG_DRM_DUMB_VGA_DAC is not set
+# CONFIG_DRM_DW_HDMI_CEC is not set
+# CONFIG_DRM_ETNAVIV is not set
+# CONFIG_DRM_EXYNOS is not set
+# CONFIG_DRM_FBDEV_EMULATION is not set
+# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
+# CONFIG_DRM_FSL_DCU is not set
+# CONFIG_DRM_GM12U320 is not set
+# CONFIG_DRM_GMA500 is not set
+# CONFIG_DRM_GUD is not set
+# CONFIG_DRM_HDLCD is not set
+# CONFIG_DRM_HISI_HIBMC is not set
+# CONFIG_DRM_HISI_KIRIN is not set
+# CONFIG_DRM_I2C_ADV7511 is not set
+# CONFIG_DRM_I2C_CH7006 is not set
+# CONFIG_DRM_I2C_NXP_TDA9950 is not set
+# CONFIG_DRM_I2C_NXP_TDA998X is not set
+# CONFIG_DRM_I2C_SIL164 is not set
+# CONFIG_DRM_I915 is not set
+# CONFIG_DRM_ITE_IT66121 is not set
+# CONFIG_DRM_KOMEDA is not set
+# CONFIG_DRM_LEGACY is not set
+# CONFIG_DRM_LIB_RANDOM is not set
+# CONFIG_DRM_LIMA is not set
+# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
+# CONFIG_DRM_LONTIUM_LT8912B is not set
+# CONFIG_DRM_LONTIUM_LT9611 is not set
+# CONFIG_DRM_LONTIUM_LT9611UXC is not set
+# CONFIG_DRM_LVDS_CODEC is not set
+# CONFIG_DRM_LVDS_ENCODER is not set
+# CONFIG_DRM_MALI_DISPLAY is not set
+# CONFIG_DRM_MCDE is not set
+# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
+# CONFIG_DRM_MGAG200 is not set
+# CONFIG_DRM_MXSFB is not set
+# CONFIG_DRM_NOUVEAU is not set
+# CONFIG_DRM_NWL_MIPI_DSI is not set
+# CONFIG_DRM_NXP_PTN3460 is not set
+# CONFIG_DRM_OMAP is not set
+# CONFIG_DRM_PANEL_ABT_Y030XX067A is not set
+# CONFIG_DRM_PANEL_ARM_VERSATILE is not set
+# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set
+# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set
+# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set
+# CONFIG_DRM_PANEL_DSI_CM is not set
+# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set
+# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set
+# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set
+# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
+# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set
+# CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set
+# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
+# CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set
+# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
+# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
+# CONFIG_DRM_PANEL_KHADAS_TS050 is not set
+# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set
+# CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set
+# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set
+# CONFIG_DRM_PANEL_LG_LB035Q02 is not set
+# CONFIG_DRM_PANEL_LG_LG4573 is not set
+# CONFIG_DRM_PANEL_LVDS is not set
+# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set
+# CONFIG_DRM_PANEL_MIPI_DBI is not set
+# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set
+# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set
+# CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set
+# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set
+# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
+# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set
+# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
+# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
+# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
+# CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set
+# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
+# CONFIG_DRM_PANEL_ROCKTECH_JH057N00900 is not set
+# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set
+# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
+# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
+# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set
+# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
+# CONFIG_DRM_PANEL_SIMPLE is not set
+# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set
+# CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set
+# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
+# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set
+# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set
+# CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set
+# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set
+# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set
+# CONFIG_DRM_PANEL_TPO_TPG110 is not set
+# CONFIG_DRM_PANEL_TPO_Y17P is not set
+# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
+# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set
+# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set
+# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set
+# CONFIG_DRM_PANFROST is not set
+# CONFIG_DRM_PARADE_PS8622 is not set
+# CONFIG_DRM_PARADE_PS8640 is not set
+# CONFIG_DRM_PL111 is not set
+# CONFIG_DRM_QXL is not set
+# CONFIG_DRM_RADEON is not set
+# CONFIG_DRM_RADEON_USERPTR is not set
+# CONFIG_DRM_RCAR_DW_HDMI is not set
+# CONFIG_DRM_RCAR_LVDS is not set
+# CONFIG_DRM_SII902X is not set
+# CONFIG_DRM_SII9234 is not set
+# CONFIG_DRM_SIL_SII8620 is not set
+# CONFIG_DRM_SIMPLEDRM is not set
+# CONFIG_DRM_SIMPLE_BRIDGE is not set
+# CONFIG_DRM_STI is not set
+# CONFIG_DRM_STM is not set
+# CONFIG_DRM_SUN4I is not set
+# CONFIG_DRM_THINE_THC63LVD1024 is not set
+# CONFIG_DRM_TIDSS is not set
+# CONFIG_DRM_TILCDC is not set
+# CONFIG_DRM_TINYDRM is not set
+# CONFIG_DRM_TI_SN65DSI83 is not set
+# CONFIG_DRM_TI_SN65DSI86 is not set
+# CONFIG_DRM_TI_TFP410 is not set
+# CONFIG_DRM_TI_TPD12S015 is not set
+# CONFIG_DRM_TOSHIBA_TC358762 is not set
+# CONFIG_DRM_TOSHIBA_TC358764 is not set
+# CONFIG_DRM_TOSHIBA_TC358767 is not set
+# CONFIG_DRM_TOSHIBA_TC358768 is not set
+# CONFIG_DRM_TOSHIBA_TC358775 is not set
+# CONFIG_DRM_TVE200 is not set
+# CONFIG_DRM_UDL is not set
+# CONFIG_DRM_VBOXVIDEO is not set
+# CONFIG_DRM_VC4_HDMI_CEC is not set
+# CONFIG_DRM_VGEM is not set
+# CONFIG_DRM_VIRTIO_GPU is not set
+# CONFIG_DRM_VKMS is not set
+# CONFIG_DRM_VMWGFX is not set
+# CONFIG_DRM_XEN is not set
+# CONFIG_DS1682 is not set
+# CONFIG_DS1803 is not set
+# CONFIG_DS4424 is not set
+# CONFIG_DST_CACHE is not set
+# CONFIG_DTLK is not set
+# CONFIG_DUMMY is not set
+CONFIG_DUMMY_CONSOLE_COLUMNS=80
+CONFIG_DUMMY_CONSOLE_ROWS=25
+# CONFIG_DUMMY_IRQ is not set
+# CONFIG_DVB_A8293 is not set
+# CONFIG_DVB_AF9013 is not set
+# CONFIG_DVB_AF9033 is not set
+# CONFIG_DVB_AS102 is not set
+# CONFIG_DVB_ASCOT2E is not set
+# CONFIG_DVB_ATBM8830 is not set
+# CONFIG_DVB_AU8522_DTV is not set
+# CONFIG_DVB_AU8522_V4L is not set
+# CONFIG_DVB_B2C2_FLEXCOP_USB is not set
+# CONFIG_DVB_BCM3510 is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DVB_CX22700 is not set
+# CONFIG_DVB_CX22702 is not set
+# CONFIG_DVB_CX24110 is not set
+# CONFIG_DVB_CX24116 is not set
+# CONFIG_DVB_CX24117 is not set
+# CONFIG_DVB_CX24120 is not set
+# CONFIG_DVB_CX24123 is not set
+# CONFIG_DVB_CXD2099 is not set
+# CONFIG_DVB_CXD2820R is not set
+# CONFIG_DVB_CXD2841ER is not set
+# CONFIG_DVB_CXD2880 is not set
+# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set
+# CONFIG_DVB_DIB3000MB is not set
+# CONFIG_DVB_DIB3000MC is not set
+# CONFIG_DVB_DIB7000M is not set
+# CONFIG_DVB_DIB7000P is not set
+# CONFIG_DVB_DIB8000 is not set
+# CONFIG_DVB_DIB9000 is not set
+# CONFIG_DVB_DRX39XYJ is not set
+# CONFIG_DVB_DRXD is not set
+# CONFIG_DVB_DRXK is not set
+# CONFIG_DVB_DS3000 is not set
+# CONFIG_DVB_DUMMY_FE is not set
+# CONFIG_DVB_DYNAMIC_MINORS is not set
+# CONFIG_DVB_EC100 is not set
+# CONFIG_DVB_FIREDTV is not set
+# CONFIG_DVB_HELENE is not set
+# CONFIG_DVB_HORUS3A is not set
+# CONFIG_DVB_ISL6405 is not set
+# CONFIG_DVB_ISL6421 is not set
+# CONFIG_DVB_ISL6423 is not set
+# CONFIG_DVB_IX2505V is not set
+# CONFIG_DVB_L64781 is not set
+# CONFIG_DVB_LG2160 is not set
+# CONFIG_DVB_LGDT3305 is not set
+# CONFIG_DVB_LGDT3306A is not set
+# CONFIG_DVB_LGDT330X is not set
+# CONFIG_DVB_LGS8GL5 is not set
+# CONFIG_DVB_LGS8GXX is not set
+# CONFIG_DVB_LNBH25 is not set
+# CONFIG_DVB_LNBH29 is not set
+# CONFIG_DVB_LNBP21 is not set
+# CONFIG_DVB_LNBP22 is not set
+# CONFIG_DVB_M88DS3103 is not set
+# CONFIG_DVB_M88RS2000 is not set
+CONFIG_DVB_MAX_ADAPTERS=16
+# CONFIG_DVB_MB86A16 is not set
+# CONFIG_DVB_MB86A20S is not set
+# CONFIG_DVB_MMAP is not set
+# CONFIG_DVB_MN88443X is not set
+# CONFIG_DVB_MN88472 is not set
+# CONFIG_DVB_MN88473 is not set
+# CONFIG_DVB_MT312 is not set
+# CONFIG_DVB_MT352 is not set
+# CONFIG_DVB_MXL5XX is not set
+# CONFIG_DVB_MXL692 is not set
+# CONFIG_DVB_NET is not set
+# CONFIG_DVB_NXT200X is not set
+# CONFIG_DVB_NXT6000 is not set
+# CONFIG_DVB_OR51132 is not set
+# CONFIG_DVB_OR51211 is not set
+# CONFIG_DVB_PLATFORM_DRIVERS is not set
+# CONFIG_DVB_PLL is not set
+# CONFIG_DVB_RTL2830 is not set
+# CONFIG_DVB_RTL2832 is not set
+# CONFIG_DVB_RTL2832_SDR is not set
+# CONFIG_DVB_S5H1409 is not set
+# CONFIG_DVB_S5H1411 is not set
+# CONFIG_DVB_S5H1420 is not set
+# CONFIG_DVB_S5H1432 is not set
+# CONFIG_DVB_S921 is not set
+# CONFIG_DVB_SI2165 is not set
+# CONFIG_DVB_SI2168 is not set
+# CONFIG_DVB_SI21XX is not set
+# CONFIG_DVB_SP2 is not set
+# CONFIG_DVB_SP8870 is not set
+# CONFIG_DVB_SP887X is not set
+# CONFIG_DVB_STB0899 is not set
+# CONFIG_DVB_STB6000 is not set
+# CONFIG_DVB_STB6100 is not set
+# CONFIG_DVB_STV0288 is not set
+# CONFIG_DVB_STV0297 is not set
+# CONFIG_DVB_STV0299 is not set
+# CONFIG_DVB_STV0367 is not set
+# CONFIG_DVB_STV0900 is not set
+# CONFIG_DVB_STV090x is not set
+# CONFIG_DVB_STV0910 is not set
+# CONFIG_DVB_STV6110 is not set
+# CONFIG_DVB_STV6110x is not set
+# CONFIG_DVB_STV6111 is not set
+# CONFIG_DVB_TC90522 is not set
+# CONFIG_DVB_TDA10021 is not set
+# CONFIG_DVB_TDA10023 is not set
+# CONFIG_DVB_TDA10048 is not set
+# CONFIG_DVB_TDA1004X is not set
+# CONFIG_DVB_TDA10071 is not set
+# CONFIG_DVB_TDA10086 is not set
+# CONFIG_DVB_TDA18271C2DD is not set
+# CONFIG_DVB_TDA665x is not set
+# CONFIG_DVB_TDA8083 is not set
+# CONFIG_DVB_TDA8261 is not set
+# CONFIG_DVB_TDA826X is not set
+# CONFIG_DVB_TEST_DRIVERS is not set
+# CONFIG_DVB_TS2020 is not set
+# CONFIG_DVB_TTUSB_BUDGET is not set
+# CONFIG_DVB_TTUSB_DEC is not set
+# CONFIG_DVB_TUA6100 is not set
+# CONFIG_DVB_TUNER_CX24113 is not set
+# CONFIG_DVB_TUNER_DIB0070 is not set
+# CONFIG_DVB_TUNER_DIB0090 is not set
+# CONFIG_DVB_TUNER_ITD1000 is not set
+# CONFIG_DVB_ULE_DEBUG is not set
+# CONFIG_DVB_USB_V2 is not set
+# CONFIG_DVB_VES1820 is not set
+# CONFIG_DVB_VES1X93 is not set
+# CONFIG_DVB_ZD1301_DEMOD is not set
+# CONFIG_DVB_ZL10036 is not set
+# CONFIG_DVB_ZL10039 is not set
+# CONFIG_DVB_ZL10353 is not set
+# CONFIG_DWC_XLGMAC is not set
+# CONFIG_DWMAC_DWC_QOS_ETH is not set
+# CONFIG_DWMAC_INTEL_PLAT is not set
+# CONFIG_DWMAC_IPQ806X is not set
+# CONFIG_DWMAC_LOONGSON is not set
+# CONFIG_DWMAC_LPC18XX is not set
+# CONFIG_DWMAC_MESON is not set
+# CONFIG_DWMAC_ROCKCHIP is not set
+# CONFIG_DWMAC_SOCFPGA is not set
+# CONFIG_DWMAC_STI is not set
+# CONFIG_DW_AXI_DMAC is not set
+# CONFIG_DW_DMAC is not set
+# CONFIG_DW_DMAC_PCI is not set
+# CONFIG_DW_EDMA is not set
+# CONFIG_DW_EDMA_PCIE is not set
+# CONFIG_DW_WATCHDOG is not set
+# CONFIG_DW_XDATA_PCIE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+CONFIG_DYNAMIC_DEBUG_CORE=y
+# CONFIG_E100 is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_HWTS is not set
+# CONFIG_EARLY_PRINTK_8250 is not set
+# CONFIG_EARLY_PRINTK_USB_XDBC is not set
+# CONFIG_EBC_C384_WDT is not set
+# CONFIG_ECHO is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_EDAC is not set
+# CONFIG_EEEPC_LAPTOP is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_EEPROM_93XX46 is not set
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_DIGSY_MTC_CFG is not set
+# CONFIG_EEPROM_EE1004 is not set
+# CONFIG_EEPROM_IDT_89HPESX is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EFI is not set
+CONFIG_EFI_PARTITION=y
+# CONFIG_EFI_VARS_PSTORE is not set
+# CONFIG_EFS_FS is not set
+CONFIG_ELFCORE=y
+# CONFIG_ELF_CORE is not set
+# CONFIG_EMAC_ROCKCHIP is not set
+CONFIG_EMBEDDED=y
+# CONFIG_EM_TIMER_STI is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENA_ETHERNET is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ENCRYPTED_KEYS is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_ENERGY_MODEL is not set
+# CONFIG_ENIC is not set
+# CONFIG_ENVELOPE_DETECTOR is not set
+# CONFIG_EPAPR_PARAVIRT is not set
+# CONFIG_EPIC100 is not set
+CONFIG_EPOLL=y
+# CONFIG_EQUALIZER is not set
+# CONFIG_EROFS_FS is not set
+# CONFIG_ET131X is not set
+CONFIG_ETHERNET=y
+# CONFIG_ETHOC is not set
+CONFIG_ETHTOOL_NETLINK=y
+CONFIG_EVENTFD=y
+# CONFIG_EVM is not set
+# CONFIG_EXFAT_FS is not set
+CONFIG_EXPERT=y
+CONFIG_EXPORTFS=y
+# CONFIG_EXPORTFS_BLOCK_OPS is not set
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_DEBUG is not set
+# CONFIG_EXT4_ENCRYPTION is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_EXT4_FS_POSIX_ACL is not set
+# CONFIG_EXT4_FS_SECURITY is not set
+CONFIG_EXT4_USE_FOR_EXT2=y
+# CONFIG_EXTCON is not set
+# CONFIG_EXTCON_ADC_JACK is not set
+# CONFIG_EXTCON_ARIZONA is not set
+# CONFIG_EXTCON_AXP288 is not set
+# CONFIG_EXTCON_FSA9480 is not set
+# CONFIG_EXTCON_GPIO is not set
+# CONFIG_EXTCON_INTEL_INT3496 is not set
+# CONFIG_EXTCON_MAX3355 is not set
+# CONFIG_EXTCON_PTN5150 is not set
+# CONFIG_EXTCON_QCOM_SPMI_MISC is not set
+# CONFIG_EXTCON_RT8973A is not set
+# CONFIG_EXTCON_SM5502 is not set
+# CONFIG_EXTCON_USBC_TUSB320 is not set
+# CONFIG_EXTCON_USB_GPIO is not set
+CONFIG_EXTRA_FIRMWARE=""
+CONFIG_EXTRA_TARGETS=""
+# CONFIG_EXYNOS_ADC is not set
+# CONFIG_EXYNOS_VIDEO is not set
+# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_F2FS_CHECK_FS is not set
+# CONFIG_F2FS_FAULT_INJECTION is not set
+# CONFIG_F2FS_FS is not set
+# CONFIG_F2FS_FS_COMPRESSION is not set
+# CONFIG_F2FS_FS_ENCRYPTION is not set
+# CONFIG_F2FS_FS_POSIX_ACL is not set
+# CONFIG_F2FS_FS_SECURITY is not set
+CONFIG_F2FS_FS_XATTR=y
+# CONFIG_F2FS_IOSTAT is not set
+# CONFIG_F2FS_IO_TRACE is not set
+CONFIG_F2FS_STAT_FS=y
+# CONFIG_FAILOVER is not set
+# CONFIG_FAIR_GROUP_SCHED is not set
+# CONFIG_FANOTIFY is not set
+# CONFIG_FANOTIFY_ACCESS_PERMISSIONS is not set
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_FAT_DEFAULT_UTF8 is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_FB is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_ARC is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_ARMCLCD is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_AUO_K190X is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_BIG_ENDIAN is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+# CONFIG_FB_BOTH_ENDIAN is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_FILLRECT is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_DA8XX is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_FLEX is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_FSL_DIU is not set
+# CONFIG_FB_GEODE is not set
+# CONFIG_FB_GOLDFISH is not set
+# CONFIG_FB_HGA is not set
+# CONFIG_FB_I740 is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_IMX is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_LE80578 is not set
+# CONFIG_FB_LITTLE_ENDIAN is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_MXS is not set
+# CONFIG_FB_N411 is not set
+# CONFIG_FB_NEOMAGIC is not set
+CONFIG_FB_NOTIFY=y
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_OF is not set
+# CONFIG_FB_OMAP2 is not set
+# CONFIG_FB_OPENCORES is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_PS3 is not set
+# CONFIG_FB_PXA is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIMPLE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_SM712 is not set
+# CONFIG_FB_SM750 is not set
+# CONFIG_FB_SMSCUFX is not set
+# CONFIG_FB_SSD1307 is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_TFT is not set
+# CONFIG_FB_TFT_AGM1264K_FL is not set
+# CONFIG_FB_TFT_BD663474 is not set
+# CONFIG_FB_TFT_FBTFT_DEVICE is not set
+# CONFIG_FB_TFT_HX8340BN is not set
+# CONFIG_FB_TFT_HX8347D is not set
+# CONFIG_FB_TFT_HX8353D is not set
+# CONFIG_FB_TFT_HX8357D is not set
+# CONFIG_FB_TFT_ILI9163 is not set
+# CONFIG_FB_TFT_ILI9320 is not set
+# CONFIG_FB_TFT_ILI9325 is not set
+# CONFIG_FB_TFT_ILI9340 is not set
+# CONFIG_FB_TFT_ILI9341 is not set
+# CONFIG_FB_TFT_ILI9481 is not set
+# CONFIG_FB_TFT_ILI9486 is not set
+# CONFIG_FB_TFT_PCD8544 is not set
+# CONFIG_FB_TFT_RA8875 is not set
+# CONFIG_FB_TFT_S6D02A1 is not set
+# CONFIG_FB_TFT_S6D1121 is not set
+# CONFIG_FB_TFT_SEPS525 is not set
+# CONFIG_FB_TFT_SH1106 is not set
+# CONFIG_FB_TFT_SSD1289 is not set
+# CONFIG_FB_TFT_SSD1305 is not set
+# CONFIG_FB_TFT_SSD1306 is not set
+# CONFIG_FB_TFT_SSD1325 is not set
+# CONFIG_FB_TFT_SSD1331 is not set
+# CONFIG_FB_TFT_SSD1351 is not set
+# CONFIG_FB_TFT_ST7735R is not set
+# CONFIG_FB_TFT_ST7789V is not set
+# CONFIG_FB_TFT_TINYLCD is not set
+# CONFIG_FB_TFT_TLS8204 is not set
+# CONFIG_FB_TFT_UC1611 is not set
+# CONFIG_FB_TFT_UC1701 is not set
+# CONFIG_FB_TFT_UPD161704 is not set
+# CONFIG_FB_TFT_WATTEROTT is not set
+# CONFIG_FB_TILEBLITTING is not set
+# CONFIG_FB_TMIO is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_XGI is not set
+# CONFIG_FCOE is not set
+# CONFIG_FCOE_FNIC is not set
+# CONFIG_FDDI is not set
+# CONFIG_FEALNX is not set
+# CONFIG_FENCE_TRACE is not set
+# CONFIG_FHANDLE is not set
+CONFIG_FIB_RULES=y
+# CONFIG_FIELDBUS_DEV is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_FIND_BIT_BENCHMARK is not set
+# CONFIG_FIREWIRE is not set
+# CONFIG_FIREWIRE_NOSY is not set
+# CONFIG_FIREWIRE_SERIAL is not set
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+# CONFIG_FIRMWARE_MEMMAP is not set
+# CONFIG_FIT_PARTITION is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_FLATMEM=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_FM10K is not set
+# CONFIG_FMC is not set
+# CONFIG_FONTS is not set
+# CONFIG_FONT_6x8 is not set
+# CONFIG_FONT_TER16x32 is not set
+# CONFIG_FORCEDETH is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_FORTIFY_SOURCE=y
+# CONFIG_FPGA is not set
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set
+# CONFIG_FRAME_POINTER is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_FREEZER is not set
+# CONFIG_FRONTSWAP is not set
+# CONFIG_FSCACHE is not set
+# CONFIG_FSI is not set
+# CONFIG_FSL_EDMA is not set
+# CONFIG_FSL_ENETC is not set
+# CONFIG_FSL_ENETC_IERB is not set
+# CONFIG_FSL_ENETC_MDIO is not set
+# CONFIG_FSL_ENETC_VF is not set
+# CONFIG_FSL_ERRATUM_A008585 is not set
+# CONFIG_FSL_MC_BUS is not set
+# CONFIG_FSL_PQ_MDIO is not set
+# CONFIG_FSL_QDMA is not set
+# CONFIG_FSL_RCPM is not set
+# CONFIG_FSL_XGMAC_MDIO is not set
+CONFIG_FSNOTIFY=y
+# CONFIG_FS_DAX is not set
+# CONFIG_FS_ENCRYPTION is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_FS_VERITY is not set
+# CONFIG_FTGMAC100 is not set
+# CONFIG_FTL is not set
+# CONFIG_FTMAC100 is not set
+# CONFIG_FTRACE is not set
+# CONFIG_FTRACE_RECORD_RECURSION is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_FTR_FIXUP_SELFTEST is not set
+# CONFIG_FTWDT010_WATCHDOG is not set
+# CONFIG_FUJITSU_ERRATUM_010001 is not set
+# CONFIG_FUJITSU_ES is not set
+# CONFIG_FUJITSU_LAPTOP is not set
+# CONFIG_FUJITSU_TABLET is not set
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_FUSE_FS is not set
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_FC is not set
+# CONFIG_FUSION_SAS is not set
+# CONFIG_FUSION_SPI is not set
+CONFIG_FUTEX=y
+CONFIG_FUTEX_PI=y
+# CONFIG_FW_CFG_SYSFS is not set
+CONFIG_FW_LOADER=y
+# CONFIG_FW_LOADER_COMPRESS is not set
+CONFIG_FW_LOADER_USER_HELPER=y
+CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
+# CONFIG_FXAS21002C is not set
+# CONFIG_FXLS8962AF_I2C is not set
+# CONFIG_FXLS8962AF_SPI is not set
+# CONFIG_FXOS8700_I2C is not set
+# CONFIG_FXOS8700_SPI is not set
+CONFIG_GACT_PROB=y
+# CONFIG_GADGET_UAC1 is not set
+# CONFIG_GAMEPORT is not set
+# CONFIG_GATEWORKS_GW16083 is not set
+# CONFIG_GCC_PLUGINS is not set
+# CONFIG_GCOV is not set
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_GDB_SCRIPTS is not set
+# CONFIG_GEMINI_ETHERNET is not set
+# CONFIG_GENERIC_ADC_BATTERY is not set
+# CONFIG_GENERIC_ADC_THERMAL is not set
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+# CONFIG_GENERIC_CPU_DEVICES is not set
+CONFIG_GENERIC_HWEIGHT=y
+# CONFIG_GENERIC_IRQ_DEBUGFS is not set
+CONFIG_GENERIC_IRQ_IPI=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_NET_UTILS=y
+# CONFIG_GENERIC_PHY is not set
+CONFIG_GENERIC_PTDUMP=y
+CONFIG_GENERIC_VDSO_TIME_NS=y
+# CONFIG_GENEVE is not set
+# CONFIG_GENWQE is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_GIGASET_CAPI is not set
+# CONFIG_GIGASET_DEBUG is not set
+# CONFIG_GIGASET_DUMMYLL is not set
+# CONFIG_GLOB_SELFTEST is not set
+# CONFIG_GNSS is not set
+# CONFIG_GOLDFISH is not set
+# CONFIG_GOOGLE_FIRMWARE is not set
+# CONFIG_GOOGLE_FRAMEBUFFER_COREBOOT is not set
+# CONFIG_GOOGLE_MEMCONSOLE_X86_LEGACY is not set
+# CONFIG_GOOGLE_SMI is not set
+# CONFIG_GP2AP002 is not set
+# CONFIG_GP2AP020A00F is not set
+# CONFIG_GPD_POCKET_FAN is not set
+CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_FASTPATH_LIMIT=512
+# CONFIG_GPIO_104_DIO_48E is not set
+# CONFIG_GPIO_104_IDIO_16 is not set
+# CONFIG_GPIO_104_IDI_48 is not set
+# CONFIG_GPIO_74X164 is not set
+# CONFIG_GPIO_74XX_MMIO is not set
+# CONFIG_GPIO_ADNP is not set
+# CONFIG_GPIO_ADP5588 is not set
+# CONFIG_GPIO_AGGREGATOR is not set
+# CONFIG_GPIO_ALTERA is not set
+# CONFIG_GPIO_AMD8111 is not set
+# CONFIG_GPIO_AMDPT is not set
+# CONFIG_GPIO_AMD_FCH is not set
+# CONFIG_GPIO_BCM_KONA is not set
+# CONFIG_GPIO_BT8XX is not set
+# CONFIG_GPIO_CADENCE is not set
+# CONFIG_GPIO_CASCADE is not set
+# CONFIG_GPIO_CDEV is not set
+# CONFIG_GPIO_CDEV_V1 is not set
+# CONFIG_GPIO_CS5535 is not set
+# CONFIG_GPIO_DWAPB is not set
+# CONFIG_GPIO_EM is not set
+# CONFIG_GPIO_EXAR is not set
+# CONFIG_GPIO_F7188X is not set
+# CONFIG_GPIO_FTGPIO010 is not set
+# CONFIG_GPIO_GENERIC_PLATFORM is not set
+# CONFIG_GPIO_GPIO_MM is not set
+# CONFIG_GPIO_GRGPIO is not set
+# CONFIG_GPIO_GW_PLD is not set
+# CONFIG_GPIO_HLWD is not set
+# CONFIG_GPIO_ICH is not set
+# CONFIG_GPIO_IT87 is not set
+# CONFIG_GPIO_LOGICVC is not set
+# CONFIG_GPIO_LYNXPOINT is not set
+# CONFIG_GPIO_MAX3191X is not set
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_MB86S7X is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_ML_IOH is not set
+# CONFIG_GPIO_MOCKUP is not set
+# CONFIG_GPIO_MPC8XXX is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCA953X_IRQ is not set
+# CONFIG_GPIO_PCA9570 is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_PCH is not set
+# CONFIG_GPIO_PCIE_IDIO_24 is not set
+# CONFIG_GPIO_PCI_IDIO_16 is not set
+# CONFIG_GPIO_PISOSR is not set
+# CONFIG_GPIO_PL061 is not set
+# CONFIG_GPIO_PWM is not set
+# CONFIG_GPIO_RCAR is not set
+# CONFIG_GPIO_RDC321X is not set
+# CONFIG_GPIO_SAMA5D2_PIOBU is not set
+# CONFIG_GPIO_SCH is not set
+# CONFIG_GPIO_SCH311X is not set
+# CONFIG_GPIO_SIFIVE is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_SYSCON is not set
+CONFIG_GPIO_SYSFS=y
+# CONFIG_GPIO_TPIC2810 is not set
+# CONFIG_GPIO_TS4900 is not set
+# CONFIG_GPIO_TS5500 is not set
+# CONFIG_GPIO_VIRTIO is not set
+# CONFIG_GPIO_VX855 is not set
+# CONFIG_GPIO_WATCHDOG is not set
+# CONFIG_GPIO_WINBOND is not set
+# CONFIG_GPIO_WS16C48 is not set
+# CONFIG_GPIO_XGENE is not set
+# CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_XRA1403 is not set
+# CONFIG_GPIO_ZEVIO is not set
+# CONFIG_GPIO_ZX is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_GREYBUS is not set
+# CONFIG_GS_FPGABOOT is not set
+# CONFIG_GTP is not set
+# CONFIG_GUP_BENCHMARK is not set
+# CONFIG_GUP_TEST is not set
+# CONFIG_GVE is not set
+# CONFIG_HABANA_AI is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_HAPPYMEAL is not set
+CONFIG_HARDENED_USERCOPY=y
+# CONFIG_HARDENED_USERCOPY_FALLBACK is not set
+# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set
+CONFIG_HARDEN_BRANCH_HISTORY=y
+CONFIG_HARDEN_EL2_VECTORS=y
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_HAVE_ARM_ARCH_TIMER is not set
+# CONFIG_HCALL_STATS is not set
+# CONFIG_HDC100X is not set
+# CONFIG_HDC2010 is not set
+# CONFIG_HDLC is not set
+# CONFIG_HDLC_CISCO is not set
+# CONFIG_HDLC_FR is not set
+# CONFIG_HDLC_PPP is not set
+# CONFIG_HDLC_RAW is not set
+# CONFIG_HDLC_RAW_ETH is not set
+# CONFIG_HDMI_LPE_AUDIO is not set
+# CONFIG_HDQ_MASTER_OMAP is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_HEADERS_INSTALL is not set
+# CONFIG_HEADER_TEST is not set
+# CONFIG_HERMES is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_HFSPLUS_FS_POSIX_ACL is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFS_FS_POSIX_ACL is not set
+# CONFIG_HI6421V600_IRQ is not set
+# CONFIG_HI8435 is not set
+# CONFIG_HIBERNATION is not set
+# CONFIG_HID is not set
+# CONFIG_HIDRAW is not set
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACCUTOUCH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_ACRUX_FF is not set
+# CONFIG_HID_ALPS is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_APPLEIR is not set
+# CONFIG_HID_ASUS is not set
+# CONFIG_HID_AUREAL is not set
+# CONFIG_HID_BATTERY_STRENGTH is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_BETOP_FF is not set
+# CONFIG_HID_BIGBEN_FF is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CMEDIA is not set
+# CONFIG_HID_CORSAIR is not set
+# CONFIG_HID_COUGAR is not set
+# CONFIG_HID_CP2112 is not set
+# CONFIG_HID_CREATIVE_SB0540 is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_ELAN is not set
+# CONFIG_HID_ELECOM is not set
+# CONFIG_HID_ELO is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_FT260 is not set
+# CONFIG_HID_GEMBIRD is not set
+# CONFIG_HID_GENERIC is not set
+# CONFIG_HID_GFRM is not set
+# CONFIG_HID_GLORIOUS is not set
+# CONFIG_HID_GOOGLE_HAMMER is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_GT683R is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_HOLTEK is not set
+# CONFIG_HID_ICADE is not set
+# CONFIG_HID_ITE is not set
+# CONFIG_HID_JABRA is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LED is not set
+# CONFIG_HID_LENOVO is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_LOGITECH_DJ is not set
+# CONFIG_HID_LOGITECH_HIDPP is not set
+# CONFIG_HID_MACALLY is not set
+# CONFIG_HID_MAGICMOUSE is not set
+# CONFIG_HID_MALTRON is not set
+# CONFIG_HID_MAYFLASH is not set
+# CONFIG_HID_MCP2221 is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTI is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PENMOUNT is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_PID is not set
+# CONFIG_HID_PLANTRONICS is not set
+# CONFIG_HID_PLAYSTATION is not set
+# CONFIG_HID_PRIMAX is not set
+# CONFIG_HID_PRODIKEYS is not set
+# CONFIG_HID_REDRAGON is not set
+# CONFIG_HID_RETRODE is not set
+# CONFIG_HID_RMI is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_SAITEK is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SEMITEK is not set
+# CONFIG_HID_SENSOR_HUB is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SPEEDLINK is not set
+# CONFIG_HID_STEAM is not set
+# CONFIG_HID_STEELSERIES is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_THINGM is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_TIVO is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_U2FZERO is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_UDRAW_PS3 is not set
+# CONFIG_HID_VIEWSONIC is not set
+# CONFIG_HID_VIVALDI is not set
+# CONFIG_HID_WACOM is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_WIIMOTE is not set
+# CONFIG_HID_XINMO is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_HIGH_RES_TIMERS=y
+# CONFIG_HINIC is not set
+# CONFIG_HIP04_ETH is not set
+# CONFIG_HIPPI is not set
+# CONFIG_HISILICON_ERRATUM_161010101 is not set
+# CONFIG_HISILICON_ERRATUM_161600802 is not set
+# CONFIG_HISI_DMA is not set
+# CONFIG_HISI_FEMAC is not set
+# CONFIG_HISI_HIKEY_USB is not set
+# CONFIG_HIX5HD2_GMAC is not set
+# CONFIG_HMC425 is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_HNS is not set
+# CONFIG_HNS3 is not set
+# CONFIG_HNS_DSAF is not set
+# CONFIG_HNS_ENET is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_HOSTAP_CS is not set
+# CONFIG_HOSTAP_PCI is not set
+# CONFIG_HOSTAP_PLX is not set
+# CONFIG_HOTPLUG_CPU is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HP03 is not set
+# CONFIG_HP100 is not set
+# CONFIG_HP206C is not set
+CONFIG_HPET_MMAP_DEFAULT=y
+# CONFIG_HPFS_FS is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_HP_WIRELESS is not set
+# CONFIG_HSA_AMD is not set
+# CONFIG_HSI is not set
+# CONFIG_HSR is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTS221 is not set
+# CONFIG_HTU21 is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_HVC_DCC is not set
+# CONFIG_HVC_UDBG is not set
+# CONFIG_HWLAT_TRACER is not set
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWSPINLOCK is not set
+# CONFIG_HWSPINLOCK_OMAP is not set
+CONFIG_HW_PERF_EVENTS=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HW_RANDOM_AMD is not set
+# CONFIG_HW_RANDOM_ARM_SMCCC_TRNG is not set
+# CONFIG_HW_RANDOM_ATMEL is not set
+# CONFIG_HW_RANDOM_BA431 is not set
+# CONFIG_HW_RANDOM_CAVIUM is not set
+# CONFIG_HW_RANDOM_CCTRNG is not set
+# CONFIG_HW_RANDOM_EXYNOS is not set
+# CONFIG_HW_RANDOM_GEODE is not set
+# CONFIG_HW_RANDOM_INTEL is not set
+# CONFIG_HW_RANDOM_IPROC_RNG200 is not set
+# CONFIG_HW_RANDOM_MTK is not set
+# CONFIG_HW_RANDOM_OMAP is not set
+# CONFIG_HW_RANDOM_OMAP3_ROM is not set
+# CONFIG_HW_RANDOM_PPC4XX is not set
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+CONFIG_HW_RANDOM_TPM=y
+# CONFIG_HW_RANDOM_VIA is not set
+# CONFIG_HW_RANDOM_VIRTIO is not set
+# CONFIG_HW_RANDOM_XIPHERA is not set
+# CONFIG_HX711 is not set
+# CONFIG_HYPERV is not set
+# CONFIG_HYPERV_TSCPAGE is not set
+# CONFIG_HYSDN is not set
+CONFIG_HZ=100
+CONFIG_HZ_100=y
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_200 is not set
+# CONFIG_HZ_24 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_500 is not set
+# CONFIG_HZ_PERIODIC is not set
+# CONFIG_I2C is not set
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCA is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
+# CONFIG_I2C_AU1550 is not set
+# CONFIG_I2C_BCM2835 is not set
+# CONFIG_I2C_BCM_IPROC is not set
+# CONFIG_I2C_CADENCE is not set
+# CONFIG_I2C_CBUS_GPIO is not set
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_COMPAT is not set
+# CONFIG_I2C_CP2615 is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEMUX_PINCTRL is not set
+# CONFIG_I2C_DESIGNWARE_PCI is not set
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
+# CONFIG_I2C_DESIGNWARE_SLAVE is not set
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_EG20T is not set
+# CONFIG_I2C_ELEKTOR is not set
+# CONFIG_I2C_EMEV2 is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set
+# CONFIG_I2C_HELPER_AUTO is not set
+# CONFIG_I2C_HID is not set
+# CONFIG_I2C_HID_OF is not set
+# CONFIG_I2C_HID_OF_GOODIX is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_IBM_IIC is not set
+# CONFIG_I2C_IMG is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_ISMT is not set
+# CONFIG_I2C_JZ4780 is not set
+# CONFIG_I2C_MLXCPLD is not set
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_MT65XX is not set
+# CONFIG_I2C_MUX is not set
+# CONFIG_I2C_MUX_GPIO is not set
+# CONFIG_I2C_MUX_GPMUX is not set
+# CONFIG_I2C_MUX_LTC4306 is not set
+# CONFIG_I2C_MUX_MLXCPLD is not set
+# CONFIG_I2C_MUX_PCA9541 is not set
+# CONFIG_I2C_MUX_PCA954x is not set
+# CONFIG_I2C_MUX_PINCTRL is not set
+# CONFIG_I2C_MUX_REG is not set
+# CONFIG_I2C_MV64XXX is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_NOMADIK is not set
+# CONFIG_I2C_NVIDIA_GPU is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_OCTEON is not set
+# CONFIG_I2C_PARPORT is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PCA_ISA is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_RCAR is not set
+# CONFIG_I2C_RK3X is not set
+# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
+# CONFIG_I2C_S3C2410 is not set
+# CONFIG_I2C_SCMI is not set
+# CONFIG_I2C_SH_MOBILE is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_SLAVE is not set
+# CONFIG_I2C_SLAVE_EEPROM is not set
+# CONFIG_I2C_SMBUS is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_THUNDERX is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VERSATILE is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VIRTIO is not set
+# CONFIG_I2C_XILINX is not set
+# CONFIG_I3C is not set
+# CONFIG_I40E is not set
+# CONFIG_I40EVF is not set
+# CONFIG_I6300ESB_WDT is not set
+# CONFIG_I82092 is not set
+# CONFIG_I82365 is not set
+# CONFIG_IAQCORE is not set
+# CONFIG_IBM_ASM is not set
+# CONFIG_IBM_EMAC_DEBUG is not set
+# CONFIG_IBM_EMAC_EMAC4 is not set
+# CONFIG_IBM_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_IBM_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_EMAC_RGMII is not set
+# CONFIG_IBM_EMAC_TAH is not set
+# CONFIG_IBM_EMAC_ZMII is not set
+# CONFIG_ICE is not set
+# CONFIG_ICP10100 is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ICST is not set
+# CONFIG_IDE is not set
+# CONFIG_IDEAPAD_LAPTOP is not set
+# CONFIG_IDE_GD is not set
+# CONFIG_IDE_PROC_FS is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+# CONFIG_IDLE_PAGE_TRACKING is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_IEEE802154_ADF7242 is not set
+# CONFIG_IEEE802154_ATUSB is not set
+# CONFIG_IEEE802154_CA8210 is not set
+# CONFIG_IEEE802154_HWSIM is not set
+# CONFIG_IEEE802154_MCR20A is not set
+# CONFIG_IFB is not set
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_IGC is not set
+# CONFIG_IIO is not set
+# CONFIG_IIO_BUFFER is not set
+# CONFIG_IIO_BUFFER_CB is not set
+# CONFIG_IIO_BUFFER_DMA is not set
+# CONFIG_IIO_BUFFER_DMAENGINE is not set
+# CONFIG_IIO_BUFFER_HDC2010 is not set
+# CONFIG_IIO_BUFFER_HW_CONSUMER is not set
+# CONFIG_IIO_CONFIGFS is not set
+CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
+# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set
+# CONFIG_IIO_INTERRUPT_TRIGGER is not set
+# CONFIG_IIO_MUX is not set
+# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set
+# CONFIG_IIO_RESCALE is not set
+# CONFIG_IIO_SIMPLE_DUMMY is not set
+# CONFIG_IIO_SSP_SENSORHUB is not set
+# CONFIG_IIO_ST_ACCEL_3AXIS is not set
+# CONFIG_IIO_ST_GYRO_3AXIS is not set
+# CONFIG_IIO_ST_LSM6DSX is not set
+# CONFIG_IIO_ST_LSM9DS0 is not set
+# CONFIG_IIO_ST_MAGN_3AXIS is not set
+# CONFIG_IIO_ST_PRESS is not set
+# CONFIG_IIO_SW_DEVICE is not set
+# CONFIG_IIO_SW_TRIGGER is not set
+# CONFIG_IIO_SYSFS_TRIGGER is not set
+# CONFIG_IIO_TRIGGER is not set
+# CONFIG_IIO_TRIGGERED_EVENT is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_IKCONFIG_PROC is not set
+# CONFIG_IKHEADERS is not set
+# CONFIG_IMA is not set
+# CONFIG_IMAGE_CMDLINE_HACK is not set
+# CONFIG_IMGPDC_WDT is not set
+# CONFIG_IMG_MDC_DMA is not set
+# CONFIG_IMX7D_ADC is not set
+# CONFIG_IMX_IPUV3_CORE is not set
+# CONFIG_IMX_THERMAL is not set
+# CONFIG_INA2XX_ADC is not set
+# CONFIG_INDIRECT_PIO is not set
+CONFIG_INET=y
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_ESPINTCP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_INET6_XFRM_MODE_BEET is not set
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_ESPINTCP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_TCP_DIAG is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_UDP_DIAG is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_INFTL is not set
+# CONFIG_INGENIC_ADC is not set
+# CONFIG_INGENIC_CGU_JZ4725B is not set
+# CONFIG_INGENIC_CGU_JZ4740 is not set
+# CONFIG_INGENIC_CGU_JZ4760 is not set
+# CONFIG_INGENIC_CGU_JZ4770 is not set
+# CONFIG_INGENIC_CGU_JZ4780 is not set
+# CONFIG_INGENIC_CGU_X1000 is not set
+# CONFIG_INGENIC_CGU_X1830 is not set
+# CONFIG_INGENIC_OST is not set
+# CONFIG_INGENIC_SYSOST is not set
+# CONFIG_INGENIC_TCU_CLK is not set
+# CONFIG_INGENIC_TCU_IRQ is not set
+# CONFIG_INGENIC_TIMER is not set
+CONFIG_INIT_ENV_ARG_LIMIT=32
+# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
+# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
+# CONFIG_INIT_STACK_ALL_PATTERN is not set
+# CONFIG_INIT_STACK_ALL_ZERO is not set
+CONFIG_INIT_STACK_NONE=y
+# CONFIG_INIT_STACK_ALL_PATTERN is not set
+# CONFIG_INIT_STACK_ALL_ZERO is not set
+CONFIG_INOTIFY_USER=y
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_APANEL is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_ATLAS_BTNS is not set
+# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
+# CONFIG_INPUT_AXP20X_PEK is not set
+# CONFIG_INPUT_BMA150 is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_CMA3000 is not set
+# CONFIG_INPUT_DA7280_HAPTICS is not set
+# CONFIG_INPUT_DRV260X_HAPTICS is not set
+# CONFIG_INPUT_DRV2665_HAPTICS is not set
+# CONFIG_INPUT_DRV2667_HAPTICS is not set
+# CONFIG_INPUT_E3X0_BUTTON is not set
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_GP2A is not set
+# CONFIG_INPUT_GPIO_BEEPER is not set
+# CONFIG_INPUT_GPIO_DECODER is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+# CONFIG_INPUT_GPIO_VIBRA is not set
+# CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set
+# CONFIG_INPUT_IMS_PCU is not set
+# CONFIG_INPUT_IQS269A is not set
+# CONFIG_INPUT_IQS626A is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_KXTJ9 is not set
+# CONFIG_INPUT_LEDS is not set
+# CONFIG_INPUT_MATRIXKMAP is not set
+# CONFIG_INPUT_MAX8997_HAPTIC is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_MMA8450 is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_MPU3050 is not set
+# CONFIG_INPUT_MSM_VIBRATOR is not set
+# CONFIG_INPUT_PALMAS_PWRBUTTON is not set
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_PCSPKR is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_PWM_BEEPER is not set
+# CONFIG_INPUT_PWM_VIBRA is not set
+# CONFIG_INPUT_REGULATOR_HAPTIC is not set
+# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_TPS65218_PWRBUTTON is not set
+# CONFIG_INPUT_TWL4030_PWRBUTTON is not set
+# CONFIG_INPUT_TWL4030_VIBRA is not set
+# CONFIG_INPUT_TWL6040_VIBRA is not set
+# CONFIG_INPUT_UINPUT is not set
+# CONFIG_INPUT_WISTRON_BTNS is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INT340X_THERMAL is not set
+# CONFIG_INTEGRITY is not set
+# CONFIG_INTEGRITY_AUDIT is not set
+# CONFIG_INTEGRITY_SIGNATURE is not set
+# CONFIG_INTEL_ATOMISP2_LED is not set
+# CONFIG_INTEL_ATOMISP2_PM is not set
+# CONFIG_INTEL_CHT_INT33FE is not set
+# CONFIG_INTEL_HID_EVENT is not set
+# CONFIG_INTEL_IDLE is not set
+# CONFIG_INTEL_IDMA64 is not set
+# CONFIG_INTEL_INT0002_VGPIO is not set
+# CONFIG_INTEL_IOATDMA is not set
+# CONFIG_INTEL_ISH_HID is not set
+# CONFIG_INTEL_MEI is not set
+# CONFIG_INTEL_MEI_ME is not set
+# CONFIG_INTEL_MEI_TXE is not set
+# CONFIG_INTEL_MIC_CARD is not set
+# CONFIG_INTEL_MIC_HOST is not set
+# CONFIG_INTEL_MID_PTI is not set
+# CONFIG_INTEL_OAKTRAIL is not set
+# CONFIG_INTEL_PMC_CORE is not set
+# CONFIG_INTEL_PUNIT_IPC is not set
+# CONFIG_INTEL_RST is not set
+# CONFIG_INTEL_SMARTCONNECT is not set
+# CONFIG_INTEL_SOC_PMIC is not set
+# CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set
+# CONFIG_INTEL_SOC_PMIC_CHTWC is not set
+# CONFIG_INTEL_TH is not set
+# CONFIG_INTEL_VBTN is not set
+# CONFIG_INTEL_XWAY_PHY is not set
+# CONFIG_INTERCONNECT is not set
+# CONFIG_INTERVAL_TREE_TEST is not set
+# CONFIG_INV_ICM42600_I2C is not set
+# CONFIG_INV_ICM42600_SPI is not set
+# CONFIG_INV_MPU6050_I2C is not set
+# CONFIG_INV_MPU6050_IIO is not set
+# CONFIG_INV_MPU6050_SPI is not set
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_IONIC is not set
+# CONFIG_IOSCHED_BFQ is not set
+# CONFIG_IOSM is not set
+CONFIG_IO_STRICT_DEVMEM=y
+# CONFIG_IO_URING is not set
+CONFIG_IO_WQ=y
+# CONFIG_IP17XX_PHY is not set
+# CONFIG_IP6_NF_FILTER is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP6_NF_MANGLE is not set
+# CONFIG_IP6_NF_MATCH_AH is not set
+# CONFIG_IP6_NF_MATCH_EUI64 is not set
+# CONFIG_IP6_NF_MATCH_FRAG is not set
+# CONFIG_IP6_NF_MATCH_HL is not set
+# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
+# CONFIG_IP6_NF_MATCH_MH is not set
+# CONFIG_IP6_NF_MATCH_OPTS is not set
+# CONFIG_IP6_NF_MATCH_RPFILTER is not set
+# CONFIG_IP6_NF_MATCH_RT is not set
+# CONFIG_IP6_NF_MATCH_SRH is not set
+# CONFIG_IP6_NF_NAT is not set
+# CONFIG_IP6_NF_RAW is not set
+# CONFIG_IP6_NF_SECURITY is not set
+# CONFIG_IP6_NF_TARGET_HL is not set
+# CONFIG_IP6_NF_TARGET_MASQUERADE is not set
+# CONFIG_IP6_NF_TARGET_REJECT is not set
+# CONFIG_IP6_NF_TARGET_SYNPROXY is not set
+# CONFIG_IPACK_BUS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_IPMB_DEVICE_INTERFACE is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_IPV6 is not set
+# CONFIG_IPV6_FOU is not set
+# CONFIG_IPV6_FOU_TUNNEL is not set
+# CONFIG_IPV6_ILA is not set
+# CONFIG_IPV6_IOAM6_LWTUNNEL is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_IPV6_MROUTE_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_ROUTE_INFO is not set
+# CONFIG_IPV6_RPL_LWTUNNEL is not set
+# CONFIG_IPV6_SEG6_HMAC is not set
+# CONFIG_IPV6_SEG6_LWTUNNEL is not set
+# CONFIG_IPV6_SIT is not set
+# CONFIG_IPV6_SIT_6RD is not set
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_VTI is not set
+# CONFIG_IPVLAN is not set
+# CONFIG_IPVTAP is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2100_DEBUG is not set
+CONFIG_IPW2100_MONITOR=y
+# CONFIG_IPW2200 is not set
+# CONFIG_IPW2200_DEBUG is not set
+CONFIG_IPW2200_MONITOR=y
+# CONFIG_IPW2200_PROMISCUOUS is not set
+# CONFIG_IPW2200_QOS is not set
+# CONFIG_IPW2200_RADIOTAP is not set
+# CONFIG_IPWIRELESS is not set
+# CONFIG_IPX is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_FIB_TRIE_STATS is not set
+# CONFIG_IP_MROUTE is not set
+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_NF_ARPFILTER is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_ARP_MANGLE is not set
+# CONFIG_IP_NF_FILTER is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_MANGLE is not set
+# CONFIG_IP_NF_MATCH_AH is not set
+# CONFIG_IP_NF_MATCH_ECN is not set
+# CONFIG_IP_NF_MATCH_RPFILTER is not set
+# CONFIG_IP_NF_MATCH_TTL is not set
+# CONFIG_IP_NF_RAW is not set
+# CONFIG_IP_NF_SECURITY is not set
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+# CONFIG_IP_NF_TARGET_ECN is not set
+# CONFIG_IP_NF_TARGET_MASQUERADE is not set
+# CONFIG_IP_NF_TARGET_NETMAP is not set
+# CONFIG_IP_NF_TARGET_REDIRECT is not set
+# CONFIG_IP_NF_TARGET_REJECT is not set
+# CONFIG_IP_NF_TARGET_SYNPROXY is not set
+# CONFIG_IP_NF_TARGET_TTL is not set
+# CONFIG_IP_PIMSM_V1 is not set
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_IP_PNP is not set
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_IP_SET is not set
+# CONFIG_IP_SET_HASH_IPMAC is not set
+# CONFIG_IP_VS is not set
+# CONFIG_IP_VS_MH is not set
+CONFIG_IP_VS_MH_TAB_INDEX=10
+# CONFIG_IP_VS_TWOS is not set
+# CONFIG_IRDA is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_IRQ_ALL_CPUS is not set
+# CONFIG_IRQ_DOMAIN_DEBUG is not set
+# CONFIG_IRQ_POLL is not set
+# CONFIG_IRQ_TIME_ACCOUNTING is not set
+# CONFIG_IR_GPIO_CIR is not set
+# CONFIG_IR_HIX5HD2 is not set
+# CONFIG_IR_IGORPLUGUSB is not set
+# CONFIG_IR_IGUANA is not set
+# CONFIG_IR_IMG is not set
+# CONFIG_IR_IMON is not set
+# CONFIG_IR_IMON_RAW is not set
+# CONFIG_IR_JVC_DECODER is not set
+# CONFIG_IR_LIRC_CODEC is not set
+# CONFIG_IR_MCEUSB is not set
+# CONFIG_IR_NEC_DECODER is not set
+# CONFIG_IR_RC5_DECODER is not set
+# CONFIG_IR_RC6_DECODER is not set
+# CONFIG_IR_REDRAT3 is not set
+# CONFIG_IR_SONY_DECODER is not set
+# CONFIG_IR_STREAMZAP is not set
+# CONFIG_IR_TTUSBIR is not set
+# CONFIG_ISA_BUS is not set
+# CONFIG_ISA_BUS_API is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_ISCSI_TCP is not set
+CONFIG_ISDN=y
+# CONFIG_ISDN_AUDIO is not set
+# CONFIG_ISDN_CAPI is not set
+# CONFIG_ISDN_CAPI_CAPIDRV is not set
+# CONFIG_ISDN_DIVERSION is not set
+# CONFIG_ISDN_DRV_ACT2000 is not set
+# CONFIG_ISDN_DRV_GIGASET is not set
+# CONFIG_ISDN_DRV_HISAX is not set
+# CONFIG_ISDN_DRV_ICN is not set
+# CONFIG_ISDN_DRV_LOOP is not set
+# CONFIG_ISDN_DRV_PCBIT is not set
+# CONFIG_ISDN_DRV_SC is not set
+# CONFIG_ISDN_I4L is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_ISL29125 is not set
+# CONFIG_ISL29501 is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_ISS4xx is not set
+# CONFIG_ITG3200 is not set
+# CONFIG_IWL3945 is not set
+# CONFIG_IWLWIFI is not set
+# CONFIG_IXGB is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGBEVF is not set
+# CONFIG_JAILHOUSE_GUEST is not set
+# CONFIG_JBD2_DEBUG is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_POSIX_ACL is not set
+# CONFIG_JFFS2_FS_SECURITY is not set
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_LZMA=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_ZLIB is not set
+# CONFIG_JFS_DEBUG is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_JFS_POSIX_ACL is not set
+# CONFIG_JFS_SECURITY is not set
+# CONFIG_JFS_STATISTICS is not set
+# CONFIG_JME is not set
+CONFIG_JOLIET=y
+# CONFIG_JSA1212 is not set
+# CONFIG_JUMP_LABEL is not set
+# CONFIG_JZ4740_WDT is not set
+# CONFIG_JZ4770_PHY is not set
+# CONFIG_KALLSYMS is not set
+# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
+# CONFIG_KALLSYMS_ALL is not set
+CONFIG_KALLSYMS_BASE_RELATIVE=y
+# CONFIG_KALLSYMS_UNCOMPRESSED is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_KASAN is not set
+CONFIG_KASAN_STACK=y
+# CONFIG_KCMP is not set
+# CONFIG_KCOV is not set
+# CONFIG_KCSAN is not set
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_CAT is not set
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_LZ4 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_KERNEL_XZ=y
+# CONFIG_KERNEL_ZSTD is not set
+CONFIG_KERNFS=y
+# CONFIG_KEXEC is not set
+# CONFIG_KEXEC_FILE is not set
+# CONFIG_KEXEC_SIG is not set
+# CONFIG_KEYBOARD_ADC is not set
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+# CONFIG_KEYBOARD_APPLESPI is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_BCM is not set
+# CONFIG_KEYBOARD_CAP11XX is not set
+# CONFIG_KEYBOARD_DLINK_DIR685 is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OMAP4 is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_PXA27x is not set
+# CONFIG_KEYBOARD_QT1050 is not set
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_SAMSUNG is not set
+# CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_SNVS_PWRKEY is not set
+# CONFIG_KEYBOARD_STMPE is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_TEGRA is not set
+# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
+# CONFIG_KEYBOARD_TWL4030 is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYS is not set
+# CONFIG_KEYS_REQUEST_CACHE is not set
+# CONFIG_KEY_DH_OPERATIONS is not set
+# CONFIG_KFENCE is not set
+# CONFIG_KGDB is not set
+# CONFIG_KMEMCHECK is not set
+# CONFIG_KMX61 is not set
+# CONFIG_KPC2000 is not set
+# CONFIG_KPROBES is not set
+# CONFIG_KPROBES_SANITY_TEST is not set
+# CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set
+# CONFIG_KPROBE_EVENT_GEN_TEST is not set
+# CONFIG_KS7010 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_KSM is not set
+# CONFIG_KSZ884X_PCI is not set
+# CONFIG_KUNIT is not set
+CONFIG_KUSER_HELPERS=y
+# CONFIG_KVM_AMD is not set
+# CONFIG_KVM_AMD_SEV is not set
+# CONFIG_KVM_GUEST is not set
+# CONFIG_KVM_INTEL is not set
+# CONFIG_KVM_WERROR is not set
+# CONFIG_KVM_XEN is not set
+# CONFIG_KXCJK1013 is not set
+# CONFIG_KXSD9 is not set
+# CONFIG_L2TP is not set
+# CONFIG_L2TP_ETH is not set
+# CONFIG_L2TP_IP is not set
+# CONFIG_L2TP_V3 is not set
+# CONFIG_LAN743X is not set
+# CONFIG_LANMEDIA is not set
+# CONFIG_LANTIQ is not set
+# CONFIG_LAPB is not set
+# CONFIG_LASAT is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_LATTICE_ECP3_CONFIG is not set
+CONFIG_LBDAF=y
+# CONFIG_LCD_AMS369FG06 is not set
+# CONFIG_LCD_CLASS_DEVICE is not set
+# CONFIG_LCD_HX8357 is not set
+# CONFIG_LCD_ILI922X is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_L4F00242T03 is not set
+# CONFIG_LCD_LD9040 is not set
+# CONFIG_LCD_LMS283GF05 is not set
+# CONFIG_LCD_LMS501KF03 is not set
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_OTM3225A is not set
+# CONFIG_LCD_S6E63M0 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+CONFIG_LDISC_AUTOLOAD=y
+# CONFIG_LDM_PARTITION is not set
+CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y
+# CONFIG_LEDS_AN30259A is not set
+# CONFIG_LEDS_APU is not set
+# CONFIG_LEDS_AW2013 is not set
+# CONFIG_LEDS_BCM6328 is not set
+# CONFIG_LEDS_BCM6358 is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_BLINKM is not set
+CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y
+CONFIG_LEDS_CLASS=y
+# CONFIG_LEDS_CLASS_FLASH is not set
+CONFIG_LEDS_CLASS_MULTICOLOR=y
+# CONFIG_LEDS_CR0014114 is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_EL15203000 is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_LEDS_INTEL_SS4200 is not set
+# CONFIG_LEDS_IS31FL319X is not set
+# CONFIG_LEDS_IS31FL32XX is not set
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_LM3532 is not set
+# CONFIG_LEDS_LM355x is not set
+# CONFIG_LEDS_LM3642 is not set
+# CONFIG_LEDS_LM3692X is not set
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP3952 is not set
+# CONFIG_LEDS_LP50XX is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_LP5562 is not set
+# CONFIG_LEDS_LP55XX_COMMON is not set
+# CONFIG_LEDS_LP8501 is not set
+# CONFIG_LEDS_LP8860 is not set
+# CONFIG_LEDS_LT3593 is not set
+# CONFIG_LEDS_MLXCPLD is not set
+# CONFIG_LEDS_MLXREG is not set
+# CONFIG_LEDS_NIC78BX is not set
+# CONFIG_LEDS_NS2 is not set
+# CONFIG_LEDS_OT200 is not set
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA963X is not set
+# CONFIG_LEDS_PWM is not set
+# CONFIG_LEDS_REGULATOR is not set
+# CONFIG_LEDS_SPI_BYTE is not set
+# CONFIG_LEDS_SYSCON is not set
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_TI_LMU_COMMON is not set
+# CONFIG_LEDS_TLC591XX is not set
+CONFIG_LEDS_TRIGGERS=y
+# CONFIG_LEDS_TRIGGER_ACTIVITY is not set
+# CONFIG_LEDS_TRIGGER_AUDIO is not set
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_CAMERA is not set
+# CONFIG_LEDS_TRIGGER_CPU is not set
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+# CONFIG_LEDS_TRIGGER_DISK is not set
+# CONFIG_LEDS_TRIGGER_GPIO is not set
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_MTD is not set
+CONFIG_LEDS_TRIGGER_NETDEV=y
+# CONFIG_LEDS_TRIGGER_ONESHOT is not set
+# CONFIG_LEDS_TRIGGER_PANIC is not set
+# CONFIG_LEDS_TRIGGER_PATTERN is not set
+CONFIG_LEDS_TRIGGER_TIMER=y
+# CONFIG_LEDS_TRIGGER_TRANSIENT is not set
+# CONFIG_LEDS_TRIGGER_TTY is not set
+# CONFIG_LEDS_TURRIS_OMNIA is not set
+# CONFIG_LEDS_USER is not set
+# CONFIG_LED_TRIGGER_PHY is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_LGUEST is not set
+# CONFIG_LIB80211 is not set
+# CONFIG_LIB80211_CRYPT_CCMP is not set
+# CONFIG_LIB80211_CRYPT_TKIP is not set
+# CONFIG_LIB80211_CRYPT_WEP is not set
+# CONFIG_LIB80211_DEBUG is not set
+# CONFIG_LIBCRC32C is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_LIBERTAS_USB is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_LIBIPW_DEBUG is not set
+# CONFIG_LIBNVDIMM is not set
+CONFIG_LIB_MEMNEQ=y
+# CONFIG_LIDAR_LITE_V2 is not set
+CONFIG_LINEAR_RANGES=y
+# CONFIG_LIQUIDIO is not set
+# CONFIG_LIQUIDIO_VF is not set
+# CONFIG_LIS3L02DQ is not set
+# CONFIG_LITEX_LITEETH is not set
+# CONFIG_LITEX_SOC_CONTROLLER is not set
+# CONFIG_LKDTM is not set
+CONFIG_LLC=y
+# CONFIG_LLC2 is not set
+# CONFIG_LMK04832 is not set
+# CONFIG_LMP91000 is not set
+# CONFIG_LNET is not set
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_LOCKD is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_LOCKD_V4=y
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_LOCK_EVENT_COUNTS is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_LOCK_TORTURE_TEST is not set
+# CONFIG_LOGFS is not set
+# CONFIG_LOGIG940_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIWHEELS_FF is not set
+# CONFIG_LOGO is not set
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
+# CONFIG_LOONGSON_MC146818 is not set
+# CONFIG_LPC_ICH is not set
+# CONFIG_LPC_SCH is not set
+# CONFIG_LP_CONSOLE is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity"
+CONFIG_LSM_MMAP_MIN_ADDR=65536
+# CONFIG_LTC1660 is not set
+# CONFIG_LTC2471 is not set
+# CONFIG_LTC2485 is not set
+# CONFIG_LTC2496 is not set
+# CONFIG_LTC2497 is not set
+# CONFIG_LTC2632 is not set
+# CONFIG_LTC2983 is not set
+# CONFIG_LTE_GDM724X is not set
+CONFIG_LTO_NONE=y
+# CONFIG_LTPC is not set
+# CONFIG_LTR501 is not set
+# CONFIG_LUSTRE_FS is not set
+# CONFIG_LV0104CS is not set
+# CONFIG_LWTUNNEL is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_LZ4HC_COMPRESS is not set
+# CONFIG_LZ4_COMPRESS is not set
+# CONFIG_LZ4_DECOMPRESS is not set
+CONFIG_LZMA_COMPRESS=y
+CONFIG_LZMA_DECOMPRESS=y
+# CONFIG_LZO_COMPRESS is not set
+# CONFIG_LZO_DECOMPRESS is not set
+# CONFIG_M62332 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_MAC80211_MESSAGE_TRACING is not set
+CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
+# CONFIG_MACB is not set
+# CONFIG_MACH_ASM9260 is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_INGENIC is not set
+# CONFIG_MACH_INGENIC_SOC is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_JZ4740 is not set
+# CONFIG_MACH_LOONGSON2EF is not set
+# CONFIG_MACH_LOONGSON32 is not set
+# CONFIG_MACH_LOONGSON64 is not set
+# CONFIG_MACH_NINTENDO64 is not set
+# CONFIG_MACH_PIC32 is not set
+# CONFIG_MACH_PISTACHIO is not set
+# CONFIG_MACH_REALTEK_RTL is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_MACH_XILFPGA is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+# CONFIG_MACSEC is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_MACVTAP is not set
+# CONFIG_MAC_EMUMOUSEBTN is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MAG3110 is not set
+# CONFIG_MAGIC_SYSRQ is not set
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
+# CONFIG_MAGIC_SYSRQ_SERIAL is not set
+CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE=""
+# CONFIG_MAILBOX is not set
+# CONFIG_MANAGER_SBS is not set
+# CONFIG_MANDATORY_FILE_LOCKING is not set
+# CONFIG_MANGLE_BOOTARGS is not set
+# CONFIG_MARVELL_10G_PHY is not set
+# CONFIG_MARVELL_88X2222_PHY is not set
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_MAX1027 is not set
+# CONFIG_MAX11100 is not set
+# CONFIG_MAX1118 is not set
+# CONFIG_MAX1241 is not set
+# CONFIG_MAX1363 is not set
+# CONFIG_MAX30100 is not set
+# CONFIG_MAX30102 is not set
+# CONFIG_MAX31856 is not set
+# CONFIG_MAX44000 is not set
+# CONFIG_MAX44009 is not set
+# CONFIG_MAX517 is not set
+# CONFIG_MAX5432 is not set
+# CONFIG_MAX5481 is not set
+# CONFIG_MAX5487 is not set
+# CONFIG_MAX5821 is not set
+# CONFIG_MAX63XX_WATCHDOG is not set
+# CONFIG_MAX9611 is not set
+# CONFIG_MAXIM_THERMOCOUPLE is not set
+# CONFIG_MAXLINEAR_GPHY is not set
+CONFIG_MAY_USE_DEVLINK=y
+# CONFIG_MB1232 is not set
+# CONFIG_MC3230 is not set
+# CONFIG_MCB is not set
+# CONFIG_MCP320X is not set
+# CONFIG_MCP3422 is not set
+# CONFIG_MCP3911 is not set
+# CONFIG_MCP4018 is not set
+# CONFIG_MCP41010 is not set
+# CONFIG_MCP4131 is not set
+# CONFIG_MCP4531 is not set
+# CONFIG_MCP4725 is not set
+# CONFIG_MCP4922 is not set
+# CONFIG_MCPM is not set
+# CONFIG_MCTP is not set
+# CONFIG_MD is not set
+# CONFIG_MDIO_BCM_UNIMAC is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
+# CONFIG_MDIO_DEVICE is not set
+# CONFIG_MDIO_DEVRES is not set
+# CONFIG_MDIO_HISI_FEMAC is not set
+# CONFIG_MDIO_IPQ4019 is not set
+# CONFIG_MDIO_IPQ8064 is not set
+# CONFIG_MDIO_MSCC_MIIM is not set
+# CONFIG_MDIO_MVUSB is not set
+# CONFIG_MDIO_OCTEON is not set
+# CONFIG_MDIO_THUNDER is not set
+# CONFIG_MDIO_XPCS is not set
+# CONFIG_MDM_GCC_9607 is not set
+# CONFIG_MD_FAULTY is not set
+# CONFIG_MEDIATEK_GE_PHY is not set
+# CONFIG_MEDIATEK_MT6577_AUXADC is not set
+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
+# CONFIG_MEDIA_ATTACH is not set
+# CONFIG_MEDIA_CAMERA_SUPPORT is not set
+# CONFIG_MEDIA_CEC_SUPPORT is not set
+# CONFIG_MEDIA_CONTROLLER is not set
+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
+# CONFIG_MEDIA_PCI_SUPPORT is not set
+# CONFIG_MEDIA_PLATFORM_SUPPORT is not set
+# CONFIG_MEDIA_RADIO_SUPPORT is not set
+# CONFIG_MEDIA_RC_SUPPORT is not set
+# CONFIG_MEDIA_SDR_SUPPORT is not set
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+# CONFIG_MEDIA_SUPPORT is not set
+# CONFIG_MEDIA_SUPPORT_FILTER is not set
+# CONFIG_MEDIA_TEST_SUPPORT is not set
+# CONFIG_MEDIA_TUNER_E4000 is not set
+# CONFIG_MEDIA_TUNER_FC0011 is not set
+# CONFIG_MEDIA_TUNER_FC0012 is not set
+# CONFIG_MEDIA_TUNER_FC0013 is not set
+# CONFIG_MEDIA_TUNER_FC2580 is not set
+# CONFIG_MEDIA_TUNER_IT913X is not set
+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MSI001 is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2063 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MXL301RF is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_R820T is not set
+# CONFIG_MEDIA_TUNER_SI2157 is not set
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA18212 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+# CONFIG_MEDIA_TUNER_TDA18250 is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_TUA9001 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC4000 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_USB_SUPPORT is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_MELLANOX_PLATFORM is not set
+CONFIG_MEMBARRIER=y
+# CONFIG_MEMORY is not set
+# CONFIG_MEMORY_FAILURE is not set
+# CONFIG_MEMORY_HOTPLUG is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_MEMTEST is not set
+# CONFIG_MEN_A21_WDT is not set
+# CONFIG_MESON_SM is not set
+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_AC100 is not set
+# CONFIG_MFD_ACT8945A is not set
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_MFD_AS3722 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_MFD_ATC260X_I2C is not set
+# CONFIG_MFD_ATMEL_FLEXCOM is not set
+# CONFIG_MFD_ATMEL_HLCDC is not set
+# CONFIG_MFD_AXP20X is not set
+# CONFIG_MFD_AXP20X_I2C is not set
+# CONFIG_MFD_BCM590XX is not set
+# CONFIG_MFD_BD9571MWV is not set
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_CPCAP is not set
+# CONFIG_MFD_CROS_EC is not set
+# CONFIG_MFD_CS5535 is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9052_SPI is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_MFD_DA9062 is not set
+# CONFIG_MFD_DA9063 is not set
+# CONFIG_MFD_DA9150 is not set
+# CONFIG_MFD_DLN2 is not set
+# CONFIG_MFD_EXYNOS_LPASS is not set
+# CONFIG_MFD_GATEWORKS_GSC is not set
+# CONFIG_MFD_HI6421_PMIC is not set
+# CONFIG_MFD_INTEL_M10_BMC is not set
+# CONFIG_MFD_INTEL_PMT is not set
+# CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set
+# CONFIG_MFD_IQS62X is not set
+# CONFIG_MFD_JANZ_CMODIO is not set
+# CONFIG_MFD_KEMPLD is not set
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_MFD_LOCHNAGAR is not set
+# CONFIG_MFD_LP3943 is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_MADERA is not set
+# CONFIG_MFD_MAX14577 is not set
+# CONFIG_MFD_MAX77620 is not set
+# CONFIG_MFD_MAX77650 is not set
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX77843 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_MC13XXX is not set
+# CONFIG_MFD_MC13XXX_I2C is not set
+# CONFIG_MFD_MC13XXX_SPI is not set
+# CONFIG_MFD_MENF21BMC is not set
+# CONFIG_MFD_MP2629 is not set
+# CONFIG_MFD_MT6360 is not set
+# CONFIG_MFD_MT6397 is not set
+# CONFIG_MFD_NTXEC is not set
+# CONFIG_MFD_OMAP_USB_HOST is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_PM8921_CORE is not set
+# CONFIG_MFD_PM8XXX is not set
+# CONFIG_MFD_QCOM_PM8008 is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_RDC321X is not set
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_RK808 is not set
+# CONFIG_MFD_RN5T618 is not set
+# CONFIG_MFD_ROHM_BD70528 is not set
+# CONFIG_MFD_ROHM_BD71828 is not set
+# CONFIG_MFD_ROHM_BD718XX is not set
+# CONFIG_MFD_ROHM_BD957XMUF is not set
+# CONFIG_MFD_RSMU_I2C is not set
+# CONFIG_MFD_RSMU_SPI is not set
+# CONFIG_MFD_RT4831 is not set
+# CONFIG_MFD_RT5033 is not set
+# CONFIG_MFD_RTSX_PCI is not set
+# CONFIG_MFD_RTSX_USB is not set
+# CONFIG_MFD_SEC_CORE is not set
+# CONFIG_MFD_SI476X_CORE is not set
+# CONFIG_MFD_SKY81452 is not set
+# CONFIG_MFD_SL28CPLD is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_MFD_STMFX is not set
+# CONFIG_MFD_STMPE is not set
+# CONFIG_MFD_STPMIC1 is not set
+# CONFIG_MFD_SYSCON is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_MFD_TIMBERDALE is not set
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_MFD_TI_LMU is not set
+# CONFIG_MFD_TI_LP873X is not set
+# CONFIG_MFD_TI_LP87565 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_TPS65086 is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS65218 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65910 is not set
+# CONFIG_MFD_TPS65912 is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+# CONFIG_MFD_TPS65912_SPI is not set
+# CONFIG_MFD_TPS68470 is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_MFD_TQMX86 is not set
+# CONFIG_MFD_VIPERBOARD is not set
+# CONFIG_MFD_VX855 is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MHI_BUS is not set
+# CONFIG_MHI_BUS_DEBUG is not set
+# CONFIG_MHI_BUS_PCI_GENERIC is not set
+# CONFIG_MHI_NET is not set
+# CONFIG_MHI_WWAN_CTRL is not set
+# CONFIG_MHI_WWAN_MBIM is not set
+# CONFIG_MICREL_KS8995MA is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_MICROCHIP_KSZ is not set
+# CONFIG_MICROCHIP_PHY is not set
+# CONFIG_MICROCHIP_PIT64B is not set
+# CONFIG_MICROCHIP_T1_PHY is not set
+# CONFIG_MICROSEMI_PHY is not set
+# CONFIG_MIGRATION is not set
+CONFIG_MII=y
+# CONFIG_MIKROTIK is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_MINIX_FS_NATIVE_ENDIAN is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_MIPS32_N32 is not set
+# CONFIG_MIPS32_O32 is not set
+# CONFIG_MIPS_ALCHEMY is not set
+# CONFIG_MIPS_CDMM is not set
+# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
+# CONFIG_MIPS_CMDLINE_FROM_DTB is not set
+# CONFIG_MIPS_CMP is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MIPS_CPS is not set
+# CONFIG_MIPS_ELF_APPENDED_DTB is not set
+# CONFIG_MIPS_FPU_EMULATOR is not set
+# CONFIG_MIPS_FP_SUPPORT is not set
+# CONFIG_MIPS_GENERIC is not set
+# CONFIG_MIPS_GENERIC_KERNEL is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_O32_FP64_SUPPORT is not set
+# CONFIG_MIPS_PARAVIRT is not set
+# CONFIG_MIPS_PLATFORM_DEVICES is not set
+# CONFIG_MIPS_RAW_APPENDED_DTB is not set
+# CONFIG_MIPS_SEAD3 is not set
+# CONFIG_MIPS_VA_BITS_48 is not set
+# CONFIG_MIPS_VPE_LOADER is not set
+# CONFIG_MISC_ALCOR_PCI is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_MISC_RTSX_PCI is not set
+# CONFIG_MISC_RTSX_USB is not set
+# CONFIG_MISDN is not set
+# CONFIG_MISDN_AVMFRITZ is not set
+# CONFIG_MISDN_HFCPCI is not set
+# CONFIG_MISDN_HFCUSB is not set
+# CONFIG_MISDN_INFINEON is not set
+# CONFIG_MISDN_NETJET is not set
+# CONFIG_MISDN_SPEEDFAX is not set
+# CONFIG_MISDN_W6692 is not set
+CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y
+# CONFIG_MKISS is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_MLX4_EN is not set
+# CONFIG_MLX5_CORE is not set
+# CONFIG_MLX5_SF is not set
+# CONFIG_MLX90614 is not set
+# CONFIG_MLX90632 is not set
+# CONFIG_MLXFW is not set
+# CONFIG_MLXSW_CORE is not set
+# CONFIG_MLX_CPLD_PLATFORM is not set
+# CONFIG_MLX_PLATFORM is not set
+# CONFIG_MMA7455_I2C is not set
+# CONFIG_MMA7455_SPI is not set
+# CONFIG_MMA7660 is not set
+# CONFIG_MMA8452 is not set
+# CONFIG_MMA9551 is not set
+# CONFIG_MMA9553 is not set
+# CONFIG_MMC is not set
+# CONFIG_MMC35240 is not set
+# CONFIG_MMC_ARMMMCI is not set
+# CONFIG_MMC_AU1X is not set
+# CONFIG_MMC_BLOCK is not set
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_MMC_BLOCK_MINORS=8
+# CONFIG_MMC_CAVIUM_THUNDERX is not set
+# CONFIG_MMC_CB710 is not set
+# CONFIG_MMC_CQHCI is not set
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_DW is not set
+# CONFIG_MMC_HSQ is not set
+# CONFIG_MMC_JZ4740 is not set
+# CONFIG_MMC_MTK is not set
+# CONFIG_MMC_MVSDIO is not set
+# CONFIG_MMC_S3C is not set
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_SDHCI_ACPI is not set
+# CONFIG_MMC_SDHCI_AM654 is not set
+# CONFIG_MMC_SDHCI_BCM_KONA is not set
+# CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_F_SDH30 is not set
+# CONFIG_MMC_SDHCI_IPROC is not set
+# CONFIG_MMC_SDHCI_MILBEAUT is not set
+# CONFIG_MMC_SDHCI_MSM is not set
+# CONFIG_MMC_SDHCI_OF_ARASAN is not set
+# CONFIG_MMC_SDHCI_OF_ASPEED is not set
+# CONFIG_MMC_SDHCI_OF_AT91 is not set
+# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set
+# CONFIG_MMC_SDHCI_OF_ESDHC is not set
+# CONFIG_MMC_SDHCI_OF_HLWD is not set
+# CONFIG_MMC_SDHCI_OMAP is not set
+# CONFIG_MMC_SDHCI_PXAV2 is not set
+# CONFIG_MMC_SDHCI_PXAV3 is not set
+# CONFIG_MMC_SDHCI_S3C is not set
+# CONFIG_MMC_SDHCI_XENON is not set
+# CONFIG_MMC_SDRICOH_CS is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MMC_STM32_SDMMC is not set
+# CONFIG_MMC_TEST is not set
+# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_TOSHIBA_PCI is not set
+# CONFIG_MMC_USDHI6ROL0 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MMC_VIA_SDMMC is not set
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMIOTRACE is not set
+CONFIG_MMU=y
+CONFIG_MMU_GATHER_RCU_TABLE_FREE=y
+CONFIG_MMU_GATHER_TABLE_FREE=y
+CONFIG_MODPROBE_PATH="/sbin/modprobe"
+CONFIG_MODULES=y
+# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
+# CONFIG_MODULE_COMPRESS is not set
+# CONFIG_MODULE_COMPRESS_GZIP is not set
+CONFIG_MODULE_COMPRESS_NONE=y
+# CONFIG_MODULE_COMPRESS_XZ is not set
+# CONFIG_MODULE_COMPRESS_ZSTD is not set
+# CONFIG_MODULE_FORCE_LOAD is not set
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODULE_SIG is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_MODULE_STRIPPED=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MOST is not set
+# CONFIG_MOTORCOMM_PHY is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_ELAN_I2C is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_INPORT is not set
+# CONFIG_MOUSE_LOGIBM is not set
+# CONFIG_MOUSE_PC110PAD is not set
+# CONFIG_MOUSE_PS2_FOCALTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_MOUSE_SYNAPTICS_USB is not set
+# CONFIG_MOXTET is not set
+# CONFIG_MPL115 is not set
+# CONFIG_MPL115_I2C is not set
+# CONFIG_MPL115_SPI is not set
+# CONFIG_MPL3115 is not set
+# CONFIG_MPLS is not set
+# CONFIG_MPLS_IPTUNNEL is not set
+# CONFIG_MPLS_ROUTING is not set
+# CONFIG_MPTCP is not set
+# CONFIG_MPU3050_I2C is not set
+# CONFIG_MQ_IOSCHED_DEADLINE is not set
+# CONFIG_MQ_IOSCHED_KYBER is not set
+# CONFIG_MS5611 is not set
+# CONFIG_MS5637 is not set
+# CONFIG_MSCC_OCELOT_SWITCH is not set
+# CONFIG_MSDOS_FS is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_MSI_BITMAP_SELFTEST is not set
+# CONFIG_MSI_LAPTOP is not set
+# CONFIG_MSM_GCC_8953 is not set
+# CONFIG_MSM_MMCC_8994 is not set
+# CONFIG_MST_IRQ is not set
+CONFIG_MTD=y
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_MTD_BLOCK2MTD is not set
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_DOCG3 is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_GPIO_ADDR is not set
+# CONFIG_MTD_HYPERBUS is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_JEDECPROBE is not set
+# CONFIG_MTD_LATCH_ADDR is not set
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_LPDDR2_NVM is not set
+# CONFIG_MTD_M25P80 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MCHP23K256 is not set
+# CONFIG_MTD_MCHP48L640 is not set
+# CONFIG_MTD_MT81xx_NOR is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_MYLOADER_PARTS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_NAND_AMS_DELTA is not set
+# CONFIG_MTD_NAND_AR934X is not set
+# CONFIG_MTD_NAND_AR934X_HW_ECC is not set
+# CONFIG_MTD_NAND_ARASAN is not set
+# CONFIG_MTD_NAND_ATMEL is not set
+# CONFIG_MTD_NAND_AU1550 is not set
+# CONFIG_MTD_NAND_BCH is not set
+# CONFIG_MTD_NAND_BF5XX is not set
+# CONFIG_MTD_NAND_BRCMNAND is not set
+# CONFIG_MTD_NAND_CADENCE is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_CM_X270 is not set
+# CONFIG_MTD_NAND_CS553X is not set
+# CONFIG_MTD_NAND_DAVINCI is not set
+# CONFIG_MTD_NAND_DENALI is not set
+# CONFIG_MTD_NAND_DENALI_DT is not set
+# CONFIG_MTD_NAND_DENALI_PCI is not set
+CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xff108018
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_DOCG4 is not set
+# CONFIG_MTD_NAND_ECC is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_ECC_SW_BCH is not set
+# CONFIG_MTD_NAND_ECC_SW_HAMMING is not set
+# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set
+# CONFIG_MTD_NAND_FSL_ELBC is not set
+# CONFIG_MTD_NAND_FSL_IFC is not set
+# CONFIG_MTD_NAND_FSL_UPM is not set
+# CONFIG_MTD_NAND_FSMC is not set
+# CONFIG_MTD_NAND_GPIO is not set
+# CONFIG_MTD_NAND_GPMI_NAND is not set
+# CONFIG_MTD_NAND_HISI504 is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_INTEL_LGM is not set
+# CONFIG_MTD_NAND_JZ4740 is not set
+# CONFIG_MTD_NAND_MPC5121_NFC is not set
+# CONFIG_MTD_NAND_MTK is not set
+# CONFIG_MTD_NAND_MTK_BMT is not set
+# CONFIG_MTD_NAND_MXC is not set
+# CONFIG_MTD_NAND_MXIC is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_NDFC is not set
+# CONFIG_MTD_NAND_NUC900 is not set
+# CONFIG_MTD_NAND_OMAP2 is not set
+# CONFIG_MTD_NAND_OMAP_BCH_BUILD is not set
+# CONFIG_MTD_NAND_ORION is not set
+# CONFIG_MTD_NAND_PASEMI is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_NAND_PXA3xx is not set
+# CONFIG_MTD_NAND_RB4XX is not set
+# CONFIG_MTD_NAND_RB750 is not set
+# CONFIG_MTD_NAND_RB91X is not set
+# CONFIG_MTD_NAND_RICOH is not set
+# CONFIG_MTD_NAND_S3C2410 is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+# CONFIG_MTD_NAND_SH_FLCTL is not set
+# CONFIG_MTD_NAND_SOCRATES is not set
+# CONFIG_MTD_NAND_TMIO is not set
+# CONFIG_MTD_NAND_TXX9NDFMC is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_ONENAND is not set
+# CONFIG_MTD_OOPS is not set
+# CONFIG_MTD_OTP is not set
+# CONFIG_MTD_PARSER_TRX is not set
+# CONFIG_MTD_PARTITIONED_MASTER is not set
+# CONFIG_MTD_PCI is not set
+# CONFIG_MTD_PCMCIA is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PHYSMAP_GEMINI is not set
+# CONFIG_MTD_PHYSMAP_GPIO_ADDR is not set
+# CONFIG_MTD_PHYSMAP_IXP4XX is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_PHYSMAP_OF_GEMINI is not set
+# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set
+# CONFIG_MTD_PHYSMAP_VERSATILE is not set
+# CONFIG_MTD_PLATRAM is not set
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_RAW_NAND is not set
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_ROM is not set
+CONFIG_MTD_ROOTFS_ROOT_DEV=y
+# CONFIG_MTD_ROUTERBOOT_PARTS is not set
+# CONFIG_MTD_SERCOMM_PARTS is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_SPINAND_MT29F is not set
+# CONFIG_MTD_SPI_NAND is not set
+# CONFIG_MTD_SPI_NOR is not set
+# CONFIG_MTD_SPI_NOR_SWP_DISABLE is not set
+CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y
+# CONFIG_MTD_SPI_NOR_SWP_KEEP is not set
+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
+# CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE is not set
+CONFIG_MTD_SPLIT=y
+# CONFIG_MTD_SPLIT_BCM63XX_FW is not set
+# CONFIG_MTD_SPLIT_BCM_WFI_FW is not set
+# CONFIG_MTD_SPLIT_BRNIMAGE_FW is not set
+# CONFIG_MTD_SPLIT_ELF_FW is not set
+# CONFIG_MTD_SPLIT_EVA_FW is not set
+# CONFIG_MTD_SPLIT_FIRMWARE is not set
+CONFIG_MTD_SPLIT_FIRMWARE_NAME="firmware"
+# CONFIG_MTD_SPLIT_FIT_FW is not set
+# CONFIG_MTD_SPLIT_H3C_VFS is not set
+# CONFIG_MTD_SPLIT_JIMAGE_FW is not set
+# CONFIG_MTD_SPLIT_LZMA_FW is not set
+# CONFIG_MTD_SPLIT_MINOR_FW is not set
+# CONFIG_MTD_SPLIT_SEAMA_FW is not set
+CONFIG_MTD_SPLIT_SQUASHFS_ROOT=y
+CONFIG_MTD_SPLIT_SUPPORT=y
+# CONFIG_MTD_SPLIT_TPLINK_FW is not set
+# CONFIG_MTD_SPLIT_TRX_FW is not set
+# CONFIG_MTD_SPLIT_UIMAGE_FW is not set
+# CONFIG_MTD_SPLIT_WRGG_FW is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SWAP is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_MTD_UBI_FASTMAP is not set
+# CONFIG_MTD_UBI_GLUEBI is not set
+# CONFIG_MTD_UIMAGE_SPLIT is not set
+# CONFIG_MTD_VIRT_CONCAT is not set
+# CONFIG_MTK_DEVAPC is not set
+# CONFIG_MTK_MMC is not set
+# CONFIG_MTK_MMSYS is not set
+# CONFIG_MTK_THERMAL is not set
+# CONFIG_MULTIPLEXER is not set
+CONFIG_MULTIUSER=y
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_MUX_ADG792A is not set
+# CONFIG_MUX_ADGS1408 is not set
+# CONFIG_MUX_GPIO is not set
+# CONFIG_MUX_MMIO is not set
+# CONFIG_MV643XX_ETH is not set
+# CONFIG_MVMDIO is not set
+# CONFIG_MVNETA_BM is not set
+# CONFIG_MVSW61XX_PHY is not set
+# CONFIG_MV_XOR_V2 is not set
+# CONFIG_MWAVE is not set
+# CONFIG_MWL8K is not set
+# CONFIG_MXC4005 is not set
+# CONFIG_MXC6255 is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NAU7802 is not set
+# CONFIG_NBPFAXI_DMA is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NE2000 is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_NEC_MARKEINS is not set
+CONFIG_NET=y
+# CONFIG_NETCONSOLE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVSIM is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_NETFILTER_ADVANCED is not set
+# CONFIG_NETFILTER_DEBUG is not set
+# CONFIG_NETFILTER_INGRESS is not set
+# CONFIG_NETFILTER_EGRESS is not set
+# CONFIG_NETFILTER_NETLINK is not set
+# CONFIG_NETFILTER_NETLINK_ACCT is not set
+# CONFIG_NETFILTER_NETLINK_GLUE_CT is not set
+# CONFIG_NETFILTER_NETLINK_HOOK is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NETFILTER_NETLINK_OSF is not set
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_XTABLES is not set
+# CONFIG_NETFILTER_XTABLES_COMPAT is not set
+# CONFIG_NETFILTER_XT_CONNMARK is not set
+# CONFIG_NETFILTER_XT_MARK is not set
+# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_BPF is not set
+# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
+# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
+# CONFIG_NETFILTER_XT_MATCH_CPU is not set
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+# CONFIG_NETFILTER_XT_MATCH_ECN is not set
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
+# CONFIG_NETFILTER_XT_MATCH_HL is not set
+# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+# CONFIG_NETFILTER_XT_MATCH_L2TP is not set
+# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
+# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_MAC is not set
+# CONFIG_NETFILTER_XT_MATCH_MARK is not set
+# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
+# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set
+# CONFIG_NETFILTER_XT_MATCH_OSF is not set
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
+# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+# CONFIG_NETFILTER_XT_MATCH_REALM is not set
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set
+# CONFIG_NETFILTER_XT_MATCH_STATE is not set
+# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
+# CONFIG_NETFILTER_XT_MATCH_STRING is not set
+# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set
+# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set
+# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_CT is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+# CONFIG_NETFILTER_XT_TARGET_HL is not set
+# CONFIG_NETFILTER_XT_TARGET_HMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set
+# CONFIG_NETFILTER_XT_TARGET_LED is not set
+# CONFIG_NETFILTER_XT_TARGET_LOG is not set
+# CONFIG_NETFILTER_XT_TARGET_MARK is not set
+# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set
+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set
+# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+# CONFIG_NETFILTER_XT_TARGET_TEE is not set
+# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+# CONFIG_NETLABEL is not set
+# CONFIG_NETLINK_DIAG is not set
+# CONFIG_NETLINK_MMAP is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NETROM is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_NET_9P is not set
+# CONFIG_NET_ACT_BPF is not set
+# CONFIG_NET_ACT_CSUM is not set
+# CONFIG_NET_ACT_CT is not set
+# CONFIG_NET_ACT_GACT is not set
+# CONFIG_NET_ACT_GATE is not set
+# CONFIG_NET_ACT_IFE is not set
+# CONFIG_NET_ACT_IPT is not set
+# CONFIG_NET_ACT_MIRRED is not set
+# CONFIG_NET_ACT_MPLS is not set
+# CONFIG_NET_ACT_NAT is not set
+# CONFIG_NET_ACT_PEDIT is not set
+# CONFIG_NET_ACT_POLICE is not set
+# CONFIG_NET_ACT_SAMPLE is not set
+# CONFIG_NET_ACT_SIMP is not set
+# CONFIG_NET_ACT_SKBEDIT is not set
+# CONFIG_NET_ACT_SKBMOD is not set
+# CONFIG_NET_ACT_TUNNEL_KEY is not set
+# CONFIG_NET_ACT_VLAN is not set
+CONFIG_NET_CADENCE=y
+# CONFIG_NET_CALXEDA_XGMAC is not set
+CONFIG_NET_CLS=y
+# CONFIG_NET_CLS_ACT is not set
+# CONFIG_NET_CLS_BASIC is not set
+# CONFIG_NET_CLS_BPF is not set
+# CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_CLS_FLOWER is not set
+# CONFIG_NET_CLS_FW is not set
+CONFIG_NET_CLS_IND=y
+# CONFIG_NET_CLS_MATCHALL is not set
+# CONFIG_NET_CLS_ROUTE4 is not set
+# CONFIG_NET_CLS_RSVP is not set
+# CONFIG_NET_CLS_RSVP6 is not set
+# CONFIG_NET_CLS_TCINDEX is not set
+# CONFIG_NET_CLS_U32 is not set
+CONFIG_NET_CORE=y
+# CONFIG_NET_DEVLINK is not set
+# CONFIG_NET_DROP_MONITOR is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_NET_DSA_AR9331 is not set
+# CONFIG_NET_DSA_BCM_SF2 is not set
+# CONFIG_NET_DSA_LANTIQ_GSWIP is not set
+# CONFIG_NET_DSA_LEGACY is not set
+# CONFIG_NET_DSA_LOOP is not set
+# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set
+# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set
+# CONFIG_NET_DSA_MSCC_FELIX is not set
+# CONFIG_NET_DSA_MSCC_SEVILLE is not set
+# CONFIG_NET_DSA_MT7530 is not set
+# CONFIG_NET_DSA_MV88E6060 is not set
+# CONFIG_NET_DSA_MV88E6123_61_65 is not set
+# CONFIG_NET_DSA_MV88E6131 is not set
+# CONFIG_NET_DSA_MV88E6171 is not set
+# CONFIG_NET_DSA_MV88E6352 is not set
+# CONFIG_NET_DSA_MV88E6XXX is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+# CONFIG_NET_DSA_MV88E6XXX_PTP is not set
+# CONFIG_NET_DSA_QCA8K is not set
+# CONFIG_NET_DSA_REALTEK_SMI is not set
+# CONFIG_NET_DSA_SJA1105 is not set
+# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set
+# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set
+# CONFIG_NET_DSA_TAG_8021Q is not set
+# CONFIG_NET_DSA_TAG_AR9331 is not set
+# CONFIG_NET_DSA_TAG_BRCM is not set
+# CONFIG_NET_DSA_TAG_BRCM_LEGACY is not set
+# CONFIG_NET_DSA_TAG_BRCM_PREPEND is not set
+# CONFIG_NET_DSA_TAG_DSA is not set
+# CONFIG_NET_DSA_TAG_EDSA is not set
+# CONFIG_NET_DSA_TAG_GSWIP is not set
+# CONFIG_NET_DSA_TAG_HELLCREEK is not set
+# CONFIG_NET_DSA_TAG_KSZ is not set
+# CONFIG_NET_DSA_TAG_LAN9303 is not set
+# CONFIG_NET_DSA_TAG_MTK is not set
+# CONFIG_NET_DSA_TAG_OCELOT is not set
+# CONFIG_NET_DSA_TAG_OCELOT_8021Q is not set
+# CONFIG_NET_DSA_TAG_QCA is not set
+# CONFIG_NET_DSA_TAG_RTL4_A is not set
+# CONFIG_NET_DSA_TAG_SJA1105 is not set
+# CONFIG_NET_DSA_TAG_TRAILER is not set
+# CONFIG_NET_DSA_TAG_XRS700X is not set
+# CONFIG_NET_DSA_VITESSE_VSC73XX is not set
+# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set
+# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set
+# CONFIG_NET_DSA_XRS700X_I2C is not set
+# CONFIG_NET_DSA_XRS700X_MDIO is not set
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_EMATCH_CANID is not set
+# CONFIG_NET_EMATCH_CMP is not set
+# CONFIG_NET_EMATCH_IPT is not set
+# CONFIG_NET_EMATCH_META is not set
+# CONFIG_NET_EMATCH_NBYTE is not set
+CONFIG_NET_EMATCH_STACK=32
+# CONFIG_NET_EMATCH_TEXT is not set
+# CONFIG_NET_EMATCH_U32 is not set
+# CONFIG_NET_FAILOVER is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NET_FOU is not set
+# CONFIG_NET_FOU_IP_TUNNELS is not set
+# CONFIG_NET_IFE is not set
+# CONFIG_NET_IPGRE is not set
+CONFIG_NET_IPGRE_BROADCAST=y
+# CONFIG_NET_IPGRE_DEMUX is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPVTI is not set
+# CONFIG_NET_IP_TUNNEL is not set
+# CONFIG_NET_KEY is not set
+# CONFIG_NET_KEY_MIGRATE is not set
+# CONFIG_NET_L3_MASTER_DEV is not set
+# CONFIG_NET_MEDIATEK_STAR_EMAC is not set
+# CONFIG_NET_MPLS_GSO is not set
+# CONFIG_NET_NCSI is not set
+# CONFIG_NET_NSH is not set
+# CONFIG_NET_PACKET_ENGINE is not set
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_NET_PTP_CLASSIFY is not set
+CONFIG_NET_RX_BUSY_POLL=y
+# CONFIG_NET_SB1000 is not set
+CONFIG_NET_SCHED=y
+# CONFIG_NET_SCH_ATM is not set
+# CONFIG_NET_SCH_CAKE is not set
+# CONFIG_NET_SCH_CBQ is not set
+# CONFIG_NET_SCH_CBS is not set
+# CONFIG_NET_SCH_CHOKE is not set
+# CONFIG_NET_SCH_CODEL is not set
+CONFIG_NET_SCH_DEFAULT=y
+# CONFIG_NET_SCH_DRR is not set
+# CONFIG_NET_SCH_DSMARK is not set
+# CONFIG_NET_SCH_ETF is not set
+# CONFIG_NET_SCH_ETS is not set
+CONFIG_NET_SCH_FIFO=y
+# CONFIG_NET_SCH_FQ is not set
+CONFIG_NET_SCH_FQ_CODEL=y
+# CONFIG_NET_SCH_FQ_PIE is not set
+# CONFIG_NET_SCH_GRED is not set
+# CONFIG_NET_SCH_HFSC is not set
+# CONFIG_NET_SCH_HHF is not set
+# CONFIG_NET_SCH_HTB is not set
+# CONFIG_NET_SCH_INGRESS is not set
+# CONFIG_NET_SCH_MQPRIO is not set
+# CONFIG_NET_SCH_MULTIQ is not set
+# CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_PIE is not set
+# CONFIG_NET_SCH_PLUG is not set
+# CONFIG_NET_SCH_PRIO is not set
+# CONFIG_NET_SCH_QFQ is not set
+# CONFIG_NET_SCH_RED is not set
+# CONFIG_NET_SCH_SFB is not set
+# CONFIG_NET_SCH_SFQ is not set
+# CONFIG_NET_SCH_SKBPRIO is not set
+# CONFIG_NET_SCH_TAPRIO is not set
+# CONFIG_NET_SCH_TBF is not set
+# CONFIG_NET_SCH_TEQL is not set
+# CONFIG_NET_SCTPPROBE is not set
+# CONFIG_NET_SELFTESTS is not set
+CONFIG_NET_SOCK_MSG=y
+# CONFIG_NET_SWITCHDEV is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_NET_TC_SKB_EXT is not set
+# CONFIG_NET_TEAM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_NET_UDP_TUNNEL is not set
+CONFIG_NET_VENDOR_3COM=y
+CONFIG_NET_VENDOR_8390=y
+CONFIG_NET_VENDOR_ADAPTEC=y
+CONFIG_NET_VENDOR_AGERE=y
+CONFIG_NET_VENDOR_ALACRITECH=y
+CONFIG_NET_VENDOR_ALTEON=y
+CONFIG_NET_VENDOR_AMAZON=y
+CONFIG_NET_VENDOR_AMD=y
+CONFIG_NET_VENDOR_AQUANTIA=y
+CONFIG_NET_VENDOR_ARC=y
+CONFIG_NET_VENDOR_ATHEROS=y
+CONFIG_NET_VENDOR_AURORA=y
+CONFIG_NET_VENDOR_BROADCOM=y
+CONFIG_NET_VENDOR_BROCADE=y
+CONFIG_NET_VENDOR_CADENCE=y
+CONFIG_NET_VENDOR_CAVIUM=y
+CONFIG_NET_VENDOR_CHELSIO=y
+CONFIG_NET_VENDOR_CIRRUS=y
+CONFIG_NET_VENDOR_CISCO=y
+CONFIG_NET_VENDOR_CORTINA=y
+CONFIG_NET_VENDOR_DEC=y
+CONFIG_NET_VENDOR_DLINK=y
+CONFIG_NET_VENDOR_EMULEX=y
+CONFIG_NET_VENDOR_EXAR=y
+CONFIG_NET_VENDOR_EZCHIP=y
+CONFIG_NET_VENDOR_FARADAY=y
+CONFIG_NET_VENDOR_FREESCALE=y
+CONFIG_NET_VENDOR_FUJITSU=y
+CONFIG_NET_VENDOR_GOOGLE=y
+CONFIG_NET_VENDOR_HISILICON=y
+CONFIG_NET_VENDOR_HP=y
+CONFIG_NET_VENDOR_HUAWEI=y
+CONFIG_NET_VENDOR_I825XX=y
+CONFIG_NET_VENDOR_IBM=y
+CONFIG_NET_VENDOR_INTEL=y
+# CONFIG_NET_VENDOR_LITEX is not set
+CONFIG_NET_VENDOR_MARVELL=y
+CONFIG_NET_VENDOR_MELLANOX=y
+CONFIG_NET_VENDOR_MICREL=y
+CONFIG_NET_VENDOR_MICROCHIP=y
+CONFIG_NET_VENDOR_MICROSEMI=y
+# CONFIG_NET_VENDOR_MICROSOFT is not set
+CONFIG_NET_VENDOR_MYRI=y
+CONFIG_NET_VENDOR_NATSEMI=y
+CONFIG_NET_VENDOR_NETERION=y
+CONFIG_NET_VENDOR_NETRONOME=y
+CONFIG_NET_VENDOR_NI=y
+CONFIG_NET_VENDOR_NVIDIA=y
+CONFIG_NET_VENDOR_OKI=y
+CONFIG_NET_VENDOR_PACKET_ENGINES=y
+CONFIG_NET_VENDOR_PENSANDO=y
+CONFIG_NET_VENDOR_QLOGIC=y
+CONFIG_NET_VENDOR_QUALCOMM=y
+CONFIG_NET_VENDOR_RDC=y
+CONFIG_NET_VENDOR_REALTEK=y
+CONFIG_NET_VENDOR_RENESAS=y
+CONFIG_NET_VENDOR_ROCKER=y
+CONFIG_NET_VENDOR_SAMSUNG=y
+CONFIG_NET_VENDOR_SEEQ=y
+CONFIG_NET_VENDOR_SILAN=y
+CONFIG_NET_VENDOR_SIS=y
+CONFIG_NET_VENDOR_SMSC=y
+CONFIG_NET_VENDOR_SOCIONEXT=y
+CONFIG_NET_VENDOR_SOLARFLARE=y
+CONFIG_NET_VENDOR_STMICRO=y
+CONFIG_NET_VENDOR_SUN=y
+CONFIG_NET_VENDOR_SYNOPSYS=y
+CONFIG_NET_VENDOR_TEHUTI=y
+CONFIG_NET_VENDOR_TI=y
+CONFIG_NET_VENDOR_TOSHIBA=y
+CONFIG_NET_VENDOR_VIA=y
+CONFIG_NET_VENDOR_WIZNET=y
+CONFIG_NET_VENDOR_XILINX=y
+CONFIG_NET_VENDOR_XIRCOM=y
+# CONFIG_NET_VRF is not set
+# CONFIG_NET_XGENE is not set
+CONFIG_NEW_LEDS=y
+# CONFIG_NFC is not set
+# CONFIG_NFP is not set
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V2_ACL is not set
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+# CONFIG_NFS_ACL_SUPPORT is not set
+CONFIG_NFS_COMMON=y
+# CONFIG_NFS_DISABLE_UDP_SUPPORT is not set
+# CONFIG_NFS_FS is not set
+# CONFIG_NFS_FSCACHE is not set
+# CONFIG_NFS_SWAP is not set
+# CONFIG_NFS_V2 is not set
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_V4_1 is not set
+# CONFIG_NFTL is not set
+# CONFIG_NFT_BRIDGE_META is not set
+# CONFIG_NFT_BRIDGE_REJECT is not set
+# CONFIG_NFT_CONNLIMIT is not set
+# CONFIG_NFT_DUP_IPV4 is not set
+# CONFIG_NFT_DUP_IPV6 is not set
+# CONFIG_NFT_FIB_IPV4 is not set
+# CONFIG_NFT_FIB_IPV6 is not set
+# CONFIG_NFT_FIB_NETDEV is not set
+# CONFIG_NFT_FLOW_OFFLOAD is not set
+# CONFIG_NFT_OBJREF is not set
+# CONFIG_NFT_OSF is not set
+# CONFIG_NFT_REJECT_NETDEV is not set
+# CONFIG_NFT_RT is not set
+# CONFIG_NFT_SET_BITMAP is not set
+# CONFIG_NFT_SOCKET is not set
+# CONFIG_NFT_SYNPROXY is not set
+# CONFIG_NFT_TPROXY is not set
+# CONFIG_NFT_TUNNEL is not set
+# CONFIG_NFT_XFRM is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NF_CONNTRACK_AMANDA is not set
+# CONFIG_NF_CONNTRACK_BRIDGE is not set
+# CONFIG_NF_CONNTRACK_EVENTS is not set
+# CONFIG_NF_CONNTRACK_FTP is not set
+# CONFIG_NF_CONNTRACK_H323 is not set
+# CONFIG_NF_CONNTRACK_IRC is not set
+# CONFIG_NF_CONNTRACK_LABELS is not set
+# CONFIG_NF_CONNTRACK_MARK is not set
+# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
+# CONFIG_NF_CONNTRACK_PPTP is not set
+CONFIG_NF_CONNTRACK_PROCFS=y
+# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
+# CONFIG_NF_CONNTRACK_SANE is not set
+# CONFIG_NF_CONNTRACK_SECMARK is not set
+# CONFIG_NF_CONNTRACK_SIP is not set
+# CONFIG_NF_CONNTRACK_SNMP is not set
+# CONFIG_NF_CONNTRACK_TFTP is not set
+# CONFIG_NF_CONNTRACK_TIMEOUT is not set
+# CONFIG_NF_CONNTRACK_TIMESTAMP is not set
+# CONFIG_NF_CONNTRACK_ZONES is not set
+# CONFIG_NF_CT_NETLINK is not set
+# CONFIG_NF_CT_NETLINK_HELPER is not set
+# CONFIG_NF_CT_NETLINK_TIMEOUT is not set
+# CONFIG_NF_CT_PROTO_DCCP is not set
+# CONFIG_NF_CT_PROTO_GRE is not set
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+# CONFIG_NF_DEFRAG_IPV4 is not set
+# CONFIG_NF_DUP_IPV4 is not set
+# CONFIG_NF_DUP_IPV6 is not set
+# CONFIG_NF_FLOW_TABLE is not set
+# CONFIG_NF_LOG_ARP is not set
+# CONFIG_NF_LOG_BRIDGE is not set
+# CONFIG_NF_LOG_IPV4 is not set
+# CONFIG_NF_LOG_NETDEV is not set
+# CONFIG_NF_LOG_SYSLOG is not set
+# CONFIG_NF_NAT is not set
+# CONFIG_NF_NAT_AMANDA is not set
+# CONFIG_NF_NAT_FTP is not set
+# CONFIG_NF_NAT_H323 is not set
+# CONFIG_NF_NAT_IRC is not set
+# CONFIG_NF_NAT_NEEDED is not set
+# CONFIG_NF_NAT_PPTP is not set
+# CONFIG_NF_NAT_PROTO_GRE is not set
+# CONFIG_NF_NAT_SIP is not set
+# CONFIG_NF_NAT_SNMP_BASIC is not set
+# CONFIG_NF_NAT_TFTP is not set
+# CONFIG_NF_REJECT_IPV4 is not set
+# CONFIG_NF_REJECT_IPV6 is not set
+# CONFIG_NF_SOCKET_IPV4 is not set
+# CONFIG_NF_SOCKET_IPV6 is not set
+# CONFIG_NF_TABLES is not set
+CONFIG_NF_TABLES_ARP=y
+CONFIG_NF_TABLES_BRIDGE=y
+CONFIG_NF_TABLES_INET=y
+CONFIG_NF_TABLES_IPV4=y
+CONFIG_NF_TABLES_IPV6=y
+CONFIG_NF_TABLES_NETDEV=y
+# CONFIG_NF_TABLES_SET is not set
+# CONFIG_NF_TPROXY_IPV4 is not set
+# CONFIG_NF_TPROXY_IPV6 is not set
+# CONFIG_NI65 is not set
+# CONFIG_NI903X_WDT is not set
+# CONFIG_NIC7018_WDT is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_NIU is not set
+# CONFIG_NI_XGE_MANAGEMENT_ENET is not set
+CONFIG_NLATTR=y
+# CONFIG_NLMON is not set
+# CONFIG_NLM_XLP_BOARD is not set
+# CONFIG_NLM_XLR_BOARD is not set
+# CONFIG_NLS is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_MAC_CELTIC is not set
+# CONFIG_NLS_MAC_CENTEURO is not set
+# CONFIG_NLS_MAC_CROATIAN is not set
+# CONFIG_NLS_MAC_CYRILLIC is not set
+# CONFIG_NLS_MAC_GAELIC is not set
+# CONFIG_NLS_MAC_GREEK is not set
+# CONFIG_NLS_MAC_ICELAND is not set
+# CONFIG_NLS_MAC_INUIT is not set
+# CONFIG_NLS_MAC_ROMAN is not set
+# CONFIG_NLS_MAC_ROMANIAN is not set
+# CONFIG_NLS_MAC_TURKISH is not set
+# CONFIG_NLS_UTF8 is not set
+CONFIG_NMI_LOG_BUF_SHIFT=13
+# CONFIG_NOA1305 is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_NORTEL_HERMES is not set
+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
+# CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT is not set
+# CONFIG_NOZOMI is not set
+# CONFIG_NO_BOOTMEM is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_NO_HZ_FULL is not set
+# CONFIG_NO_HZ_IDLE is not set
+# CONFIG_NS83820 is not set
+# CONFIG_NTB is not set
+# CONFIG_NTFS3_64BIT_CLUSTER is not set
+# CONFIG_NTFS3_FS is not set
+# CONFIG_NTFS3_FS_POSIX_ACL is not set
+# CONFIG_NTFS3_LZX_XPRESS is not set
+# CONFIG_NTFS_DEBUG is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_NTP_PPS is not set
+# CONFIG_NULL_TTY is not set
+# CONFIG_NUMA is not set
+# CONFIG_NVIDIA_CARMEL_CNP_ERRATUM is not set
+# CONFIG_NVM is not set
+# CONFIG_NVMEM is not set
+# CONFIG_NVMEM_BCM_OCOTP is not set
+# CONFIG_NVMEM_IMX_OCOTP is not set
+# CONFIG_NVMEM_REBOOT_MODE is not set
+# CONFIG_NVMEM_RMEM is not set
+# CONFIG_NVMEM_SYSFS is not set
+# CONFIG_NVME_FC is not set
+# CONFIG_NVME_TARGET is not set
+# CONFIG_NVME_TCP is not set
+# CONFIG_NVRAM is not set
+# CONFIG_NV_TCO is not set
+# CONFIG_NXP_C45_TJA11XX_PHY is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_NXP_TJA11XX_PHY is not set
+# CONFIG_N_GSM is not set
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_OBS600 is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_OCTEONTX2_AF is not set
+# CONFIG_OCTEONTX2_PF is not set
+# CONFIG_OF_OVERLAY is not set
+CONFIG_OF_RESERVED_MEM=y
+# CONFIG_OF_UNITTEST is not set
+# CONFIG_OID_REGISTRY is not set
+# CONFIG_OMAP2_DSS_DEBUG is not set
+# CONFIG_OMAP2_DSS_DEBUGFS is not set
+# CONFIG_OMAP2_DSS_SDI is not set
+# CONFIG_OMAP_OCP2SCP is not set
+# CONFIG_OMAP_USB2 is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_OPENVSWITCH is not set
+# CONFIG_OPROFILE is not set
+# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set
+# CONFIG_OPT3001 is not set
+CONFIG_OPTIMIZE_INLINING=y
+# CONFIG_ORANGEFS_FS is not set
+# CONFIG_ORION_WATCHDOG is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_OSNOISE_TRACER is not set
+CONFIG_OVERLAY_FS=y
+# CONFIG_OVERLAY_FS_INDEX is not set
+# CONFIG_OVERLAY_FS_METACOPY is not set
+CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
+# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set
+CONFIG_OVERLAY_FS_XINO_AUTO=y
+# CONFIG_OWL_LOADER is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_PA12203001 is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_DIAG is not set
+# CONFIG_PACKING is not set
+# CONFIG_PAGE_EXTENSION is not set
+# CONFIG_PAGE_OWNER is not set
+# CONFIG_PAGE_POISONING is not set
+# CONFIG_PAGE_REPORTING is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_32KB is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PALMAS_GPADC is not set
+# CONFIG_PANASONIC_LAPTOP is not set
+# CONFIG_PANEL is not set
+CONFIG_PANIC_ON_OOPS=y
+CONFIG_PANIC_ON_OOPS_VALUE=1
+CONFIG_PANIC_TIMEOUT=1
+# CONFIG_PANTHERLORD_FF is not set
+# CONFIG_PARAVIRT is not set
+# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
+# CONFIG_PARPORT is not set
+# CONFIG_PARPORT_1284 is not set
+# CONFIG_PARPORT_AX88796 is not set
+# CONFIG_PARPORT_GSC is not set
+# CONFIG_PARPORT_PC is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARASAN_CF is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_ATP867X is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CS5535 is not set
+# CONFIG_PATA_CS5536 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IMX is not set
+# CONFIG_PATA_ISAPNP is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_LEGACY is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OCTEON_CF is not set
+# CONFIG_PATA_OF_PLATFORM is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PCMCIA is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_QDI is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_TOSHIBA is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_WINBOND_VLB is not set
+# CONFIG_PC104 is not set
+# CONFIG_PC300TOO is not set
+# CONFIG_PCCARD is not set
+# CONFIG_PCH_DMA is not set
+# CONFIG_PCH_GBE is not set
+# CONFIG_PCH_PHUB is not set
+# CONFIG_PCI is not set
+# CONFIG_PCI200SYN is not set
+# CONFIG_PCIEAER is not set
+# CONFIG_PCIEAER_INJECT is not set
+# CONFIG_PCIEASPM is not set
+# CONFIG_PCIEPORTBUS is not set
+# CONFIG_PCIE_AL is not set
+# CONFIG_PCIE_ALTERA is not set
+# CONFIG_PCIE_ARMADA_8K is not set
+CONFIG_PCIE_BUS_DEFAULT=y
+# CONFIG_PCIE_BUS_PEER2PEER is not set
+# CONFIG_PCIE_BUS_PERFORMANCE is not set
+# CONFIG_PCIE_BUS_SAFE is not set
+# CONFIG_PCIE_BUS_TUNE_OFF is not set
+# CONFIG_PCIE_BW is not set
+# CONFIG_PCIE_CADENCE_HOST is not set
+# CONFIG_PCIE_CADENCE_PLAT_HOST is not set
+# CONFIG_PCIE_DPC is not set
+# CONFIG_PCIE_DW_PLAT is not set
+# CONFIG_PCIE_DW_PLAT_HOST is not set
+# CONFIG_PCIE_ECRC is not set
+# CONFIG_PCIE_IPROC is not set
+# CONFIG_PCIE_KIRIN is not set
+# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
+# CONFIG_PCIE_MEDIATEK_GEN3 is not set
+# CONFIG_PCIE_MICROCHIP_HOST is not set
+# CONFIG_PCIE_PTM is not set
+# CONFIG_PCIE_XILINX is not set
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_PCI_ATMEL is not set
+# CONFIG_PCI_CNB20LE_QUIRK is not set
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_DISABLE_COMMON_QUIRKS is not set
+# CONFIG_PCI_ENDPOINT is not set
+# CONFIG_PCI_ENDPOINT_TEST is not set
+# CONFIG_PCI_FTPCI100 is not set
+# CONFIG_PCI_HERMES is not set
+# CONFIG_PCI_HISI is not set
+# CONFIG_PCI_HOST_GENERIC is not set
+# CONFIG_PCI_HOST_THUNDER_ECAM is not set
+# CONFIG_PCI_HOST_THUNDER_PEM is not set
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCI_J721E_HOST is not set
+# CONFIG_PCI_LAYERSCAPE is not set
+# CONFIG_PCI_MESON is not set
+# CONFIG_PCI_MSI is not set
+# CONFIG_PCI_PASID is not set
+# CONFIG_PCI_PF_STUB is not set
+# CONFIG_PCI_PRI is not set
+CONFIG_PCI_QUIRKS=y
+# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_SW_SWITCHTEC is not set
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCI_V3_SEMI is not set
+# CONFIG_PCI_XGENE is not set
+# CONFIG_PCMCIA is not set
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_3C589 is not set
+# CONFIG_PCMCIA_AHA152X is not set
+# CONFIG_PCMCIA_ATMEL is not set
+# CONFIG_PCMCIA_AXNET is not set
+# CONFIG_PCMCIA_DEBUG is not set
+# CONFIG_PCMCIA_FDOMAIN is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_HERMES is not set
+# CONFIG_PCMCIA_LOAD_CIS is not set
+# CONFIG_PCMCIA_NINJA_SCSI is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_QLOGIC is not set
+# CONFIG_PCMCIA_RAYCS is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_SPECTRUM is not set
+# CONFIG_PCMCIA_SYM53C500 is not set
+# CONFIG_PCMCIA_WL3501 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_XIRCOM is not set
+# CONFIG_PCNET32 is not set
+# CONFIG_PCPU_DEV_REFCNT is not set
+# CONFIG_PCSPKR_PLATFORM is not set
+# CONFIG_PCS_XPCS is not set
+# CONFIG_PD6729 is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_PERCPU_STATS is not set
+# CONFIG_PERCPU_TEST is not set
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_EVENTS_AMD_POWER is not set
+# CONFIG_PERSISTENT_KEYRINGS is not set
+# CONFIG_PHANTOM is not set
+# CONFIG_PHONET is not set
+# CONFIG_PHYLIB is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+# CONFIG_PHY_CADENCE_DP is not set
+# CONFIG_PHY_CADENCE_DPHY is not set
+# CONFIG_PHY_CADENCE_SALVO is not set
+# CONFIG_PHY_CADENCE_SIERRA is not set
+# CONFIG_PHY_CADENCE_TORRENT is not set
+# CONFIG_PHY_CAN_TRANSCEIVER is not set
+# CONFIG_PHY_CPCAP_USB is not set
+# CONFIG_PHY_EXYNOS_DP_VIDEO is not set
+# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set
+# CONFIG_PHY_FSL_IMX8MQ_USB is not set
+# CONFIG_PHY_INGENIC_USB is not set
+# CONFIG_PHY_INTEL_KEEMBAY_EMMC is not set
+# CONFIG_PHY_MAPPHONE_MDM6600 is not set
+# CONFIG_PHY_MIXEL_MIPI_DPHY is not set
+# CONFIG_PHY_MTK_HDMI is not set
+# CONFIG_PHY_MTK_MIPI_DSI is not set
+# CONFIG_PHY_MVEBU_CP110_UTMI is not set
+# CONFIG_PHY_OCELOT_SERDES is not set
+# CONFIG_PHY_PISTACHIO_USB is not set
+# CONFIG_PHY_PXA_28NM_HSIC is not set
+# CONFIG_PHY_PXA_28NM_USB2 is not set
+# CONFIG_PHY_QCOM_DWC3 is not set
+# CONFIG_PHY_QCOM_USB_HS is not set
+# CONFIG_PHY_QCOM_USB_HSIC is not set
+# CONFIG_PHY_SAMSUNG_USB2 is not set
+# CONFIG_PHY_TUSB1210 is not set
+# CONFIG_PHY_XGENE is not set
+# CONFIG_PI433 is not set
+# CONFIG_PID_IN_CONTEXTIDR is not set
+# CONFIG_PID_NS is not set
+CONFIG_PINCONF=y
+# CONFIG_PINCTRL is not set
+# CONFIG_PINCTRL_AMD is not set
+# CONFIG_PINCTRL_AXP209 is not set
+# CONFIG_PINCTRL_CEDARFORK is not set
+# CONFIG_PINCTRL_EXYNOS is not set
+# CONFIG_PINCTRL_EXYNOS5440 is not set
+# CONFIG_PINCTRL_ICELAKE is not set
+# CONFIG_PINCTRL_INGENIC is not set
+# CONFIG_PINCTRL_LPASS_LPI is not set
+# CONFIG_PINCTRL_MCP23S08 is not set
+# CONFIG_PINCTRL_MDM9607 is not set
+# CONFIG_PINCTRL_MICROCHIP_SGPIO is not set
+# CONFIG_PINCTRL_MSM8953 is not set
+# CONFIG_PINCTRL_MSM8X74 is not set
+# CONFIG_PINCTRL_MT6779 is not set
+# CONFIG_PINCTRL_MT8167 is not set
+# CONFIG_PINCTRL_MT8192 is not set
+# CONFIG_PINCTRL_MT8195 is not set
+# CONFIG_PINCTRL_MT8365 is not set
+# CONFIG_PINCTRL_MTK_V2 is not set
+# CONFIG_PINCTRL_OCELOT is not set
+# CONFIG_PINCTRL_PISTACHIO is not set
+# CONFIG_PINCTRL_SC7280 is not set
+# CONFIG_PINCTRL_SC8180X is not set
+# CONFIG_PINCTRL_SDX55 is not set
+CONFIG_PINCTRL_SINGLE=y
+# CONFIG_PINCTRL_SM6115 is not set
+# CONFIG_PINCTRL_SM6125 is not set
+# CONFIG_PINCTRL_SM8350 is not set
+# CONFIG_PINCTRL_STMFX is not set
+# CONFIG_PINCTRL_SX150X is not set
+# CONFIG_PING is not set
+CONFIG_PINMUX=y
+# CONFIG_PKCS7_MESSAGE_PARSER is not set
+# CONFIG_PL310_ERRATA_588369 is not set
+# CONFIG_PL310_ERRATA_727915 is not set
+# CONFIG_PL310_ERRATA_753970 is not set
+# CONFIG_PL310_ERRATA_769419 is not set
+# CONFIG_PL320_MBOX is not set
+# CONFIG_PL330_DMA is not set
+# CONFIG_PLATFORM_MHU is not set
+# CONFIG_PLAT_SPEAR is not set
+# CONFIG_PLIP is not set
+# CONFIG_PLX_DMA is not set
+# CONFIG_PLX_HERMES is not set
+# CONFIG_PM is not set
+# CONFIG_PMBUS is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMS7003 is not set
+# CONFIG_PM_AUTOSLEEP is not set
+# CONFIG_PM_DEBUG is not set
+# CONFIG_PM_DEVFREQ is not set
+# CONFIG_PM_WAKELOCKS is not set
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_POSIX_TIMERS=y
+# CONFIG_POWERCAP is not set
+# CONFIG_POWER_AVS is not set
+# CONFIG_POWER_RESET is not set
+# CONFIG_POWER_RESET_BRCMKONA is not set
+# CONFIG_POWER_RESET_BRCMSTB is not set
+# CONFIG_POWER_RESET_GPIO is not set
+# CONFIG_POWER_RESET_GPIO_RESTART is not set
+# CONFIG_POWER_RESET_LINKSTATION is not set
+# CONFIG_POWER_RESET_LTC2952 is not set
+# CONFIG_POWER_RESET_PIIX4_POWEROFF is not set
+# CONFIG_POWER_RESET_QNAP is not set
+# CONFIG_POWER_RESET_REGULATOR is not set
+# CONFIG_POWER_RESET_RESTART is not set
+# CONFIG_POWER_RESET_SYSCON is not set
+# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
+# CONFIG_POWER_RESET_VERSATILE is not set
+# CONFIG_POWER_RESET_XGENE is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_POWER_SUPPLY_HWMON is not set
+# CONFIG_PPC4xx_GPIO is not set
+# CONFIG_PPC_16K_PAGES is not set
+# CONFIG_PPC_256K_PAGES is not set
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_64K_PAGES is not set
+# CONFIG_PPC_DISABLE_WERROR is not set
+# CONFIG_PPC_EMULATED_STATS is not set
+# CONFIG_PPC_EPAPR_HV_BYTECHAN is not set
+# CONFIG_PPP is not set
+# CONFIG_PPPOATM is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_PPP_ASYNC is not set
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_DEFLATE is not set
+CONFIG_PPP_FILTER=y
+# CONFIG_PPP_MPPE is not set
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_SYNC_TTY is not set
+# CONFIG_PPS is not set
+# CONFIG_PPS_CLIENT_GPIO is not set
+# CONFIG_PPS_CLIENT_KTIMER is not set
+# CONFIG_PPS_CLIENT_LDISC is not set
+# CONFIG_PPS_CLIENT_PARPORT is not set
+# CONFIG_PPS_DEBUG is not set
+# CONFIG_PPTP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
+# CONFIG_PREEMPTIRQ_EVENTS is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PRESTERA is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_PRIME_NUMBERS is not set
+CONFIG_PRINTK=y
+# CONFIG_PRINTK_CALLER is not set
+# CONFIG_PRINTK_INDEX is not set
+CONFIG_PRINTK_NMI=y
+CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
+# CONFIG_PRINTK_TIME is not set
+CONFIG_PRINT_STACK_DEPTH=64
+# CONFIG_PRISM2_USB is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_PROC_CHILDREN is not set
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+# CONFIG_PROC_PAGE_MONITOR is not set
+# CONFIG_PROC_STRIPPED is not set
+CONFIG_PROC_SYSCTL=y
+# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILING is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_PROVE_RAW_LOCK_NESTING is not set
+# CONFIG_PROVE_RCU is not set
+# CONFIG_PROVE_RCU_LIST is not set
+# CONFIG_PROVE_RCU_REPEATEDLY is not set
+# CONFIG_PSAMPLE is not set
+# CONFIG_PSB6970_PHY is not set
+# CONFIG_PSI is not set
+# CONFIG_PSTORE is not set
+# CONFIG_PSTORE_842_COMPRESS is not set
+# CONFIG_PSTORE_BLK is not set
+# CONFIG_PSTORE_COMPRESS is not set
+# CONFIG_PSTORE_CONSOLE is not set
+CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240
+# CONFIG_PSTORE_DEFLATE_COMPRESS is not set
+# CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT is not set
+# CONFIG_PSTORE_FTRACE is not set
+# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
+# CONFIG_PSTORE_LZ4_COMPRESS is not set
+# CONFIG_PSTORE_LZO_COMPRESS is not set
+# CONFIG_PSTORE_PMSG is not set
+# CONFIG_PSTORE_RAM is not set
+# CONFIG_PSTORE_ZSTD_COMPRESS is not set
+# CONFIG_PTDUMP_DEBUGFS is not set
+# CONFIG_PTP_1588_CLOCK is not set
+# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set
+# CONFIG_PTP_1588_CLOCK_IDTCM is not set
+# CONFIG_PTP_1588_CLOCK_IXP46X is not set
+# CONFIG_PTP_1588_CLOCK_KVM is not set
+# CONFIG_PTP_1588_CLOCK_OCP is not set
+# CONFIG_PTP_1588_CLOCK_PCH is not set
+# CONFIG_PTP_1588_CLOCK_VMW is not set
+# CONFIG_PUBLIC_KEY_ALGO_RSA is not set
+# CONFIG_PVPANIC is not set
+# CONFIG_PWM is not set
+# CONFIG_PWM_ATMEL_TCB is not set
+# CONFIG_PWM_DEBUG is not set
+# CONFIG_PWM_DWC is not set
+# CONFIG_PWM_FSL_FTM is not set
+# CONFIG_PWM_JZ4740 is not set
+# CONFIG_PWM_PCA9685 is not set
+# CONFIG_PWM_RASPBERRYPI_POE is not set
+CONFIG_PWRSEQ_EMMC=y
+# CONFIG_PWRSEQ_SD8787 is not set
+CONFIG_PWRSEQ_SIMPLE=y
+# CONFIG_QCA7000 is not set
+# CONFIG_QCA7000_SPI is not set
+# CONFIG_QCA7000_UART is not set
+# CONFIG_QCOM_A7PLL is not set
+# CONFIG_QCOM_EMAC is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set
+# CONFIG_QCOM_GPI_DMA is not set
+# CONFIG_QCOM_HIDMA is not set
+# CONFIG_QCOM_HIDMA_MGMT is not set
+# CONFIG_QCOM_LMH is not set
+# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
+# CONFIG_QCOM_SPMI_ADC5 is not set
+# CONFIG_QCOM_SPMI_ADC_TM5 is not set
+# CONFIG_QCOM_SPMI_IADC is not set
+# CONFIG_QCOM_SPMI_TEMP_ALARM is not set
+# CONFIG_QCOM_SPMI_VADC is not set
+# CONFIG_QED is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_QLCNIC is not set
+# CONFIG_QLGE is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_QORIQ_CPUFREQ is not set
+# CONFIG_QORIQ_THERMAL is not set
+# CONFIG_QRTR is not set
+# CONFIG_QRTR_MHI is not set
+# CONFIG_QRTR_TUN is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_QUEUED_LOCK_STAT is not set
+# CONFIG_QUICC_ENGINE is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+# CONFIG_QUOTA_DEBUG is not set
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+# CONFIG_R3964 is not set
+# CONFIG_R6040 is not set
+# CONFIG_R8169 is not set
+# CONFIG_R8188EU is not set
+# CONFIG_R8712U is not set
+# CONFIG_R8723AU is not set
+# CONFIG_RADIO_ADAPTERS is not set
+# CONFIG_RADIO_AZTECH is not set
+# CONFIG_RADIO_CADET is not set
+# CONFIG_RADIO_GEMTEK is not set
+# CONFIG_RADIO_MAXIRADIO is not set
+# CONFIG_RADIO_RTRACK is not set
+# CONFIG_RADIO_RTRACK2 is not set
+# CONFIG_RADIO_SF16FMI is not set
+# CONFIG_RADIO_SF16FMR2 is not set
+# CONFIG_RADIO_TERRATEC is not set
+# CONFIG_RADIO_TRUST is not set
+# CONFIG_RADIO_TYPHOON is not set
+# CONFIG_RADIO_ZOLTRIX is not set
+# CONFIG_RAID6_PQ_BENCHMARK is not set
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_RALINK is not set
+# CONFIG_RANDOM32_SELFTEST is not set
+# CONFIG_RANDOMIZE_BASE is not set
+# CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set
+# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
+# CONFIG_RANDOM_TRUST_CPU is not set
+# CONFIG_RAPIDIO is not set
+# CONFIG_RAS is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_RCU_BOOST is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+# CONFIG_RCU_EQS_DEBUG is not set
+# CONFIG_RCU_EXPEDITE_BOOT is not set
+# CONFIG_RCU_EXPERT is not set
+CONFIG_RCU_KTHREAD_PRIO=0
+CONFIG_RCU_NEED_SEGCBLIST=y
+# CONFIG_RCU_PERF_TEST is not set
+# CONFIG_RCU_REF_SCALE_TEST is not set
+# CONFIG_RCU_SCALE_TEST is not set
+CONFIG_RCU_STALL_COMMON=y
+# CONFIG_RCU_STRICT_GRACE_PERIOD is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY=3
+# CONFIG_RCU_TRACE is not set
+# CONFIG_RC_ATI_REMOTE is not set
+# CONFIG_RC_CORE is not set
+# CONFIG_RC_DECODERS is not set
+# CONFIG_RC_LOOPBACK is not set
+# CONFIG_RC_MAP is not set
+# CONFIG_RDS is not set
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_LZ4 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_ZSTD is not set
+# CONFIG_READABLE_ASM is not set
+# CONFIG_READ_ONLY_THP_FOR_FS is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_REDWOOD is not set
+# CONFIG_REED_SOLOMON is not set
+# CONFIG_REED_SOLOMON_DEC8 is not set
+# CONFIG_REED_SOLOMON_ENC8 is not set
+# CONFIG_REED_SOLOMON_TEST is not set
+# CONFIG_REGMAP is not set
+# CONFIG_REGMAP_I2C is not set
+# CONFIG_REGMAP_MMIO is not set
+# CONFIG_REGMAP_SPI is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_88PG86X is not set
+# CONFIG_REGULATOR_ACT8865 is not set
+# CONFIG_REGULATOR_AD5398 is not set
+# CONFIG_REGULATOR_ANATOP is not set
+# CONFIG_REGULATOR_DA9121 is not set
+# CONFIG_REGULATOR_DA9210 is not set
+# CONFIG_REGULATOR_DA9211 is not set
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_FAN53555 is not set
+# CONFIG_REGULATOR_FAN53880 is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_GPIO is not set
+# CONFIG_REGULATOR_ISL6271A is not set
+# CONFIG_REGULATOR_ISL9305 is not set
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_LP3972 is not set
+# CONFIG_REGULATOR_LP872X is not set
+# CONFIG_REGULATOR_LP8755 is not set
+# CONFIG_REGULATOR_LTC3589 is not set
+# CONFIG_REGULATOR_LTC3676 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX77620 is not set
+# CONFIG_REGULATOR_MAX77826 is not set
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_MAX8893 is not set
+# CONFIG_REGULATOR_MAX8952 is not set
+# CONFIG_REGULATOR_MAX8973 is not set
+# CONFIG_REGULATOR_MCP16502 is not set
+# CONFIG_REGULATOR_MP5416 is not set
+# CONFIG_REGULATOR_MP8859 is not set
+# CONFIG_REGULATOR_MP886X is not set
+# CONFIG_REGULATOR_MPQ7920 is not set
+# CONFIG_REGULATOR_MT6311 is not set
+# CONFIG_REGULATOR_MT6315 is not set
+# CONFIG_REGULATOR_MT6359 is not set
+# CONFIG_REGULATOR_PCA9450 is not set
+# CONFIG_REGULATOR_PF8X00 is not set
+# CONFIG_REGULATOR_PFUZE100 is not set
+# CONFIG_REGULATOR_PV88060 is not set
+# CONFIG_REGULATOR_PV88080 is not set
+# CONFIG_REGULATOR_PV88090 is not set
+# CONFIG_REGULATOR_PWM is not set
+# CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY is not set
+# CONFIG_REGULATOR_RT4801 is not set
+# CONFIG_REGULATOR_RT6160 is not set
+# CONFIG_REGULATOR_RT6245 is not set
+# CONFIG_REGULATOR_RTMV20 is not set
+# CONFIG_REGULATOR_RTQ2134 is not set
+# CONFIG_REGULATOR_RTQ6752 is not set
+# CONFIG_REGULATOR_SLG51000 is not set
+# CONFIG_REGULATOR_SY8106A is not set
+# CONFIG_REGULATOR_SY8824X is not set
+# CONFIG_REGULATOR_SY8827N is not set
+# CONFIG_REGULATOR_TI_ABB is not set
+# CONFIG_REGULATOR_TPS51632 is not set
+# CONFIG_REGULATOR_TPS62360 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_REGULATOR_TPS65132 is not set
+# CONFIG_REGULATOR_TPS6524X is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_VCTRL is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_FS_POSIX_ACL is not set
+# CONFIG_REISERFS_FS_SECURITY is not set
+CONFIG_REISERFS_FS_XATTR=y
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_RELAY is not set
+# CONFIG_RELOCATABLE is not set
+# CONFIG_REMOTEPROC is not set
+# CONFIG_RENESAS_PHY is not set
+# CONFIG_RESET_ATH79 is not set
+# CONFIG_RESET_BERLIN is not set
+# CONFIG_RESET_BRCMSTB_RESCAL is not set
+# CONFIG_RESET_CONTROLLER is not set
+# CONFIG_RESET_IMX7 is not set
+# CONFIG_RESET_INTEL_GW is not set
+# CONFIG_RESET_LANTIQ is not set
+# CONFIG_RESET_LPC18XX is not set
+# CONFIG_RESET_MESON is not set
+# CONFIG_RESET_PISTACHIO is not set
+# CONFIG_RESET_SOCFPGA is not set
+# CONFIG_RESET_STM32 is not set
+# CONFIG_RESET_SUNXI is not set
+# CONFIG_RESET_TEGRA_BPMP is not set
+# CONFIG_RESET_TI_SYSCON is not set
+# CONFIG_RESET_ZYNQ is not set
+# CONFIG_RFD77402 is not set
+# CONFIG_RFD_FTL is not set
+CONFIG_RFKILL=y
+# CONFIG_RFKILL_FULL is not set
+# CONFIG_RFKILL_GPIO is not set
+# CONFIG_RFKILL_INPUT is not set
+# CONFIG_RFKILL_LEDS is not set
+# CONFIG_RFKILL_REGULATOR is not set
+# CONFIG_RING_BUFFER_BENCHMARK is not set
+# CONFIG_RING_BUFFER_STARTUP_TEST is not set
+# CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set
+# CONFIG_RMI4_CORE is not set
+# CONFIG_RMNET is not set
+# CONFIG_ROCKCHIP_PHY is not set
+# CONFIG_ROCKER is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_ROSE is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
+# CONFIG_RPMSG_VIRTIO is not set
+# CONFIG_RPMSG_WWAN_CTRL is not set
+# CONFIG_RPR0521 is not set
+# CONFIG_RSEQ is not set
+# CONFIG_RT2X00 is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_RTC_DEBUG is not set
+# CONFIG_RTC_DRV_ABB5ZES3 is not set
+# CONFIG_RTC_DRV_ABEOZ9 is not set
+# CONFIG_RTC_DRV_ABX80X is not set
+# CONFIG_RTC_DRV_ARMADA38X is not set
+# CONFIG_RTC_DRV_AU1XXX is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_CADENCE is not set
+CONFIG_RTC_DRV_CMOS=y
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1302 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1307_CENTURY is not set
+# CONFIG_RTC_DRV_DS1307_HWMON is not set
+# CONFIG_RTC_DRV_DS1343 is not set
+# CONFIG_RTC_DRV_DS1347 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS1685_FAMILY is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_DS2404 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_EP93XX is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_FTRTC010 is not set
+# CONFIG_RTC_DRV_GENERIC is not set
+# CONFIG_RTC_DRV_GOLDFISH is not set
+# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
+# CONFIG_RTC_DRV_HYM8563 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_ISL12026 is not set
+# CONFIG_RTC_DRV_ISL12057 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_JZ4740 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_MAX6916 is not set
+# CONFIG_RTC_DRV_MAX77686 is not set
+# CONFIG_RTC_DRV_MCP795 is not set
+# CONFIG_RTC_DRV_MOXART is not set
+# CONFIG_RTC_DRV_MPC5121 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_MT2712 is not set
+# CONFIG_RTC_DRV_OMAP is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+# CONFIG_RTC_DRV_PCF2127 is not set
+# CONFIG_RTC_DRV_PCF85063 is not set
+# CONFIG_RTC_DRV_PCF8523 is not set
+# CONFIG_RTC_DRV_PCF85363 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_PL030 is not set
+# CONFIG_RTC_DRV_PL031 is not set
+# CONFIG_RTC_DRV_PS3 is not set
+# CONFIG_RTC_DRV_PT7C4338 is not set
+# CONFIG_RTC_DRV_R7301 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_RTC7301 is not set
+# CONFIG_RTC_DRV_RV3028 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+# CONFIG_RTC_DRV_RV3032 is not set
+# CONFIG_RTC_DRV_RV8803 is not set
+# CONFIG_RTC_DRV_RX4581 is not set
+# CONFIG_RTC_DRV_RX6110 is not set
+# CONFIG_RTC_DRV_RX8010 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_SD3078 is not set
+# CONFIG_RTC_DRV_SNVS is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_SUN6I is not set
+# CONFIG_RTC_DRV_TEGRA is not set
+# CONFIG_RTC_DRV_TEST is not set
+# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_XGENE is not set
+# CONFIG_RTC_DRV_ZYNQMP is not set
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_NVMEM is not set
+CONFIG_RTC_SYSTOHC=y
+CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
+# CONFIG_RTL8180 is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_RTL8192E is not set
+# CONFIG_RTL8192U is not set
+# CONFIG_RTL8306_PHY is not set
+# CONFIG_RTL8366RB_PHY is not set
+# CONFIG_RTL8366S_PHY is not set
+# CONFIG_RTL8366_SMI is not set
+# CONFIG_RTL8366_SMI_DEBUG_FS is not set
+# CONFIG_RTL8367B_PHY is not set
+# CONFIG_RTL8367_PHY is not set
+# CONFIG_RTLLIB is not set
+# CONFIG_RTL_CARDS is not set
+# CONFIG_RTS5208 is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_RUNTIME_DEBUG is not set
+CONFIG_RUNTIME_TESTING_MENU=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_RXKAD=y
+# CONFIG_S2IO is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_SAMSUNG_LAPTOP is not set
+# CONFIG_SATA_ACARD_AHCI is not set
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_AHCI_PLATFORM is not set
+# CONFIG_SATA_DWC is not set
+# CONFIG_SATA_FSL is not set
+# CONFIG_SATA_HIGHBANK is not set
+# CONFIG_SATA_HOST is not set
+# CONFIG_SATA_INIC162X is not set
+CONFIG_SATA_MOBILE_LPM_POLICY=0
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_SATA_PMP is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_RCAR is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIL24 is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_SVW is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SBC_FITPC2_WATCHDOG is not set
+CONFIG_SBITMAP=y
+# CONFIG_SC92031 is not set
+# CONFIG_SCA3000 is not set
+# CONFIG_SCA3300 is not set
+# CONFIG_SCACHE_DEBUGFS is not set
+# CONFIG_SCC is not set
+# CONFIG_SCD30_CORE is not set
+# CONFIG_SCF_TORTURE_TEST is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_SCHED_HRTICK=y
+# CONFIG_SCHED_MC is not set
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+# CONFIG_SCHED_SMT is not set
+# CONFIG_SCHED_STACK_END_CHECK is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_SCR24X is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_3W_SAS is not set
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_SCSI_BFA_FC is not set
+# CONFIG_SCSI_BNX2X_FCOE is not set
+# CONFIG_SCSI_BNX2_ISCSI is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CHELSIO_FCOE is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
+# CONFIG_SCSI_CXGB4_ISCSI is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_ESAS2R is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_FDOMAIN_PCI is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
+# CONFIG_SCSI_HISI_SAS is not set
+# CONFIG_SCSI_HPSA is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_ISCI is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_LOGGING is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_SCSI_LPFC is not set
+CONFIG_SCSI_MOD=y
+# CONFIG_SCSI_MPI3MR is not set
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_MPT3SAS is not set
+# CONFIG_SCSI_MQ_DEFAULT is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_MVSAS_DEBUG is not set
+# CONFIG_SCSI_MVUMI is not set
+# CONFIG_SCSI_MYRB is not set
+# CONFIG_SCSI_MYRS is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PM8001 is not set
+# CONFIG_SCSI_PMCRAID is not set
+CONFIG_SCSI_PROC_FS=y
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+# CONFIG_SCSI_SMARTPQI is not set
+# CONFIG_SCSI_SNIC is not set
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_UFSHCD is not set
+# CONFIG_SCSI_ULTRASTOR is not set
+# CONFIG_SCSI_VIRTIO is not set
+# CONFIG_SCSI_WD719X is not set
+# CONFIG_SC_CAMCC_7180 is not set
+# CONFIG_SC_DISPCC_7280 is not set
+# CONFIG_SC_GCC_7280 is not set
+# CONFIG_SC_GCC_8180X is not set
+# CONFIG_SC_GPUCC_7280 is not set
+# CONFIG_SC_VIDEOCC_7280 is not set
+# CONFIG_SCx200_ACB is not set
+# CONFIG_SDIO_UART is not set
+# CONFIG_SDM_GPUCC_660 is not set
+# CONFIG_SDM_MMCC_660 is not set
+# CONFIG_SDR_MAX2175 is not set
+# CONFIG_SDR_PLATFORM_DRIVERS is not set
+# CONFIG_SDX_GCC_55 is not set
+# CONFIG_SD_ADC_MODULATOR is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_SECCOMP_CACHE_DEBUG is not set
+CONFIG_SECTION_MISMATCH_WARN_ONLY=y
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_APPARMOR is not set
+CONFIG_SECURITY_DMESG_RESTRICT=y
+# CONFIG_SECURITY_LANDLOCK is not set
+# CONFIG_SECURITY_LOADPIN is not set
+# CONFIG_SECURITY_LOCKDOWN_LSM is not set
+# CONFIG_SECURITY_NETWORK_XFRM is not set
+# CONFIG_SECURITY_PATH is not set
+# CONFIG_SECURITY_SAFESETID is not set
+# CONFIG_SECURITY_SELINUX_AVC_STATS is not set
+# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=0
+# CONFIG_SECURITY_SELINUX_DEVELOP is not set
+# CONFIG_SECURITY_SELINUX_DISABLE is not set
+# CONFIG_SECURITY_SMACK is not set
+# CONFIG_SECURITY_TOMOYO is not set
+# CONFIG_SECURITY_YAMA is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_SENSIRION_SGP30 is not set
+# CONFIG_SENSIRION_SGP40 is not set
+# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_ABITUGURU3 is not set
+# CONFIG_SENSORS_ACPI_POWER is not set
+# CONFIG_SENSORS_AD7314 is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADC128D818 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM1177 is not set
+# CONFIG_SENSORS_ADM1266 is not set
+# CONFIG_SENSORS_ADM1275 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADS1015 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_ADS7871 is not set
+# CONFIG_SENSORS_ADT7310 is not set
+# CONFIG_SENSORS_ADT7410 is not set
+# CONFIG_SENSORS_ADT7411 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_AHT10 is not set
+# CONFIG_SENSORS_AMC6821 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_SENSORS_APPLESMC is not set
+# CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set
+# CONFIG_SENSORS_AS370 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ASC7621 is not set
+# CONFIG_SENSORS_ASPEED is not set
+# CONFIG_SENSORS_ATK0110 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_AXI_FAN_CONTROL is not set
+# CONFIG_SENSORS_BEL_PFE is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BPA_RS600 is not set
+# CONFIG_SENSORS_CORETEMP is not set
+# CONFIG_SENSORS_CORSAIR_CPRO is not set
+# CONFIG_SENSORS_CORSAIR_PSU is not set
+# CONFIG_SENSORS_DELL_SMM is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_DPS920AB is not set
+# CONFIG_SENSORS_DRIVETEMP is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_DS620 is not set
+# CONFIG_SENSORS_EMC1403 is not set
+# CONFIG_SENSORS_EMC2103 is not set
+# CONFIG_SENSORS_EMC2305 is not set
+# CONFIG_SENSORS_EMC6W201 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_FAM15H_POWER is not set
+# CONFIG_SENSORS_FSCHMD is not set
+# CONFIG_SENSORS_FSP_3Y is not set
+# CONFIG_SENSORS_FTSTEUTATES is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_G762 is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_GPIO_FAN is not set
+# CONFIG_SENSORS_GSC is not set
+# CONFIG_SENSORS_HDAPS is not set
+# CONFIG_SENSORS_HIH6130 is not set
+# CONFIG_SENSORS_HMC5843 is not set
+# CONFIG_SENSORS_HMC5843_I2C is not set
+# CONFIG_SENSORS_HMC5843_SPI is not set
+# CONFIG_SENSORS_HTU21 is not set
+# CONFIG_SENSORS_I5500 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_IBM_CFFPS is not set
+# CONFIG_SENSORS_IIO_HWMON is not set
+# CONFIG_SENSORS_INA209 is not set
+# CONFIG_SENSORS_INA2XX is not set
+# CONFIG_SENSORS_INA3221 is not set
+# CONFIG_SENSORS_INSPUR_IPSPS is not set
+# CONFIG_SENSORS_IR35221 is not set
+# CONFIG_SENSORS_IR36021 is not set
+# CONFIG_SENSORS_IR38064 is not set
+# CONFIG_SENSORS_IRPS5401 is not set
+# CONFIG_SENSORS_ISL29018 is not set
+# CONFIG_SENSORS_ISL29028 is not set
+# CONFIG_SENSORS_ISL68137 is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_JC42 is not set
+# CONFIG_SENSORS_K10TEMP is not set
+# CONFIG_SENSORS_K8TEMP is not set
+# CONFIG_SENSORS_LINEAGE is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_SENSORS_LM25066 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM73 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LM95234 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_LM95245 is not set
+# CONFIG_SENSORS_LTC2945 is not set
+# CONFIG_SENSORS_LTC2947_I2C is not set
+# CONFIG_SENSORS_LTC2947_SPI is not set
+# CONFIG_SENSORS_LTC2978 is not set
+# CONFIG_SENSORS_LTC2990 is not set
+# CONFIG_SENSORS_LTC2992 is not set
+# CONFIG_SENSORS_LTC3815 is not set
+# CONFIG_SENSORS_LTC4151 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4222 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LTC4260 is not set
+# CONFIG_SENSORS_LTC4261 is not set
+# CONFIG_SENSORS_LTQ_CPUTEMP is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX127 is not set
+# CONFIG_SENSORS_MAX15301 is not set
+# CONFIG_SENSORS_MAX16064 is not set
+# CONFIG_SENSORS_MAX16065 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX16601 is not set
+# CONFIG_SENSORS_MAX1668 is not set
+# CONFIG_SENSORS_MAX197 is not set
+# CONFIG_SENSORS_MAX20730 is not set
+# CONFIG_SENSORS_MAX20751 is not set
+# CONFIG_SENSORS_MAX31722 is not set
+# CONFIG_SENSORS_MAX31730 is not set
+# CONFIG_SENSORS_MAX31785 is not set
+# CONFIG_SENSORS_MAX31790 is not set
+# CONFIG_SENSORS_MAX34440 is not set
+# CONFIG_SENSORS_MAX6621 is not set
+# CONFIG_SENSORS_MAX6639 is not set
+# CONFIG_SENSORS_MAX6642 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_MAX6697 is not set
+# CONFIG_SENSORS_MAX8688 is not set
+# CONFIG_SENSORS_MCP3021 is not set
+# CONFIG_SENSORS_MP2888 is not set
+# CONFIG_SENSORS_MP2975 is not set
+# CONFIG_SENSORS_MR75203 is not set
+# CONFIG_SENSORS_NCT6683 is not set
+# CONFIG_SENSORS_NCT6775 is not set
+# CONFIG_SENSORS_NCT7802 is not set
+# CONFIG_SENSORS_NCT7904 is not set
+# CONFIG_SENSORS_NPCM7XX is not set
+# CONFIG_SENSORS_NSA320 is not set
+# CONFIG_SENSORS_NTC_THERMISTOR is not set
+# CONFIG_SENSORS_NZXT_KRAKEN2 is not set
+# CONFIG_SENSORS_OCC_P8_I2C is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_PIM4328 is not set
+# CONFIG_SENSORS_PM6764TR is not set
+# CONFIG_SENSORS_PMBUS is not set
+# CONFIG_SENSORS_POWR1220 is not set
+# CONFIG_SENSORS_PWM_FAN is not set
+# CONFIG_SENSORS_PXE1610 is not set
+# CONFIG_SENSORS_Q54SJ108A2 is not set
+# CONFIG_SENSORS_RM3100_I2C is not set
+# CONFIG_SENSORS_RM3100_SPI is not set
+# CONFIG_SENSORS_SBRMI is not set
+# CONFIG_SENSORS_SBTSI is not set
+# CONFIG_SENSORS_SCH5627 is not set
+# CONFIG_SENSORS_SCH5636 is not set
+# CONFIG_SENSORS_SCH56XX_COMMON is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SHT21 is not set
+# CONFIG_SENSORS_SHT3x is not set
+# CONFIG_SENSORS_SHT4x is not set
+# CONFIG_SENSORS_SHTC1 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_SMM665 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_STPDDC60 is not set
+# CONFIG_SENSORS_STTS751 is not set
+# CONFIG_SENSORS_TC654 is not set
+# CONFIG_SENSORS_TC74 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP102 is not set
+# CONFIG_SENSORS_TMP103 is not set
+# CONFIG_SENSORS_TMP108 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_TMP513 is not set
+# CONFIG_SENSORS_TPS23861 is not set
+# CONFIG_SENSORS_TPS40422 is not set
+# CONFIG_SENSORS_TPS53679 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_TSL2563 is not set
+# CONFIG_SENSORS_UCD9000 is not set
+# CONFIG_SENSORS_UCD9200 is not set
+# CONFIG_SENSORS_VEXPRESS is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VIA_CPUTEMP is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83773G is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83795 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_XDPE122 is not set
+# CONFIG_SENSORS_XGENE is not set
+# CONFIG_SENSORS_ZL6100 is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_16550A_VARIANTS=y
+# CONFIG_SERIAL_8250_ACCENT is not set
+# CONFIG_SERIAL_8250_ASPEED_VUART is not set
+# CONFIG_SERIAL_8250_BOCA is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_CS is not set
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+CONFIG_SERIAL_8250_DMA=y
+# CONFIG_SERIAL_8250_DW is not set
+# CONFIG_SERIAL_8250_EM is not set
+# CONFIG_SERIAL_8250_EXAR is not set
+# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_FINTEK is not set
+# CONFIG_SERIAL_8250_FOURPORT is not set
+# CONFIG_SERIAL_8250_HUB6 is not set
+# CONFIG_SERIAL_8250_INGENIC is not set
+# CONFIG_SERIAL_8250_LPSS is not set
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_MID is not set
+# CONFIG_SERIAL_8250_MOXA is not set
+CONFIG_SERIAL_8250_NR_UARTS=2
+# CONFIG_SERIAL_8250_PCI is not set
+# CONFIG_SERIAL_8250_RSA is not set
+# CONFIG_SERIAL_8250_RT288X is not set
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_AMBA_PL010 is not set
+# CONFIG_SERIAL_AMBA_PL011 is not set
+# CONFIG_SERIAL_ARC is not set
+# CONFIG_SERIAL_BCM63XX is not set
+# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_DEV_BUS is not set
+CONFIG_SERIAL_EARLYCON=y
+# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
+# CONFIG_SERIAL_FSL_LINFLEXUART is not set
+# CONFIG_SERIAL_FSL_LPUART is not set
+# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX310X is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set
+# CONFIG_SERIAL_PCH_UART is not set
+# CONFIG_SERIAL_RP2 is not set
+# CONFIG_SERIAL_SC16IS7XX is not set
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_SH_SCI is not set
+# CONFIG_SERIAL_SIFIVE is not set
+# CONFIG_SERIAL_SPRD is not set
+# CONFIG_SERIAL_STM32 is not set
+# CONFIG_SERIAL_ST_ASC is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_UARTLITE is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_SERIO is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_AMBAKMI is not set
+# CONFIG_SERIO_APBPS2 is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_GPIO_PS2 is not set
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_PARKBD is not set
+# CONFIG_SERIO_PCIPS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_SUN4I_PS2 is not set
+# CONFIG_SFC is not set
+# CONFIG_SFC_FALCON is not set
+# CONFIG_SFI is not set
+# CONFIG_SFP is not set
+# CONFIG_SF_PDMA is not set
+# CONFIG_SGETMASK_SYSCALL is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP30 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SGI_MFD_IOC3 is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_SG_POOL is not set
+# CONFIG_SG_SPLIT is not set
+CONFIG_SHMEM=y
+# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
+# CONFIG_SH_ETH is not set
+# CONFIG_SH_TIMER_CMT is not set
+# CONFIG_SH_TIMER_MTU2 is not set
+# CONFIG_SH_TIMER_TMU is not set
+# CONFIG_SI1133 is not set
+# CONFIG_SI1145 is not set
+# CONFIG_SI7005 is not set
+# CONFIG_SI7020 is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_SWARM is not set
+CONFIG_SIGNALFD=y
+# CONFIG_SIGNED_PE_FILE_VERIFICATION is not set
+# CONFIG_SIMPLE_GPIO is not set
+# CONFIG_SIMPLE_PM_BUS is not set
+# CONFIG_SIOX is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SKY2_DEBUG is not set
+# CONFIG_SLAB is not set
+CONFIG_SLABINFO=y
+# CONFIG_SLAB_FREELIST_HARDENED is not set
+# CONFIG_SLAB_FREELIST_RANDOM is not set
+CONFIG_SLAB_MERGE_DEFAULT=y
+# CONFIG_SLHC is not set
+# CONFIG_SLICOSS is not set
+# CONFIG_SLIMBUS is not set
+# CONFIG_SLIP is not set
+# CONFIG_SLOB is not set
+CONFIG_SLUB=y
+CONFIG_SLUB_CPU_PARTIAL=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_MEMCG_SYSFS_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_SMARTJOYPLUS_FF is not set
+# CONFIG_SMB_SERVER is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMC9194 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_SMP is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_SMSC9420 is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_SMS_SDIO_DRV is not set
+# CONFIG_SMS_USB_DRV is not set
+# CONFIG_SM_CAMCC_8250 is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_SM_GCC_6115 is not set
+# CONFIG_SM_GCC_6125 is not set
+# CONFIG_SM_GCC_6350 is not set
+# CONFIG_SM_GCC_8350 is not set
+# CONFIG_SND is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+# CONFIG_SND_AD1816A is not set
+# CONFIG_SND_AD1848 is not set
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ADLIB is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_ALS100 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALS4000 is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_ASIHPI is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_ATMEL_AC97C is not set
+# CONFIG_SND_ATMEL_SOC is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AUDIO_GRAPH_CARD is not set
+# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT2320 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BCD2000 is not set
+# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMI8330 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_CS4231 is not set
+# CONFIG_SND_CS4236 is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS5530 is not set
+# CONFIG_SND_CS5535AUDIO is not set
+# CONFIG_SND_CTXFI is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_DESIGNWARE_I2S is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_EDMA_SOC is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1688 is not set
+# CONFIG_SND_ES18XX is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FIREWIRE is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_GUSCLASSIC is not set
+# CONFIG_SND_GUSEXTREME is not set
+# CONFIG_SND_GUSMAX is not set
+# CONFIG_SND_HDA_CODEC_CS8409 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDA_INTEL_DETECT_DMIC is not set
+# CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM is not set
+CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0
+CONFIG_SND_HDA_PREALLOC_SIZE=64
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_HWDEP is not set
+# CONFIG_SND_I2S_HI6210_I2S is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGODJX is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_INTERWAVE is not set
+# CONFIG_SND_INTERWAVE_STB is not set
+# CONFIG_SND_ISA is not set
+# CONFIG_SND_JZ4740_SOC_I2S is not set
+# CONFIG_SND_KIRKWOOD_SOC is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_LOLA is not set
+# CONFIG_SND_LX6464ES is not set
+# CONFIG_SND_MAESTRO3 is not set
+CONFIG_SND_MAX_CARDS=16
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_MIPS is not set
+# CONFIG_SND_MIRO is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MPC52xx_SOC_EFIKA is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_MTS64 is not set
+# CONFIG_SND_MXS_SOC is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_OPL3SA2 is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_OPTI92X_AD1848 is not set
+# CONFIG_SND_OPTI92X_CS4231 is not set
+# CONFIG_SND_OPTI93X is not set
+CONFIG_SND_OSSEMUL=y
+# CONFIG_SND_OXYGEN is not set
+CONFIG_SND_PCI=y
+# CONFIG_SND_PCM is not set
+# CONFIG_SND_PCMCIA is not set
+# CONFIG_SND_PCM_OSS is not set
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_PCM_TIMER is not set
+# CONFIG_SND_PCM_XRUN_DEBUG is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_PDAUDIOCF is not set
+# CONFIG_SND_PORTMAN2X4 is not set
+# CONFIG_SND_POWERPC_SOC is not set
+# CONFIG_SND_PPC is not set
+CONFIG_SND_PROC_FS=y
+# CONFIG_SND_RAWMIDI is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_RTCTIMER is not set
+# CONFIG_SND_SB16 is not set
+# CONFIG_SND_SB8 is not set
+# CONFIG_SND_SBAWE is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_SE6X is not set
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_SIMPLE_CARD is not set
+# CONFIG_SND_SIMPLE_SCU_CARD is not set
+# CONFIG_SND_SIS7019 is not set
+# CONFIG_SND_SOC is not set
+# CONFIG_SND_SOC_AC97_CODEC is not set
+# CONFIG_SND_SOC_AD193X_I2C is not set
+# CONFIG_SND_SOC_AD193X_SPI is not set
+# CONFIG_SND_SOC_ADAU1372_I2C is not set
+# CONFIG_SND_SOC_ADAU1372_SPI is not set
+# CONFIG_SND_SOC_ADAU1701 is not set
+# CONFIG_SND_SOC_ADAU1761_I2C is not set
+# CONFIG_SND_SOC_ADAU1761_SPI is not set
+# CONFIG_SND_SOC_ADAU7002 is not set
+# CONFIG_SND_SOC_ADAU7118_HW is not set
+# CONFIG_SND_SOC_ADAU7118_I2C is not set
+# CONFIG_SND_SOC_ADI is not set
+# CONFIG_SND_SOC_AK4104 is not set
+# CONFIG_SND_SOC_AK4118 is not set
+# CONFIG_SND_SOC_AK4458 is not set
+# CONFIG_SND_SOC_AK4554 is not set
+# CONFIG_SND_SOC_AK4613 is not set
+# CONFIG_SND_SOC_AK4642 is not set
+# CONFIG_SND_SOC_AK5386 is not set
+# CONFIG_SND_SOC_AK5558 is not set
+# CONFIG_SND_SOC_ALC5623 is not set
+# CONFIG_SND_SOC_AMD_ACP is not set
+# CONFIG_SND_SOC_AMD_ACP3x is not set
+# CONFIG_SND_SOC_AMD_ACP5x is not set
+# CONFIG_SND_SOC_AMD_RENOIR is not set
+# CONFIG_SND_SOC_AU1XAUDIO is not set
+# CONFIG_SND_SOC_AU1XPSC is not set
+# CONFIG_SND_SOC_BD28623 is not set
+# CONFIG_SND_SOC_BT_SCO is not set
+# CONFIG_SND_SOC_CS35L32 is not set
+# CONFIG_SND_SOC_CS35L33 is not set
+# CONFIG_SND_SOC_CS35L34 is not set
+# CONFIG_SND_SOC_CS35L35 is not set
+# CONFIG_SND_SOC_CS35L36 is not set
+# CONFIG_SND_SOC_CS4234 is not set
+# CONFIG_SND_SOC_CS4265 is not set
+# CONFIG_SND_SOC_CS4270 is not set
+# CONFIG_SND_SOC_CS4271 is not set
+# CONFIG_SND_SOC_CS4271_I2C is not set
+# CONFIG_SND_SOC_CS4271_SPI is not set
+# CONFIG_SND_SOC_CS42L42 is not set
+# CONFIG_SND_SOC_CS42L51_I2C is not set
+# CONFIG_SND_SOC_CS42L52 is not set
+# CONFIG_SND_SOC_CS42L56 is not set
+# CONFIG_SND_SOC_CS42L73 is not set
+# CONFIG_SND_SOC_CS42XX8_I2C is not set
+# CONFIG_SND_SOC_CS43130 is not set
+# CONFIG_SND_SOC_CS4341 is not set
+# CONFIG_SND_SOC_CS4349 is not set
+# CONFIG_SND_SOC_CS53L30 is not set
+# CONFIG_SND_SOC_CX2072X is not set
+# CONFIG_SND_SOC_DA7213 is not set
+# CONFIG_SND_SOC_DIO2125 is not set
+# CONFIG_SND_SOC_DMIC is not set
+# CONFIG_SND_SOC_ES7134 is not set
+# CONFIG_SND_SOC_ES7241 is not set
+# CONFIG_SND_SOC_ES8316 is not set
+# CONFIG_SND_SOC_ES8328 is not set
+# CONFIG_SND_SOC_ES8328_I2C is not set
+# CONFIG_SND_SOC_ES8328_SPI is not set
+# CONFIG_SND_SOC_EUKREA_TLV320 is not set
+# CONFIG_SND_SOC_FSL_ASOC_CARD is not set
+# CONFIG_SND_SOC_FSL_ASRC is not set
+# CONFIG_SND_SOC_FSL_AUD2HTX is not set
+# CONFIG_SND_SOC_FSL_AUDMIX is not set
+# CONFIG_SND_SOC_FSL_ESAI is not set
+# CONFIG_SND_SOC_IMX_RPMSG is not set
+# CONFIG_SND_SOC_FSL_MICFIL is not set
+# CONFIG_SND_SOC_FSL_RPMSG is not set
+# CONFIG_SND_SOC_FSL_SAI is not set
+# CONFIG_SND_SOC_FSL_SPDIF is not set
+# CONFIG_SND_SOC_FSL_SSI is not set
+# CONFIG_SND_SOC_FSL_XCVR is not set
+# CONFIG_SND_SOC_GTM601 is not set
+# CONFIG_SND_SOC_ICS43432 is not set
+# CONFIG_SND_SOC_IMG is not set
+# CONFIG_SND_SOC_IMX_AUDMIX is not set
+# CONFIG_SND_SOC_IMX_AUDMUX is not set
+# CONFIG_SND_SOC_IMX_CARD is not set
+# CONFIG_SND_SOC_IMX_ES8328 is not set
+# CONFIG_SND_SOC_IMX_HDMI is not set
+# CONFIG_SND_SOC_IMX_SPDIF is not set
+# CONFIG_SND_SOC_IMX_WM8962 is not set
+# CONFIG_SND_SOC_INNO_RK3036 is not set
+# CONFIG_SND_SOC_INTEL_APL is not set
+# CONFIG_SND_SOC_INTEL_BAYTRAIL is not set
+# CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH is not set
+# CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH is not set
+# CONFIG_SND_SOC_INTEL_BXT_RT298_MACH is not set
+# CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH is not set
+# CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH is not set
+# CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH is not set
+# CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH is not set
+# CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH is not set
+# CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH is not set
+# CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH is not set
+# CONFIG_SND_SOC_INTEL_CATPT is not set
+# CONFIG_SND_SOC_INTEL_CFL is not set
+# CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH is not set
+# CONFIG_SND_SOC_INTEL_CHT_BSW_NAU8824_MACH is not set
+# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH is not set
+# CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH is not set
+# CONFIG_SND_SOC_INTEL_CML_H is not set
+# CONFIG_SND_SOC_INTEL_CML_LP is not set
+# CONFIG_SND_SOC_INTEL_CNL is not set
+# CONFIG_SND_SOC_INTEL_GLK is not set
+# CONFIG_SND_SOC_INTEL_HASWELL is not set
+# CONFIG_SND_SOC_INTEL_KBL is not set
+# CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH is not set
+# CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH is not set
+# CONFIG_SND_SOC_INTEL_KEEMBAY is not set
+# CONFIG_SND_SOC_INTEL_SKL is not set
+# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH is not set
+# CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH is not set
+# CONFIG_SND_SOC_INTEL_SKL_RT286_MACH is not set
+# CONFIG_SND_SOC_INTEL_SKYLAKE is not set
+# CONFIG_SND_SOC_INTEL_SST is not set
+CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y
+# CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES is not set
+# CONFIG_SND_SOC_JZ4725B_CODEC is not set
+# CONFIG_SND_SOC_JZ4740_CODEC is not set
+# CONFIG_SND_SOC_JZ4770_CODEC is not set
+# CONFIG_SND_SOC_LPASS_RX_MACRO is not set
+# CONFIG_SND_SOC_LPASS_TX_MACRO is not set
+# CONFIG_SND_SOC_LPASS_VA_MACRO is not set
+# CONFIG_SND_SOC_LPASS_WSA_MACRO is not set
+# CONFIG_SND_SOC_MA120X0P is not set
+# CONFIG_SND_SOC_MAX9759 is not set
+# CONFIG_SND_SOC_MAX98088 is not set
+# CONFIG_SND_SOC_MAX98357A is not set
+# CONFIG_SND_SOC_MAX98373 is not set
+# CONFIG_SND_SOC_MAX98373_I2C is not set
+# CONFIG_SND_SOC_MAX98390 is not set
+# CONFIG_SND_SOC_MAX98504 is not set
+# CONFIG_SND_SOC_MAX9860 is not set
+# CONFIG_SND_SOC_MAX9867 is not set
+# CONFIG_SND_SOC_MAX98927 is not set
+# CONFIG_SND_SOC_MEDIATEK is not set
+# CONFIG_SND_SOC_MPC5200_AC97 is not set
+# CONFIG_SND_SOC_MPC5200_I2S is not set
+# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
+# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
+# CONFIG_SND_SOC_MT2701 is not set
+# CONFIG_SND_SOC_MT6351 is not set
+# CONFIG_SND_SOC_MT6358 is not set
+# CONFIG_SND_SOC_MT6359 is not set
+# CONFIG_SND_SOC_MT6359_ACCDET is not set
+# CONFIG_SND_SOC_MT6660 is not set
+# CONFIG_SND_SOC_MT6797 is not set
+# CONFIG_SND_SOC_MT8173 is not set
+# CONFIG_SND_SOC_MT8183 is not set
+# CONFIG_SND_SOC_MT8192 is not set
+# CONFIG_SND_SOC_MT8195 is not set
+# CONFIG_SND_SOC_MTK_BTCVSD is not set
+# CONFIG_SND_SOC_NAU8315 is not set
+# CONFIG_SND_SOC_NAU8540 is not set
+# CONFIG_SND_SOC_NAU8810 is not set
+# CONFIG_SND_SOC_NAU8822 is not set
+# CONFIG_SND_SOC_NAU8824 is not set
+# CONFIG_SND_SOC_PCM1681 is not set
+# CONFIG_SND_SOC_PCM1789_I2C is not set
+# CONFIG_SND_SOC_PCM1792A is not set
+# CONFIG_SND_SOC_PCM179X_I2C is not set
+# CONFIG_SND_SOC_PCM179X_SPI is not set
+# CONFIG_SND_SOC_PCM186X_I2C is not set
+# CONFIG_SND_SOC_PCM186X_SPI is not set
+# CONFIG_SND_SOC_PCM3060_I2C is not set
+# CONFIG_SND_SOC_PCM3060_SPI is not set
+# CONFIG_SND_SOC_PCM3168A_I2C is not set
+# CONFIG_SND_SOC_PCM3168A_SPI is not set
+# CONFIG_SND_SOC_PCM5102A is not set
+# CONFIG_SND_SOC_PCM512x_I2C is not set
+# CONFIG_SND_SOC_PCM512x_SPI is not set
+# CONFIG_SND_SOC_QCOM is not set
+# CONFIG_SND_SOC_RK3328 is not set
+# CONFIG_SND_SOC_RT5616 is not set
+# CONFIG_SND_SOC_RT5631 is not set
+# CONFIG_SND_SOC_RT5640 is not set
+# CONFIG_SND_SOC_RT5659 is not set
+# CONFIG_SND_SOC_RT5677_SPI is not set
+# CONFIG_SND_SOC_SGTL5000 is not set
+# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
+# CONFIG_SND_SOC_SIMPLE_MUX is not set
+# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
+# CONFIG_SND_SOC_SOF_TOPLEVEL is not set
+# CONFIG_SND_SOC_SPDIF is not set
+# CONFIG_SND_SOC_SSM2305 is not set
+# CONFIG_SND_SOC_SSM2518 is not set
+# CONFIG_SND_SOC_SSM2602_I2C is not set
+# CONFIG_SND_SOC_SSM2602_SPI is not set
+# CONFIG_SND_SOC_SSM4567 is not set
+# CONFIG_SND_SOC_STA32X is not set
+# CONFIG_SND_SOC_STA350 is not set
+# CONFIG_SND_SOC_STI_SAS is not set
+# CONFIG_SND_SOC_TAS2552 is not set
+# CONFIG_SND_SOC_TAS2562 is not set
+# CONFIG_SND_SOC_TAS2764 is not set
+# CONFIG_SND_SOC_TAS2770 is not set
+# CONFIG_SND_SOC_TAS5086 is not set
+# CONFIG_SND_SOC_TAS571X is not set
+# CONFIG_SND_SOC_TAS5720 is not set
+# CONFIG_SND_SOC_TAS6424 is not set
+# CONFIG_SND_SOC_TDA7419 is not set
+# CONFIG_SND_SOC_TFA9879 is not set
+# CONFIG_SND_SOC_TFA989X is not set
+# CONFIG_SND_SOC_TLV320ADCX140 is not set
+# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
+# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
+# CONFIG_SND_SOC_TLV320AIC31XX is not set
+# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set
+# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set
+# CONFIG_SND_SOC_TLV320AIC3X is not set
+# CONFIG_SND_SOC_TLV320AIC3X_I2C is not set
+# CONFIG_SND_SOC_TLV320AIC3X_SPI is not set
+# CONFIG_SND_SOC_TPA6130A2 is not set
+# CONFIG_SND_SOC_TS3A227E is not set
+# CONFIG_SND_SOC_TSCS42XX is not set
+# CONFIG_SND_SOC_TSCS454 is not set
+# CONFIG_SND_SOC_UDA1334 is not set
+# CONFIG_SND_SOC_WM8510 is not set
+# CONFIG_SND_SOC_WM8523 is not set
+# CONFIG_SND_SOC_WM8524 is not set
+# CONFIG_SND_SOC_WM8580 is not set
+# CONFIG_SND_SOC_WM8711 is not set
+# CONFIG_SND_SOC_WM8728 is not set
+# CONFIG_SND_SOC_WM8731 is not set
+# CONFIG_SND_SOC_WM8737 is not set
+# CONFIG_SND_SOC_WM8741 is not set
+# CONFIG_SND_SOC_WM8750 is not set
+# CONFIG_SND_SOC_WM8753 is not set
+# CONFIG_SND_SOC_WM8770 is not set
+# CONFIG_SND_SOC_WM8776 is not set
+# CONFIG_SND_SOC_WM8782 is not set
+# CONFIG_SND_SOC_WM8804_I2C is not set
+# CONFIG_SND_SOC_WM8804_SPI is not set
+# CONFIG_SND_SOC_WM8903 is not set
+# CONFIG_SND_SOC_WM8904 is not set
+# CONFIG_SND_SOC_WM8960 is not set
+# CONFIG_SND_SOC_WM8962 is not set
+# CONFIG_SND_SOC_WM8974 is not set
+# CONFIG_SND_SOC_WM8978 is not set
+# CONFIG_SND_SOC_WM8985 is not set
+# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set
+# CONFIG_SND_SOC_XILINX_I2S is not set
+# CONFIG_SND_SOC_XILINX_SPDIF is not set
+# CONFIG_SND_SOC_XTFPGA_I2S is not set
+# CONFIG_SND_SOC_ZL38060 is not set
+# CONFIG_SND_SOC_ZX_AUD96P22 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_SSCAPE is not set
+# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI is not set
+# CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI is not set
+# CONFIG_SND_SUN4I_CODEC is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_TIMER is not set
+# CONFIG_SND_TRIDENT is not set
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_6FIRE is not set
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_HIFACE is not set
+# CONFIG_SND_USB_POD is not set
+# CONFIG_SND_USB_PODHD is not set
+# CONFIG_SND_USB_TONEPORT is not set
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_US122L is not set
+# CONFIG_SND_USB_USX2Y is not set
+# CONFIG_SND_USB_VARIAX is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTIO is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_VXPOCKET is not set
+# CONFIG_SND_WAVEFRONT is not set
+CONFIG_SND_X86=y
+# CONFIG_SND_XEN_FRONTEND is not set
+# CONFIG_SND_YMFPCI is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set
+# CONFIG_SOCK_CGROUP_DATA is not set
+# CONFIG_SOC_AM33XX is not set
+# CONFIG_SOC_AM43XX is not set
+# CONFIG_SOC_BRCMSTB is not set
+# CONFIG_SOC_CAMERA is not set
+# CONFIG_SOC_DRA7XX is not set
+# CONFIG_SOC_HAS_OMAP2_SDRC is not set
+# CONFIG_SOC_OMAP5 is not set
+# CONFIG_SOC_TI is not set
+# CONFIG_SOFTLOCKUP_DETECTOR is not set
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_SONYPI is not set
+# CONFIG_SONY_LAPTOP is not set
+# CONFIG_SOUND is not set
+# CONFIG_SOUNDWIRE is not set
+# CONFIG_SOUND_OSS_CORE is not set
+# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
+# CONFIG_SOUND_PRIME is not set
+# CONFIG_SP5100_TCO is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+# CONFIG_SPARSE_IRQ is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_SPEAKUP is not set
+# CONFIG_SPI is not set
+# CONFIG_SPINLOCK_TEST is not set
+# CONFIG_SPI_ALTERA is not set
+# CONFIG_SPI_AMD is not set
+# CONFIG_SPI_AU1550 is not set
+# CONFIG_SPI_AXI_SPI_ENGINE is not set
+# CONFIG_SPI_BCM2835 is not set
+# CONFIG_SPI_BCM_QSPI is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_BUTTERFLY is not set
+# CONFIG_SPI_CADENCE is not set
+# CONFIG_SPI_CADENCE_QUADSPI is not set
+# CONFIG_SPI_DEBUG is not set
+# CONFIG_SPI_DESIGNWARE is not set
+# CONFIG_SPI_FSL_DSPI is not set
+# CONFIG_SPI_FSL_ESPI is not set
+# CONFIG_SPI_FSL_SPI is not set
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_GPIO_OLD is not set
+# CONFIG_SPI_IMG_SPFI is not set
+# CONFIG_SPI_LANTIQ_SSC is not set
+# CONFIG_SPI_LM70_LLP is not set
+# CONFIG_SPI_LOOPBACK_TEST is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_SPI_MEM is not set
+# CONFIG_SPI_MPC52xx is not set
+# CONFIG_SPI_MPC52xx_PSC is not set
+# CONFIG_SPI_MTK_QUADSPI is not set
+# CONFIG_SPI_MUX is not set
+# CONFIG_SPI_MXIC is not set
+# CONFIG_SPI_NXP_FLEXSPI is not set
+# CONFIG_SPI_OCTEON is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_ORION is not set
+# CONFIG_SPI_PL022 is not set
+# CONFIG_SPI_PPC4xx is not set
+# CONFIG_SPI_PXA2XX is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_QCOM_QSPI is not set
+# CONFIG_SPI_ROCKCHIP is not set
+# CONFIG_SPI_S3C64XX is not set
+# CONFIG_SPI_SC18IS602 is not set
+# CONFIG_SPI_SIFIVE is not set
+# CONFIG_SPI_SLAVE is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_THUNDERX is not set
+# CONFIG_SPI_TI_QSPI is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_SPI_TOPCLIFF_PCH is not set
+# CONFIG_SPI_XCOMM is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_XWAY is not set
+# CONFIG_SPI_ZYNQMP_GQSPI is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_SPMI is not set
+# CONFIG_SPS30 is not set
+# CONFIG_SPS30_I2C is not set
+# CONFIG_SPS30_SERIAL is not set
+CONFIG_SQUASHFS=y
+# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
+# CONFIG_SQUASHFS_DECOMP_MULTI is not set
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
+# CONFIG_SQUASHFS_DECOMP_SINGLE is not set
+CONFIG_SQUASHFS_EMBEDDED=y
+# CONFIG_SQUASHFS_FILE_CACHE is not set
+CONFIG_SQUASHFS_FILE_DIRECT=y
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+# CONFIG_SQUASHFS_LZ4 is not set
+# CONFIG_SQUASHFS_LZO is not set
+# CONFIG_SQUASHFS_XATTR is not set
+CONFIG_SQUASHFS_XZ=y
+# CONFIG_SQUASHFS_ZLIB is not set
+# CONFIG_SQUASHFS_ZSTD is not set
+# CONFIG_SRAM is not set
+# CONFIG_SRF04 is not set
+# CONFIG_SRF08 is not set
+# CONFIG_SSB is not set
+# CONFIG_SSB_DEBUG is not set
+# CONFIG_SSB_DRIVER_GPIO is not set
+# CONFIG_SSB_HOST_SOC is not set
+# CONFIG_SSB_PCMCIAHOST is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB_SDIOHOST is not set
+# CONFIG_SSB_SILENT is not set
+# CONFIG_SSFDC is not set
+# CONFIG_STACKPROTECTOR is not set
+# CONFIG_STACKPROTECTOR_STRONG is not set
+# CONFIG_STACKTRACE is not set
+# CONFIG_STACKTRACE_BUILD_ID is not set
+CONFIG_STACKTRACE_SUPPORT=y
+# CONFIG_STACK_TRACER is not set
+# CONFIG_STACK_VALIDATION is not set
+CONFIG_STAGING=y
+# CONFIG_STAGING_BOARD is not set
+# CONFIG_STAGING_GASKET_FRAMEWORK is not set
+# CONFIG_STAGING_MEDIA is not set
+CONFIG_STANDALONE=y
+# CONFIG_STATIC_KEYS_SELFTEST is not set
+# CONFIG_STATIC_USERMODEHELPER is not set
+CONFIG_STDBINUTILS=y
+# CONFIG_STE10XP is not set
+# CONFIG_STE_MODEM_RPROC is not set
+# CONFIG_STK3310 is not set
+# CONFIG_STK8312 is not set
+# CONFIG_STK8BA50 is not set
+# CONFIG_STM is not set
+# CONFIG_STMMAC_ETH is not set
+# CONFIG_STMMAC_PCI is not set
+# CONFIG_STMMAC_PLATFORM is not set
+# CONFIG_STMMAC_SELFTESTS is not set
+# CONFIG_STM_DUMMY is not set
+# CONFIG_STM_SOURCE_CONSOLE is not set
+CONFIG_STP=y
+# CONFIG_STREAM_PARSER is not set
+# CONFIG_STRICT_DEVMEM is not set
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_STRICT_MODULE_RWX=y
+# CONFIG_STRING_SELFTEST is not set
+CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_STX104 is not set
+# CONFIG_ST_UVIS25 is not set
+# CONFIG_SUN4I_GPADC is not set
+# CONFIG_SUN50I_DE2_BUS is not set
+# CONFIG_SUN50I_ERRATUM_UNKNOWN1 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_SUNRPC is not set
+# CONFIG_SUNRPC_DEBUG is not set
+CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SUNXI_SRAM is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_SURFACE_3_BUTTON is not set
+# CONFIG_SUSPEND is not set
+# CONFIG_SUSPEND_SKIP_SYNC is not set
+CONFIG_SWAP=y
+# CONFIG_SWCONFIG is not set
+# CONFIG_SWCONFIG_B53 is not set
+# CONFIG_SWCONFIG_B53_MDIO_DRIVER is not set
+# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set
+# CONFIG_SWCONFIG_B53_SPI_DRIVER is not set
+# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
+# CONFIG_SWCONFIG_LEDS is not set
+# CONFIG_SW_SYNC is not set
+# CONFIG_SX9310 is not set
+# CONFIG_SX9500 is not set
+# CONFIG_SXGBE_ETH is not set
+CONFIG_SYMBOLIC_ERRNAME=y
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_SYNC_FILE is not set
+# CONFIG_SYNOPSYS_DWC_ETH_QOS is not set
+# CONFIG_SYNTH_EVENTS is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_SYSCON_REBOOT_MODE is not set
+CONFIG_SYSCTL=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_SYSFS=y
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_SYSFS_SYSCALL is not set
+# CONFIG_SYSTEMPORT is not set
+# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
+# CONFIG_SYSTEM_DATA_VERIFICATION is not set
+# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
+CONFIG_SYSTEM_TRUSTED_KEYS=""
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_T5403 is not set
+# CONFIG_TARGET_CORE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_TASKS_RCU is not set
+# CONFIG_TASK_XACCT is not set
+# CONFIG_TC35815 is not set
+# CONFIG_TCG_ATMEL is not set
+# CONFIG_TCG_CRB is not set
+# CONFIG_TCG_FTPM_TEE is not set
+# CONFIG_TCG_INFINEON is not set
+# CONFIG_TCG_NSC is not set
+# CONFIG_TCG_ST33_I2C is not set
+# CONFIG_TCG_TIS is not set
+# CONFIG_TCG_TIS_I2C_ATMEL is not set
+# CONFIG_TCG_TIS_I2C_CR50 is not set
+# CONFIG_TCG_TIS_I2C_INFINEON is not set
+# CONFIG_TCG_TIS_I2C_NUVOTON is not set
+# CONFIG_TCG_TIS_SPI is not set
+# CONFIG_TCG_TIS_ST33ZP24_I2C is not set
+# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_TCG_VTPM_PROXY is not set
+# CONFIG_TCG_XEN is not set
+# CONFIG_TCIC is not set
+CONFIG_TCP_CONG_ADVANCED=y
+# CONFIG_TCP_CONG_BBR is not set
+# CONFIG_TCP_CONG_BIC is not set
+# CONFIG_TCP_CONG_CDG is not set
+CONFIG_TCP_CONG_CUBIC=y
+# CONFIG_TCP_CONG_DCTCP is not set
+# CONFIG_TCP_CONG_HSTCP is not set
+# CONFIG_TCP_CONG_HTCP is not set
+# CONFIG_TCP_CONG_HYBLA is not set
+# CONFIG_TCP_CONG_ILLINOIS is not set
+# CONFIG_TCP_CONG_LP is not set
+# CONFIG_TCP_CONG_NV is not set
+# CONFIG_TCP_CONG_SCALABLE is not set
+# CONFIG_TCP_CONG_VEGAS is not set
+# CONFIG_TCP_CONG_VENO is not set
+# CONFIG_TCP_CONG_WESTWOOD is not set
+# CONFIG_TCP_CONG_YEAH is not set
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_TCS3414 is not set
+# CONFIG_TCS3472 is not set
+# CONFIG_TEE is not set
+# CONFIG_TEGRA_AHB is not set
+# CONFIG_TEGRA_HOST1X is not set
+# CONFIG_TEHUTI is not set
+# CONFIG_TERANETICS_PHY is not set
+# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
+# CONFIG_TEST_BITFIELD is not set
+# CONFIG_TEST_BITMAP is not set
+# CONFIG_TEST_BITOPS is not set
+# CONFIG_TEST_BLACKHOLE_DEV is not set
+# CONFIG_TEST_BPF is not set
+# CONFIG_TEST_CLOCKSOURCE_WATCHDOG is not set
+# CONFIG_TEST_DIV64 is not set
+# CONFIG_TEST_FIRMWARE is not set
+# CONFIG_TEST_FREE_PAGES is not set
+# CONFIG_TEST_HASH is not set
+# CONFIG_TEST_HEXDUMP is not set
+# CONFIG_TEST_IDA is not set
+# CONFIG_TEST_KASAN_MODULE is not set
+# CONFIG_TEST_KMOD is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_TEST_LKM is not set
+# CONFIG_TEST_LOCKUP is not set
+# CONFIG_TEST_MEMCAT_P is not set
+# CONFIG_TEST_MEMINIT is not set
+# CONFIG_TEST_MIN_HEAP is not set
+# CONFIG_TEST_OVERFLOW is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_TEST_PRINTF is not set
+# CONFIG_TEST_RHASHTABLE is not set
+# CONFIG_TEST_SCANF is not set
+# CONFIG_TEST_SORT is not set
+# CONFIG_TEST_STACKINIT is not set
+# CONFIG_TEST_STATIC_KEYS is not set
+# CONFIG_TEST_STRING_HELPERS is not set
+# CONFIG_TEST_STRSCPY is not set
+# CONFIG_TEST_SYSCTL is not set
+# CONFIG_TEST_UBSAN is not set
+# CONFIG_TEST_UDELAY is not set
+# CONFIG_TEST_USER_COPY is not set
+# CONFIG_TEST_UUID is not set
+# CONFIG_TEST_VMALLOC is not set
+# CONFIG_TEST_XARRAY is not set
+CONFIG_TEXTSEARCH=y
+# CONFIG_TEXTSEARCH_BM is not set
+# CONFIG_TEXTSEARCH_FSM is not set
+# CONFIG_TEXTSEARCH_KMP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
+# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
+# CONFIG_THERMAL_EMULATION is not set
+# CONFIG_THERMAL_GOV_BANG_BANG is not set
+# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
+# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set
+# CONFIG_THERMAL_GOV_USER_SPACE is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_THERMAL_MMIO is not set
+# CONFIG_THERMAL_NETLINK is not set
+# CONFIG_THERMAL_STATISTICS is not set
+# CONFIG_THERMAL_WRITABLE_TRIPS is not set
+# CONFIG_THINKPAD_ACPI is not set
+CONFIG_THIN_ARCHIVES=y
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_THUMB2_KERNEL is not set
+# CONFIG_THUNDERBOLT is not set
+# CONFIG_THUNDER_NIC_BGX is not set
+# CONFIG_THUNDER_NIC_PF is not set
+# CONFIG_THUNDER_NIC_RGX is not set
+# CONFIG_THUNDER_NIC_VF is not set
+# CONFIG_TICK_CPU_ACCOUNTING is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_TIFM_CORE is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_TIMB_DMA is not set
+CONFIG_TIMERFD=y
+# CONFIG_TIMERLAT_TRACER is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_TIME_NS is not set
+# CONFIG_TINYDRM_HX8357D is not set
+# CONFIG_TINYDRM_ILI9225 is not set
+# CONFIG_TINYDRM_ILI9341 is not set
+# CONFIG_TINYDRM_ILI9486 is not set
+# CONFIG_TINYDRM_MI0283QT is not set
+# CONFIG_TINYDRM_REPAPER is not set
+# CONFIG_TINYDRM_ST7586 is not set
+# CONFIG_TINYDRM_ST7735R is not set
+CONFIG_TINY_RCU=y
+# CONFIG_TIPC is not set
+# CONFIG_TI_ADC081C is not set
+# CONFIG_TI_ADC0832 is not set
+# CONFIG_TI_ADC084S021 is not set
+# CONFIG_TI_ADC108S102 is not set
+# CONFIG_TI_ADC12138 is not set
+# CONFIG_TI_ADC128S052 is not set
+# CONFIG_TI_ADC161S626 is not set
+# CONFIG_TI_ADS1015 is not set
+# CONFIG_TI_ADS124S08 is not set
+# CONFIG_TI_ADS131E08 is not set
+# CONFIG_TI_ADS7950 is not set
+# CONFIG_TI_ADS8344 is not set
+# CONFIG_TI_ADS8688 is not set
+# CONFIG_TI_AM335X_ADC is not set
+# CONFIG_TI_CPSW is not set
+# CONFIG_TI_CPSW_ALE is not set
+# CONFIG_TI_CPSW_PHY_SEL is not set
+# CONFIG_TI_CPTS is not set
+# CONFIG_TI_DAC082S085 is not set
+# CONFIG_TI_DAC5571 is not set
+# CONFIG_TI_DAC7311 is not set
+# CONFIG_TI_DAC7512 is not set
+# CONFIG_TI_DAC7612 is not set
+# CONFIG_TI_DAVINCI_CPDMA is not set
+# CONFIG_TI_DAVINCI_MDIO is not set
+# CONFIG_TI_ST is not set
+# CONFIG_TI_SYSCON_RESET is not set
+# CONFIG_TI_TLC4541 is not set
+# CONFIG_TI_TSC2046 is not set
+# CONFIG_TLAN is not set
+# CONFIG_TLS is not set
+# CONFIG_TMD_HERMES is not set
+# CONFIG_TMP006 is not set
+# CONFIG_TMP007 is not set
+# CONFIG_TMP117 is not set
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_INODE64 is not set
+# CONFIG_TMPFS_POSIX_ACL is not set
+CONFIG_TMPFS_XATTR=y
+# CONFIG_TOPSTAR_LAPTOP is not set
+# CONFIG_TORTURE_TEST is not set
+# CONFIG_TOSHIBA_HAPS is not set
+# CONFIG_TOUCHSCREEN_88PM860X is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_ADC is not set
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set
+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_BU21029 is not set
+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set
+# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMA140 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_I2C is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_SPI is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_I2C is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_SPI is not set
+# CONFIG_TOUCHSCREEN_DA9034 is not set
+# CONFIG_TOUCHSCREEN_DA9052 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_EGALAX is not set
+# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set
+# CONFIG_TOUCHSCREEN_EKTF2127 is not set
+# CONFIG_TOUCHSCREEN_ELAN is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_EXC3000 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GOODIX is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_HIDEEP is not set
+# CONFIG_TOUCHSCREEN_HP600 is not set
+# CONFIG_TOUCHSCREEN_HP7XX is not set
+# CONFIG_TOUCHSCREEN_HTCPEN is not set
+# CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set
+# CONFIG_TOUCHSCREEN_ILI210X is not set
+# CONFIG_TOUCHSCREEN_ILITEK is not set
+# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_IPAQ_MICRO is not set
+# CONFIG_TOUCHSCREEN_IPROC is not set
+# CONFIG_TOUCHSCREEN_IQS5XX is not set
+# CONFIG_TOUCHSCREEN_LPC32XX is not set
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MC13783 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
+# CONFIG_TOUCHSCREEN_MIGOR is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_MMS114 is not set
+# CONFIG_TOUCHSCREEN_MSG2638 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MX25 is not set
+# CONFIG_TOUCHSCREEN_MXS_LRADC is not set
+# CONFIG_TOUCHSCREEN_PCAP is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_PROPERTIES is not set
+# CONFIG_TOUCHSCREEN_RASPBERRYPI_FW is not set
+# CONFIG_TOUCHSCREEN_RM_TS is not set
+# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
+# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set
+# CONFIG_TOUCHSCREEN_S3C2410 is not set
+# CONFIG_TOUCHSCREEN_S6SY761 is not set
+# CONFIG_TOUCHSCREEN_SILEAD is not set
+# CONFIG_TOUCHSCREEN_SIS_I2C is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_STMFTS is not set
+# CONFIG_TOUCHSCREEN_STMPE is not set
+# CONFIG_TOUCHSCREEN_SUN4I is not set
+# CONFIG_TOUCHSCREEN_SUR40 is not set
+# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
+# CONFIG_TOUCHSCREEN_SX8654 is not set
+# CONFIG_TOUCHSCREEN_TI_AM335X_TSC is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_TOUCHSCREEN_TS4800 is not set
+# CONFIG_TOUCHSCREEN_TSC2004 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_TSC2007_IIO is not set
+# CONFIG_TOUCHSCREEN_TSC200X_CORE is not set
+# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_3M is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_USB_DMC_TSC10 is not set
+# CONFIG_TOUCHSCREEN_USB_E2I is not set
+# CONFIG_TOUCHSCREEN_USB_EASYTOUCH is not set
+# CONFIG_TOUCHSCREEN_USB_EGALAX is not set
+# CONFIG_TOUCHSCREEN_USB_ELO is not set
+# CONFIG_TOUCHSCREEN_USB_ETT_TC45USB is not set
+# CONFIG_TOUCHSCREEN_USB_ETURBO is not set
+# CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH is not set
+# CONFIG_TOUCHSCREEN_USB_GOTOP is not set
+# CONFIG_TOUCHSCREEN_USB_GUNZE is not set
+# CONFIG_TOUCHSCREEN_USB_IDEALTEK is not set
+# CONFIG_TOUCHSCREEN_USB_IRTOUCH is not set
+# CONFIG_TOUCHSCREEN_USB_ITM is not set
+# CONFIG_TOUCHSCREEN_USB_JASTEC is not set
+# CONFIG_TOUCHSCREEN_USB_NEXIO is not set
+# CONFIG_TOUCHSCREEN_USB_PANJIT is not set
+# CONFIG_TOUCHSCREEN_USB_ZYTRONIC is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
+# CONFIG_TOUCHSCREEN_WM831X is not set
+# CONFIG_TOUCHSCREEN_WM9705 is not set
+# CONFIG_TOUCHSCREEN_WM9712 is not set
+# CONFIG_TOUCHSCREEN_WM9713 is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set
+# CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE is not set
+# CONFIG_TOUCHSCREEN_ZET6223 is not set
+# CONFIG_TOUCHSCREEN_ZFORCE is not set
+# CONFIG_TOUCHSCREEN_ZINITIX is not set
+# CONFIG_TPL0102 is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_TRACEPOINT_BENCHMARK is not set
+# CONFIG_TRACER_SNAPSHOT is not set
+# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_TRACE_EVAL_MAP_FILE is not set
+# CONFIG_TRACE_EVENT_INJECT is not set
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_TRACE_SINK is not set
+# CONFIG_TRACING_EVENTS_GPIO is not set
+CONFIG_TRACING_SUPPORT=y
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_TRANSPARENT_HUGEPAGE is not set
+# CONFIG_TREE_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_TRIM_UNUSED_KSYMS is not set
+# CONFIG_TRUSTED_FOUNDATIONS is not set
+# CONFIG_TRUSTED_KEYS is not set
+# CONFIG_TSL2583 is not set
+# CONFIG_TSL2591 is not set
+# CONFIG_TSL2772 is not set
+# CONFIG_TSL2x7x is not set
+# CONFIG_TSL4531 is not set
+# CONFIG_TSYS01 is not set
+# CONFIG_TSYS02D is not set
+# CONFIG_TTPCI_EEPROM is not set
+CONFIG_TTY=y
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_TUN is not set
+# CONFIG_TUN_VNET_CROSS_LE is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL4030_MADC is not set
+# CONFIG_TWL6030_GPADC is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_TYPEC is not set
+# CONFIG_TYPEC_TCPM is not set
+# CONFIG_TYPEC_UCSI is not set
+# CONFIG_TYPHOON is not set
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+# CONFIG_UBIFS_ATIME_SUPPORT is not set
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+# CONFIG_UBIFS_FS_AUTHENTICATION is not set
+# CONFIG_UBIFS_FS_ENCRYPTION is not set
+CONFIG_UBIFS_FS_LZO=y
+# CONFIG_UBIFS_FS_SECURITY is not set
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_ZLIB=y
+CONFIG_UBIFS_FS_ZSTD=y
+# CONFIG_UBSAN is not set
+CONFIG_UBSAN_ALIGNMENT=y
+# CONFIG_UBSAN_MISC is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_UCSI is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDMABUF is not set
+CONFIG_UEVENT_HELPER=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_UFS_FS is not set
+# CONFIG_UHID is not set
+CONFIG_UID16=y
+# CONFIG_UIO is not set
+# CONFIG_ULTRA is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_UNICODE is not set
+# CONFIG_UNISYSSPAR is not set
+# CONFIG_UNISYS_VISORBUS is not set
+CONFIG_UNIX=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_UNIX_DIAG is not set
+CONFIG_UNIX_SCM=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_UNWINDER_FRAME_POINTER is not set
+# CONFIG_UPROBES is not set
+# CONFIG_UPROBE_EVENTS is not set
+# CONFIG_US5182D is not set
+# CONFIG_USB is not set
+# CONFIG_USB4 is not set
+# CONFIG_USBIP_CORE is not set
+CONFIG_USBIP_VHCI_HC_PORTS=8
+CONFIG_USBIP_VHCI_NR_HCS=1
+# CONFIG_USBIP_VUDC is not set
+# CONFIG_USBPCWATCHDOG is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AIRSPY is not set
+CONFIG_USB_ALI_M5632=y
+# CONFIG_USB_AMD5536UDC is not set
+CONFIG_USB_AN2720=y
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARMLINUX=y
+# CONFIG_USB_ATM is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_AUTOSUSPEND_DELAY=2
+# CONFIG_USB_BDC_UDC is not set
+CONFIG_USB_BELKIN=y
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_CDNS3 is not set
+# CONFIG_USB_CDNS_SUPPORT is not set
+# CONFIG_USB_CHAOSKEY is not set
+# CONFIG_USB_CHIPIDEA is not set
+# CONFIG_USB_CHIPIDEA_GENERIC is not set
+# CONFIG_USB_CHIPIDEA_IMX is not set
+# CONFIG_USB_CHIPIDEA_MSM is not set
+# CONFIG_USB_CHIPIDEA_PCI is not set
+# CONFIG_USB_CHIPIDEA_TEGRA is not set
+# CONFIG_USB_CONFIGFS is not set
+# CONFIG_USB_CONN_GPIO is not set
+# CONFIG_USB_CXACRU is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+CONFIG_USB_DEFAULT_PERSIST=y
+# CONFIG_USB_DSBR is not set
+# CONFIG_USB_DUMMY_HCD is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_DWC2_DEBUG is not set
+# CONFIG_USB_DWC2_DUAL_ROLE is not set
+# CONFIG_USB_DWC2_HOST is not set
+# CONFIG_USB_DWC2_PERIPHERAL is not set
+# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
+# CONFIG_USB_DWC3 is not set
+# CONFIG_USB_DWC3_EXYNOS is not set
+# CONFIG_USB_DWC3_HAPS is not set
+# CONFIG_USB_DWC3_KEYSTONE is not set
+# CONFIG_USB_DWC3_OF_SIMPLE is not set
+# CONFIG_USB_DWC3_PCI is not set
+# CONFIG_USB_DWC3_QCOM is not set
+# CONFIG_USB_DWC3_ULPI is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_EG20T is not set
+# CONFIG_USB_EHCI_ATH79 is not set
+# CONFIG_USB_EHCI_FSL is not set
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_EHCI_HCD_AT91 is not set
+# CONFIG_USB_EHCI_HCD_OMAP is not set
+# CONFIG_USB_EHCI_HCD_PPC_OF is not set
+# CONFIG_USB_EHCI_MSM is not set
+# CONFIG_USB_EHCI_MV is not set
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+# CONFIG_USB_EHSET_TEST_FIXTURE is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EPSON2888 is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_EZUSB_FX2 is not set
+# CONFIG_USB_FEW_INIT_RETRIES is not set
+# CONFIG_USB_FOTG210_HCD is not set
+# CONFIG_USB_FOTG210_UDC is not set
+# CONFIG_USB_FSL_USB2 is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_FUSB300 is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+CONFIG_USB_GADGET_VBUS_DRAW=2
+# CONFIG_USB_GADGET_XILINX is not set
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GOKU is not set
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_GR_UDC is not set
+# CONFIG_USB_GSPCA is not set
+# CONFIG_USB_GSPCA_BENQ is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_CPIA1 is not set
+# CONFIG_USB_GSPCA_DTCS033 is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
+# CONFIG_USB_GSPCA_JL2005BCD is not set
+# CONFIG_USB_GSPCA_KINECT is not set
+# CONFIG_USB_GSPCA_KONICA is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_NW80X is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_OV534_9 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7302 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SE401 is not set
+# CONFIG_USB_GSPCA_SN9C2028 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA1528 is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_SQ930X is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_STK1135 is not set
+# CONFIG_USB_GSPCA_STV0680 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TOPRO is not set
+# CONFIG_USB_GSPCA_TOUPTEK is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_VICAM is not set
+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_USB_G_ACM_MS is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_G_NOKIA is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_G_WEBCAM is not set
+# CONFIG_USB_HACKRF is not set
+# CONFIG_USB_HCD_TEST_MODE is not set
+# CONFIG_USB_HID is not set
+# CONFIG_USB_HIDDEV is not set
+# CONFIG_USB_HSIC_USB3503 is not set
+# CONFIG_USB_HSIC_USB4604 is not set
+# CONFIG_USB_HSO is not set
+# CONFIG_USB_HUB_USB251XB is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_IMX21_HCD is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1301 is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_ISP1760 is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_KC2190 is not set
+# CONFIG_USB_LAN78XX is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set
+# CONFIG_USB_LED_TRIG is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LGM_PHY is not set
+# CONFIG_USB_LINK_LAYER_TEST is not set
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_MASS_STORAGE is not set
+# CONFIG_USB_MAX3420_UDC is not set
+# CONFIG_USB_MAX3421_HCD is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_MSI2500 is not set
+# CONFIG_USB_MSM_OTG is not set
+# CONFIG_USB_MTU3 is not set
+# CONFIG_USB_MUSB_GADGET is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MV_U3D is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_MXS_PHY is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_NET2280 is not set
+# CONFIG_USB_NET_AQC111 is not set
+# CONFIG_USB_NET_AX88179_178A is not set
+# CONFIG_USB_NET_AX8817X is not set
+# CONFIG_USB_NET_CDCETHER is not set
+# CONFIG_USB_NET_CDC_EEM is not set
+# CONFIG_USB_NET_CDC_MBIM is not set
+# CONFIG_USB_NET_CDC_NCM is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_CH9200 is not set
+# CONFIG_USB_NET_CX82310_ETH is not set
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_DRIVERS is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
+# CONFIG_USB_NET_INT51X1 is not set
+# CONFIG_USB_NET_KALMIA is not set
+# CONFIG_USB_NET_MCS7830 is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_QMI_WWAN is not set
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_USB_NET_SMSC75XX is not set
+# CONFIG_USB_NET_SMSC95XX is not set
+# CONFIG_USB_NET_SR9700 is not set
+# CONFIG_USB_NET_SR9800 is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_OHCI_HCD_PCI is not set
+# CONFIG_USB_OHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OHCI_HCD_PPC_OF_BE is not set
+# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set
+# CONFIG_USB_OHCI_HCD_SSB is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set
+# CONFIG_USB_OTG_FSM is not set
+# CONFIG_USB_OTG_PRODUCTLIST is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_PCI is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_PHY is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_PWC_INPUT_EVDEV is not set
+# CONFIG_USB_PXA27X is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_RAW_GADGET is not set
+# CONFIG_USB_RCAR_PHY is not set
+# CONFIG_USB_RENESAS_USBHS is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_ROLES_INTEL_XHCI is not set
+# CONFIG_USB_ROLE_SWITCH is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_RTL8152 is not set
+# CONFIG_USB_RTL8153_ECM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_CP210X is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_F81232 is not set
+# CONFIG_USB_SERIAL_F8153X is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_METRO is not set
+# CONFIG_USB_SERIAL_MOS7715_PARPORT is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MXUPORT is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_OPTION is not set
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
+# CONFIG_USB_SERIAL_QT2 is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+CONFIG_USB_SERIAL_SAFE_PADDED=y
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SIMPLE is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_SSU100 is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_UPD78F0730 is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_WISHBONE is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_XR is not set
+# CONFIG_USB_SERIAL_XSENS_MT is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_SIERRA_NET is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_SNP_UDC_PLAT is not set
+# CONFIG_USB_SPEEDTOUCH is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_USB_SWITCH_FSA9480 is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_TMC is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_UAS is not set
+# CONFIG_USB_UEAGLEATM is not set
+# CONFIG_USB_ULPI is not set
+# CONFIG_USB_ULPI_BUS is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_USS720 is not set
+# CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+# CONFIG_USB_VL600 is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+# CONFIG_USB_XHCI_DBGCAP is not set
+# CONFIG_USB_XHCI_HCD is not set
+# CONFIG_USB_XHCI_MVEBU is not set
+# CONFIG_USB_XHCI_PCI_RENESAS is not set
+# CONFIG_USB_XUSBATM is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USELIB is not set
+# CONFIG_USERFAULTFD is not set
+# CONFIG_USERIO is not set
+# CONFIG_USE_OF is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_UWB is not set
+# CONFIG_U_SERIAL_CONSOLE is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+# CONFIG_V4L_PLATFORM_DRIVERS is not set
+# CONFIG_V4L_TEST_DRIVERS is not set
+# CONFIG_VALIDATE_FS_PARSER is not set
+# CONFIG_VBOXGUEST is not set
+# CONFIG_VCNL3020 is not set
+# CONFIG_VCNL4000 is not set
+# CONFIG_VCNL4035 is not set
+# CONFIG_VDPA is not set
+CONFIG_VDSO=y
+# CONFIG_VEML6030 is not set
+# CONFIG_VEML6070 is not set
+# CONFIG_VETH is not set
+# CONFIG_VEXPRESS_CONFIG is not set
+# CONFIG_VF610_ADC is not set
+# CONFIG_VF610_DAC is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_VFIO is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VGA_ARB is not set
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_VGA_SWITCHEROO is not set
+# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
+CONFIG_VHOST_MENU=y
+# CONFIG_VHOST_NET is not set
+# CONFIG_VHOST_VSOCK is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_VIDEO_AD5398 is not set
+# CONFIG_VIDEO_AD5820 is not set
+# CONFIG_VIDEO_AD9389B is not set
+# CONFIG_VIDEO_ADP1653 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_ADV7183 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_ADV7393 is not set
+# CONFIG_VIDEO_ADV748X is not set
+# CONFIG_VIDEO_ADV7511 is not set
+# CONFIG_VIDEO_ADV7604 is not set
+# CONFIG_VIDEO_ADV7842 is not set
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_AK7375 is not set
+# CONFIG_VIDEO_AK881X is not set
+# CONFIG_VIDEO_AM437X_VPFE is not set
+# CONFIG_VIDEO_ASPEED is not set
+# CONFIG_VIDEO_ATMEL_ISC is not set
+# CONFIG_VIDEO_ATMEL_ISI is not set
+# CONFIG_VIDEO_AU0828 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT848 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_CADENCE is not set
+# CONFIG_VIDEO_CAFE_CCIC is not set
+# CONFIG_VIDEO_CCS is not set
+# CONFIG_VIDEO_CS3308 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_CX231XX is not set
+# CONFIG_VIDEO_CX2341X is not set
+# CONFIG_VIDEO_CX25840 is not set
+# CONFIG_VIDEO_CX88 is not set
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_VIDEO_DM6446_CCDC is not set
+# CONFIG_VIDEO_DT3155 is not set
+# CONFIG_VIDEO_DW9714 is not set
+# CONFIG_VIDEO_DW9768 is not set
+# CONFIG_VIDEO_DW9807_VCM is not set
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_ET8EK8 is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_GO7007 is not set
+# CONFIG_VIDEO_GS1662 is not set
+# CONFIG_VIDEO_HDPVR is not set
+# CONFIG_VIDEO_HEXIUM_GEMINI is not set
+# CONFIG_VIDEO_HEXIUM_ORION is not set
+# CONFIG_VIDEO_HI556 is not set
+# CONFIG_VIDEO_I2C is not set
+# CONFIG_VIDEO_IMX214 is not set
+# CONFIG_VIDEO_IMX219 is not set
+# CONFIG_VIDEO_IMX258 is not set
+# CONFIG_VIDEO_IMX274 is not set
+# CONFIG_VIDEO_IMX290 is not set
+# CONFIG_VIDEO_IMX319 is not set
+# CONFIG_VIDEO_IMX334 is not set
+# CONFIG_VIDEO_IMX335 is not set
+# CONFIG_VIDEO_IMX355 is not set
+# CONFIG_VIDEO_IMX412 is not set
+# CONFIG_VIDEO_IMX477 is not set
+# CONFIG_VIDEO_IRS1125 is not set
+# CONFIG_VIDEO_IR_I2C is not set
+# CONFIG_VIDEO_IVTV is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_LM3560 is not set
+# CONFIG_VIDEO_LM3646 is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_M5MOLS is not set
+# CONFIG_VIDEO_MAX9286 is not set
+# CONFIG_VIDEO_ML86V7667 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_MT9M001 is not set
+# CONFIG_VIDEO_MT9M032 is not set
+# CONFIG_VIDEO_MT9M111 is not set
+# CONFIG_VIDEO_MT9P031 is not set
+# CONFIG_VIDEO_MT9T001 is not set
+# CONFIG_VIDEO_MT9T112 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_MT9V032 is not set
+# CONFIG_VIDEO_MT9V111 is not set
+# CONFIG_VIDEO_MUX is not set
+# CONFIG_VIDEO_MXB is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+# CONFIG_VIDEO_OMAP2_VOUT is not set
+# CONFIG_VIDEO_OV02A10 is not set
+# CONFIG_VIDEO_OV13858 is not set
+# CONFIG_VIDEO_OV2311 is not set
+# CONFIG_VIDEO_OV2640 is not set
+# CONFIG_VIDEO_OV2659 is not set
+# CONFIG_VIDEO_OV2680 is not set
+# CONFIG_VIDEO_OV2685 is not set
+# CONFIG_VIDEO_OV2740 is not set
+# CONFIG_VIDEO_OV5640 is not set
+# CONFIG_VIDEO_OV5645 is not set
+# CONFIG_VIDEO_OV5647 is not set
+# CONFIG_VIDEO_OV5648 is not set
+# CONFIG_VIDEO_OV5670 is not set
+# CONFIG_VIDEO_OV5675 is not set
+# CONFIG_VIDEO_OV5695 is not set
+# CONFIG_VIDEO_OV6650 is not set
+# CONFIG_VIDEO_OV7251 is not set
+# CONFIG_VIDEO_OV7640 is not set
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_OV772X is not set
+# CONFIG_VIDEO_OV7740 is not set
+# CONFIG_VIDEO_OV8856 is not set
+# CONFIG_VIDEO_OV8865 is not set
+# CONFIG_VIDEO_OV9281 is not set
+# CONFIG_VIDEO_OV9282 is not set
+# CONFIG_VIDEO_OV9640 is not set
+# CONFIG_VIDEO_OV9650 is not set
+# CONFIG_VIDEO_OV9734 is not set
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_RDACM20 is not set
+# CONFIG_VIDEO_RDACM21 is not set
+# CONFIG_VIDEO_RJ54N1 is not set
+# CONFIG_VIDEO_S5C73M3 is not set
+# CONFIG_VIDEO_S5K4ECGX is not set
+# CONFIG_VIDEO_S5K5BAF is not set
+# CONFIG_VIDEO_S5K6A3 is not set
+# CONFIG_VIDEO_S5K6AA is not set
+# CONFIG_VIDEO_SAA6588 is not set
+# CONFIG_VIDEO_SAA6752HS is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7134 is not set
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_SH_MOBILE_CEU is not set
+# CONFIG_VIDEO_SMIAPP is not set
+# CONFIG_VIDEO_SONY_BTF_MPX is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_STK1160_COMMON is not set
+# CONFIG_VIDEO_ST_MIPID02 is not set
+# CONFIG_VIDEO_TC358743 is not set
+# CONFIG_VIDEO_TDA1997X is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_THS8200 is not set
+# CONFIG_VIDEO_TIMBERDALE is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_TM6000 is not set
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_TW2804 is not set
+# CONFIG_VIDEO_TW9903 is not set
+# CONFIG_VIDEO_TW9906 is not set
+# CONFIG_VIDEO_TW9910 is not set
+# CONFIG_VIDEO_UDA1342 is not set
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+# CONFIG_VIDEO_USBTV is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_VIDEO_V4L2 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+# CONFIG_VIDEO_VPX3220 is not set
+# CONFIG_VIDEO_VS6624 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_XILINX is not set
+# CONFIG_VIDEO_ZORAN is not set
+# CONFIG_VIRTIO_BALLOON is not set
+# CONFIG_VIRTIO_BLK_SCSI is not set
+# CONFIG_VIRTIO_CONSOLE is not set
+# CONFIG_VIRTIO_FS is not set
+# CONFIG_VIRTIO_INPUT is not set
+CONFIG_VIRTIO_MENU=y
+# CONFIG_VIRTIO_MMIO is not set
+# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set
+# CONFIG_VIRTIO_PCI is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
+# CONFIG_VIRT_DRIVERS is not set
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_VL53L0X_I2C is not set
+# CONFIG_VL6180 is not set
+CONFIG_VLAN_8021Q=y
+# CONFIG_VLAN_8021Q_GVRP is not set
+# CONFIG_VLAN_8021Q_MVRP is not set
+# CONFIG_VME_BUS is not set
+# CONFIG_VMLINUX_MAP is not set
+# CONFIG_VMSPLIT_1G is not set
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_2G_OPT is not set
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_3G_OPT is not set
+# CONFIG_VMWARE_PVSCSI is not set
+# CONFIG_VMXNET3 is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_VOP_BUS is not set
+# CONFIG_VORTEX is not set
+# CONFIG_VSOCKETS is not set
+# CONFIG_VSOCKETS_DIAG is not set
+# CONFIG_VT is not set
+# CONFIG_VT6655 is not set
+# CONFIG_VT6656 is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_VXGE is not set
+# CONFIG_VXLAN is not set
+# CONFIG_VZ89X is not set
+# CONFIG_W1 is not set
+# CONFIG_W1_CON is not set
+# CONFIG_W1_MASTER_DS1WM is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_GPIO is not set
+# CONFIG_W1_MASTER_MATROX is not set
+# CONFIG_W1_MASTER_SGI is not set
+# CONFIG_W1_SLAVE_DS2405 is not set
+# CONFIG_W1_SLAVE_DS2406 is not set
+# CONFIG_W1_SLAVE_DS2408 is not set
+# CONFIG_W1_SLAVE_DS2413 is not set
+# CONFIG_W1_SLAVE_DS2423 is not set
+# CONFIG_W1_SLAVE_DS2430 is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+# CONFIG_W1_SLAVE_DS2438 is not set
+# CONFIG_W1_SLAVE_DS250X is not set
+# CONFIG_W1_SLAVE_DS2780 is not set
+# CONFIG_W1_SLAVE_DS2781 is not set
+# CONFIG_W1_SLAVE_DS2805 is not set
+# CONFIG_W1_SLAVE_DS28E04 is not set
+# CONFIG_W1_SLAVE_DS28E17 is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W83627HF_WDT is not set
+# CONFIG_W83877F_WDT is not set
+# CONFIG_W83977F_WDT is not set
+# CONFIG_WAN is not set
+# CONFIG_WANXL is not set
+# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_CORE is not set
+CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
+# CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+CONFIG_WATCHDOG_OPEN_TIMEOUT=0
+# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set
+# CONFIG_WATCHDOG_SYSFS is not set
+# CONFIG_WATCH_QUEUE is not set
+# CONFIG_WD80x3 is not set
+# CONFIG_WDAT_WDT is not set
+# CONFIG_WDTPCI is not set
+# CONFIG_WERROR is not set
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PRIV=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
+CONFIG_WILINK_PLATFORM_DATA=y
+# CONFIG_WIMAX is not set
+# CONFIG_WIREGUARD is not set
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+# CONFIG_WIRELESS_WDS is not set
+# CONFIG_WIZNET_W5100 is not set
+# CONFIG_WIZNET_W5300 is not set
+# CONFIG_WL1251 is not set
+# CONFIG_WL12XX is not set
+# CONFIG_WL18XX is not set
+CONFIG_WLAN=y
+# CONFIG_WLAN_VENDOR_ADMTEK is not set
+# CONFIG_WLAN_VENDOR_ATH is not set
+# CONFIG_WLAN_VENDOR_ATMEL is not set
+# CONFIG_WLAN_VENDOR_BROADCOM is not set
+# CONFIG_WLAN_VENDOR_CISCO is not set
+# CONFIG_WLAN_VENDOR_INTEL is not set
+# CONFIG_WLAN_VENDOR_INTERSIL is not set
+# CONFIG_WLAN_VENDOR_MARVELL is not set
+# CONFIG_WLAN_VENDOR_MEDIATEK is not set
+# CONFIG_WLAN_VENDOR_MICROCHIP is not set
+# CONFIG_WLAN_VENDOR_QUANTENNA is not set
+# CONFIG_WLAN_VENDOR_RALINK is not set
+# CONFIG_WLAN_VENDOR_REALTEK is not set
+# CONFIG_WLAN_VENDOR_RSI is not set
+# CONFIG_WLAN_VENDOR_ST is not set
+# CONFIG_WLAN_VENDOR_TI is not set
+# CONFIG_WLAN_VENDOR_ZYDAS is not set
+# CONFIG_WLCORE is not set
+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
+# CONFIG_WQ_WATCHDOG is not set
+# CONFIG_WWAN is not set
+# CONFIG_WWAN_HWSIM is not set
+# CONFIG_WW_MUTEX_SELFTEST is not set
+# CONFIG_X25 is not set
+# CONFIG_X509_CERTIFICATE_PARSER is not set
+# CONFIG_X86_PKG_TEMP_THERMAL is not set
+CONFIG_X86_SYSFB=y
+# CONFIG_XDP_SOCKETS is not set
+# CONFIG_XEN is not set
+# CONFIG_XEN_GRANT_DMA_ALLOC is not set
+# CONFIG_XEN_PVCALLS_FRONTEND is not set
+CONFIG_XEN_SCRUB_PAGES_DEFAULT=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_INTERFACE is not set
+# CONFIG_XFRM_IPCOMP is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_XFS_ONLINE_SCRUB is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_SUPPORT_V4 is not set
+# CONFIG_XFS_WARN is not set
+# CONFIG_XILINX_AXI_EMAC is not set
+# CONFIG_XILINX_DMA is not set
+# CONFIG_XILINX_EMACLITE is not set
+# CONFIG_XILINX_GMII2RGMII is not set
+# CONFIG_XILINX_LL_TEMAC is not set
+# CONFIG_XILINX_SDFEC is not set
+# CONFIG_XILINX_VCU is not set
+# CONFIG_XILINX_WATCHDOG is not set
+# CONFIG_XILINX_XADC is not set
+# CONFIG_XILINX_ZYNQMP_DMA is not set
+# CONFIG_XILINX_ZYNQMP_DPDMA is not set
+# CONFIG_XILLYBUS is not set
+# CONFIG_XILLYUSB is not set
+# CONFIG_XIL_AXIS_FIFO is not set
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_XMON is not set
+CONFIG_XZ_DEC=y
+# CONFIG_XZ_DEC_ARM is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_BCJ is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_SPARC is not set
+# CONFIG_XZ_DEC_TEST is not set
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_YAM is not set
+# CONFIG_YAMAHA_YAS530 is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_YENTA is not set
+# CONFIG_YENTA_O2 is not set
+# CONFIG_YENTA_RICOH is not set
+# CONFIG_YENTA_TI is not set
+# CONFIG_YENTA_TOSHIBA is not set
+# CONFIG_ZBUD is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_ZD1211RW_DEBUG is not set
+# CONFIG_ZEROPLUS_FF is not set
+# CONFIG_ZERO_CALL_USED_REGS is not set
+# CONFIG_ZIIRAVE_WATCHDOG is not set
+# CONFIG_ZISOFS is not set
+# CONFIG_ZLIB_DEFLATE is not set
+# CONFIG_ZLIB_INFLATE is not set
+CONFIG_ZONE_DMA=y
+# CONFIG_ZOPT2201 is not set
+# CONFIG_ZPA2326 is not set
+# CONFIG_ZPOOL is not set
+# CONFIG_ZRAM is not set
+# CONFIG_ZRAM_DEF_COMP_LZ4 is not set
+# CONFIG_ZRAM_DEF_COMP_LZO is not set
+# CONFIG_ZRAM_DEF_COMP_LZORLE is not set
+# CONFIG_ZRAM_DEF_COMP_ZSTD is not set
+# CONFIG_ZRAM_MEMORY_TRACKING is not set
+# CONFIG_ZSMALLOC is not set
+# CONFIG_ZX_TDM is not set

diff --git a/target/linux/generic/hack-6.0/204-module_strip.patch b/target/linux/generic/hack-6.0/204-module_strip.patch
new file mode 100644 (file)
index 0000000..ee39d15
--- /dev/null
+++ b/target/linux/generic/hack-6.0/204-module_strip.patch
@@ -0,0 +1,212 @@
+From a779a482fb9b9f8fcdf8b2519c789b4b9bb5dd05 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Fri, 7 Jul 2017 16:56:48 +0200
+Subject: build: add a hack for removing non-essential module info
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/linux/module.h      | 13 ++++++++-----
+ include/linux/moduleparam.h | 15 ++++++++++++---
+ init/Kconfig                |  7 +++++++
+ kernel/module.c             |  5 ++++-
+ scripts/mod/modpost.c       | 12 ++++++++++++
+ 5 files changed, 43 insertions(+), 9 deletions(-)
+
+--- a/include/linux/module.h
++++ b/include/linux/module.h
+@@ -164,6 +164,7 @@ extern void cleanup_module(void);
+ 
+ /* Generic info of form tag = "info" */
+ #define MODULE_INFO(tag, info) __MODULE_INFO(tag, tag, info)
++#define MODULE_INFO_STRIP(tag, info) __MODULE_INFO_STRIP(tag, tag, info)
+ 
+ /* For userspace: you can also call me... */
+ #define MODULE_ALIAS(_alias) MODULE_INFO(alias, _alias)
+@@ -233,12 +234,12 @@ extern void cleanup_module(void);
+  * Author(s), use "Name <email>" or just "Name", for multiple
+  * authors use multiple MODULE_AUTHOR() statements/lines.
+  */
+-#define MODULE_AUTHOR(_author) MODULE_INFO(author, _author)
++#define MODULE_AUTHOR(_author) MODULE_INFO_STRIP(author, _author)
+ 
+ /* What your module does. */
+-#define MODULE_DESCRIPTION(_description) MODULE_INFO(description, _description)
++#define MODULE_DESCRIPTION(_description) MODULE_INFO_STRIP(description, _description)
+ 
+-#ifdef MODULE
++#if defined(MODULE) && !defined(CONFIG_MODULE_STRIPPED)
+ /* Creates an alias so file2alias.c can find device table. */
+ #define MODULE_DEVICE_TABLE(type, name)                                       \
+ extern typeof(name) __mod_##type##__##name##_device_table             \
+@@ -265,7 +266,9 @@ extern typeof(name) __mod_##type##__##na
+  */
+ 
+ #if defined(MODULE) || !defined(CONFIG_SYSFS)
+-#define MODULE_VERSION(_version) MODULE_INFO(version, _version)
++#define MODULE_VERSION(_version) MODULE_INFO_STRIP(version, _version)
++#elif defined(CONFIG_MODULE_STRIPPED)
++#define MODULE_VERSION(_version) __MODULE_INFO_DISABLED(version)
+ #else
+ #define MODULE_VERSION(_version)                                      \
+       MODULE_INFO(version, _version);                                 \
+@@ -288,7 +291,7 @@ extern typeof(name) __mod_##type##__##na
+ /* Optional firmware file (or files) needed by the module
+  * format is simply firmware file name.  Multiple firmware
+  * files require multiple MODULE_FIRMWARE() specifiers */
+-#define MODULE_FIRMWARE(_firmware) MODULE_INFO(firmware, _firmware)
++#define MODULE_FIRMWARE(_firmware) MODULE_INFO_STRIP(firmware, _firmware)
+ 
+ #define MODULE_IMPORT_NS(ns) MODULE_INFO(import_ns, #ns)
+ 
+--- a/include/linux/moduleparam.h
++++ b/include/linux/moduleparam.h
+@@ -20,6 +20,16 @@
+ /* Chosen so that structs with an unsigned long line up. */
+ #define MAX_PARAM_PREFIX_LEN (64 - sizeof(unsigned long))
+ 
++/* This struct is here for syntactic coherency, it is not used */
++#define __MODULE_INFO_DISABLED(name)                                    \
++  struct __UNIQUE_ID(name) {}
++
++#ifdef CONFIG_MODULE_STRIPPED
++#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO_DISABLED(name)
++#else
++#define __MODULE_INFO_STRIP(tag, name, info) __MODULE_INFO(tag, name, info)
++#endif
++
+ #define __MODULE_INFO(tag, name, info)                                          \
+       static const char __UNIQUE_ID(name)[]                             \
+               __used __section(".modinfo") __aligned(1)                 \
+@@ -31,7 +41,7 @@
+ /* One for each parameter, describing how to use it.  Some files do
+    multiple of these per line, so can't just use MODULE_INFO. */
+ #define MODULE_PARM_DESC(_parm, desc) \
+-      __MODULE_INFO(parm, _parm, #_parm ":" desc)
++      __MODULE_INFO_STRIP(parm, _parm, #_parm ":" desc)
+ 
+ struct kernel_param;
+ 
+--- a/kernel/module/Kconfig
++++ b/kernel/module/Kconfig
+@@ -2352,6 +2352,13 @@ config UNUSED_KSYMS_WHITELIST
+         one per line. The path can be absolute, or relative to the kernel
+         source tree.
+ 
++config MODULE_STRIPPED
++      bool "Reduce module size"
++      depends on MODULES
++      help
++        Remove module parameter descriptions, author info, version, aliases,
++        device tables, etc.
++
+ endif # MODULES
+ 
+ config MODULES_TREE_LOOKUP
+--- a/kernel/module/main.c
++++ b/kernel/module/main.c
+@@ -1218,6 +1218,7 @@ static struct module_attribute *modinfo_
+ 
+ static const char vermagic[] = VERMAGIC_STRING;
+ 
++#if defined(CONFIG_MODVERSIONS) || !defined(CONFIG_MODULE_STRIPPED)
+ int try_to_force_load(struct module *mod, const char *reason)
+ {
+ #ifdef CONFIG_MODULE_FORCE_LOAD
+@@ -1229,6 +1230,7 @@ static int try_to_force_load(struct modu
+       return -ENOEXEC;
+ #endif
+ }
++#endif
+ 
+ static char *get_modinfo(const struct load_info *info, const char *tag);
+ static char *get_next_modinfo(const struct load_info *info, const char *tag,
+@@ -3266,9 +3268,11 @@ static int setup_load_info(struct load_i
+ 
+ static int check_modinfo(struct module *mod, struct load_info *info, int flags)
+ {
+-      const char *modmagic = get_modinfo(info, "vermagic");
+       int err;
+ 
++#ifndef CONFIG_MODULE_STRIPPED
++      const char *modmagic = get_modinfo(info, "vermagic");
++
+       if (flags & MODULE_INIT_IGNORE_VERMAGIC)
+               modmagic = NULL;
+ 
+@@ -3289,6 +3293,7 @@ static int check_modinfo(struct module *
+                               mod->name);
+               add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK);
+       }
++#endif
+ 
+       check_modinfo_retpoline(mod, info);
+ 
+--- a/scripts/mod/modpost.c
++++ b/scripts/mod/modpost.c
+@@ -2034,7 +2034,9 @@ static void read_symbols(const char *mod
+               symname = remove_dot(info.strtab + sym->st_name);
+ 
+               handle_symbol(mod, &info, sym, symname);
++#ifndef CONFIG_MODULE_STRIPPED
+               handle_moddevtable(mod, &info, sym, symname);
++#endif
+       }
+ 
+       for (sym = info.symtab_start; sym < info.symtab_stop; sym++) {
+@@ -2213,8 +2215,10 @@ static void add_header(struct buffer *b,
+       buf_printf(b, "BUILD_SALT;\n");
+       buf_printf(b, "BUILD_LTO_INFO;\n");
+       buf_printf(b, "\n");
++#ifndef CONFIG_MODULE_STRIPPED
+       buf_printf(b, "MODULE_INFO(vermagic, VERMAGIC_STRING);\n");
+       buf_printf(b, "MODULE_INFO(name, KBUILD_MODNAME);\n");
++#endif
+       buf_printf(b, "\n");
+       buf_printf(b, "__visible struct module __this_module\n");
+       buf_printf(b, "__section(\".gnu.linkonce.this_module\") = {\n");
+@@ -2231,8 +2235,10 @@ static void add_header(struct buffer *b,
+       buf_printf(b, "\t.arch = MODULE_ARCH_INIT,\n");
+       buf_printf(b, "};\n");
+ 
++#ifndef CONFIG_MODULE_STRIPPED
+       if (!external_module)
+               buf_printf(b, "\nMODULE_INFO(intree, \"Y\");\n");
++#endif
+ 
+       buf_printf(b,
+                  "\n"
+@@ -2245,8 +2251,10 @@ static void add_retpoline(struct buffer
+                  "MODULE_INFO(retpoline, \"Y\");\n"
+                  "#endif\n");
+ 
++#ifndef CONFIG_MODULE_STRIPPED
+       if (strstarts(mod->name, "drivers/staging"))
+               buf_printf(b, "\nMODULE_INFO(staging, \"Y\");\n");
++#endif
+ 
+       if (strstarts(mod->name, "tools/testing"))
+               buf_printf(b, "\nMODULE_INFO(test, \"Y\");\n");
+@@ -2326,11 +2334,13 @@ static void add_depends(struct buffer *b
+ 
+ static void add_srcversion(struct buffer *b, struct module *mod)
+ {
++#ifndef CONFIG_MODULE_STRIPPED
+       if (mod->srcversion[0]) {
+               buf_printf(b, "\n");
+               buf_printf(b, "MODULE_INFO(srcversion, \"%s\");\n",
+                          mod->srcversion);
+       }
++#endif
+ }
+ 
+ static void write_buf(struct buffer *b, const char *fname)
+@@ -2579,7 +2589,9 @@ int main(int argc, char **argv)
+       add_exported_symbols(&buf, mod);
+       add_versions(&buf, mod);
+       add_depends(&buf, mod);
++#ifndef CONFIG_MODULE_STRIPPED
+       add_moddevtable(&buf, mod);
++#endif
+       add_srcversion(&buf, mod);
+ 
+       ret = snprintf(fname, sizeof(fname), "%s.mod.c", mod->name);

diff --git a/target/linux/generic/hack-6.0/205-kconfig-exit.patch b/target/linux/generic/hack-6.0/205-kconfig-exit.patch
new file mode 100644 (file)
index 0000000..9f3bb8f
--- /dev/null
+++ b/target/linux/generic/hack-6.0/205-kconfig-exit.patch
@@ -0,0 +1,20 @@
+From 300d26562ce4dc427154cb247beb75db4b1f0774 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 13:29:57 +0200
+Subject: [PATCH] scripts/Kconfig: Kconfig exit
+
+---
+ scripts/kconfig/conf.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/scripts/kconfig/conf.c
++++ b/scripts/kconfig/conf.c
+@@ -435,6 +435,8 @@ static int conf_sym(struct menu *menu)
+                               break;
+                       continue;
+               case 0:
++                      if (!sym_has_value(sym) && !tty_stdio && getenv("FAIL_ON_UNCONFIGURED"))
++                              exit(1);
+                       newval = oldval;
+                       break;
+               case '?':

diff --git a/target/linux/generic/hack-6.0/210-darwin_scripts_include.patch b/target/linux/generic/hack-6.0/210-darwin_scripts_include.patch
new file mode 100644 (file)
index 0000000..be6adc0
--- /dev/null
+++ b/target/linux/generic/hack-6.0/210-darwin_scripts_include.patch
@@ -0,0 +1,3053 @@
+From db7c30dcd9a0391bf13b62c9f91e144d762ef43a Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <[email protected]>
+Date: Fri, 7 Jul 2017 17:00:49 +0200
+Subject: Add an OSX specific patch to make the kernel be compiled
+
+lede-commit: 3fc2a24f0422b2f55f9ed43f116db3111f700526
+Signed-off-by: Florian Fainelli <[email protected]>
+---
+ scripts/kconfig/Makefile   |    3 +
+ scripts/mod/elf.h          | 3007 ++++++++++++++++++++++++++++++++++++++++++++
+ scripts/mod/mk_elfconfig.c |    4 +
+ scripts/mod/modpost.h      |    4 +
+ 4 files changed, 3018 insertions(+)
+ create mode 100644 scripts/mod/elf.h
+
+--- /dev/null
++++ b/scripts/mod/elf.h
+@@ -0,0 +1,3007 @@
++/* This file defines standard ELF types, structures, and macros.
++   Copyright (C) 1995-2012 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#ifndef _ELF_H
++#define       _ELF_H 1
++
++/* Standard ELF types.  */
++
++#include <stdint.h>
++
++/* Type for a 16-bit quantity.  */
++typedef uint16_t Elf32_Half;
++typedef uint16_t Elf64_Half;
++
++/* Types for signed and unsigned 32-bit quantities.  */
++typedef uint32_t Elf32_Word;
++typedef       int32_t  Elf32_Sword;
++typedef uint32_t Elf64_Word;
++typedef       int32_t  Elf64_Sword;
++
++/* Types for signed and unsigned 64-bit quantities.  */
++typedef uint64_t Elf32_Xword;
++typedef       int64_t  Elf32_Sxword;
++typedef uint64_t Elf64_Xword;
++typedef       int64_t  Elf64_Sxword;
++
++/* Type of addresses.  */
++typedef uint32_t Elf32_Addr;
++typedef uint64_t Elf64_Addr;
++
++/* Type of file offsets.  */
++typedef uint32_t Elf32_Off;
++typedef uint64_t Elf64_Off;
++
++/* Type for section indices, which are 16-bit quantities.  */
++typedef uint16_t Elf32_Section;
++typedef uint16_t Elf64_Section;
++
++/* Type for version symbol information.  */
++typedef Elf32_Half Elf32_Versym;
++typedef Elf64_Half Elf64_Versym;
++
++
++/* The ELF file header.  This appears at the start of every ELF file.  */
++
++#define EI_NIDENT (16)
++
++typedef struct
++{
++  unsigned char       e_ident[EI_NIDENT];     /* Magic number and other info */
++  Elf32_Half  e_type;                 /* Object file type */
++  Elf32_Half  e_machine;              /* Architecture */
++  Elf32_Word  e_version;              /* Object file version */
++  Elf32_Addr  e_entry;                /* Entry point virtual address */
++  Elf32_Off   e_phoff;                /* Program header table file offset */
++  Elf32_Off   e_shoff;                /* Section header table file offset */
++  Elf32_Word  e_flags;                /* Processor-specific flags */
++  Elf32_Half  e_ehsize;               /* ELF header size in bytes */
++  Elf32_Half  e_phentsize;            /* Program header table entry size */
++  Elf32_Half  e_phnum;                /* Program header table entry count */
++  Elf32_Half  e_shentsize;            /* Section header table entry size */
++  Elf32_Half  e_shnum;                /* Section header table entry count */
++  Elf32_Half  e_shstrndx;             /* Section header string table index */
++} Elf32_Ehdr;
++
++typedef struct
++{
++  unsigned char       e_ident[EI_NIDENT];     /* Magic number and other info */
++  Elf64_Half  e_type;                 /* Object file type */
++  Elf64_Half  e_machine;              /* Architecture */
++  Elf64_Word  e_version;              /* Object file version */
++  Elf64_Addr  e_entry;                /* Entry point virtual address */
++  Elf64_Off   e_phoff;                /* Program header table file offset */
++  Elf64_Off   e_shoff;                /* Section header table file offset */
++  Elf64_Word  e_flags;                /* Processor-specific flags */
++  Elf64_Half  e_ehsize;               /* ELF header size in bytes */
++  Elf64_Half  e_phentsize;            /* Program header table entry size */
++  Elf64_Half  e_phnum;                /* Program header table entry count */
++  Elf64_Half  e_shentsize;            /* Section header table entry size */
++  Elf64_Half  e_shnum;                /* Section header table entry count */
++  Elf64_Half  e_shstrndx;             /* Section header string table index */
++} Elf64_Ehdr;
++
++/* Fields in the e_ident array.  The EI_* macros are indices into the
++   array.  The macros under each EI_* macro are the values the byte
++   may have.  */
++
++#define EI_MAG0               0               /* File identification byte 0 index */
++#define ELFMAG0               0x7f            /* Magic number byte 0 */
++
++#define EI_MAG1               1               /* File identification byte 1 index */
++#define ELFMAG1               'E'             /* Magic number byte 1 */
++
++#define EI_MAG2               2               /* File identification byte 2 index */
++#define ELFMAG2               'L'             /* Magic number byte 2 */
++
++#define EI_MAG3               3               /* File identification byte 3 index */
++#define ELFMAG3               'F'             /* Magic number byte 3 */
++
++/* Conglomeration of the identification bytes, for easy testing as a word.  */
++#define       ELFMAG          "\177ELF"
++#define       SELFMAG         4
++
++#define EI_CLASS      4               /* File class byte index */
++#define ELFCLASSNONE  0               /* Invalid class */
++#define ELFCLASS32    1               /* 32-bit objects */
++#define ELFCLASS64    2               /* 64-bit objects */
++#define ELFCLASSNUM   3
++
++#define EI_DATA               5               /* Data encoding byte index */
++#define ELFDATANONE   0               /* Invalid data encoding */
++#define ELFDATA2LSB   1               /* 2's complement, little endian */
++#define ELFDATA2MSB   2               /* 2's complement, big endian */
++#define ELFDATANUM    3
++
++#define EI_VERSION    6               /* File version byte index */
++                                      /* Value must be EV_CURRENT */
++
++#define EI_OSABI      7               /* OS ABI identification */
++#define ELFOSABI_NONE         0       /* UNIX System V ABI */
++#define ELFOSABI_SYSV         0       /* Alias.  */
++#define ELFOSABI_HPUX         1       /* HP-UX */
++#define ELFOSABI_NETBSD               2       /* NetBSD.  */
++#define ELFOSABI_GNU          3       /* Object uses GNU ELF extensions.  */
++#define ELFOSABI_LINUX                ELFOSABI_GNU /* Compatibility alias.  */
++#define ELFOSABI_SOLARIS      6       /* Sun Solaris.  */
++#define ELFOSABI_AIX          7       /* IBM AIX.  */
++#define ELFOSABI_IRIX         8       /* SGI Irix.  */
++#define ELFOSABI_FREEBSD      9       /* FreeBSD.  */
++#define ELFOSABI_TRU64                10      /* Compaq TRU64 UNIX.  */
++#define ELFOSABI_MODESTO      11      /* Novell Modesto.  */
++#define ELFOSABI_OPENBSD      12      /* OpenBSD.  */
++#define ELFOSABI_ARM_AEABI    64      /* ARM EABI */
++#define ELFOSABI_ARM          97      /* ARM */
++#define ELFOSABI_STANDALONE   255     /* Standalone (embedded) application */
++
++#define EI_ABIVERSION 8               /* ABI version */
++
++#define EI_PAD                9               /* Byte index of padding bytes */
++
++/* Legal values for e_type (object file type).  */
++
++#define ET_NONE               0               /* No file type */
++#define ET_REL                1               /* Relocatable file */
++#define ET_EXEC               2               /* Executable file */
++#define ET_DYN                3               /* Shared object file */
++#define ET_CORE               4               /* Core file */
++#define       ET_NUM          5               /* Number of defined types */
++#define ET_LOOS               0xfe00          /* OS-specific range start */
++#define ET_HIOS               0xfeff          /* OS-specific range end */
++#define ET_LOPROC     0xff00          /* Processor-specific range start */
++#define ET_HIPROC     0xffff          /* Processor-specific range end */
++
++/* Legal values for e_machine (architecture).  */
++
++#define EM_NONE                0              /* No machine */
++#define EM_M32                 1              /* AT&T WE 32100 */
++#define EM_SPARC       2              /* SUN SPARC */
++#define EM_386                 3              /* Intel 80386 */
++#define EM_68K                 4              /* Motorola m68k family */
++#define EM_88K                 5              /* Motorola m88k family */
++#define EM_860                 7              /* Intel 80860 */
++#define EM_MIPS                8              /* MIPS R3000 big-endian */
++#define EM_S370                9              /* IBM System/370 */
++#define EM_MIPS_RS3_LE        10              /* MIPS R3000 little-endian */
++
++#define EM_PARISC     15              /* HPPA */
++#define EM_VPP500     17              /* Fujitsu VPP500 */
++#define EM_SPARC32PLUS        18              /* Sun's "v8plus" */
++#define EM_960                19              /* Intel 80960 */
++#define EM_PPC                20              /* PowerPC */
++#define EM_PPC64      21              /* PowerPC 64-bit */
++#define EM_S390               22              /* IBM S390 */
++
++#define EM_V800               36              /* NEC V800 series */
++#define EM_FR20               37              /* Fujitsu FR20 */
++#define EM_RH32               38              /* TRW RH-32 */
++#define EM_RCE                39              /* Motorola RCE */
++#define EM_ARM                40              /* ARM */
++#define EM_FAKE_ALPHA 41              /* Digital Alpha */
++#define EM_SH         42              /* Hitachi SH */
++#define EM_SPARCV9    43              /* SPARC v9 64-bit */
++#define EM_TRICORE    44              /* Siemens Tricore */
++#define EM_ARC                45              /* Argonaut RISC Core */
++#define EM_H8_300     46              /* Hitachi H8/300 */
++#define EM_H8_300H    47              /* Hitachi H8/300H */
++#define EM_H8S                48              /* Hitachi H8S */
++#define EM_H8_500     49              /* Hitachi H8/500 */
++#define EM_IA_64      50              /* Intel Merced */
++#define EM_MIPS_X     51              /* Stanford MIPS-X */
++#define EM_COLDFIRE   52              /* Motorola Coldfire */
++#define EM_68HC12     53              /* Motorola M68HC12 */
++#define EM_MMA                54              /* Fujitsu MMA Multimedia Accelerator*/
++#define EM_PCP                55              /* Siemens PCP */
++#define EM_NCPU               56              /* Sony nCPU embeeded RISC */
++#define EM_NDR1               57              /* Denso NDR1 microprocessor */
++#define EM_STARCORE   58              /* Motorola Start*Core processor */
++#define EM_ME16               59              /* Toyota ME16 processor */
++#define EM_ST100      60              /* STMicroelectronic ST100 processor */
++#define EM_TINYJ      61              /* Advanced Logic Corp. Tinyj emb.fam*/
++#define EM_X86_64     62              /* AMD x86-64 architecture */
++#define EM_PDSP               63              /* Sony DSP Processor */
++
++#define EM_FX66               66              /* Siemens FX66 microcontroller */
++#define EM_ST9PLUS    67              /* STMicroelectronics ST9+ 8/16 mc */
++#define EM_ST7                68              /* STmicroelectronics ST7 8 bit mc */
++#define EM_68HC16     69              /* Motorola MC68HC16 microcontroller */
++#define EM_68HC11     70              /* Motorola MC68HC11 microcontroller */
++#define EM_68HC08     71              /* Motorola MC68HC08 microcontroller */
++#define EM_68HC05     72              /* Motorola MC68HC05 microcontroller */
++#define EM_SVX                73              /* Silicon Graphics SVx */
++#define EM_ST19               74              /* STMicroelectronics ST19 8 bit mc */
++#define EM_VAX                75              /* Digital VAX */
++#define EM_CRIS               76              /* Axis Communications 32-bit embedded processor */
++#define EM_JAVELIN    77              /* Infineon Technologies 32-bit embedded processor */
++#define EM_FIREPATH   78              /* Element 14 64-bit DSP Processor */
++#define EM_ZSP                79              /* LSI Logic 16-bit DSP Processor */
++#define EM_MMIX               80              /* Donald Knuth's educational 64-bit processor */
++#define EM_HUANY      81              /* Harvard University machine-independent object files */
++#define EM_PRISM      82              /* SiTera Prism */
++#define EM_AVR                83              /* Atmel AVR 8-bit microcontroller */
++#define EM_FR30               84              /* Fujitsu FR30 */
++#define EM_D10V               85              /* Mitsubishi D10V */
++#define EM_D30V               86              /* Mitsubishi D30V */
++#define EM_V850               87              /* NEC v850 */
++#define EM_M32R               88              /* Mitsubishi M32R */
++#define EM_MN10300    89              /* Matsushita MN10300 */
++#define EM_MN10200    90              /* Matsushita MN10200 */
++#define EM_PJ         91              /* picoJava */
++#define EM_OPENRISC   92              /* OpenRISC 32-bit embedded processor */
++#define EM_ARC_A5     93              /* ARC Cores Tangent-A5 */
++#define EM_XTENSA     94              /* Tensilica Xtensa Architecture */
++#define EM_TILEPRO    188             /* Tilera TILEPro */
++#define EM_TILEGX     191             /* Tilera TILE-Gx */
++#define EM_NUM                192
++
++/* If it is necessary to assign new unofficial EM_* values, please
++   pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the
++   chances of collision with official or non-GNU unofficial values.  */
++
++#define EM_ALPHA      0x9026
++
++/* Legal values for e_version (version).  */
++
++#define EV_NONE               0               /* Invalid ELF version */
++#define EV_CURRENT    1               /* Current version */
++#define EV_NUM                2
++
++/* Section header.  */
++
++typedef struct
++{
++  Elf32_Word  sh_name;                /* Section name (string tbl index) */
++  Elf32_Word  sh_type;                /* Section type */
++  Elf32_Word  sh_flags;               /* Section flags */
++  Elf32_Addr  sh_addr;                /* Section virtual addr at execution */
++  Elf32_Off   sh_offset;              /* Section file offset */
++  Elf32_Word  sh_size;                /* Section size in bytes */
++  Elf32_Word  sh_link;                /* Link to another section */
++  Elf32_Word  sh_info;                /* Additional section information */
++  Elf32_Word  sh_addralign;           /* Section alignment */
++  Elf32_Word  sh_entsize;             /* Entry size if section holds table */
++} Elf32_Shdr;
++
++typedef struct
++{
++  Elf64_Word  sh_name;                /* Section name (string tbl index) */
++  Elf64_Word  sh_type;                /* Section type */
++  Elf64_Xword sh_flags;               /* Section flags */
++  Elf64_Addr  sh_addr;                /* Section virtual addr at execution */
++  Elf64_Off   sh_offset;              /* Section file offset */
++  Elf64_Xword sh_size;                /* Section size in bytes */
++  Elf64_Word  sh_link;                /* Link to another section */
++  Elf64_Word  sh_info;                /* Additional section information */
++  Elf64_Xword sh_addralign;           /* Section alignment */
++  Elf64_Xword sh_entsize;             /* Entry size if section holds table */
++} Elf64_Shdr;
++
++/* Special section indices.  */
++
++#define SHN_UNDEF     0               /* Undefined section */
++#define SHN_LORESERVE 0xff00          /* Start of reserved indices */
++#define SHN_LOPROC    0xff00          /* Start of processor-specific */
++#define SHN_BEFORE    0xff00          /* Order section before all others
++                                         (Solaris).  */
++#define SHN_AFTER     0xff01          /* Order section after all others
++                                         (Solaris).  */
++#define SHN_HIPROC    0xff1f          /* End of processor-specific */
++#define SHN_LOOS      0xff20          /* Start of OS-specific */
++#define SHN_HIOS      0xff3f          /* End of OS-specific */
++#define SHN_ABS               0xfff1          /* Associated symbol is absolute */
++#define SHN_COMMON    0xfff2          /* Associated symbol is common */
++#define SHN_XINDEX    0xffff          /* Index is in extra table.  */
++#define SHN_HIRESERVE 0xffff          /* End of reserved indices */
++
++/* Legal values for sh_type (section type).  */
++
++#define SHT_NULL        0             /* Section header table entry unused */
++#define SHT_PROGBITS    1             /* Program data */
++#define SHT_SYMTAB      2             /* Symbol table */
++#define SHT_STRTAB      3             /* String table */
++#define SHT_RELA        4             /* Relocation entries with addends */
++#define SHT_HASH        5             /* Symbol hash table */
++#define SHT_DYNAMIC     6             /* Dynamic linking information */
++#define SHT_NOTE        7             /* Notes */
++#define SHT_NOBITS      8             /* Program space with no data (bss) */
++#define SHT_REL                 9             /* Relocation entries, no addends */
++#define SHT_SHLIB       10            /* Reserved */
++#define SHT_DYNSYM      11            /* Dynamic linker symbol table */
++#define SHT_INIT_ARRAY          14            /* Array of constructors */
++#define SHT_FINI_ARRAY          15            /* Array of destructors */
++#define SHT_PREINIT_ARRAY 16          /* Array of pre-constructors */
++#define SHT_GROUP       17            /* Section group */
++#define SHT_SYMTAB_SHNDX  18          /* Extended section indeces */
++#define       SHT_NUM           19            /* Number of defined types.  */
++#define SHT_LOOS        0x60000000    /* Start OS-specific.  */
++#define SHT_GNU_ATTRIBUTES 0x6ffffff5 /* Object attributes.  */
++#define SHT_GNU_HASH    0x6ffffff6    /* GNU-style hash table.  */
++#define SHT_GNU_LIBLIST         0x6ffffff7    /* Prelink library list */
++#define SHT_CHECKSUM    0x6ffffff8    /* Checksum for DSO content.  */
++#define SHT_LOSUNW      0x6ffffffa    /* Sun-specific low bound.  */
++#define SHT_SUNW_move   0x6ffffffa
++#define SHT_SUNW_COMDAT   0x6ffffffb
++#define SHT_SUNW_syminfo  0x6ffffffc
++#define SHT_GNU_verdef          0x6ffffffd    /* Version definition section.  */
++#define SHT_GNU_verneed         0x6ffffffe    /* Version needs section.  */
++#define SHT_GNU_versym          0x6fffffff    /* Version symbol table.  */
++#define SHT_HISUNW      0x6fffffff    /* Sun-specific high bound.  */
++#define SHT_HIOS        0x6fffffff    /* End OS-specific type */
++#define SHT_LOPROC      0x70000000    /* Start of processor-specific */
++#define SHT_HIPROC      0x7fffffff    /* End of processor-specific */
++#define SHT_LOUSER      0x80000000    /* Start of application-specific */
++#define SHT_HIUSER      0x8fffffff    /* End of application-specific */
++
++/* Legal values for sh_flags (section flags).  */
++
++#define SHF_WRITE          (1 << 0)   /* Writable */
++#define SHF_ALLOC          (1 << 1)   /* Occupies memory during execution */
++#define SHF_EXECINSTR      (1 << 2)   /* Executable */
++#define SHF_MERGE          (1 << 4)   /* Might be merged */
++#define SHF_STRINGS        (1 << 5)   /* Contains nul-terminated strings */
++#define SHF_INFO_LINK      (1 << 6)   /* `sh_info' contains SHT index */
++#define SHF_LINK_ORDER             (1 << 7)   /* Preserve order after combining */
++#define SHF_OS_NONCONFORMING (1 << 8) /* Non-standard OS specific handling
++                                         required */
++#define SHF_GROUP          (1 << 9)   /* Section is member of a group.  */
++#define SHF_TLS                    (1 << 10)  /* Section hold thread-local data.  */
++#define SHF_MASKOS         0x0ff00000 /* OS-specific.  */
++#define SHF_MASKPROC       0xf0000000 /* Processor-specific */
++#define SHF_ORDERED        (1 << 30)  /* Special ordering requirement
++                                         (Solaris).  */
++#define SHF_EXCLUDE        (1 << 31)  /* Section is excluded unless
++                                         referenced or allocated (Solaris).*/
++
++/* Section group handling.  */
++#define GRP_COMDAT    0x1             /* Mark group as COMDAT.  */
++
++/* Symbol table entry.  */
++
++typedef struct
++{
++  Elf32_Word  st_name;                /* Symbol name (string tbl index) */
++  Elf32_Addr  st_value;               /* Symbol value */
++  Elf32_Word  st_size;                /* Symbol size */
++  unsigned char       st_info;                /* Symbol type and binding */
++  unsigned char       st_other;               /* Symbol visibility */
++  Elf32_Section       st_shndx;               /* Section index */
++} Elf32_Sym;
++
++typedef struct
++{
++  Elf64_Word  st_name;                /* Symbol name (string tbl index) */
++  unsigned char       st_info;                /* Symbol type and binding */
++  unsigned char st_other;             /* Symbol visibility */
++  Elf64_Section       st_shndx;               /* Section index */
++  Elf64_Addr  st_value;               /* Symbol value */
++  Elf64_Xword st_size;                /* Symbol size */
++} Elf64_Sym;
++
++/* The syminfo section if available contains additional information about
++   every dynamic symbol.  */
++
++typedef struct
++{
++  Elf32_Half si_boundto;              /* Direct bindings, symbol bound to */
++  Elf32_Half si_flags;                        /* Per symbol flags */
++} Elf32_Syminfo;
++
++typedef struct
++{
++  Elf64_Half si_boundto;              /* Direct bindings, symbol bound to */
++  Elf64_Half si_flags;                        /* Per symbol flags */
++} Elf64_Syminfo;
++
++/* Possible values for si_boundto.  */
++#define SYMINFO_BT_SELF               0xffff  /* Symbol bound to self */
++#define SYMINFO_BT_PARENT     0xfffe  /* Symbol bound to parent */
++#define SYMINFO_BT_LOWRESERVE 0xff00  /* Beginning of reserved entries */
++
++/* Possible bitmasks for si_flags.  */
++#define SYMINFO_FLG_DIRECT    0x0001  /* Direct bound symbol */
++#define SYMINFO_FLG_PASSTHRU  0x0002  /* Pass-thru symbol for translator */
++#define SYMINFO_FLG_COPY      0x0004  /* Symbol is a copy-reloc */
++#define SYMINFO_FLG_LAZYLOAD  0x0008  /* Symbol bound to object to be lazy
++                                         loaded */
++/* Syminfo version values.  */
++#define SYMINFO_NONE          0
++#define SYMINFO_CURRENT               1
++#define SYMINFO_NUM           2
++
++
++/* How to extract and insert information held in the st_info field.  */
++
++#define ELF32_ST_BIND(val)            (((unsigned char) (val)) >> 4)
++#define ELF32_ST_TYPE(val)            ((val) & 0xf)
++#define ELF32_ST_INFO(bind, type)     (((bind) << 4) + ((type) & 0xf))
++
++/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field.  */
++#define ELF64_ST_BIND(val)            ELF32_ST_BIND (val)
++#define ELF64_ST_TYPE(val)            ELF32_ST_TYPE (val)
++#define ELF64_ST_INFO(bind, type)     ELF32_ST_INFO ((bind), (type))
++
++/* Legal values for ST_BIND subfield of st_info (symbol binding).  */
++
++#define STB_LOCAL     0               /* Local symbol */
++#define STB_GLOBAL    1               /* Global symbol */
++#define STB_WEAK      2               /* Weak symbol */
++#define       STB_NUM         3               /* Number of defined types.  */
++#define STB_LOOS      10              /* Start of OS-specific */
++#define STB_GNU_UNIQUE        10              /* Unique symbol.  */
++#define STB_HIOS      12              /* End of OS-specific */
++#define STB_LOPROC    13              /* Start of processor-specific */
++#define STB_HIPROC    15              /* End of processor-specific */
++
++/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
++
++#define STT_NOTYPE    0               /* Symbol type is unspecified */
++#define STT_OBJECT    1               /* Symbol is a data object */
++#define STT_FUNC      2               /* Symbol is a code object */
++#define STT_SECTION   3               /* Symbol associated with a section */
++#define STT_FILE      4               /* Symbol's name is file name */
++#define STT_COMMON    5               /* Symbol is a common data object */
++#define STT_TLS               6               /* Symbol is thread-local data object*/
++#define       STT_NUM         7               /* Number of defined types.  */
++#define STT_LOOS      10              /* Start of OS-specific */
++#define STT_GNU_IFUNC 10              /* Symbol is indirect code object */
++#define STT_HIOS      12              /* End of OS-specific */
++#define STT_LOPROC    13              /* Start of processor-specific */
++#define STT_HIPROC    15              /* End of processor-specific */
++
++
++/* Symbol table indices are found in the hash buckets and chain table
++   of a symbol hash table section.  This special index value indicates
++   the end of a chain, meaning no further symbols are found in that bucket.  */
++
++#define STN_UNDEF     0               /* End of a chain.  */
++
++
++/* How to extract and insert information held in the st_other field.  */
++
++#define ELF32_ST_VISIBILITY(o)        ((o) & 0x03)
++
++/* For ELF64 the definitions are the same.  */
++#define ELF64_ST_VISIBILITY(o)        ELF32_ST_VISIBILITY (o)
++
++/* Symbol visibility specification encoded in the st_other field.  */
++#define STV_DEFAULT   0               /* Default symbol visibility rules */
++#define STV_INTERNAL  1               /* Processor specific hidden class */
++#define STV_HIDDEN    2               /* Sym unavailable in other modules */
++#define STV_PROTECTED 3               /* Not preemptible, not exported */
++
++
++/* Relocation table entry without addend (in section of type SHT_REL).  */
++
++typedef struct
++{
++  Elf32_Addr  r_offset;               /* Address */
++  Elf32_Word  r_info;                 /* Relocation type and symbol index */
++} Elf32_Rel;
++
++/* I have seen two different definitions of the Elf64_Rel and
++   Elf64_Rela structures, so we'll leave them out until Novell (or
++   whoever) gets their act together.  */
++/* The following, at least, is used on Sparc v9, MIPS, and Alpha.  */
++
++typedef struct
++{
++  Elf64_Addr  r_offset;               /* Address */
++  Elf64_Xword r_info;                 /* Relocation type and symbol index */
++} Elf64_Rel;
++
++/* Relocation table entry with addend (in section of type SHT_RELA).  */
++
++typedef struct
++{
++  Elf32_Addr  r_offset;               /* Address */
++  Elf32_Word  r_info;                 /* Relocation type and symbol index */
++  Elf32_Sword r_addend;               /* Addend */
++} Elf32_Rela;
++
++typedef struct
++{
++  Elf64_Addr  r_offset;               /* Address */
++  Elf64_Xword r_info;                 /* Relocation type and symbol index */
++  Elf64_Sxword        r_addend;               /* Addend */
++} Elf64_Rela;
++
++/* How to extract and insert information held in the r_info field.  */
++
++#define ELF32_R_SYM(val)              ((val) >> 8)
++#define ELF32_R_TYPE(val)             ((val) & 0xff)
++#define ELF32_R_INFO(sym, type)               (((sym) << 8) + ((type) & 0xff))
++
++#define ELF64_R_SYM(i)                        ((i) >> 32)
++#define ELF64_R_TYPE(i)                       ((i) & 0xffffffff)
++#define ELF64_R_INFO(sym,type)                ((((Elf64_Xword) (sym)) << 32) + (type))
++
++/* Program segment header.  */
++
++typedef struct
++{
++  Elf32_Word  p_type;                 /* Segment type */
++  Elf32_Off   p_offset;               /* Segment file offset */
++  Elf32_Addr  p_vaddr;                /* Segment virtual address */
++  Elf32_Addr  p_paddr;                /* Segment physical address */
++  Elf32_Word  p_filesz;               /* Segment size in file */
++  Elf32_Word  p_memsz;                /* Segment size in memory */
++  Elf32_Word  p_flags;                /* Segment flags */
++  Elf32_Word  p_align;                /* Segment alignment */
++} Elf32_Phdr;
++
++typedef struct
++{
++  Elf64_Word  p_type;                 /* Segment type */
++  Elf64_Word  p_flags;                /* Segment flags */
++  Elf64_Off   p_offset;               /* Segment file offset */
++  Elf64_Addr  p_vaddr;                /* Segment virtual address */
++  Elf64_Addr  p_paddr;                /* Segment physical address */
++  Elf64_Xword p_filesz;               /* Segment size in file */
++  Elf64_Xword p_memsz;                /* Segment size in memory */
++  Elf64_Xword p_align;                /* Segment alignment */
++} Elf64_Phdr;
++
++/* Special value for e_phnum.  This indicates that the real number of
++   program headers is too large to fit into e_phnum.  Instead the real
++   value is in the field sh_info of section 0.  */
++
++#define PN_XNUM               0xffff
++
++/* Legal values for p_type (segment type).  */
++
++#define       PT_NULL         0               /* Program header table entry unused */
++#define PT_LOAD               1               /* Loadable program segment */
++#define PT_DYNAMIC    2               /* Dynamic linking information */
++#define PT_INTERP     3               /* Program interpreter */
++#define PT_NOTE               4               /* Auxiliary information */
++#define PT_SHLIB      5               /* Reserved */
++#define PT_PHDR               6               /* Entry for header table itself */
++#define PT_TLS                7               /* Thread-local storage segment */
++#define       PT_NUM          8               /* Number of defined types */
++#define PT_LOOS               0x60000000      /* Start of OS-specific */
++#define PT_GNU_EH_FRAME       0x6474e550      /* GCC .eh_frame_hdr segment */
++#define PT_GNU_STACK  0x6474e551      /* Indicates stack executability */
++#define PT_GNU_RELRO  0x6474e552      /* Read-only after relocation */
++#define PT_LOSUNW     0x6ffffffa
++#define PT_SUNWBSS    0x6ffffffa      /* Sun Specific segment */
++#define PT_SUNWSTACK  0x6ffffffb      /* Stack segment */
++#define PT_HISUNW     0x6fffffff
++#define PT_HIOS               0x6fffffff      /* End of OS-specific */
++#define PT_LOPROC     0x70000000      /* Start of processor-specific */
++#define PT_HIPROC     0x7fffffff      /* End of processor-specific */
++
++/* Legal values for p_flags (segment flags).  */
++
++#define PF_X          (1 << 0)        /* Segment is executable */
++#define PF_W          (1 << 1)        /* Segment is writable */
++#define PF_R          (1 << 2)        /* Segment is readable */
++#define PF_MASKOS     0x0ff00000      /* OS-specific */
++#define PF_MASKPROC   0xf0000000      /* Processor-specific */
++
++/* Legal values for note segment descriptor types for core files. */
++
++#define NT_PRSTATUS   1               /* Contains copy of prstatus struct */
++#define NT_FPREGSET   2               /* Contains copy of fpregset struct */
++#define NT_PRPSINFO   3               /* Contains copy of prpsinfo struct */
++#define NT_PRXREG     4               /* Contains copy of prxregset struct */
++#define NT_TASKSTRUCT 4               /* Contains copy of task structure */
++#define NT_PLATFORM   5               /* String from sysinfo(SI_PLATFORM) */
++#define NT_AUXV               6               /* Contains copy of auxv array */
++#define NT_GWINDOWS   7               /* Contains copy of gwindows struct */
++#define NT_ASRS               8               /* Contains copy of asrset struct */
++#define NT_PSTATUS    10              /* Contains copy of pstatus struct */
++#define NT_PSINFO     13              /* Contains copy of psinfo struct */
++#define NT_PRCRED     14              /* Contains copy of prcred struct */
++#define NT_UTSNAME    15              /* Contains copy of utsname struct */
++#define NT_LWPSTATUS  16              /* Contains copy of lwpstatus struct */
++#define NT_LWPSINFO   17              /* Contains copy of lwpinfo struct */
++#define NT_PRFPXREG   20              /* Contains copy of fprxregset struct */
++#define NT_PRXFPREG   0x46e62b7f      /* Contains copy of user_fxsr_struct */
++#define NT_PPC_VMX    0x100           /* PowerPC Altivec/VMX registers */
++#define NT_PPC_SPE    0x101           /* PowerPC SPE/EVR registers */
++#define NT_PPC_VSX    0x102           /* PowerPC VSX registers */
++#define NT_386_TLS    0x200           /* i386 TLS slots (struct user_desc) */
++#define NT_386_IOPERM 0x201           /* x86 io permission bitmap (1=deny) */
++#define NT_X86_XSTATE 0x202           /* x86 extended state using xsave */
++
++/* Legal values for the note segment descriptor types for object files.  */
++
++#define NT_VERSION    1               /* Contains a version string.  */
++
++
++/* Dynamic section entry.  */
++
++typedef struct
++{
++  Elf32_Sword d_tag;                  /* Dynamic entry type */
++  union
++    {
++      Elf32_Word d_val;                       /* Integer value */
++      Elf32_Addr d_ptr;                       /* Address value */
++    } d_un;
++} Elf32_Dyn;
++
++typedef struct
++{
++  Elf64_Sxword        d_tag;                  /* Dynamic entry type */
++  union
++    {
++      Elf64_Xword d_val;              /* Integer value */
++      Elf64_Addr d_ptr;                       /* Address value */
++    } d_un;
++} Elf64_Dyn;
++
++/* Legal values for d_tag (dynamic entry type).  */
++
++#define DT_NULL               0               /* Marks end of dynamic section */
++#define DT_NEEDED     1               /* Name of needed library */
++#define DT_PLTRELSZ   2               /* Size in bytes of PLT relocs */
++#define DT_PLTGOT     3               /* Processor defined value */
++#define DT_HASH               4               /* Address of symbol hash table */
++#define DT_STRTAB     5               /* Address of string table */
++#define DT_SYMTAB     6               /* Address of symbol table */
++#define DT_RELA               7               /* Address of Rela relocs */
++#define DT_RELASZ     8               /* Total size of Rela relocs */
++#define DT_RELAENT    9               /* Size of one Rela reloc */
++#define DT_STRSZ      10              /* Size of string table */
++#define DT_SYMENT     11              /* Size of one symbol table entry */
++#define DT_INIT               12              /* Address of init function */
++#define DT_FINI               13              /* Address of termination function */
++#define DT_SONAME     14              /* Name of shared object */
++#define DT_RPATH      15              /* Library search path (deprecated) */
++#define DT_SYMBOLIC   16              /* Start symbol search here */
++#define DT_REL                17              /* Address of Rel relocs */
++#define DT_RELSZ      18              /* Total size of Rel relocs */
++#define DT_RELENT     19              /* Size of one Rel reloc */
++#define DT_PLTREL     20              /* Type of reloc in PLT */
++#define DT_DEBUG      21              /* For debugging; unspecified */
++#define DT_TEXTREL    22              /* Reloc might modify .text */
++#define DT_JMPREL     23              /* Address of PLT relocs */
++#define       DT_BIND_NOW     24              /* Process relocations of object */
++#define       DT_INIT_ARRAY   25              /* Array with addresses of init fct */
++#define       DT_FINI_ARRAY   26              /* Array with addresses of fini fct */
++#define       DT_INIT_ARRAYSZ 27              /* Size in bytes of DT_INIT_ARRAY */
++#define       DT_FINI_ARRAYSZ 28              /* Size in bytes of DT_FINI_ARRAY */
++#define DT_RUNPATH    29              /* Library search path */
++#define DT_FLAGS      30              /* Flags for the object being loaded */
++#define DT_ENCODING   32              /* Start of encoded range */
++#define DT_PREINIT_ARRAY 32           /* Array with addresses of preinit fct*/
++#define DT_PREINIT_ARRAYSZ 33         /* size in bytes of DT_PREINIT_ARRAY */
++#define       DT_NUM          34              /* Number used */
++#define DT_LOOS               0x6000000d      /* Start of OS-specific */
++#define DT_HIOS               0x6ffff000      /* End of OS-specific */
++#define DT_LOPROC     0x70000000      /* Start of processor-specific */
++#define DT_HIPROC     0x7fffffff      /* End of processor-specific */
++#define       DT_PROCNUM      DT_MIPS_NUM     /* Most used by any processor */
++
++/* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the
++   Dyn.d_un.d_val field of the Elf*_Dyn structure.  This follows Sun's
++   approach.  */
++#define DT_VALRNGLO   0x6ffffd00
++#define DT_GNU_PRELINKED 0x6ffffdf5   /* Prelinking timestamp */
++#define DT_GNU_CONFLICTSZ 0x6ffffdf6  /* Size of conflict section */
++#define DT_GNU_LIBLISTSZ 0x6ffffdf7   /* Size of library list */
++#define DT_CHECKSUM   0x6ffffdf8
++#define DT_PLTPADSZ   0x6ffffdf9
++#define DT_MOVEENT    0x6ffffdfa
++#define DT_MOVESZ     0x6ffffdfb
++#define DT_FEATURE_1  0x6ffffdfc      /* Feature selection (DTF_*).  */
++#define DT_POSFLAG_1  0x6ffffdfd      /* Flags for DT_* entries, effecting
++                                         the following DT_* entry.  */
++#define DT_SYMINSZ    0x6ffffdfe      /* Size of syminfo table (in bytes) */
++#define DT_SYMINENT   0x6ffffdff      /* Entry size of syminfo */
++#define DT_VALRNGHI   0x6ffffdff
++#define DT_VALTAGIDX(tag)     (DT_VALRNGHI - (tag))   /* Reverse order! */
++#define DT_VALNUM 12
++
++/* DT_* entries which fall between DT_ADDRRNGHI & DT_ADDRRNGLO use the
++   Dyn.d_un.d_ptr field of the Elf*_Dyn structure.
++
++   If any adjustment is made to the ELF object after it has been
++   built these entries will need to be adjusted.  */
++#define DT_ADDRRNGLO  0x6ffffe00
++#define DT_GNU_HASH   0x6ffffef5      /* GNU-style hash table.  */
++#define DT_TLSDESC_PLT        0x6ffffef6
++#define DT_TLSDESC_GOT        0x6ffffef7
++#define DT_GNU_CONFLICT       0x6ffffef8      /* Start of conflict section */
++#define DT_GNU_LIBLIST        0x6ffffef9      /* Library list */
++#define DT_CONFIG     0x6ffffefa      /* Configuration information.  */
++#define DT_DEPAUDIT   0x6ffffefb      /* Dependency auditing.  */
++#define DT_AUDIT      0x6ffffefc      /* Object auditing.  */
++#define       DT_PLTPAD       0x6ffffefd      /* PLT padding.  */
++#define       DT_MOVETAB      0x6ffffefe      /* Move table.  */
++#define DT_SYMINFO    0x6ffffeff      /* Syminfo table.  */
++#define DT_ADDRRNGHI  0x6ffffeff
++#define DT_ADDRTAGIDX(tag)    (DT_ADDRRNGHI - (tag))  /* Reverse order! */
++#define DT_ADDRNUM 11
++
++/* The versioning entry types.  The next are defined as part of the
++   GNU extension.  */
++#define DT_VERSYM     0x6ffffff0
++
++#define DT_RELACOUNT  0x6ffffff9
++#define DT_RELCOUNT   0x6ffffffa
++
++/* These were chosen by Sun.  */
++#define DT_FLAGS_1    0x6ffffffb      /* State flags, see DF_1_* below.  */
++#define       DT_VERDEF       0x6ffffffc      /* Address of version definition
++                                         table */
++#define       DT_VERDEFNUM    0x6ffffffd      /* Number of version definitions */
++#define       DT_VERNEED      0x6ffffffe      /* Address of table with needed
++                                         versions */
++#define       DT_VERNEEDNUM   0x6fffffff      /* Number of needed versions */
++#define DT_VERSIONTAGIDX(tag) (DT_VERNEEDNUM - (tag)) /* Reverse order! */
++#define DT_VERSIONTAGNUM 16
++
++/* Sun added these machine-independent extensions in the "processor-specific"
++   range.  Be compatible.  */
++#define DT_AUXILIARY    0x7ffffffd      /* Shared object to load before self */
++#define DT_FILTER       0x7fffffff      /* Shared object to get values from */
++#define DT_EXTRATAGIDX(tag)   ((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1)
++#define DT_EXTRANUM   3
++
++/* Values of `d_un.d_val' in the DT_FLAGS entry.  */
++#define DF_ORIGIN     0x00000001      /* Object may use DF_ORIGIN */
++#define DF_SYMBOLIC   0x00000002      /* Symbol resolutions starts here */
++#define DF_TEXTREL    0x00000004      /* Object contains text relocations */
++#define DF_BIND_NOW   0x00000008      /* No lazy binding for this object */
++#define DF_STATIC_TLS 0x00000010      /* Module uses the static TLS model */
++
++/* State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1
++   entry in the dynamic section.  */
++#define DF_1_NOW      0x00000001      /* Set RTLD_NOW for this object.  */
++#define DF_1_GLOBAL   0x00000002      /* Set RTLD_GLOBAL for this object.  */
++#define DF_1_GROUP    0x00000004      /* Set RTLD_GROUP for this object.  */
++#define DF_1_NODELETE 0x00000008      /* Set RTLD_NODELETE for this object.*/
++#define DF_1_LOADFLTR 0x00000010      /* Trigger filtee loading at runtime.*/
++#define DF_1_INITFIRST        0x00000020      /* Set RTLD_INITFIRST for this object*/
++#define DF_1_NOOPEN   0x00000040      /* Set RTLD_NOOPEN for this object.  */
++#define DF_1_ORIGIN   0x00000080      /* $ORIGIN must be handled.  */
++#define DF_1_DIRECT   0x00000100      /* Direct binding enabled.  */
++#define DF_1_TRANS    0x00000200
++#define DF_1_INTERPOSE        0x00000400      /* Object is used to interpose.  */
++#define DF_1_NODEFLIB 0x00000800      /* Ignore default lib search path.  */
++#define DF_1_NODUMP   0x00001000      /* Object can't be dldump'ed.  */
++#define DF_1_CONFALT  0x00002000      /* Configuration alternative created.*/
++#define DF_1_ENDFILTEE        0x00004000      /* Filtee terminates filters search. */
++#define       DF_1_DISPRELDNE 0x00008000      /* Disp reloc applied at build time. */
++#define       DF_1_DISPRELPND 0x00010000      /* Disp reloc applied at run-time.  */
++
++/* Flags for the feature selection in DT_FEATURE_1.  */
++#define DTF_1_PARINIT 0x00000001
++#define DTF_1_CONFEXP 0x00000002
++
++/* Flags in the DT_POSFLAG_1 entry effecting only the next DT_* entry.  */
++#define DF_P1_LAZYLOAD        0x00000001      /* Lazyload following object.  */
++#define DF_P1_GROUPPERM       0x00000002      /* Symbols from next object are not
++                                         generally available.  */
++
++/* Version definition sections.  */
++
++typedef struct
++{
++  Elf32_Half  vd_version;             /* Version revision */
++  Elf32_Half  vd_flags;               /* Version information */
++  Elf32_Half  vd_ndx;                 /* Version Index */
++  Elf32_Half  vd_cnt;                 /* Number of associated aux entries */
++  Elf32_Word  vd_hash;                /* Version name hash value */
++  Elf32_Word  vd_aux;                 /* Offset in bytes to verdaux array */
++  Elf32_Word  vd_next;                /* Offset in bytes to next verdef
++                                         entry */
++} Elf32_Verdef;
++
++typedef struct
++{
++  Elf64_Half  vd_version;             /* Version revision */
++  Elf64_Half  vd_flags;               /* Version information */
++  Elf64_Half  vd_ndx;                 /* Version Index */
++  Elf64_Half  vd_cnt;                 /* Number of associated aux entries */
++  Elf64_Word  vd_hash;                /* Version name hash value */
++  Elf64_Word  vd_aux;                 /* Offset in bytes to verdaux array */
++  Elf64_Word  vd_next;                /* Offset in bytes to next verdef
++                                         entry */
++} Elf64_Verdef;
++
++
++/* Legal values for vd_version (version revision).  */
++#define VER_DEF_NONE  0               /* No version */
++#define VER_DEF_CURRENT       1               /* Current version */
++#define VER_DEF_NUM   2               /* Given version number */
++
++/* Legal values for vd_flags (version information flags).  */
++#define VER_FLG_BASE  0x1             /* Version definition of file itself */
++#define VER_FLG_WEAK  0x2             /* Weak version identifier */
++
++/* Versym symbol index values.  */
++#define       VER_NDX_LOCAL           0       /* Symbol is local.  */
++#define       VER_NDX_GLOBAL          1       /* Symbol is global.  */
++#define       VER_NDX_LORESERVE       0xff00  /* Beginning of reserved entries.  */
++#define       VER_NDX_ELIMINATE       0xff01  /* Symbol is to be eliminated.  */
++
++/* Auxialiary version information.  */
++
++typedef struct
++{
++  Elf32_Word  vda_name;               /* Version or dependency names */
++  Elf32_Word  vda_next;               /* Offset in bytes to next verdaux
++                                         entry */
++} Elf32_Verdaux;
++
++typedef struct
++{
++  Elf64_Word  vda_name;               /* Version or dependency names */
++  Elf64_Word  vda_next;               /* Offset in bytes to next verdaux
++                                         entry */
++} Elf64_Verdaux;
++
++
++/* Version dependency section.  */
++
++typedef struct
++{
++  Elf32_Half  vn_version;             /* Version of structure */
++  Elf32_Half  vn_cnt;                 /* Number of associated aux entries */
++  Elf32_Word  vn_file;                /* Offset of filename for this
++                                         dependency */
++  Elf32_Word  vn_aux;                 /* Offset in bytes to vernaux array */
++  Elf32_Word  vn_next;                /* Offset in bytes to next verneed
++                                         entry */
++} Elf32_Verneed;
++
++typedef struct
++{
++  Elf64_Half  vn_version;             /* Version of structure */
++  Elf64_Half  vn_cnt;                 /* Number of associated aux entries */
++  Elf64_Word  vn_file;                /* Offset of filename for this
++                                         dependency */
++  Elf64_Word  vn_aux;                 /* Offset in bytes to vernaux array */
++  Elf64_Word  vn_next;                /* Offset in bytes to next verneed
++                                         entry */
++} Elf64_Verneed;
++
++
++/* Legal values for vn_version (version revision).  */
++#define VER_NEED_NONE  0              /* No version */
++#define VER_NEED_CURRENT 1            /* Current version */
++#define VER_NEED_NUM   2              /* Given version number */
++
++/* Auxiliary needed version information.  */
++
++typedef struct
++{
++  Elf32_Word  vna_hash;               /* Hash value of dependency name */
++  Elf32_Half  vna_flags;              /* Dependency specific information */
++  Elf32_Half  vna_other;              /* Unused */
++  Elf32_Word  vna_name;               /* Dependency name string offset */
++  Elf32_Word  vna_next;               /* Offset in bytes to next vernaux
++                                         entry */
++} Elf32_Vernaux;
++
++typedef struct
++{
++  Elf64_Word  vna_hash;               /* Hash value of dependency name */
++  Elf64_Half  vna_flags;              /* Dependency specific information */
++  Elf64_Half  vna_other;              /* Unused */
++  Elf64_Word  vna_name;               /* Dependency name string offset */
++  Elf64_Word  vna_next;               /* Offset in bytes to next vernaux
++                                         entry */
++} Elf64_Vernaux;
++
++
++/* Legal values for vna_flags.  */
++#define VER_FLG_WEAK  0x2             /* Weak version identifier */
++
++
++/* Auxiliary vector.  */
++
++/* This vector is normally only used by the program interpreter.  The
++   usual definition in an ABI supplement uses the name auxv_t.  The
++   vector is not usually defined in a standard <elf.h> file, but it
++   can't hurt.  We rename it to avoid conflicts.  The sizes of these
++   types are an arrangement between the exec server and the program
++   interpreter, so we don't fully specify them here.  */
++
++typedef struct
++{
++  uint32_t a_type;            /* Entry type */
++  union
++    {
++      uint32_t a_val;         /* Integer value */
++      /* We use to have pointer elements added here.  We cannot do that,
++       though, since it does not work when using 32-bit definitions
++       on 64-bit platforms and vice versa.  */
++    } a_un;
++} Elf32_auxv_t;
++
++typedef struct
++{
++  uint64_t a_type;            /* Entry type */
++  union
++    {
++      uint64_t a_val;         /* Integer value */
++      /* We use to have pointer elements added here.  We cannot do that,
++       though, since it does not work when using 32-bit definitions
++       on 64-bit platforms and vice versa.  */
++    } a_un;
++} Elf64_auxv_t;
++
++/* Legal values for a_type (entry type).  */
++
++#define AT_NULL               0               /* End of vector */
++#define AT_IGNORE     1               /* Entry should be ignored */
++#define AT_EXECFD     2               /* File descriptor of program */
++#define AT_PHDR               3               /* Program headers for program */
++#define AT_PHENT      4               /* Size of program header entry */
++#define AT_PHNUM      5               /* Number of program headers */
++#define AT_PAGESZ     6               /* System page size */
++#define AT_BASE               7               /* Base address of interpreter */
++#define AT_FLAGS      8               /* Flags */
++#define AT_ENTRY      9               /* Entry point of program */
++#define AT_NOTELF     10              /* Program is not ELF */
++#define AT_UID                11              /* Real uid */
++#define AT_EUID               12              /* Effective uid */
++#define AT_GID                13              /* Real gid */
++#define AT_EGID               14              /* Effective gid */
++#define AT_CLKTCK     17              /* Frequency of times() */
++
++/* Some more special a_type values describing the hardware.  */
++#define AT_PLATFORM   15              /* String identifying platform.  */
++#define AT_HWCAP      16              /* Machine dependent hints about
++                                         processor capabilities.  */
++
++/* This entry gives some information about the FPU initialization
++   performed by the kernel.  */
++#define AT_FPUCW      18              /* Used FPU control word.  */
++
++/* Cache block sizes.  */
++#define AT_DCACHEBSIZE        19              /* Data cache block size.  */
++#define AT_ICACHEBSIZE        20              /* Instruction cache block size.  */
++#define AT_UCACHEBSIZE        21              /* Unified cache block size.  */
++
++/* A special ignored value for PPC, used by the kernel to control the
++   interpretation of the AUXV. Must be > 16.  */
++#define AT_IGNOREPPC  22              /* Entry should be ignored.  */
++
++#define       AT_SECURE       23              /* Boolean, was exec setuid-like?  */
++
++#define AT_BASE_PLATFORM 24           /* String identifying real platforms.*/
++
++#define AT_RANDOM     25              /* Address of 16 random bytes.  */
++
++#define AT_EXECFN     31              /* Filename of executable.  */
++
++/* Pointer to the global system page used for system calls and other
++   nice things.  */
++#define AT_SYSINFO    32
++#define AT_SYSINFO_EHDR       33
++
++/* Shapes of the caches.  Bits 0-3 contains associativity; bits 4-7 contains
++   log2 of line size; mask those to get cache size.  */
++#define AT_L1I_CACHESHAPE     34
++#define AT_L1D_CACHESHAPE     35
++#define AT_L2_CACHESHAPE      36
++#define AT_L3_CACHESHAPE      37
++
++/* Note section contents.  Each entry in the note section begins with
++   a header of a fixed form.  */
++
++typedef struct
++{
++  Elf32_Word n_namesz;                        /* Length of the note's name.  */
++  Elf32_Word n_descsz;                        /* Length of the note's descriptor.  */
++  Elf32_Word n_type;                  /* Type of the note.  */
++} Elf32_Nhdr;
++
++typedef struct
++{
++  Elf64_Word n_namesz;                        /* Length of the note's name.  */
++  Elf64_Word n_descsz;                        /* Length of the note's descriptor.  */
++  Elf64_Word n_type;                  /* Type of the note.  */
++} Elf64_Nhdr;
++
++/* Known names of notes.  */
++
++/* Solaris entries in the note section have this name.  */
++#define ELF_NOTE_SOLARIS      "SUNW Solaris"
++
++/* Note entries for GNU systems have this name.  */
++#define ELF_NOTE_GNU          "GNU"
++
++
++/* Defined types of notes for Solaris.  */
++
++/* Value of descriptor (one word) is desired pagesize for the binary.  */
++#define ELF_NOTE_PAGESIZE_HINT        1
++
++
++/* Defined note types for GNU systems.  */
++
++/* ABI information.  The descriptor consists of words:
++   word 0: OS descriptor
++   word 1: major version of the ABI
++   word 2: minor version of the ABI
++   word 3: subminor version of the ABI
++*/
++#define NT_GNU_ABI_TAG        1
++#define ELF_NOTE_ABI  NT_GNU_ABI_TAG /* Old name.  */
++
++/* Known OSes.  These values can appear in word 0 of an
++   NT_GNU_ABI_TAG note section entry.  */
++#define ELF_NOTE_OS_LINUX     0
++#define ELF_NOTE_OS_GNU               1
++#define ELF_NOTE_OS_SOLARIS2  2
++#define ELF_NOTE_OS_FREEBSD   3
++
++/* Synthetic hwcap information.  The descriptor begins with two words:
++   word 0: number of entries
++   word 1: bitmask of enabled entries
++   Then follow variable-length entries, one byte followed by a
++   '\0'-terminated hwcap name string.  The byte gives the bit
++   number to test if enabled, (1U << bit) & bitmask.  */
++#define NT_GNU_HWCAP  2
++
++/* Build ID bits as generated by ld --build-id.
++   The descriptor consists of any nonzero number of bytes.  */
++#define NT_GNU_BUILD_ID       3
++
++/* Version note generated by GNU gold containing a version string.  */
++#define NT_GNU_GOLD_VERSION   4
++
++
++/* Move records.  */
++typedef struct
++{
++  Elf32_Xword m_value;                /* Symbol value.  */
++  Elf32_Word m_info;          /* Size and index.  */
++  Elf32_Word m_poffset;               /* Symbol offset.  */
++  Elf32_Half m_repeat;                /* Repeat count.  */
++  Elf32_Half m_stride;                /* Stride info.  */
++} Elf32_Move;
++
++typedef struct
++{
++  Elf64_Xword m_value;                /* Symbol value.  */
++  Elf64_Xword m_info;         /* Size and index.  */
++  Elf64_Xword m_poffset;      /* Symbol offset.  */
++  Elf64_Half m_repeat;                /* Repeat count.  */
++  Elf64_Half m_stride;                /* Stride info.  */
++} Elf64_Move;
++
++/* Macro to construct move records.  */
++#define ELF32_M_SYM(info)     ((info) >> 8)
++#define ELF32_M_SIZE(info)    ((unsigned char) (info))
++#define ELF32_M_INFO(sym, size)       (((sym) << 8) + (unsigned char) (size))
++
++#define ELF64_M_SYM(info)     ELF32_M_SYM (info)
++#define ELF64_M_SIZE(info)    ELF32_M_SIZE (info)
++#define ELF64_M_INFO(sym, size)       ELF32_M_INFO (sym, size)
++
++
++/* Motorola 68k specific definitions.  */
++
++/* Values for Elf32_Ehdr.e_flags.  */
++#define EF_CPU32      0x00810000
++
++/* m68k relocs.  */
++
++#define R_68K_NONE    0               /* No reloc */
++#define R_68K_32      1               /* Direct 32 bit  */
++#define R_68K_16      2               /* Direct 16 bit  */
++#define R_68K_8               3               /* Direct 8 bit  */
++#define R_68K_PC32    4               /* PC relative 32 bit */
++#define R_68K_PC16    5               /* PC relative 16 bit */
++#define R_68K_PC8     6               /* PC relative 8 bit */
++#define R_68K_GOT32   7               /* 32 bit PC relative GOT entry */
++#define R_68K_GOT16   8               /* 16 bit PC relative GOT entry */
++#define R_68K_GOT8    9               /* 8 bit PC relative GOT entry */
++#define R_68K_GOT32O  10              /* 32 bit GOT offset */
++#define R_68K_GOT16O  11              /* 16 bit GOT offset */
++#define R_68K_GOT8O   12              /* 8 bit GOT offset */
++#define R_68K_PLT32   13              /* 32 bit PC relative PLT address */
++#define R_68K_PLT16   14              /* 16 bit PC relative PLT address */
++#define R_68K_PLT8    15              /* 8 bit PC relative PLT address */
++#define R_68K_PLT32O  16              /* 32 bit PLT offset */
++#define R_68K_PLT16O  17              /* 16 bit PLT offset */
++#define R_68K_PLT8O   18              /* 8 bit PLT offset */
++#define R_68K_COPY    19              /* Copy symbol at runtime */
++#define R_68K_GLOB_DAT        20              /* Create GOT entry */
++#define R_68K_JMP_SLOT        21              /* Create PLT entry */
++#define R_68K_RELATIVE        22              /* Adjust by program base */
++#define R_68K_TLS_GD32      25          /* 32 bit GOT offset for GD */
++#define R_68K_TLS_GD16      26          /* 16 bit GOT offset for GD */
++#define R_68K_TLS_GD8       27          /* 8 bit GOT offset for GD */
++#define R_68K_TLS_LDM32     28          /* 32 bit GOT offset for LDM */
++#define R_68K_TLS_LDM16     29          /* 16 bit GOT offset for LDM */
++#define R_68K_TLS_LDM8      30          /* 8 bit GOT offset for LDM */
++#define R_68K_TLS_LDO32     31          /* 32 bit module-relative offset */
++#define R_68K_TLS_LDO16     32          /* 16 bit module-relative offset */
++#define R_68K_TLS_LDO8      33          /* 8 bit module-relative offset */
++#define R_68K_TLS_IE32      34          /* 32 bit GOT offset for IE */
++#define R_68K_TLS_IE16      35          /* 16 bit GOT offset for IE */
++#define R_68K_TLS_IE8       36          /* 8 bit GOT offset for IE */
++#define R_68K_TLS_LE32      37          /* 32 bit offset relative to
++                                         static TLS block */
++#define R_68K_TLS_LE16      38          /* 16 bit offset relative to
++                                         static TLS block */
++#define R_68K_TLS_LE8       39          /* 8 bit offset relative to
++                                         static TLS block */
++#define R_68K_TLS_DTPMOD32  40          /* 32 bit module number */
++#define R_68K_TLS_DTPREL32  41          /* 32 bit module-relative offset */
++#define R_68K_TLS_TPREL32   42          /* 32 bit TP-relative offset */
++/* Keep this the last entry.  */
++#define R_68K_NUM     43
++
++/* Intel 80386 specific definitions.  */
++
++/* i386 relocs.  */
++
++#define R_386_NONE       0            /* No reloc */
++#define R_386_32         1            /* Direct 32 bit  */
++#define R_386_PC32       2            /* PC relative 32 bit */
++#define R_386_GOT32      3            /* 32 bit GOT entry */
++#define R_386_PLT32      4            /* 32 bit PLT address */
++#define R_386_COPY       5            /* Copy symbol at runtime */
++#define R_386_GLOB_DAT           6            /* Create GOT entry */
++#define R_386_JMP_SLOT           7            /* Create PLT entry */
++#define R_386_RELATIVE           8            /* Adjust by program base */
++#define R_386_GOTOFF     9            /* 32 bit offset to GOT */
++#define R_386_GOTPC      10           /* 32 bit PC relative offset to GOT */
++#define R_386_32PLT      11
++#define R_386_TLS_TPOFF          14           /* Offset in static TLS block */
++#define R_386_TLS_IE     15           /* Address of GOT entry for static TLS
++                                         block offset */
++#define R_386_TLS_GOTIE          16           /* GOT entry for static TLS block
++                                         offset */
++#define R_386_TLS_LE     17           /* Offset relative to static TLS
++                                         block */
++#define R_386_TLS_GD     18           /* Direct 32 bit for GNU version of
++                                         general dynamic thread local data */
++#define R_386_TLS_LDM    19           /* Direct 32 bit for GNU version of
++                                         local dynamic thread local data
++                                         in LE code */
++#define R_386_16         20
++#define R_386_PC16       21
++#define R_386_8                  22
++#define R_386_PC8        23
++#define R_386_TLS_GD_32          24           /* Direct 32 bit for general dynamic
++                                         thread local data */
++#define R_386_TLS_GD_PUSH  25         /* Tag for pushl in GD TLS code */
++#define R_386_TLS_GD_CALL  26         /* Relocation for call to
++                                         __tls_get_addr() */
++#define R_386_TLS_GD_POP   27         /* Tag for popl in GD TLS code */
++#define R_386_TLS_LDM_32   28         /* Direct 32 bit for local dynamic
++                                         thread local data in LE code */
++#define R_386_TLS_LDM_PUSH 29         /* Tag for pushl in LDM TLS code */
++#define R_386_TLS_LDM_CALL 30         /* Relocation for call to
++                                         __tls_get_addr() in LDM code */
++#define R_386_TLS_LDM_POP  31         /* Tag for popl in LDM TLS code */
++#define R_386_TLS_LDO_32   32         /* Offset relative to TLS block */
++#define R_386_TLS_IE_32          33           /* GOT entry for negated static TLS
++                                         block offset */
++#define R_386_TLS_LE_32          34           /* Negated offset relative to static
++                                         TLS block */
++#define R_386_TLS_DTPMOD32 35         /* ID of module containing symbol */
++#define R_386_TLS_DTPOFF32 36         /* Offset in TLS block */
++#define R_386_TLS_TPOFF32  37         /* Negated offset in static TLS block */
++/* 38? */
++#define R_386_TLS_GOTDESC  39         /* GOT offset for TLS descriptor.  */
++#define R_386_TLS_DESC_CALL 40                /* Marker of call through TLS
++                                         descriptor for
++                                         relaxation.  */
++#define R_386_TLS_DESC     41         /* TLS descriptor containing
++                                         pointer to code and to
++                                         argument, returning the TLS
++                                         offset for the symbol.  */
++#define R_386_IRELATIVE          42           /* Adjust indirectly by program base */
++/* Keep this the last entry.  */
++#define R_386_NUM        43
++
++/* SUN SPARC specific definitions.  */
++
++/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
++
++#define STT_SPARC_REGISTER    13      /* Global register reserved to app. */
++
++/* Values for Elf64_Ehdr.e_flags.  */
++
++#define EF_SPARCV9_MM         3
++#define EF_SPARCV9_TSO                0
++#define EF_SPARCV9_PSO                1
++#define EF_SPARCV9_RMO                2
++#define EF_SPARC_LEDATA               0x800000 /* little endian data */
++#define EF_SPARC_EXT_MASK     0xFFFF00
++#define EF_SPARC_32PLUS               0x000100 /* generic V8+ features */
++#define EF_SPARC_SUN_US1      0x000200 /* Sun UltraSPARC1 extensions */
++#define EF_SPARC_HAL_R1               0x000400 /* HAL R1 extensions */
++#define EF_SPARC_SUN_US3      0x000800 /* Sun UltraSPARCIII extensions */
++
++/* SPARC relocs.  */
++
++#define R_SPARC_NONE          0       /* No reloc */
++#define R_SPARC_8             1       /* Direct 8 bit */
++#define R_SPARC_16            2       /* Direct 16 bit */
++#define R_SPARC_32            3       /* Direct 32 bit */
++#define R_SPARC_DISP8         4       /* PC relative 8 bit */
++#define R_SPARC_DISP16                5       /* PC relative 16 bit */
++#define R_SPARC_DISP32                6       /* PC relative 32 bit */
++#define R_SPARC_WDISP30               7       /* PC relative 30 bit shifted */
++#define R_SPARC_WDISP22               8       /* PC relative 22 bit shifted */
++#define R_SPARC_HI22          9       /* High 22 bit */
++#define R_SPARC_22            10      /* Direct 22 bit */
++#define R_SPARC_13            11      /* Direct 13 bit */
++#define R_SPARC_LO10          12      /* Truncated 10 bit */
++#define R_SPARC_GOT10         13      /* Truncated 10 bit GOT entry */
++#define R_SPARC_GOT13         14      /* 13 bit GOT entry */
++#define R_SPARC_GOT22         15      /* 22 bit GOT entry shifted */
++#define R_SPARC_PC10          16      /* PC relative 10 bit truncated */
++#define R_SPARC_PC22          17      /* PC relative 22 bit shifted */
++#define R_SPARC_WPLT30                18      /* 30 bit PC relative PLT address */
++#define R_SPARC_COPY          19      /* Copy symbol at runtime */
++#define R_SPARC_GLOB_DAT      20      /* Create GOT entry */
++#define R_SPARC_JMP_SLOT      21      /* Create PLT entry */
++#define R_SPARC_RELATIVE      22      /* Adjust by program base */
++#define R_SPARC_UA32          23      /* Direct 32 bit unaligned */
++
++/* Additional Sparc64 relocs.  */
++
++#define R_SPARC_PLT32         24      /* Direct 32 bit ref to PLT entry */
++#define R_SPARC_HIPLT22               25      /* High 22 bit PLT entry */
++#define R_SPARC_LOPLT10               26      /* Truncated 10 bit PLT entry */
++#define R_SPARC_PCPLT32               27      /* PC rel 32 bit ref to PLT entry */
++#define R_SPARC_PCPLT22               28      /* PC rel high 22 bit PLT entry */
++#define R_SPARC_PCPLT10               29      /* PC rel trunc 10 bit PLT entry */
++#define R_SPARC_10            30      /* Direct 10 bit */
++#define R_SPARC_11            31      /* Direct 11 bit */
++#define R_SPARC_64            32      /* Direct 64 bit */
++#define R_SPARC_OLO10         33      /* 10bit with secondary 13bit addend */
++#define R_SPARC_HH22          34      /* Top 22 bits of direct 64 bit */
++#define R_SPARC_HM10          35      /* High middle 10 bits of ... */
++#define R_SPARC_LM22          36      /* Low middle 22 bits of ... */
++#define R_SPARC_PC_HH22               37      /* Top 22 bits of pc rel 64 bit */
++#define R_SPARC_PC_HM10               38      /* High middle 10 bit of ... */
++#define R_SPARC_PC_LM22               39      /* Low miggle 22 bits of ... */
++#define R_SPARC_WDISP16               40      /* PC relative 16 bit shifted */
++#define R_SPARC_WDISP19               41      /* PC relative 19 bit shifted */
++#define R_SPARC_GLOB_JMP      42      /* was part of v9 ABI but was removed */
++#define R_SPARC_7             43      /* Direct 7 bit */
++#define R_SPARC_5             44      /* Direct 5 bit */
++#define R_SPARC_6             45      /* Direct 6 bit */
++#define R_SPARC_DISP64                46      /* PC relative 64 bit */
++#define R_SPARC_PLT64         47      /* Direct 64 bit ref to PLT entry */
++#define R_SPARC_HIX22         48      /* High 22 bit complemented */
++#define R_SPARC_LOX10         49      /* Truncated 11 bit complemented */
++#define R_SPARC_H44           50      /* Direct high 12 of 44 bit */
++#define R_SPARC_M44           51      /* Direct mid 22 of 44 bit */
++#define R_SPARC_L44           52      /* Direct low 10 of 44 bit */
++#define R_SPARC_REGISTER      53      /* Global register usage */
++#define R_SPARC_UA64          54      /* Direct 64 bit unaligned */
++#define R_SPARC_UA16          55      /* Direct 16 bit unaligned */
++#define R_SPARC_TLS_GD_HI22   56
++#define R_SPARC_TLS_GD_LO10   57
++#define R_SPARC_TLS_GD_ADD    58
++#define R_SPARC_TLS_GD_CALL   59
++#define R_SPARC_TLS_LDM_HI22  60
++#define R_SPARC_TLS_LDM_LO10  61
++#define R_SPARC_TLS_LDM_ADD   62
++#define R_SPARC_TLS_LDM_CALL  63
++#define R_SPARC_TLS_LDO_HIX22 64
++#define R_SPARC_TLS_LDO_LOX10 65
++#define R_SPARC_TLS_LDO_ADD   66
++#define R_SPARC_TLS_IE_HI22   67
++#define R_SPARC_TLS_IE_LO10   68
++#define R_SPARC_TLS_IE_LD     69
++#define R_SPARC_TLS_IE_LDX    70
++#define R_SPARC_TLS_IE_ADD    71
++#define R_SPARC_TLS_LE_HIX22  72
++#define R_SPARC_TLS_LE_LOX10  73
++#define R_SPARC_TLS_DTPMOD32  74
++#define R_SPARC_TLS_DTPMOD64  75
++#define R_SPARC_TLS_DTPOFF32  76
++#define R_SPARC_TLS_DTPOFF64  77
++#define R_SPARC_TLS_TPOFF32   78
++#define R_SPARC_TLS_TPOFF64   79
++#define R_SPARC_GOTDATA_HIX22 80
++#define R_SPARC_GOTDATA_LOX10 81
++#define R_SPARC_GOTDATA_OP_HIX22      82
++#define R_SPARC_GOTDATA_OP_LOX10      83
++#define R_SPARC_GOTDATA_OP    84
++#define R_SPARC_H34           85
++#define R_SPARC_SIZE32                86
++#define R_SPARC_SIZE64                87
++#define R_SPARC_WDISP10               88
++#define R_SPARC_JMP_IREL      248
++#define R_SPARC_IRELATIVE     249
++#define R_SPARC_GNU_VTINHERIT 250
++#define R_SPARC_GNU_VTENTRY   251
++#define R_SPARC_REV32         252
++/* Keep this the last entry.  */
++#define R_SPARC_NUM           253
++
++/* For Sparc64, legal values for d_tag of Elf64_Dyn.  */
++
++#define DT_SPARC_REGISTER 0x70000001
++#define DT_SPARC_NUM  2
++
++/* MIPS R3000 specific definitions.  */
++
++/* Legal values for e_flags field of Elf32_Ehdr.  */
++
++#define EF_MIPS_NOREORDER   1         /* A .noreorder directive was used */
++#define EF_MIPS_PIC       2           /* Contains PIC code */
++#define EF_MIPS_CPIC      4           /* Uses PIC calling sequence */
++#define EF_MIPS_XGOT      8
++#define EF_MIPS_64BIT_WHIRL 16
++#define EF_MIPS_ABI2      32
++#define EF_MIPS_ABI_ON32    64
++#define EF_MIPS_ARCH      0xf0000000  /* MIPS architecture level */
++
++/* Legal values for MIPS architecture level.  */
++
++#define EF_MIPS_ARCH_1            0x00000000  /* -mips1 code.  */
++#define EF_MIPS_ARCH_2            0x10000000  /* -mips2 code.  */
++#define EF_MIPS_ARCH_3            0x20000000  /* -mips3 code.  */
++#define EF_MIPS_ARCH_4            0x30000000  /* -mips4 code.  */
++#define EF_MIPS_ARCH_5            0x40000000  /* -mips5 code.  */
++#define EF_MIPS_ARCH_32           0x60000000  /* MIPS32 code.  */
++#define EF_MIPS_ARCH_64           0x70000000  /* MIPS64 code.  */
++
++/* The following are non-official names and should not be used.  */
++
++#define E_MIPS_ARCH_1   0x00000000    /* -mips1 code.  */
++#define E_MIPS_ARCH_2   0x10000000    /* -mips2 code.  */
++#define E_MIPS_ARCH_3   0x20000000    /* -mips3 code.  */
++#define E_MIPS_ARCH_4   0x30000000    /* -mips4 code.  */
++#define E_MIPS_ARCH_5   0x40000000    /* -mips5 code.  */
++#define E_MIPS_ARCH_32          0x60000000    /* MIPS32 code.  */
++#define E_MIPS_ARCH_64          0x70000000    /* MIPS64 code.  */
++
++/* Special section indices.  */
++
++#define SHN_MIPS_ACOMMON    0xff00    /* Allocated common symbols */
++#define SHN_MIPS_TEXT     0xff01      /* Allocated test symbols.  */
++#define SHN_MIPS_DATA     0xff02      /* Allocated data symbols.  */
++#define SHN_MIPS_SCOMMON    0xff03    /* Small common symbols */
++#define SHN_MIPS_SUNDEFINED 0xff04    /* Small undefined symbols */
++
++/* Legal values for sh_type field of Elf32_Shdr.  */
++
++#define SHT_MIPS_LIBLIST       0x70000000 /* Shared objects used in link */
++#define SHT_MIPS_MSYM        0x70000001
++#define SHT_MIPS_CONFLICT      0x70000002 /* Conflicting symbols */
++#define SHT_MIPS_GPTAB               0x70000003 /* Global data area sizes */
++#define SHT_MIPS_UCODE               0x70000004 /* Reserved for SGI/MIPS compilers */
++#define SHT_MIPS_DEBUG               0x70000005 /* MIPS ECOFF debugging information*/
++#define SHT_MIPS_REGINFO       0x70000006 /* Register usage information */
++#define SHT_MIPS_PACKAGE       0x70000007
++#define SHT_MIPS_PACKSYM       0x70000008
++#define SHT_MIPS_RELD        0x70000009
++#define SHT_MIPS_IFACE         0x7000000b
++#define SHT_MIPS_CONTENT       0x7000000c
++#define SHT_MIPS_OPTIONS       0x7000000d /* Miscellaneous options.  */
++#define SHT_MIPS_SHDR        0x70000010
++#define SHT_MIPS_FDESC               0x70000011
++#define SHT_MIPS_EXTSYM              0x70000012
++#define SHT_MIPS_DENSE               0x70000013
++#define SHT_MIPS_PDESC               0x70000014
++#define SHT_MIPS_LOCSYM              0x70000015
++#define SHT_MIPS_AUXSYM              0x70000016
++#define SHT_MIPS_OPTSYM              0x70000017
++#define SHT_MIPS_LOCSTR              0x70000018
++#define SHT_MIPS_LINE        0x70000019
++#define SHT_MIPS_RFDESC              0x7000001a
++#define SHT_MIPS_DELTASYM      0x7000001b
++#define SHT_MIPS_DELTAINST     0x7000001c
++#define SHT_MIPS_DELTACLASS    0x7000001d
++#define SHT_MIPS_DWARF         0x7000001e /* DWARF debugging information.  */
++#define SHT_MIPS_DELTADECL     0x7000001f
++#define SHT_MIPS_SYMBOL_LIB    0x70000020
++#define SHT_MIPS_EVENTS              0x70000021 /* Event section.  */
++#define SHT_MIPS_TRANSLATE     0x70000022
++#define SHT_MIPS_PIXIE               0x70000023
++#define SHT_MIPS_XLATE               0x70000024
++#define SHT_MIPS_XLATE_DEBUG   0x70000025
++#define SHT_MIPS_WHIRL               0x70000026
++#define SHT_MIPS_EH_REGION     0x70000027
++#define SHT_MIPS_XLATE_OLD     0x70000028
++#define SHT_MIPS_PDR_EXCEPTION 0x70000029
++
++/* Legal values for sh_flags field of Elf32_Shdr.  */
++
++#define SHF_MIPS_GPREL         0x10000000     /* Must be part of global data area */
++#define SHF_MIPS_MERGE         0x20000000
++#define SHF_MIPS_ADDR  0x40000000
++#define SHF_MIPS_STRINGS 0x80000000
++#define SHF_MIPS_NOSTRIP 0x08000000
++#define SHF_MIPS_LOCAL         0x04000000
++#define SHF_MIPS_NAMES         0x02000000
++#define SHF_MIPS_NODUPE        0x01000000
++
++
++/* Symbol tables.  */
++
++/* MIPS specific values for `st_other'.  */
++#define STO_MIPS_DEFAULT              0x0
++#define STO_MIPS_INTERNAL             0x1
++#define STO_MIPS_HIDDEN                       0x2
++#define STO_MIPS_PROTECTED            0x3
++#define STO_MIPS_PLT                  0x8
++#define STO_MIPS_SC_ALIGN_UNUSED      0xff
++
++/* MIPS specific values for `st_info'.  */
++#define STB_MIPS_SPLIT_COMMON         13
++
++/* Entries found in sections of type SHT_MIPS_GPTAB.  */
++
++typedef union
++{
++  struct
++    {
++      Elf32_Word gt_current_g_value;  /* -G value used for compilation */
++      Elf32_Word gt_unused;           /* Not used */
++    } gt_header;                      /* First entry in section */
++  struct
++    {
++      Elf32_Word gt_g_value;          /* If this value were used for -G */
++      Elf32_Word gt_bytes;            /* This many bytes would be used */
++    } gt_entry;                               /* Subsequent entries in section */
++} Elf32_gptab;
++
++/* Entry found in sections of type SHT_MIPS_REGINFO.  */
++
++typedef struct
++{
++  Elf32_Word  ri_gprmask;             /* General registers used */
++  Elf32_Word  ri_cprmask[4];          /* Coprocessor registers used */
++  Elf32_Sword ri_gp_value;            /* $gp register value */
++} Elf32_RegInfo;
++
++/* Entries found in sections of type SHT_MIPS_OPTIONS.  */
++
++typedef struct
++{
++  unsigned char kind;         /* Determines interpretation of the
++                                 variable part of descriptor.  */
++  unsigned char size;         /* Size of descriptor, including header.  */
++  Elf32_Section section;      /* Section header index of section affected,
++                                 0 for global options.  */
++  Elf32_Word info;            /* Kind-specific information.  */
++} Elf_Options;
++
++/* Values for `kind' field in Elf_Options.  */
++
++#define ODK_NULL      0       /* Undefined.  */
++#define ODK_REGINFO   1       /* Register usage information.  */
++#define ODK_EXCEPTIONS        2       /* Exception processing options.  */
++#define ODK_PAD               3       /* Section padding options.  */
++#define ODK_HWPATCH   4       /* Hardware workarounds performed */
++#define ODK_FILL      5       /* record the fill value used by the linker. */
++#define ODK_TAGS      6       /* reserve space for desktop tools to write. */
++#define ODK_HWAND     7       /* HW workarounds.  'AND' bits when merging. */
++#define ODK_HWOR      8       /* HW workarounds.  'OR' bits when merging.  */
++
++/* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries.  */
++
++#define OEX_FPU_MIN   0x1f    /* FPE's which MUST be enabled.  */
++#define OEX_FPU_MAX   0x1f00  /* FPE's which MAY be enabled.  */
++#define OEX_PAGE0     0x10000 /* page zero must be mapped.  */
++#define OEX_SMM               0x20000 /* Force sequential memory mode?  */
++#define OEX_FPDBUG    0x40000 /* Force floating point debug mode?  */
++#define OEX_PRECISEFP OEX_FPDBUG
++#define OEX_DISMISS   0x80000 /* Dismiss invalid address faults?  */
++
++#define OEX_FPU_INVAL 0x10
++#define OEX_FPU_DIV0  0x08
++#define OEX_FPU_OFLO  0x04
++#define OEX_FPU_UFLO  0x02
++#define OEX_FPU_INEX  0x01
++
++/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry.  */
++
++#define OHW_R4KEOP    0x1     /* R4000 end-of-page patch.  */
++#define OHW_R8KPFETCH 0x2     /* may need R8000 prefetch patch.  */
++#define OHW_R5KEOP    0x4     /* R5000 end-of-page patch.  */
++#define OHW_R5KCVTL   0x8     /* R5000 cvt.[ds].l bug.  clean=1.  */
++
++#define OPAD_PREFIX   0x1
++#define OPAD_POSTFIX  0x2
++#define OPAD_SYMBOL   0x4
++
++/* Entry found in `.options' section.  */
++
++typedef struct
++{
++  Elf32_Word hwp_flags1;      /* Extra flags.  */
++  Elf32_Word hwp_flags2;      /* Extra flags.  */
++} Elf_Options_Hw;
++
++/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries.  */
++
++#define OHWA0_R4KEOP_CHECKED  0x00000001
++#define OHWA1_R4KEOP_CLEAN    0x00000002
++
++/* MIPS relocs.  */
++
++#define R_MIPS_NONE           0       /* No reloc */
++#define R_MIPS_16             1       /* Direct 16 bit */
++#define R_MIPS_32             2       /* Direct 32 bit */
++#define R_MIPS_REL32          3       /* PC relative 32 bit */
++#define R_MIPS_26             4       /* Direct 26 bit shifted */
++#define R_MIPS_HI16           5       /* High 16 bit */
++#define R_MIPS_LO16           6       /* Low 16 bit */
++#define R_MIPS_GPREL16                7       /* GP relative 16 bit */
++#define R_MIPS_LITERAL                8       /* 16 bit literal entry */
++#define R_MIPS_GOT16          9       /* 16 bit GOT entry */
++#define R_MIPS_PC16           10      /* PC relative 16 bit */
++#define R_MIPS_CALL16         11      /* 16 bit GOT entry for function */
++#define R_MIPS_GPREL32                12      /* GP relative 32 bit */
++
++#define R_MIPS_SHIFT5         16
++#define R_MIPS_SHIFT6         17
++#define R_MIPS_64             18
++#define R_MIPS_GOT_DISP               19
++#define R_MIPS_GOT_PAGE               20
++#define R_MIPS_GOT_OFST               21
++#define R_MIPS_GOT_HI16               22
++#define R_MIPS_GOT_LO16               23
++#define R_MIPS_SUB            24
++#define R_MIPS_INSERT_A               25
++#define R_MIPS_INSERT_B               26
++#define R_MIPS_DELETE         27
++#define R_MIPS_HIGHER         28
++#define R_MIPS_HIGHEST                29
++#define R_MIPS_CALL_HI16      30
++#define R_MIPS_CALL_LO16      31
++#define R_MIPS_SCN_DISP               32
++#define R_MIPS_REL16          33
++#define R_MIPS_ADD_IMMEDIATE  34
++#define R_MIPS_PJUMP          35
++#define R_MIPS_RELGOT         36
++#define R_MIPS_JALR           37
++#define R_MIPS_TLS_DTPMOD32   38      /* Module number 32 bit */
++#define R_MIPS_TLS_DTPREL32   39      /* Module-relative offset 32 bit */
++#define R_MIPS_TLS_DTPMOD64   40      /* Module number 64 bit */
++#define R_MIPS_TLS_DTPREL64   41      /* Module-relative offset 64 bit */
++#define R_MIPS_TLS_GD         42      /* 16 bit GOT offset for GD */
++#define R_MIPS_TLS_LDM                43      /* 16 bit GOT offset for LDM */
++#define R_MIPS_TLS_DTPREL_HI16        44      /* Module-relative offset, high 16 bits */
++#define R_MIPS_TLS_DTPREL_LO16        45      /* Module-relative offset, low 16 bits */
++#define R_MIPS_TLS_GOTTPREL   46      /* 16 bit GOT offset for IE */
++#define R_MIPS_TLS_TPREL32    47      /* TP-relative offset, 32 bit */
++#define R_MIPS_TLS_TPREL64    48      /* TP-relative offset, 64 bit */
++#define R_MIPS_TLS_TPREL_HI16 49      /* TP-relative offset, high 16 bits */
++#define R_MIPS_TLS_TPREL_LO16 50      /* TP-relative offset, low 16 bits */
++#define R_MIPS_GLOB_DAT               51
++#define R_MIPS_COPY           126
++#define R_MIPS_JUMP_SLOT        127
++/* Keep this the last entry.  */
++#define R_MIPS_NUM            128
++
++/* Legal values for p_type field of Elf32_Phdr.  */
++
++#define PT_MIPS_REGINFO       0x70000000      /* Register usage information */
++#define PT_MIPS_RTPROC  0x70000001    /* Runtime procedure table. */
++#define PT_MIPS_OPTIONS 0x70000002
++
++/* Special program header types.  */
++
++#define PF_MIPS_LOCAL 0x10000000
++
++/* Legal values for d_tag field of Elf32_Dyn.  */
++
++#define DT_MIPS_RLD_VERSION  0x70000001       /* Runtime linker interface version */
++#define DT_MIPS_TIME_STAMP   0x70000002       /* Timestamp */
++#define DT_MIPS_ICHECKSUM    0x70000003       /* Checksum */
++#define DT_MIPS_IVERSION     0x70000004       /* Version string (string tbl index) */
++#define DT_MIPS_FLAGS      0x70000005 /* Flags */
++#define DT_MIPS_BASE_ADDRESS 0x70000006       /* Base address */
++#define DT_MIPS_MSYM       0x70000007
++#define DT_MIPS_CONFLICT     0x70000008       /* Address of CONFLICT section */
++#define DT_MIPS_LIBLIST            0x70000009 /* Address of LIBLIST section */
++#define DT_MIPS_LOCAL_GOTNO  0x7000000a       /* Number of local GOT entries */
++#define DT_MIPS_CONFLICTNO   0x7000000b       /* Number of CONFLICT entries */
++#define DT_MIPS_LIBLISTNO    0x70000010       /* Number of LIBLIST entries */
++#define DT_MIPS_SYMTABNO     0x70000011       /* Number of DYNSYM entries */
++#define DT_MIPS_UNREFEXTNO   0x70000012       /* First external DYNSYM */
++#define DT_MIPS_GOTSYM             0x70000013 /* First GOT entry in DYNSYM */
++#define DT_MIPS_HIPAGENO     0x70000014       /* Number of GOT page table entries */
++#define DT_MIPS_RLD_MAP            0x70000016 /* Address of run time loader map.  */
++#define DT_MIPS_DELTA_CLASS  0x70000017       /* Delta C++ class definition.  */
++#define DT_MIPS_DELTA_CLASS_NO    0x70000018 /* Number of entries in
++                                              DT_MIPS_DELTA_CLASS.  */
++#define DT_MIPS_DELTA_INSTANCE    0x70000019 /* Delta C++ class instances.  */
++#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a /* Number of entries in
++                                              DT_MIPS_DELTA_INSTANCE.  */
++#define DT_MIPS_DELTA_RELOC  0x7000001b /* Delta relocations.  */
++#define DT_MIPS_DELTA_RELOC_NO 0x7000001c /* Number of entries in
++                                           DT_MIPS_DELTA_RELOC.  */
++#define DT_MIPS_DELTA_SYM    0x7000001d /* Delta symbols that Delta
++                                         relocations refer to.  */
++#define DT_MIPS_DELTA_SYM_NO 0x7000001e /* Number of entries in
++                                         DT_MIPS_DELTA_SYM.  */
++#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols that hold the
++                                           class declaration.  */
++#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* Number of entries in
++                                              DT_MIPS_DELTA_CLASSSYM.  */
++#define DT_MIPS_CXX_FLAGS    0x70000022 /* Flags indicating for C++ flavor.  */
++#define DT_MIPS_PIXIE_INIT   0x70000023
++#define DT_MIPS_SYMBOL_LIB   0x70000024
++#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
++#define DT_MIPS_LOCAL_GOTIDX 0x70000026
++#define DT_MIPS_HIDDEN_GOTIDX 0x70000027
++#define DT_MIPS_PROTECTED_GOTIDX 0x70000028
++#define DT_MIPS_OPTIONS            0x70000029 /* Address of .options.  */
++#define DT_MIPS_INTERFACE    0x7000002a /* Address of .interface.  */
++#define DT_MIPS_DYNSTR_ALIGN 0x7000002b
++#define DT_MIPS_INTERFACE_SIZE 0x7000002c /* Size of the .interface section. */
++#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d /* Address of rld_text_rsolve
++                                                  function stored in GOT.  */
++#define DT_MIPS_PERF_SUFFIX  0x7000002e /* Default suffix of dso to be added
++                                         by rld on dlopen() calls.  */
++#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */
++#define DT_MIPS_GP_VALUE     0x70000030 /* GP value for aux GOTs.  */
++#define DT_MIPS_AUX_DYNAMIC  0x70000031 /* Address of aux .dynamic.  */
++/* The address of .got.plt in an executable using the new non-PIC ABI.  */
++#define DT_MIPS_PLTGOT             0x70000032
++/* The base of the PLT in an executable using the new non-PIC ABI if that
++   PLT is writable.  For a non-writable PLT, this is omitted or has a zero
++   value.  */
++#define DT_MIPS_RWPLT        0x70000034
++#define DT_MIPS_NUM        0x35
++
++/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry.  */
++
++#define RHF_NONE                 0            /* No flags */
++#define RHF_QUICKSTART                   (1 << 0)     /* Use quickstart */
++#define RHF_NOTPOT               (1 << 1)     /* Hash size not power of 2 */
++#define RHF_NO_LIBRARY_REPLACEMENT (1 << 2)   /* Ignore LD_LIBRARY_PATH */
++#define RHF_NO_MOVE              (1 << 3)
++#define RHF_SGI_ONLY             (1 << 4)
++#define RHF_GUARANTEE_INIT       (1 << 5)
++#define RHF_DELTA_C_PLUS_PLUS    (1 << 6)
++#define RHF_GUARANTEE_START_INIT   (1 << 7)
++#define RHF_PIXIE                (1 << 8)
++#define RHF_DEFAULT_DELAY_LOAD           (1 << 9)
++#define RHF_REQUICKSTART         (1 << 10)
++#define RHF_REQUICKSTARTED       (1 << 11)
++#define RHF_CORD                 (1 << 12)
++#define RHF_NO_UNRES_UNDEF       (1 << 13)
++#define RHF_RLD_ORDER_SAFE       (1 << 14)
++
++/* Entries found in sections of type SHT_MIPS_LIBLIST.  */
++
++typedef struct
++{
++  Elf32_Word l_name;          /* Name (string table index) */
++  Elf32_Word l_time_stamp;    /* Timestamp */
++  Elf32_Word l_checksum;      /* Checksum */
++  Elf32_Word l_version;               /* Interface version */
++  Elf32_Word l_flags;         /* Flags */
++} Elf32_Lib;
++
++typedef struct
++{
++  Elf64_Word l_name;          /* Name (string table index) */
++  Elf64_Word l_time_stamp;    /* Timestamp */
++  Elf64_Word l_checksum;      /* Checksum */
++  Elf64_Word l_version;               /* Interface version */
++  Elf64_Word l_flags;         /* Flags */
++} Elf64_Lib;
++
++
++/* Legal values for l_flags.  */
++
++#define LL_NONE                 0
++#define LL_EXACT_MATCH          (1 << 0)      /* Require exact match */
++#define LL_IGNORE_INT_VER (1 << 1)    /* Ignore interface version */
++#define LL_REQUIRE_MINOR  (1 << 2)
++#define LL_EXPORTS      (1 << 3)
++#define LL_DELAY_LOAD   (1 << 4)
++#define LL_DELTA        (1 << 5)
++
++/* Entries found in sections of type SHT_MIPS_CONFLICT.  */
++
++typedef Elf32_Addr Elf32_Conflict;
++
++
++/* HPPA specific definitions.  */
++
++/* Legal values for e_flags field of Elf32_Ehdr.  */
++
++#define EF_PARISC_TRAPNIL     0x00010000 /* Trap nil pointer dereference.  */
++#define EF_PARISC_EXT         0x00020000 /* Program uses arch. extensions. */
++#define EF_PARISC_LSB         0x00040000 /* Program expects little endian. */
++#define EF_PARISC_WIDE                0x00080000 /* Program expects wide mode.  */
++#define EF_PARISC_NO_KABP     0x00100000 /* No kernel assisted branch
++                                            prediction.  */
++#define EF_PARISC_LAZYSWAP    0x00400000 /* Allow lazy swapping.  */
++#define EF_PARISC_ARCH                0x0000ffff /* Architecture version.  */
++
++/* Defined values for `e_flags & EF_PARISC_ARCH' are:  */
++
++#define EFA_PARISC_1_0                    0x020b /* PA-RISC 1.0 big-endian.  */
++#define EFA_PARISC_1_1                    0x0210 /* PA-RISC 1.1 big-endian.  */
++#define EFA_PARISC_2_0                    0x0214 /* PA-RISC 2.0 big-endian.  */
++
++/* Additional section indeces.  */
++
++#define SHN_PARISC_ANSI_COMMON        0xff00     /* Section for tenatively declared
++                                            symbols in ANSI C.  */
++#define SHN_PARISC_HUGE_COMMON        0xff01     /* Common blocks in huge model.  */
++
++/* Legal values for sh_type field of Elf32_Shdr.  */
++
++#define SHT_PARISC_EXT                0x70000000 /* Contains product specific ext. */
++#define SHT_PARISC_UNWIND     0x70000001 /* Unwind information.  */
++#define SHT_PARISC_DOC                0x70000002 /* Debug info for optimized code. */
++
++/* Legal values for sh_flags field of Elf32_Shdr.  */
++
++#define SHF_PARISC_SHORT      0x20000000 /* Section with short addressing. */
++#define SHF_PARISC_HUGE               0x40000000 /* Section far from gp.  */
++#define SHF_PARISC_SBP                0x80000000 /* Static branch prediction code. */
++
++/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
++
++#define STT_PARISC_MILLICODE  13      /* Millicode function entry point.  */
++
++#define STT_HP_OPAQUE         (STT_LOOS + 0x1)
++#define STT_HP_STUB           (STT_LOOS + 0x2)
++
++/* HPPA relocs.  */
++
++#define R_PARISC_NONE         0       /* No reloc.  */
++#define R_PARISC_DIR32                1       /* Direct 32-bit reference.  */
++#define R_PARISC_DIR21L               2       /* Left 21 bits of eff. address.  */
++#define R_PARISC_DIR17R               3       /* Right 17 bits of eff. address.  */
++#define R_PARISC_DIR17F               4       /* 17 bits of eff. address.  */
++#define R_PARISC_DIR14R               6       /* Right 14 bits of eff. address.  */
++#define R_PARISC_PCREL32      9       /* 32-bit rel. address.  */
++#define R_PARISC_PCREL21L     10      /* Left 21 bits of rel. address.  */
++#define R_PARISC_PCREL17R     11      /* Right 17 bits of rel. address.  */
++#define R_PARISC_PCREL17F     12      /* 17 bits of rel. address.  */
++#define R_PARISC_PCREL14R     14      /* Right 14 bits of rel. address.  */
++#define R_PARISC_DPREL21L     18      /* Left 21 bits of rel. address.  */
++#define R_PARISC_DPREL14R     22      /* Right 14 bits of rel. address.  */
++#define R_PARISC_GPREL21L     26      /* GP-relative, left 21 bits.  */
++#define R_PARISC_GPREL14R     30      /* GP-relative, right 14 bits.  */
++#define R_PARISC_LTOFF21L     34      /* LT-relative, left 21 bits.  */
++#define R_PARISC_LTOFF14R     38      /* LT-relative, right 14 bits.  */
++#define R_PARISC_SECREL32     41      /* 32 bits section rel. address.  */
++#define R_PARISC_SEGBASE      48      /* No relocation, set segment base.  */
++#define R_PARISC_SEGREL32     49      /* 32 bits segment rel. address.  */
++#define R_PARISC_PLTOFF21L    50      /* PLT rel. address, left 21 bits.  */
++#define R_PARISC_PLTOFF14R    54      /* PLT rel. address, right 14 bits.  */
++#define R_PARISC_LTOFF_FPTR32 57      /* 32 bits LT-rel. function pointer. */
++#define R_PARISC_LTOFF_FPTR21L        58      /* LT-rel. fct ptr, left 21 bits. */
++#define R_PARISC_LTOFF_FPTR14R        62      /* LT-rel. fct ptr, right 14 bits. */
++#define R_PARISC_FPTR64               64      /* 64 bits function address.  */
++#define R_PARISC_PLABEL32     65      /* 32 bits function address.  */
++#define R_PARISC_PLABEL21L    66      /* Left 21 bits of fdesc address.  */
++#define R_PARISC_PLABEL14R    70      /* Right 14 bits of fdesc address.  */
++#define R_PARISC_PCREL64      72      /* 64 bits PC-rel. address.  */
++#define R_PARISC_PCREL22F     74      /* 22 bits PC-rel. address.  */
++#define R_PARISC_PCREL14WR    75      /* PC-rel. address, right 14 bits.  */
++#define R_PARISC_PCREL14DR    76      /* PC rel. address, right 14 bits.  */
++#define R_PARISC_PCREL16F     77      /* 16 bits PC-rel. address.  */
++#define R_PARISC_PCREL16WF    78      /* 16 bits PC-rel. address.  */
++#define R_PARISC_PCREL16DF    79      /* 16 bits PC-rel. address.  */
++#define R_PARISC_DIR64                80      /* 64 bits of eff. address.  */
++#define R_PARISC_DIR14WR      83      /* 14 bits of eff. address.  */
++#define R_PARISC_DIR14DR      84      /* 14 bits of eff. address.  */
++#define R_PARISC_DIR16F               85      /* 16 bits of eff. address.  */
++#define R_PARISC_DIR16WF      86      /* 16 bits of eff. address.  */
++#define R_PARISC_DIR16DF      87      /* 16 bits of eff. address.  */
++#define R_PARISC_GPREL64      88      /* 64 bits of GP-rel. address.  */
++#define R_PARISC_GPREL14WR    91      /* GP-rel. address, right 14 bits.  */
++#define R_PARISC_GPREL14DR    92      /* GP-rel. address, right 14 bits.  */
++#define R_PARISC_GPREL16F     93      /* 16 bits GP-rel. address.  */
++#define R_PARISC_GPREL16WF    94      /* 16 bits GP-rel. address.  */
++#define R_PARISC_GPREL16DF    95      /* 16 bits GP-rel. address.  */
++#define R_PARISC_LTOFF64      96      /* 64 bits LT-rel. address.  */
++#define R_PARISC_LTOFF14WR    99      /* LT-rel. address, right 14 bits.  */
++#define R_PARISC_LTOFF14DR    100     /* LT-rel. address, right 14 bits.  */
++#define R_PARISC_LTOFF16F     101     /* 16 bits LT-rel. address.  */
++#define R_PARISC_LTOFF16WF    102     /* 16 bits LT-rel. address.  */
++#define R_PARISC_LTOFF16DF    103     /* 16 bits LT-rel. address.  */
++#define R_PARISC_SECREL64     104     /* 64 bits section rel. address.  */
++#define R_PARISC_SEGREL64     112     /* 64 bits segment rel. address.  */
++#define R_PARISC_PLTOFF14WR   115     /* PLT-rel. address, right 14 bits.  */
++#define R_PARISC_PLTOFF14DR   116     /* PLT-rel. address, right 14 bits.  */
++#define R_PARISC_PLTOFF16F    117     /* 16 bits LT-rel. address.  */
++#define R_PARISC_PLTOFF16WF   118     /* 16 bits PLT-rel. address.  */
++#define R_PARISC_PLTOFF16DF   119     /* 16 bits PLT-rel. address.  */
++#define R_PARISC_LTOFF_FPTR64 120     /* 64 bits LT-rel. function ptr.  */
++#define R_PARISC_LTOFF_FPTR14WR       123     /* LT-rel. fct. ptr., right 14 bits. */
++#define R_PARISC_LTOFF_FPTR14DR       124     /* LT-rel. fct. ptr., right 14 bits. */
++#define R_PARISC_LTOFF_FPTR16F        125     /* 16 bits LT-rel. function ptr.  */
++#define R_PARISC_LTOFF_FPTR16WF       126     /* 16 bits LT-rel. function ptr.  */
++#define R_PARISC_LTOFF_FPTR16DF       127     /* 16 bits LT-rel. function ptr.  */
++#define R_PARISC_LORESERVE    128
++#define R_PARISC_COPY         128     /* Copy relocation.  */
++#define R_PARISC_IPLT         129     /* Dynamic reloc, imported PLT */
++#define R_PARISC_EPLT         130     /* Dynamic reloc, exported PLT */
++#define R_PARISC_TPREL32      153     /* 32 bits TP-rel. address.  */
++#define R_PARISC_TPREL21L     154     /* TP-rel. address, left 21 bits.  */
++#define R_PARISC_TPREL14R     158     /* TP-rel. address, right 14 bits.  */
++#define R_PARISC_LTOFF_TP21L  162     /* LT-TP-rel. address, left 21 bits. */
++#define R_PARISC_LTOFF_TP14R  166     /* LT-TP-rel. address, right 14 bits.*/
++#define R_PARISC_LTOFF_TP14F  167     /* 14 bits LT-TP-rel. address.  */
++#define R_PARISC_TPREL64      216     /* 64 bits TP-rel. address.  */
++#define R_PARISC_TPREL14WR    219     /* TP-rel. address, right 14 bits.  */
++#define R_PARISC_TPREL14DR    220     /* TP-rel. address, right 14 bits.  */
++#define R_PARISC_TPREL16F     221     /* 16 bits TP-rel. address.  */
++#define R_PARISC_TPREL16WF    222     /* 16 bits TP-rel. address.  */
++#define R_PARISC_TPREL16DF    223     /* 16 bits TP-rel. address.  */
++#define R_PARISC_LTOFF_TP64   224     /* 64 bits LT-TP-rel. address.  */
++#define R_PARISC_LTOFF_TP14WR 227     /* LT-TP-rel. address, right 14 bits.*/
++#define R_PARISC_LTOFF_TP14DR 228     /* LT-TP-rel. address, right 14 bits.*/
++#define R_PARISC_LTOFF_TP16F  229     /* 16 bits LT-TP-rel. address.  */
++#define R_PARISC_LTOFF_TP16WF 230     /* 16 bits LT-TP-rel. address.  */
++#define R_PARISC_LTOFF_TP16DF 231     /* 16 bits LT-TP-rel. address.  */
++#define R_PARISC_GNU_VTENTRY  232
++#define R_PARISC_GNU_VTINHERIT        233
++#define R_PARISC_TLS_GD21L    234     /* GD 21-bit left.  */
++#define R_PARISC_TLS_GD14R    235     /* GD 14-bit right.  */
++#define R_PARISC_TLS_GDCALL   236     /* GD call to __t_g_a.  */
++#define R_PARISC_TLS_LDM21L   237     /* LD module 21-bit left.  */
++#define R_PARISC_TLS_LDM14R   238     /* LD module 14-bit right.  */
++#define R_PARISC_TLS_LDMCALL  239     /* LD module call to __t_g_a.  */
++#define R_PARISC_TLS_LDO21L   240     /* LD offset 21-bit left.  */
++#define R_PARISC_TLS_LDO14R   241     /* LD offset 14-bit right.  */
++#define R_PARISC_TLS_DTPMOD32 242     /* DTP module 32-bit.  */
++#define R_PARISC_TLS_DTPMOD64 243     /* DTP module 64-bit.  */
++#define R_PARISC_TLS_DTPOFF32 244     /* DTP offset 32-bit.  */
++#define R_PARISC_TLS_DTPOFF64 245     /* DTP offset 32-bit.  */
++#define R_PARISC_TLS_LE21L    R_PARISC_TPREL21L
++#define R_PARISC_TLS_LE14R    R_PARISC_TPREL14R
++#define R_PARISC_TLS_IE21L    R_PARISC_LTOFF_TP21L
++#define R_PARISC_TLS_IE14R    R_PARISC_LTOFF_TP14R
++#define R_PARISC_TLS_TPREL32  R_PARISC_TPREL32
++#define R_PARISC_TLS_TPREL64  R_PARISC_TPREL64
++#define R_PARISC_HIRESERVE    255
++
++/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr.  */
++
++#define PT_HP_TLS             (PT_LOOS + 0x0)
++#define PT_HP_CORE_NONE               (PT_LOOS + 0x1)
++#define PT_HP_CORE_VERSION    (PT_LOOS + 0x2)
++#define PT_HP_CORE_KERNEL     (PT_LOOS + 0x3)
++#define PT_HP_CORE_COMM               (PT_LOOS + 0x4)
++#define PT_HP_CORE_PROC               (PT_LOOS + 0x5)
++#define PT_HP_CORE_LOADABLE   (PT_LOOS + 0x6)
++#define PT_HP_CORE_STACK      (PT_LOOS + 0x7)
++#define PT_HP_CORE_SHM                (PT_LOOS + 0x8)
++#define PT_HP_CORE_MMF                (PT_LOOS + 0x9)
++#define PT_HP_PARALLEL                (PT_LOOS + 0x10)
++#define PT_HP_FASTBIND                (PT_LOOS + 0x11)
++#define PT_HP_OPT_ANNOT               (PT_LOOS + 0x12)
++#define PT_HP_HSL_ANNOT               (PT_LOOS + 0x13)
++#define PT_HP_STACK           (PT_LOOS + 0x14)
++
++#define PT_PARISC_ARCHEXT     0x70000000
++#define PT_PARISC_UNWIND      0x70000001
++
++/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr.  */
++
++#define PF_PARISC_SBP         0x08000000
++
++#define PF_HP_PAGE_SIZE               0x00100000
++#define PF_HP_FAR_SHARED      0x00200000
++#define PF_HP_NEAR_SHARED     0x00400000
++#define PF_HP_CODE            0x01000000
++#define PF_HP_MODIFY          0x02000000
++#define PF_HP_LAZYSWAP                0x04000000
++#define PF_HP_SBP             0x08000000
++
++
++/* Alpha specific definitions.  */
++
++/* Legal values for e_flags field of Elf64_Ehdr.  */
++
++#define EF_ALPHA_32BIT                1       /* All addresses must be < 2GB.  */
++#define EF_ALPHA_CANRELAX     2       /* Relocations for relaxing exist.  */
++
++/* Legal values for sh_type field of Elf64_Shdr.  */
++
++/* These two are primerily concerned with ECOFF debugging info.  */
++#define SHT_ALPHA_DEBUG               0x70000001
++#define SHT_ALPHA_REGINFO     0x70000002
++
++/* Legal values for sh_flags field of Elf64_Shdr.  */
++
++#define SHF_ALPHA_GPREL               0x10000000
++
++/* Legal values for st_other field of Elf64_Sym.  */
++#define STO_ALPHA_NOPV                0x80    /* No PV required.  */
++#define STO_ALPHA_STD_GPLOAD  0x88    /* PV only used for initial ldgp.  */
++
++/* Alpha relocs.  */
++
++#define R_ALPHA_NONE          0       /* No reloc */
++#define R_ALPHA_REFLONG               1       /* Direct 32 bit */
++#define R_ALPHA_REFQUAD               2       /* Direct 64 bit */
++#define R_ALPHA_GPREL32               3       /* GP relative 32 bit */
++#define R_ALPHA_LITERAL               4       /* GP relative 16 bit w/optimization */
++#define R_ALPHA_LITUSE                5       /* Optimization hint for LITERAL */
++#define R_ALPHA_GPDISP                6       /* Add displacement to GP */
++#define R_ALPHA_BRADDR                7       /* PC+4 relative 23 bit shifted */
++#define R_ALPHA_HINT          8       /* PC+4 relative 16 bit shifted */
++#define R_ALPHA_SREL16                9       /* PC relative 16 bit */
++#define R_ALPHA_SREL32                10      /* PC relative 32 bit */
++#define R_ALPHA_SREL64                11      /* PC relative 64 bit */
++#define R_ALPHA_GPRELHIGH     17      /* GP relative 32 bit, high 16 bits */
++#define R_ALPHA_GPRELLOW      18      /* GP relative 32 bit, low 16 bits */
++#define R_ALPHA_GPREL16               19      /* GP relative 16 bit */
++#define R_ALPHA_COPY          24      /* Copy symbol at runtime */
++#define R_ALPHA_GLOB_DAT      25      /* Create GOT entry */
++#define R_ALPHA_JMP_SLOT      26      /* Create PLT entry */
++#define R_ALPHA_RELATIVE      27      /* Adjust by program base */
++#define R_ALPHA_TLS_GD_HI     28
++#define R_ALPHA_TLSGD         29
++#define R_ALPHA_TLS_LDM               30
++#define R_ALPHA_DTPMOD64      31
++#define R_ALPHA_GOTDTPREL     32
++#define R_ALPHA_DTPREL64      33
++#define R_ALPHA_DTPRELHI      34
++#define R_ALPHA_DTPRELLO      35
++#define R_ALPHA_DTPREL16      36
++#define R_ALPHA_GOTTPREL      37
++#define R_ALPHA_TPREL64               38
++#define R_ALPHA_TPRELHI               39
++#define R_ALPHA_TPRELLO               40
++#define R_ALPHA_TPREL16               41
++/* Keep this the last entry.  */
++#define R_ALPHA_NUM           46
++
++/* Magic values of the LITUSE relocation addend.  */
++#define LITUSE_ALPHA_ADDR     0
++#define LITUSE_ALPHA_BASE     1
++#define LITUSE_ALPHA_BYTOFF   2
++#define LITUSE_ALPHA_JSR      3
++#define LITUSE_ALPHA_TLS_GD   4
++#define LITUSE_ALPHA_TLS_LDM  5
++
++/* Legal values for d_tag of Elf64_Dyn.  */
++#define DT_ALPHA_PLTRO                (DT_LOPROC + 0)
++#define DT_ALPHA_NUM          1
++
++/* PowerPC specific declarations */
++
++/* Values for Elf32/64_Ehdr.e_flags.  */
++#define EF_PPC_EMB            0x80000000      /* PowerPC embedded flag */
++
++/* Cygnus local bits below */
++#define EF_PPC_RELOCATABLE    0x00010000      /* PowerPC -mrelocatable flag*/
++#define EF_PPC_RELOCATABLE_LIB        0x00008000      /* PowerPC -mrelocatable-lib
++                                                 flag */
++
++/* PowerPC relocations defined by the ABIs */
++#define R_PPC_NONE            0
++#define R_PPC_ADDR32          1       /* 32bit absolute address */
++#define R_PPC_ADDR24          2       /* 26bit address, 2 bits ignored.  */
++#define R_PPC_ADDR16          3       /* 16bit absolute address */
++#define R_PPC_ADDR16_LO               4       /* lower 16bit of absolute address */
++#define R_PPC_ADDR16_HI               5       /* high 16bit of absolute address */
++#define R_PPC_ADDR16_HA               6       /* adjusted high 16bit */
++#define R_PPC_ADDR14          7       /* 16bit address, 2 bits ignored */
++#define R_PPC_ADDR14_BRTAKEN  8
++#define R_PPC_ADDR14_BRNTAKEN 9
++#define R_PPC_REL24           10      /* PC relative 26 bit */
++#define R_PPC_REL14           11      /* PC relative 16 bit */
++#define R_PPC_REL14_BRTAKEN   12
++#define R_PPC_REL14_BRNTAKEN  13
++#define R_PPC_GOT16           14
++#define R_PPC_GOT16_LO                15
++#define R_PPC_GOT16_HI                16
++#define R_PPC_GOT16_HA                17
++#define R_PPC_PLTREL24                18
++#define R_PPC_COPY            19
++#define R_PPC_GLOB_DAT                20
++#define R_PPC_JMP_SLOT                21
++#define R_PPC_RELATIVE                22
++#define R_PPC_LOCAL24PC               23
++#define R_PPC_UADDR32         24
++#define R_PPC_UADDR16         25
++#define R_PPC_REL32           26
++#define R_PPC_PLT32           27
++#define R_PPC_PLTREL32                28
++#define R_PPC_PLT16_LO                29
++#define R_PPC_PLT16_HI                30
++#define R_PPC_PLT16_HA                31
++#define R_PPC_SDAREL16                32
++#define R_PPC_SECTOFF         33
++#define R_PPC_SECTOFF_LO      34
++#define R_PPC_SECTOFF_HI      35
++#define R_PPC_SECTOFF_HA      36
++
++/* PowerPC relocations defined for the TLS access ABI.  */
++#define R_PPC_TLS             67 /* none      (sym+add)@tls */
++#define R_PPC_DTPMOD32                68 /* word32    (sym+add)@dtpmod */
++#define R_PPC_TPREL16         69 /* half16*   (sym+add)@tprel */
++#define R_PPC_TPREL16_LO      70 /* half16    (sym+add)@tprel@l */
++#define R_PPC_TPREL16_HI      71 /* half16    (sym+add)@tprel@h */
++#define R_PPC_TPREL16_HA      72 /* half16    (sym+add)@tprel@ha */
++#define R_PPC_TPREL32         73 /* word32    (sym+add)@tprel */
++#define R_PPC_DTPREL16                74 /* half16*   (sym+add)@dtprel */
++#define R_PPC_DTPREL16_LO     75 /* half16    (sym+add)@dtprel@l */
++#define R_PPC_DTPREL16_HI     76 /* half16    (sym+add)@dtprel@h */
++#define R_PPC_DTPREL16_HA     77 /* half16    (sym+add)@dtprel@ha */
++#define R_PPC_DTPREL32                78 /* word32    (sym+add)@dtprel */
++#define R_PPC_GOT_TLSGD16     79 /* half16*   (sym+add)@got@tlsgd */
++#define R_PPC_GOT_TLSGD16_LO  80 /* half16    (sym+add)@got@tlsgd@l */
++#define R_PPC_GOT_TLSGD16_HI  81 /* half16    (sym+add)@got@tlsgd@h */
++#define R_PPC_GOT_TLSGD16_HA  82 /* half16    (sym+add)@got@tlsgd@ha */
++#define R_PPC_GOT_TLSLD16     83 /* half16*   (sym+add)@got@tlsld */
++#define R_PPC_GOT_TLSLD16_LO  84 /* half16    (sym+add)@got@tlsld@l */
++#define R_PPC_GOT_TLSLD16_HI  85 /* half16    (sym+add)@got@tlsld@h */
++#define R_PPC_GOT_TLSLD16_HA  86 /* half16    (sym+add)@got@tlsld@ha */
++#define R_PPC_GOT_TPREL16     87 /* half16*   (sym+add)@got@tprel */
++#define R_PPC_GOT_TPREL16_LO  88 /* half16    (sym+add)@got@tprel@l */
++#define R_PPC_GOT_TPREL16_HI  89 /* half16    (sym+add)@got@tprel@h */
++#define R_PPC_GOT_TPREL16_HA  90 /* half16    (sym+add)@got@tprel@ha */
++#define R_PPC_GOT_DTPREL16    91 /* half16*   (sym+add)@got@dtprel */
++#define R_PPC_GOT_DTPREL16_LO 92 /* half16*   (sym+add)@got@dtprel@l */
++#define R_PPC_GOT_DTPREL16_HI 93 /* half16*   (sym+add)@got@dtprel@h */
++#define R_PPC_GOT_DTPREL16_HA 94 /* half16*   (sym+add)@got@dtprel@ha */
++
++/* The remaining relocs are from the Embedded ELF ABI, and are not
++   in the SVR4 ELF ABI.  */
++#define R_PPC_EMB_NADDR32     101
++#define R_PPC_EMB_NADDR16     102
++#define R_PPC_EMB_NADDR16_LO  103
++#define R_PPC_EMB_NADDR16_HI  104
++#define R_PPC_EMB_NADDR16_HA  105
++#define R_PPC_EMB_SDAI16      106
++#define R_PPC_EMB_SDA2I16     107
++#define R_PPC_EMB_SDA2REL     108
++#define R_PPC_EMB_SDA21               109     /* 16 bit offset in SDA */
++#define R_PPC_EMB_MRKREF      110
++#define R_PPC_EMB_RELSEC16    111
++#define R_PPC_EMB_RELST_LO    112
++#define R_PPC_EMB_RELST_HI    113
++#define R_PPC_EMB_RELST_HA    114
++#define R_PPC_EMB_BIT_FLD     115
++#define R_PPC_EMB_RELSDA      116     /* 16 bit relative offset in SDA */
++
++/* Diab tool relocations.  */
++#define R_PPC_DIAB_SDA21_LO   180     /* like EMB_SDA21, but lower 16 bit */
++#define R_PPC_DIAB_SDA21_HI   181     /* like EMB_SDA21, but high 16 bit */
++#define R_PPC_DIAB_SDA21_HA   182     /* like EMB_SDA21, adjusted high 16 */
++#define R_PPC_DIAB_RELSDA_LO  183     /* like EMB_RELSDA, but lower 16 bit */
++#define R_PPC_DIAB_RELSDA_HI  184     /* like EMB_RELSDA, but high 16 bit */
++#define R_PPC_DIAB_RELSDA_HA  185     /* like EMB_RELSDA, adjusted high 16 */
++
++/* GNU extension to support local ifunc.  */
++#define R_PPC_IRELATIVE               248
++
++/* GNU relocs used in PIC code sequences.  */
++#define R_PPC_REL16           249     /* half16   (sym+add-.) */
++#define R_PPC_REL16_LO                250     /* half16   (sym+add-.)@l */
++#define R_PPC_REL16_HI                251     /* half16   (sym+add-.)@h */
++#define R_PPC_REL16_HA                252     /* half16   (sym+add-.)@ha */
++
++/* This is a phony reloc to handle any old fashioned TOC16 references
++   that may still be in object files.  */
++#define R_PPC_TOC16           255
++
++/* PowerPC specific values for the Dyn d_tag field.  */
++#define DT_PPC_GOT            (DT_LOPROC + 0)
++#define DT_PPC_NUM            1
++
++/* PowerPC64 relocations defined by the ABIs */
++#define R_PPC64_NONE          R_PPC_NONE
++#define R_PPC64_ADDR32                R_PPC_ADDR32 /* 32bit absolute address */
++#define R_PPC64_ADDR24                R_PPC_ADDR24 /* 26bit address, word aligned */
++#define R_PPC64_ADDR16                R_PPC_ADDR16 /* 16bit absolute address */
++#define R_PPC64_ADDR16_LO     R_PPC_ADDR16_LO /* lower 16bits of address */
++#define R_PPC64_ADDR16_HI     R_PPC_ADDR16_HI /* high 16bits of address. */
++#define R_PPC64_ADDR16_HA     R_PPC_ADDR16_HA /* adjusted high 16bits.  */
++#define R_PPC64_ADDR14                R_PPC_ADDR14 /* 16bit address, word aligned */
++#define R_PPC64_ADDR14_BRTAKEN        R_PPC_ADDR14_BRTAKEN
++#define R_PPC64_ADDR14_BRNTAKEN       R_PPC_ADDR14_BRNTAKEN
++#define R_PPC64_REL24         R_PPC_REL24 /* PC-rel. 26 bit, word aligned */
++#define R_PPC64_REL14         R_PPC_REL14 /* PC relative 16 bit */
++#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN
++#define R_PPC64_REL14_BRNTAKEN        R_PPC_REL14_BRNTAKEN
++#define R_PPC64_GOT16         R_PPC_GOT16
++#define R_PPC64_GOT16_LO      R_PPC_GOT16_LO
++#define R_PPC64_GOT16_HI      R_PPC_GOT16_HI
++#define R_PPC64_GOT16_HA      R_PPC_GOT16_HA
++
++#define R_PPC64_COPY          R_PPC_COPY
++#define R_PPC64_GLOB_DAT      R_PPC_GLOB_DAT
++#define R_PPC64_JMP_SLOT      R_PPC_JMP_SLOT
++#define R_PPC64_RELATIVE      R_PPC_RELATIVE
++
++#define R_PPC64_UADDR32               R_PPC_UADDR32
++#define R_PPC64_UADDR16               R_PPC_UADDR16
++#define R_PPC64_REL32         R_PPC_REL32
++#define R_PPC64_PLT32         R_PPC_PLT32
++#define R_PPC64_PLTREL32      R_PPC_PLTREL32
++#define R_PPC64_PLT16_LO      R_PPC_PLT16_LO
++#define R_PPC64_PLT16_HI      R_PPC_PLT16_HI
++#define R_PPC64_PLT16_HA      R_PPC_PLT16_HA
++
++#define R_PPC64_SECTOFF               R_PPC_SECTOFF
++#define R_PPC64_SECTOFF_LO    R_PPC_SECTOFF_LO
++#define R_PPC64_SECTOFF_HI    R_PPC_SECTOFF_HI
++#define R_PPC64_SECTOFF_HA    R_PPC_SECTOFF_HA
++#define R_PPC64_ADDR30                37 /* word30 (S + A - P) >> 2 */
++#define R_PPC64_ADDR64                38 /* doubleword64 S + A */
++#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A) */
++#define R_PPC64_ADDR16_HIGHERA        40 /* half16 #highera(S + A) */
++#define R_PPC64_ADDR16_HIGHEST        41 /* half16 #highest(S + A) */
++#define R_PPC64_ADDR16_HIGHESTA       42 /* half16 #highesta(S + A) */
++#define R_PPC64_UADDR64               43 /* doubleword64 S + A */
++#define R_PPC64_REL64         44 /* doubleword64 S + A - P */
++#define R_PPC64_PLT64         45 /* doubleword64 L + A */
++#define R_PPC64_PLTREL64      46 /* doubleword64 L + A - P */
++#define R_PPC64_TOC16         47 /* half16* S + A - .TOC */
++#define R_PPC64_TOC16_LO      48 /* half16 #lo(S + A - .TOC.) */
++#define R_PPC64_TOC16_HI      49 /* half16 #hi(S + A - .TOC.) */
++#define R_PPC64_TOC16_HA      50 /* half16 #ha(S + A - .TOC.) */
++#define R_PPC64_TOC           51 /* doubleword64 .TOC */
++#define R_PPC64_PLTGOT16      52 /* half16* M + A */
++#define R_PPC64_PLTGOT16_LO   53 /* half16 #lo(M + A) */
++#define R_PPC64_PLTGOT16_HI   54 /* half16 #hi(M + A) */
++#define R_PPC64_PLTGOT16_HA   55 /* half16 #ha(M + A) */
++
++#define R_PPC64_ADDR16_DS     56 /* half16ds* (S + A) >> 2 */
++#define R_PPC64_ADDR16_LO_DS  57 /* half16ds  #lo(S + A) >> 2 */
++#define R_PPC64_GOT16_DS      58 /* half16ds* (G + A) >> 2 */
++#define R_PPC64_GOT16_LO_DS   59 /* half16ds  #lo(G + A) >> 2 */
++#define R_PPC64_PLT16_LO_DS   60 /* half16ds  #lo(L + A) >> 2 */
++#define R_PPC64_SECTOFF_DS    61 /* half16ds* (R + A) >> 2 */
++#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds  #lo(R + A) >> 2 */
++#define R_PPC64_TOC16_DS      63 /* half16ds* (S + A - .TOC.) >> 2 */
++#define R_PPC64_TOC16_LO_DS   64 /* half16ds  #lo(S + A - .TOC.) >> 2 */
++#define R_PPC64_PLTGOT16_DS   65 /* half16ds* (M + A) >> 2 */
++#define R_PPC64_PLTGOT16_LO_DS        66 /* half16ds  #lo(M + A) >> 2 */
++
++/* PowerPC64 relocations defined for the TLS access ABI.  */
++#define R_PPC64_TLS           67 /* none      (sym+add)@tls */
++#define R_PPC64_DTPMOD64      68 /* doubleword64 (sym+add)@dtpmod */
++#define R_PPC64_TPREL16               69 /* half16*   (sym+add)@tprel */
++#define R_PPC64_TPREL16_LO    70 /* half16    (sym+add)@tprel@l */
++#define R_PPC64_TPREL16_HI    71 /* half16    (sym+add)@tprel@h */
++#define R_PPC64_TPREL16_HA    72 /* half16    (sym+add)@tprel@ha */
++#define R_PPC64_TPREL64               73 /* doubleword64 (sym+add)@tprel */
++#define R_PPC64_DTPREL16      74 /* half16*   (sym+add)@dtprel */
++#define R_PPC64_DTPREL16_LO   75 /* half16    (sym+add)@dtprel@l */
++#define R_PPC64_DTPREL16_HI   76 /* half16    (sym+add)@dtprel@h */
++#define R_PPC64_DTPREL16_HA   77 /* half16    (sym+add)@dtprel@ha */
++#define R_PPC64_DTPREL64      78 /* doubleword64 (sym+add)@dtprel */
++#define R_PPC64_GOT_TLSGD16   79 /* half16*   (sym+add)@got@tlsgd */
++#define R_PPC64_GOT_TLSGD16_LO        80 /* half16    (sym+add)@got@tlsgd@l */
++#define R_PPC64_GOT_TLSGD16_HI        81 /* half16    (sym+add)@got@tlsgd@h */
++#define R_PPC64_GOT_TLSGD16_HA        82 /* half16    (sym+add)@got@tlsgd@ha */
++#define R_PPC64_GOT_TLSLD16   83 /* half16*   (sym+add)@got@tlsld */
++#define R_PPC64_GOT_TLSLD16_LO        84 /* half16    (sym+add)@got@tlsld@l */
++#define R_PPC64_GOT_TLSLD16_HI        85 /* half16    (sym+add)@got@tlsld@h */
++#define R_PPC64_GOT_TLSLD16_HA        86 /* half16    (sym+add)@got@tlsld@ha */
++#define R_PPC64_GOT_TPREL16_DS        87 /* half16ds* (sym+add)@got@tprel */
++#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
++#define R_PPC64_GOT_TPREL16_HI        89 /* half16    (sym+add)@got@tprel@h */
++#define R_PPC64_GOT_TPREL16_HA        90 /* half16    (sym+add)@got@tprel@ha */
++#define R_PPC64_GOT_DTPREL16_DS       91 /* half16ds* (sym+add)@got@dtprel */
++#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
++#define R_PPC64_GOT_DTPREL16_HI       93 /* half16    (sym+add)@got@dtprel@h */
++#define R_PPC64_GOT_DTPREL16_HA       94 /* half16    (sym+add)@got@dtprel@ha */
++#define R_PPC64_TPREL16_DS    95 /* half16ds* (sym+add)@tprel */
++#define R_PPC64_TPREL16_LO_DS 96 /* half16ds  (sym+add)@tprel@l */
++#define R_PPC64_TPREL16_HIGHER        97 /* half16    (sym+add)@tprel@higher */
++#define R_PPC64_TPREL16_HIGHERA       98 /* half16    (sym+add)@tprel@highera */
++#define R_PPC64_TPREL16_HIGHEST       99 /* half16    (sym+add)@tprel@highest */
++#define R_PPC64_TPREL16_HIGHESTA 100 /* half16        (sym+add)@tprel@highesta */
++#define R_PPC64_DTPREL16_DS   101 /* half16ds* (sym+add)@dtprel */
++#define R_PPC64_DTPREL16_LO_DS        102 /* half16ds (sym+add)@dtprel@l */
++#define R_PPC64_DTPREL16_HIGHER       103 /* half16   (sym+add)@dtprel@higher */
++#define R_PPC64_DTPREL16_HIGHERA 104 /* half16        (sym+add)@dtprel@highera */
++#define R_PPC64_DTPREL16_HIGHEST 105 /* half16        (sym+add)@dtprel@highest */
++#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16       (sym+add)@dtprel@highesta */
++
++/* GNU extension to support local ifunc.  */
++#define R_PPC64_JMP_IREL      247
++#define R_PPC64_IRELATIVE     248
++#define R_PPC64_REL16         249     /* half16   (sym+add-.) */
++#define R_PPC64_REL16_LO      250     /* half16   (sym+add-.)@l */
++#define R_PPC64_REL16_HI      251     /* half16   (sym+add-.)@h */
++#define R_PPC64_REL16_HA      252     /* half16   (sym+add-.)@ha */
++
++/* PowerPC64 specific values for the Dyn d_tag field.  */
++#define DT_PPC64_GLINK  (DT_LOPROC + 0)
++#define DT_PPC64_OPD  (DT_LOPROC + 1)
++#define DT_PPC64_OPDSZ        (DT_LOPROC + 2)
++#define DT_PPC64_NUM    3
++
++
++/* ARM specific declarations */
++
++/* Processor specific flags for the ELF header e_flags field.  */
++#define EF_ARM_RELEXEC                0x01
++#define EF_ARM_HASENTRY               0x02
++#define EF_ARM_INTERWORK      0x04
++#define EF_ARM_APCS_26                0x08
++#define EF_ARM_APCS_FLOAT     0x10
++#define EF_ARM_PIC            0x20
++#define EF_ARM_ALIGN8         0x40 /* 8-bit structure alignment is in use */
++#define EF_ARM_NEW_ABI                0x80
++#define EF_ARM_OLD_ABI                0x100
++#define EF_ARM_SOFT_FLOAT     0x200
++#define EF_ARM_VFP_FLOAT      0x400
++#define EF_ARM_MAVERICK_FLOAT 0x800
++
++
++/* Other constants defined in the ARM ELF spec. version B-01.  */
++/* NB. These conflict with values defined above.  */
++#define EF_ARM_SYMSARESORTED  0x04
++#define EF_ARM_DYNSYMSUSESEGIDX       0x08
++#define EF_ARM_MAPSYMSFIRST   0x10
++#define EF_ARM_EABIMASK               0XFF000000
++
++/* Constants defined in AAELF.  */
++#define EF_ARM_BE8        0x00800000
++#define EF_ARM_LE8        0x00400000
++
++#define EF_ARM_EABI_VERSION(flags)    ((flags) & EF_ARM_EABIMASK)
++#define EF_ARM_EABI_UNKNOWN   0x00000000
++#define EF_ARM_EABI_VER1      0x01000000
++#define EF_ARM_EABI_VER2      0x02000000
++#define EF_ARM_EABI_VER3      0x03000000
++#define EF_ARM_EABI_VER4      0x04000000
++#define EF_ARM_EABI_VER5      0x05000000
++
++/* Additional symbol types for Thumb.  */
++#define STT_ARM_TFUNC         STT_LOPROC /* A Thumb function.  */
++#define STT_ARM_16BIT         STT_HIPROC /* A Thumb label.  */
++
++/* ARM-specific values for sh_flags */
++#define SHF_ARM_ENTRYSECT     0x10000000 /* Section contains an entry point */
++#define SHF_ARM_COMDEF                0x80000000 /* Section may be multiply defined
++                                            in the input to a link step.  */
++
++/* ARM-specific program header flags */
++#define PF_ARM_SB             0x10000000 /* Segment contains the location
++                                            addressed by the static base. */
++#define PF_ARM_PI             0x20000000 /* Position-independent segment.  */
++#define PF_ARM_ABS            0x40000000 /* Absolute segment.  */
++
++/* Processor specific values for the Phdr p_type field.  */
++#define PT_ARM_EXIDX          (PT_LOPROC + 1) /* ARM unwind segment.  */
++
++/* Processor specific values for the Shdr sh_type field.  */
++#define SHT_ARM_EXIDX         (SHT_LOPROC + 1) /* ARM unwind section.  */
++#define SHT_ARM_PREEMPTMAP    (SHT_LOPROC + 2) /* Preemption details.  */
++#define SHT_ARM_ATTRIBUTES    (SHT_LOPROC + 3) /* ARM attributes section.  */
++
++
++/* ARM relocs.  */
++
++#define R_ARM_NONE            0       /* No reloc */
++#define R_ARM_PC24            1       /* PC relative 26 bit branch */
++#define R_ARM_ABS32           2       /* Direct 32 bit  */
++#define R_ARM_REL32           3       /* PC relative 32 bit */
++#define R_ARM_PC13            4
++#define R_ARM_ABS16           5       /* Direct 16 bit */
++#define R_ARM_ABS12           6       /* Direct 12 bit */
++#define R_ARM_THM_ABS5                7
++#define R_ARM_ABS8            8       /* Direct 8 bit */
++#define R_ARM_SBREL32         9
++#define R_ARM_THM_PC22                10
++#define R_ARM_THM_PC8         11
++#define R_ARM_AMP_VCALL9      12
++#define R_ARM_SWI24           13      /* Obsolete static relocation.  */
++#define R_ARM_TLS_DESC                13      /* Dynamic relocation.  */
++#define R_ARM_THM_SWI8                14
++#define R_ARM_XPC25           15
++#define R_ARM_THM_XPC22               16
++#define R_ARM_TLS_DTPMOD32    17      /* ID of module containing symbol */
++#define R_ARM_TLS_DTPOFF32    18      /* Offset in TLS block */
++#define R_ARM_TLS_TPOFF32     19      /* Offset in static TLS block */
++#define R_ARM_COPY            20      /* Copy symbol at runtime */
++#define R_ARM_GLOB_DAT                21      /* Create GOT entry */
++#define R_ARM_JUMP_SLOT               22      /* Create PLT entry */
++#define R_ARM_RELATIVE                23      /* Adjust by program base */
++#define R_ARM_GOTOFF          24      /* 32 bit offset to GOT */
++#define R_ARM_GOTPC           25      /* 32 bit PC relative offset to GOT */
++#define R_ARM_GOT32           26      /* 32 bit GOT entry */
++#define R_ARM_PLT32           27      /* 32 bit PLT address */
++#define R_ARM_ALU_PCREL_7_0   32
++#define R_ARM_ALU_PCREL_15_8  33
++#define R_ARM_ALU_PCREL_23_15 34
++#define R_ARM_LDR_SBREL_11_0  35
++#define R_ARM_ALU_SBREL_19_12 36
++#define R_ARM_ALU_SBREL_27_20 37
++#define R_ARM_TLS_GOTDESC     90
++#define R_ARM_TLS_CALL                91
++#define R_ARM_TLS_DESCSEQ     92
++#define R_ARM_THM_TLS_CALL    93
++#define R_ARM_GNU_VTENTRY     100
++#define R_ARM_GNU_VTINHERIT   101
++#define R_ARM_THM_PC11                102     /* thumb unconditional branch */
++#define R_ARM_THM_PC9         103     /* thumb conditional branch */
++#define R_ARM_TLS_GD32                104     /* PC-rel 32 bit for global dynamic
++                                         thread local data */
++#define R_ARM_TLS_LDM32               105     /* PC-rel 32 bit for local dynamic
++                                         thread local data */
++#define R_ARM_TLS_LDO32               106     /* 32 bit offset relative to TLS
++                                         block */
++#define R_ARM_TLS_IE32                107     /* PC-rel 32 bit for GOT entry of
++                                         static TLS block offset */
++#define R_ARM_TLS_LE32                108     /* 32 bit offset relative to static
++                                         TLS block */
++#define       R_ARM_THM_TLS_DESCSEQ   129
++#define R_ARM_IRELATIVE               160
++#define R_ARM_RXPC25          249
++#define R_ARM_RSBREL32                250
++#define R_ARM_THM_RPC22               251
++#define R_ARM_RREL32          252
++#define R_ARM_RABS22          253
++#define R_ARM_RPC24           254
++#define R_ARM_RBASE           255
++/* Keep this the last entry.  */
++#define R_ARM_NUM             256
++
++/* IA-64 specific declarations.  */
++
++/* Processor specific flags for the Ehdr e_flags field.  */
++#define EF_IA_64_MASKOS               0x0000000f      /* os-specific flags */
++#define EF_IA_64_ABI64                0x00000010      /* 64-bit ABI */
++#define EF_IA_64_ARCH         0xff000000      /* arch. version mask */
++
++/* Processor specific values for the Phdr p_type field.  */
++#define PT_IA_64_ARCHEXT      (PT_LOPROC + 0) /* arch extension bits */
++#define PT_IA_64_UNWIND               (PT_LOPROC + 1) /* ia64 unwind bits */
++#define PT_IA_64_HP_OPT_ANOT  (PT_LOOS + 0x12)
++#define PT_IA_64_HP_HSL_ANOT  (PT_LOOS + 0x13)
++#define PT_IA_64_HP_STACK     (PT_LOOS + 0x14)
++
++/* Processor specific flags for the Phdr p_flags field.  */
++#define PF_IA_64_NORECOV      0x80000000      /* spec insns w/o recovery */
++
++/* Processor specific values for the Shdr sh_type field.  */
++#define SHT_IA_64_EXT         (SHT_LOPROC + 0) /* extension bits */
++#define SHT_IA_64_UNWIND      (SHT_LOPROC + 1) /* unwind bits */
++
++/* Processor specific flags for the Shdr sh_flags field.  */
++#define SHF_IA_64_SHORT               0x10000000      /* section near gp */
++#define SHF_IA_64_NORECOV     0x20000000      /* spec insns w/o recovery */
++
++/* Processor specific values for the Dyn d_tag field.  */
++#define DT_IA_64_PLT_RESERVE  (DT_LOPROC + 0)
++#define DT_IA_64_NUM          1
++
++/* IA-64 relocations.  */
++#define R_IA64_NONE           0x00    /* none */
++#define R_IA64_IMM14          0x21    /* symbol + addend, add imm14 */
++#define R_IA64_IMM22          0x22    /* symbol + addend, add imm22 */
++#define R_IA64_IMM64          0x23    /* symbol + addend, mov imm64 */
++#define R_IA64_DIR32MSB               0x24    /* symbol + addend, data4 MSB */
++#define R_IA64_DIR32LSB               0x25    /* symbol + addend, data4 LSB */
++#define R_IA64_DIR64MSB               0x26    /* symbol + addend, data8 MSB */
++#define R_IA64_DIR64LSB               0x27    /* symbol + addend, data8 LSB */
++#define R_IA64_GPREL22                0x2a    /* @gprel(sym + add), add imm22 */
++#define R_IA64_GPREL64I               0x2b    /* @gprel(sym + add), mov imm64 */
++#define R_IA64_GPREL32MSB     0x2c    /* @gprel(sym + add), data4 MSB */
++#define R_IA64_GPREL32LSB     0x2d    /* @gprel(sym + add), data4 LSB */
++#define R_IA64_GPREL64MSB     0x2e    /* @gprel(sym + add), data8 MSB */
++#define R_IA64_GPREL64LSB     0x2f    /* @gprel(sym + add), data8 LSB */
++#define R_IA64_LTOFF22                0x32    /* @ltoff(sym + add), add imm22 */
++#define R_IA64_LTOFF64I               0x33    /* @ltoff(sym + add), mov imm64 */
++#define R_IA64_PLTOFF22               0x3a    /* @pltoff(sym + add), add imm22 */
++#define R_IA64_PLTOFF64I      0x3b    /* @pltoff(sym + add), mov imm64 */
++#define R_IA64_PLTOFF64MSB    0x3e    /* @pltoff(sym + add), data8 MSB */
++#define R_IA64_PLTOFF64LSB    0x3f    /* @pltoff(sym + add), data8 LSB */
++#define R_IA64_FPTR64I                0x43    /* @fptr(sym + add), mov imm64 */
++#define R_IA64_FPTR32MSB      0x44    /* @fptr(sym + add), data4 MSB */
++#define R_IA64_FPTR32LSB      0x45    /* @fptr(sym + add), data4 LSB */
++#define R_IA64_FPTR64MSB      0x46    /* @fptr(sym + add), data8 MSB */
++#define R_IA64_FPTR64LSB      0x47    /* @fptr(sym + add), data8 LSB */
++#define R_IA64_PCREL60B               0x48    /* @pcrel(sym + add), brl */
++#define R_IA64_PCREL21B               0x49    /* @pcrel(sym + add), ptb, call */
++#define R_IA64_PCREL21M               0x4a    /* @pcrel(sym + add), chk.s */
++#define R_IA64_PCREL21F               0x4b    /* @pcrel(sym + add), fchkf */
++#define R_IA64_PCREL32MSB     0x4c    /* @pcrel(sym + add), data4 MSB */
++#define R_IA64_PCREL32LSB     0x4d    /* @pcrel(sym + add), data4 LSB */
++#define R_IA64_PCREL64MSB     0x4e    /* @pcrel(sym + add), data8 MSB */
++#define R_IA64_PCREL64LSB     0x4f    /* @pcrel(sym + add), data8 LSB */
++#define R_IA64_LTOFF_FPTR22   0x52    /* @ltoff(@fptr(s+a)), imm22 */
++#define R_IA64_LTOFF_FPTR64I  0x53    /* @ltoff(@fptr(s+a)), imm64 */
++#define R_IA64_LTOFF_FPTR32MSB        0x54    /* @ltoff(@fptr(s+a)), data4 MSB */
++#define R_IA64_LTOFF_FPTR32LSB        0x55    /* @ltoff(@fptr(s+a)), data4 LSB */
++#define R_IA64_LTOFF_FPTR64MSB        0x56    /* @ltoff(@fptr(s+a)), data8 MSB */
++#define R_IA64_LTOFF_FPTR64LSB        0x57    /* @ltoff(@fptr(s+a)), data8 LSB */
++#define R_IA64_SEGREL32MSB    0x5c    /* @segrel(sym + add), data4 MSB */
++#define R_IA64_SEGREL32LSB    0x5d    /* @segrel(sym + add), data4 LSB */
++#define R_IA64_SEGREL64MSB    0x5e    /* @segrel(sym + add), data8 MSB */
++#define R_IA64_SEGREL64LSB    0x5f    /* @segrel(sym + add), data8 LSB */
++#define R_IA64_SECREL32MSB    0x64    /* @secrel(sym + add), data4 MSB */
++#define R_IA64_SECREL32LSB    0x65    /* @secrel(sym + add), data4 LSB */
++#define R_IA64_SECREL64MSB    0x66    /* @secrel(sym + add), data8 MSB */
++#define R_IA64_SECREL64LSB    0x67    /* @secrel(sym + add), data8 LSB */
++#define R_IA64_REL32MSB               0x6c    /* data 4 + REL */
++#define R_IA64_REL32LSB               0x6d    /* data 4 + REL */
++#define R_IA64_REL64MSB               0x6e    /* data 8 + REL */
++#define R_IA64_REL64LSB               0x6f    /* data 8 + REL */
++#define R_IA64_LTV32MSB               0x74    /* symbol + addend, data4 MSB */
++#define R_IA64_LTV32LSB               0x75    /* symbol + addend, data4 LSB */
++#define R_IA64_LTV64MSB               0x76    /* symbol + addend, data8 MSB */
++#define R_IA64_LTV64LSB               0x77    /* symbol + addend, data8 LSB */
++#define R_IA64_PCREL21BI      0x79    /* @pcrel(sym + add), 21bit inst */
++#define R_IA64_PCREL22                0x7a    /* @pcrel(sym + add), 22bit inst */
++#define R_IA64_PCREL64I               0x7b    /* @pcrel(sym + add), 64bit inst */
++#define R_IA64_IPLTMSB                0x80    /* dynamic reloc, imported PLT, MSB */
++#define R_IA64_IPLTLSB                0x81    /* dynamic reloc, imported PLT, LSB */
++#define R_IA64_COPY           0x84    /* copy relocation */
++#define R_IA64_SUB            0x85    /* Addend and symbol difference */
++#define R_IA64_LTOFF22X               0x86    /* LTOFF22, relaxable.  */
++#define R_IA64_LDXMOV         0x87    /* Use of LTOFF22X.  */
++#define R_IA64_TPREL14                0x91    /* @tprel(sym + add), imm14 */
++#define R_IA64_TPREL22                0x92    /* @tprel(sym + add), imm22 */
++#define R_IA64_TPREL64I               0x93    /* @tprel(sym + add), imm64 */
++#define R_IA64_TPREL64MSB     0x96    /* @tprel(sym + add), data8 MSB */
++#define R_IA64_TPREL64LSB     0x97    /* @tprel(sym + add), data8 LSB */
++#define R_IA64_LTOFF_TPREL22  0x9a    /* @ltoff(@tprel(s+a)), imm2 */
++#define R_IA64_DTPMOD64MSB    0xa6    /* @dtpmod(sym + add), data8 MSB */
++#define R_IA64_DTPMOD64LSB    0xa7    /* @dtpmod(sym + add), data8 LSB */
++#define R_IA64_LTOFF_DTPMOD22 0xaa    /* @ltoff(@dtpmod(sym + add)), imm22 */
++#define R_IA64_DTPREL14               0xb1    /* @dtprel(sym + add), imm14 */
++#define R_IA64_DTPREL22               0xb2    /* @dtprel(sym + add), imm22 */
++#define R_IA64_DTPREL64I      0xb3    /* @dtprel(sym + add), imm64 */
++#define R_IA64_DTPREL32MSB    0xb4    /* @dtprel(sym + add), data4 MSB */
++#define R_IA64_DTPREL32LSB    0xb5    /* @dtprel(sym + add), data4 LSB */
++#define R_IA64_DTPREL64MSB    0xb6    /* @dtprel(sym + add), data8 MSB */
++#define R_IA64_DTPREL64LSB    0xb7    /* @dtprel(sym + add), data8 LSB */
++#define R_IA64_LTOFF_DTPREL22 0xba    /* @ltoff(@dtprel(s+a)), imm22 */
++
++/* SH specific declarations */
++
++/* Processor specific flags for the ELF header e_flags field.  */
++#define EF_SH_MACH_MASK               0x1f
++#define EF_SH_UNKNOWN         0x0
++#define EF_SH1                        0x1
++#define EF_SH2                        0x2
++#define EF_SH3                        0x3
++#define EF_SH_DSP             0x4
++#define EF_SH3_DSP            0x5
++#define EF_SH4AL_DSP          0x6
++#define EF_SH3E                       0x8
++#define EF_SH4                        0x9
++#define EF_SH2E                       0xb
++#define EF_SH4A                       0xc
++#define EF_SH2A                       0xd
++#define EF_SH4_NOFPU          0x10
++#define EF_SH4A_NOFPU         0x11
++#define EF_SH4_NOMMU_NOFPU    0x12
++#define EF_SH2A_NOFPU         0x13
++#define EF_SH3_NOMMU          0x14
++#define EF_SH2A_SH4_NOFPU     0x15
++#define EF_SH2A_SH3_NOFPU     0x16
++#define EF_SH2A_SH4           0x17
++#define EF_SH2A_SH3E          0x18
++
++/* SH relocs.  */
++#define       R_SH_NONE               0
++#define       R_SH_DIR32              1
++#define       R_SH_REL32              2
++#define       R_SH_DIR8WPN            3
++#define       R_SH_IND12W             4
++#define       R_SH_DIR8WPL            5
++#define       R_SH_DIR8WPZ            6
++#define       R_SH_DIR8BP             7
++#define       R_SH_DIR8W              8
++#define       R_SH_DIR8L              9
++#define       R_SH_SWITCH16           25
++#define       R_SH_SWITCH32           26
++#define       R_SH_USES               27
++#define       R_SH_COUNT              28
++#define       R_SH_ALIGN              29
++#define       R_SH_CODE               30
++#define       R_SH_DATA               31
++#define       R_SH_LABEL              32
++#define       R_SH_SWITCH8            33
++#define       R_SH_GNU_VTINHERIT      34
++#define       R_SH_GNU_VTENTRY        35
++#define       R_SH_TLS_GD_32          144
++#define       R_SH_TLS_LD_32          145
++#define       R_SH_TLS_LDO_32         146
++#define       R_SH_TLS_IE_32          147
++#define       R_SH_TLS_LE_32          148
++#define       R_SH_TLS_DTPMOD32       149
++#define       R_SH_TLS_DTPOFF32       150
++#define       R_SH_TLS_TPOFF32        151
++#define       R_SH_GOT32              160
++#define       R_SH_PLT32              161
++#define       R_SH_COPY               162
++#define       R_SH_GLOB_DAT           163
++#define       R_SH_JMP_SLOT           164
++#define       R_SH_RELATIVE           165
++#define       R_SH_GOTOFF             166
++#define       R_SH_GOTPC              167
++/* Keep this the last entry.  */
++#define       R_SH_NUM                256
++
++/* S/390 specific definitions.  */
++
++/* Valid values for the e_flags field.  */
++
++#define EF_S390_HIGH_GPRS    0x00000001  /* High GPRs kernel facility needed.  */
++
++/* Additional s390 relocs */
++
++#define R_390_NONE            0       /* No reloc.  */
++#define R_390_8                       1       /* Direct 8 bit.  */
++#define R_390_12              2       /* Direct 12 bit.  */
++#define R_390_16              3       /* Direct 16 bit.  */
++#define R_390_32              4       /* Direct 32 bit.  */
++#define R_390_PC32            5       /* PC relative 32 bit.  */
++#define R_390_GOT12           6       /* 12 bit GOT offset.  */
++#define R_390_GOT32           7       /* 32 bit GOT offset.  */
++#define R_390_PLT32           8       /* 32 bit PC relative PLT address.  */
++#define R_390_COPY            9       /* Copy symbol at runtime.  */
++#define R_390_GLOB_DAT                10      /* Create GOT entry.  */
++#define R_390_JMP_SLOT                11      /* Create PLT entry.  */
++#define R_390_RELATIVE                12      /* Adjust by program base.  */
++#define R_390_GOTOFF32                13      /* 32 bit offset to GOT.         */
++#define R_390_GOTPC           14      /* 32 bit PC relative offset to GOT.  */
++#define R_390_GOT16           15      /* 16 bit GOT offset.  */
++#define R_390_PC16            16      /* PC relative 16 bit.  */
++#define R_390_PC16DBL         17      /* PC relative 16 bit shifted by 1.  */
++#define R_390_PLT16DBL                18      /* 16 bit PC rel. PLT shifted by 1.  */
++#define R_390_PC32DBL         19      /* PC relative 32 bit shifted by 1.  */
++#define R_390_PLT32DBL                20      /* 32 bit PC rel. PLT shifted by 1.  */
++#define R_390_GOTPCDBL                21      /* 32 bit PC rel. GOT shifted by 1.  */
++#define R_390_64              22      /* Direct 64 bit.  */
++#define R_390_PC64            23      /* PC relative 64 bit.  */
++#define R_390_GOT64           24      /* 64 bit GOT offset.  */
++#define R_390_PLT64           25      /* 64 bit PC relative PLT address.  */
++#define R_390_GOTENT          26      /* 32 bit PC rel. to GOT entry >> 1. */
++#define R_390_GOTOFF16                27      /* 16 bit offset to GOT. */
++#define R_390_GOTOFF64                28      /* 64 bit offset to GOT. */
++#define R_390_GOTPLT12                29      /* 12 bit offset to jump slot.  */
++#define R_390_GOTPLT16                30      /* 16 bit offset to jump slot.  */
++#define R_390_GOTPLT32                31      /* 32 bit offset to jump slot.  */
++#define R_390_GOTPLT64                32      /* 64 bit offset to jump slot.  */
++#define R_390_GOTPLTENT               33      /* 32 bit rel. offset to jump slot.  */
++#define R_390_PLTOFF16                34      /* 16 bit offset from GOT to PLT. */
++#define R_390_PLTOFF32                35      /* 32 bit offset from GOT to PLT. */
++#define R_390_PLTOFF64                36      /* 16 bit offset from GOT to PLT. */
++#define R_390_TLS_LOAD                37      /* Tag for load insn in TLS code.  */
++#define R_390_TLS_GDCALL      38      /* Tag for function call in general
++                                         dynamic TLS code. */
++#define R_390_TLS_LDCALL      39      /* Tag for function call in local
++                                         dynamic TLS code. */
++#define R_390_TLS_GD32                40      /* Direct 32 bit for general dynamic
++                                         thread local data.  */
++#define R_390_TLS_GD64                41      /* Direct 64 bit for general dynamic
++                                        thread local data.  */
++#define R_390_TLS_GOTIE12     42      /* 12 bit GOT offset for static TLS
++                                         block offset.  */
++#define R_390_TLS_GOTIE32     43      /* 32 bit GOT offset for static TLS
++                                         block offset.  */
++#define R_390_TLS_GOTIE64     44      /* 64 bit GOT offset for static TLS
++                                         block offset. */
++#define R_390_TLS_LDM32               45      /* Direct 32 bit for local dynamic
++                                         thread local data in LE code.  */
++#define R_390_TLS_LDM64               46      /* Direct 64 bit for local dynamic
++                                         thread local data in LE code.  */
++#define R_390_TLS_IE32                47      /* 32 bit address of GOT entry for
++                                         negated static TLS block offset.  */
++#define R_390_TLS_IE64                48      /* 64 bit address of GOT entry for
++                                         negated static TLS block offset.  */
++#define R_390_TLS_IEENT               49      /* 32 bit rel. offset to GOT entry for
++                                         negated static TLS block offset.  */
++#define R_390_TLS_LE32                50      /* 32 bit negated offset relative to
++                                         static TLS block.  */
++#define R_390_TLS_LE64                51      /* 64 bit negated offset relative to
++                                         static TLS block.  */
++#define R_390_TLS_LDO32               52      /* 32 bit offset relative to TLS
++                                         block.  */
++#define R_390_TLS_LDO64               53      /* 64 bit offset relative to TLS
++                                         block.  */
++#define R_390_TLS_DTPMOD      54      /* ID of module containing symbol.  */
++#define R_390_TLS_DTPOFF      55      /* Offset in TLS block.  */
++#define R_390_TLS_TPOFF               56      /* Negated offset in static TLS
++                                         block.  */
++#define R_390_20              57      /* Direct 20 bit.  */
++#define R_390_GOT20           58      /* 20 bit GOT offset.  */
++#define R_390_GOTPLT20                59      /* 20 bit offset to jump slot.  */
++#define R_390_TLS_GOTIE20     60      /* 20 bit GOT offset for static TLS
++                                         block offset.  */
++#define R_390_IRELATIVE         61      /* STT_GNU_IFUNC relocation.  */
++/* Keep this the last entry.  */
++#define R_390_NUM             62
++
++
++/* CRIS relocations.  */
++#define R_CRIS_NONE           0
++#define R_CRIS_8              1
++#define R_CRIS_16             2
++#define R_CRIS_32             3
++#define R_CRIS_8_PCREL                4
++#define R_CRIS_16_PCREL               5
++#define R_CRIS_32_PCREL               6
++#define R_CRIS_GNU_VTINHERIT  7
++#define R_CRIS_GNU_VTENTRY    8
++#define R_CRIS_COPY           9
++#define R_CRIS_GLOB_DAT               10
++#define R_CRIS_JUMP_SLOT      11
++#define R_CRIS_RELATIVE               12
++#define R_CRIS_16_GOT         13
++#define R_CRIS_32_GOT         14
++#define R_CRIS_16_GOTPLT      15
++#define R_CRIS_32_GOTPLT      16
++#define R_CRIS_32_GOTREL      17
++#define R_CRIS_32_PLT_GOTREL  18
++#define R_CRIS_32_PLT_PCREL   19
++
++#define R_CRIS_NUM            20
++
++
++/* AMD x86-64 relocations.  */
++#define R_X86_64_NONE         0       /* No reloc */
++#define R_X86_64_64           1       /* Direct 64 bit  */
++#define R_X86_64_PC32         2       /* PC relative 32 bit signed */
++#define R_X86_64_GOT32                3       /* 32 bit GOT entry */
++#define R_X86_64_PLT32                4       /* 32 bit PLT address */
++#define R_X86_64_COPY         5       /* Copy symbol at runtime */
++#define R_X86_64_GLOB_DAT     6       /* Create GOT entry */
++#define R_X86_64_JUMP_SLOT    7       /* Create PLT entry */
++#define R_X86_64_RELATIVE     8       /* Adjust by program base */
++#define R_X86_64_GOTPCREL     9       /* 32 bit signed PC relative
++                                         offset to GOT */
++#define R_X86_64_32           10      /* Direct 32 bit zero extended */
++#define R_X86_64_32S          11      /* Direct 32 bit sign extended */
++#define R_X86_64_16           12      /* Direct 16 bit zero extended */
++#define R_X86_64_PC16         13      /* 16 bit sign extended pc relative */
++#define R_X86_64_8            14      /* Direct 8 bit sign extended  */
++#define R_X86_64_PC8          15      /* 8 bit sign extended pc relative */
++#define R_X86_64_DTPMOD64     16      /* ID of module containing symbol */
++#define R_X86_64_DTPOFF64     17      /* Offset in module's TLS block */
++#define R_X86_64_TPOFF64      18      /* Offset in initial TLS block */
++#define R_X86_64_TLSGD                19      /* 32 bit signed PC relative offset
++                                         to two GOT entries for GD symbol */
++#define R_X86_64_TLSLD                20      /* 32 bit signed PC relative offset
++                                         to two GOT entries for LD symbol */
++#define R_X86_64_DTPOFF32     21      /* Offset in TLS block */
++#define R_X86_64_GOTTPOFF     22      /* 32 bit signed PC relative offset
++                                         to GOT entry for IE symbol */
++#define R_X86_64_TPOFF32      23      /* Offset in initial TLS block */
++#define R_X86_64_PC64         24      /* PC relative 64 bit */
++#define R_X86_64_GOTOFF64     25      /* 64 bit offset to GOT */
++#define R_X86_64_GOTPC32      26      /* 32 bit signed pc relative
++                                         offset to GOT */
++#define R_X86_64_GOT64                27      /* 64-bit GOT entry offset */
++#define R_X86_64_GOTPCREL64   28      /* 64-bit PC relative offset
++                                         to GOT entry */
++#define R_X86_64_GOTPC64      29      /* 64-bit PC relative offset to GOT */
++#define R_X86_64_GOTPLT64     30      /* like GOT64, says PLT entry needed */
++#define R_X86_64_PLTOFF64     31      /* 64-bit GOT relative offset
++                                         to PLT entry */
++#define R_X86_64_SIZE32               32      /* Size of symbol plus 32-bit addend */
++#define R_X86_64_SIZE64               33      /* Size of symbol plus 64-bit addend */
++#define R_X86_64_GOTPC32_TLSDESC 34   /* GOT offset for TLS descriptor.  */
++#define R_X86_64_TLSDESC_CALL   35    /* Marker for call through TLS
++                                         descriptor.  */
++#define R_X86_64_TLSDESC        36    /* TLS descriptor.  */
++#define R_X86_64_IRELATIVE    37      /* Adjust indirectly by program base */
++#define R_X86_64_RELATIVE64   38      /* 64-bit adjust by program base */
++
++#define R_X86_64_NUM          39
++
++
++/* AM33 relocations.  */
++#define R_MN10300_NONE                0       /* No reloc.  */
++#define R_MN10300_32          1       /* Direct 32 bit.  */
++#define R_MN10300_16          2       /* Direct 16 bit.  */
++#define R_MN10300_8           3       /* Direct 8 bit.  */
++#define R_MN10300_PCREL32     4       /* PC-relative 32-bit.  */
++#define R_MN10300_PCREL16     5       /* PC-relative 16-bit signed.  */
++#define R_MN10300_PCREL8      6       /* PC-relative 8-bit signed.  */
++#define R_MN10300_GNU_VTINHERIT       7       /* Ancient C++ vtable garbage... */
++#define R_MN10300_GNU_VTENTRY 8       /* ... collection annotation.  */
++#define R_MN10300_24          9       /* Direct 24 bit.  */
++#define R_MN10300_GOTPC32     10      /* 32-bit PCrel offset to GOT.  */
++#define R_MN10300_GOTPC16     11      /* 16-bit PCrel offset to GOT.  */
++#define R_MN10300_GOTOFF32    12      /* 32-bit offset from GOT.  */
++#define R_MN10300_GOTOFF24    13      /* 24-bit offset from GOT.  */
++#define R_MN10300_GOTOFF16    14      /* 16-bit offset from GOT.  */
++#define R_MN10300_PLT32               15      /* 32-bit PCrel to PLT entry.  */
++#define R_MN10300_PLT16               16      /* 16-bit PCrel to PLT entry.  */
++#define R_MN10300_GOT32               17      /* 32-bit offset to GOT entry.  */
++#define R_MN10300_GOT24               18      /* 24-bit offset to GOT entry.  */
++#define R_MN10300_GOT16               19      /* 16-bit offset to GOT entry.  */
++#define R_MN10300_COPY                20      /* Copy symbol at runtime.  */
++#define R_MN10300_GLOB_DAT    21      /* Create GOT entry.  */
++#define R_MN10300_JMP_SLOT    22      /* Create PLT entry.  */
++#define R_MN10300_RELATIVE    23      /* Adjust by program base.  */
++
++#define R_MN10300_NUM         24
++
++
++/* M32R relocs.  */
++#define R_M32R_NONE           0       /* No reloc. */
++#define R_M32R_16             1       /* Direct 16 bit. */
++#define R_M32R_32             2       /* Direct 32 bit. */
++#define R_M32R_24             3       /* Direct 24 bit. */
++#define R_M32R_10_PCREL               4       /* PC relative 10 bit shifted. */
++#define R_M32R_18_PCREL               5       /* PC relative 18 bit shifted. */
++#define R_M32R_26_PCREL               6       /* PC relative 26 bit shifted. */
++#define R_M32R_HI16_ULO               7       /* High 16 bit with unsigned low. */
++#define R_M32R_HI16_SLO               8       /* High 16 bit with signed low. */
++#define R_M32R_LO16           9       /* Low 16 bit. */
++#define R_M32R_SDA16          10      /* 16 bit offset in SDA. */
++#define R_M32R_GNU_VTINHERIT  11
++#define R_M32R_GNU_VTENTRY    12
++/* M32R relocs use SHT_RELA.  */
++#define R_M32R_16_RELA                33      /* Direct 16 bit. */
++#define R_M32R_32_RELA                34      /* Direct 32 bit. */
++#define R_M32R_24_RELA                35      /* Direct 24 bit. */
++#define R_M32R_10_PCREL_RELA  36      /* PC relative 10 bit shifted. */
++#define R_M32R_18_PCREL_RELA  37      /* PC relative 18 bit shifted. */
++#define R_M32R_26_PCREL_RELA  38      /* PC relative 26 bit shifted. */
++#define R_M32R_HI16_ULO_RELA  39      /* High 16 bit with unsigned low */
++#define R_M32R_HI16_SLO_RELA  40      /* High 16 bit with signed low */
++#define R_M32R_LO16_RELA      41      /* Low 16 bit */
++#define R_M32R_SDA16_RELA     42      /* 16 bit offset in SDA */
++#define R_M32R_RELA_GNU_VTINHERIT     43
++#define R_M32R_RELA_GNU_VTENTRY       44
++#define R_M32R_REL32          45      /* PC relative 32 bit.  */
++
++#define R_M32R_GOT24          48      /* 24 bit GOT entry */
++#define R_M32R_26_PLTREL      49      /* 26 bit PC relative to PLT shifted */
++#define R_M32R_COPY           50      /* Copy symbol at runtime */
++#define R_M32R_GLOB_DAT               51      /* Create GOT entry */
++#define R_M32R_JMP_SLOT               52      /* Create PLT entry */
++#define R_M32R_RELATIVE               53      /* Adjust by program base */
++#define R_M32R_GOTOFF         54      /* 24 bit offset to GOT */
++#define R_M32R_GOTPC24                55      /* 24 bit PC relative offset to GOT */
++#define R_M32R_GOT16_HI_ULO   56      /* High 16 bit GOT entry with unsigned
++                                         low */
++#define R_M32R_GOT16_HI_SLO   57      /* High 16 bit GOT entry with signed
++                                         low */
++#define R_M32R_GOT16_LO               58      /* Low 16 bit GOT entry */
++#define R_M32R_GOTPC_HI_ULO   59      /* High 16 bit PC relative offset to
++                                         GOT with unsigned low */
++#define R_M32R_GOTPC_HI_SLO   60      /* High 16 bit PC relative offset to
++                                         GOT with signed low */
++#define R_M32R_GOTPC_LO               61      /* Low 16 bit PC relative offset to
++                                         GOT */
++#define R_M32R_GOTOFF_HI_ULO  62      /* High 16 bit offset to GOT
++                                         with unsigned low */
++#define R_M32R_GOTOFF_HI_SLO  63      /* High 16 bit offset to GOT
++                                         with signed low */
++#define R_M32R_GOTOFF_LO      64      /* Low 16 bit offset to GOT */
++#define R_M32R_NUM            256     /* Keep this the last entry. */
++
++
++/* TILEPro relocations.  */
++#define R_TILEPRO_NONE                0       /* No reloc */
++#define R_TILEPRO_32          1       /* Direct 32 bit */
++#define R_TILEPRO_16          2       /* Direct 16 bit */
++#define R_TILEPRO_8           3       /* Direct 8 bit */
++#define R_TILEPRO_32_PCREL    4       /* PC relative 32 bit */
++#define R_TILEPRO_16_PCREL    5       /* PC relative 16 bit */
++#define R_TILEPRO_8_PCREL     6       /* PC relative 8 bit */
++#define R_TILEPRO_LO16                7       /* Low 16 bit */
++#define R_TILEPRO_HI16                8       /* High 16 bit */
++#define R_TILEPRO_HA16                9       /* High 16 bit, adjusted */
++#define R_TILEPRO_COPY                10      /* Copy relocation */
++#define R_TILEPRO_GLOB_DAT    11      /* Create GOT entry */
++#define R_TILEPRO_JMP_SLOT    12      /* Create PLT entry */
++#define R_TILEPRO_RELATIVE    13      /* Adjust by program base */
++#define R_TILEPRO_BROFF_X1    14      /* X1 pipe branch offset */
++#define R_TILEPRO_JOFFLONG_X1 15      /* X1 pipe jump offset */
++#define R_TILEPRO_JOFFLONG_X1_PLT 16  /* X1 pipe jump offset to PLT */
++#define R_TILEPRO_IMM8_X0     17      /* X0 pipe 8-bit */
++#define R_TILEPRO_IMM8_Y0     18      /* Y0 pipe 8-bit */
++#define R_TILEPRO_IMM8_X1     19      /* X1 pipe 8-bit */
++#define R_TILEPRO_IMM8_Y1     20      /* Y1 pipe 8-bit */
++#define R_TILEPRO_MT_IMM15_X1 21      /* X1 pipe mtspr */
++#define R_TILEPRO_MF_IMM15_X1 22      /* X1 pipe mfspr */
++#define R_TILEPRO_IMM16_X0    23      /* X0 pipe 16-bit */
++#define R_TILEPRO_IMM16_X1    24      /* X1 pipe 16-bit */
++#define R_TILEPRO_IMM16_X0_LO 25      /* X0 pipe low 16-bit */
++#define R_TILEPRO_IMM16_X1_LO 26      /* X1 pipe low 16-bit */
++#define R_TILEPRO_IMM16_X0_HI 27      /* X0 pipe high 16-bit */
++#define R_TILEPRO_IMM16_X1_HI 28      /* X1 pipe high 16-bit */
++#define R_TILEPRO_IMM16_X0_HA 29      /* X0 pipe high 16-bit, adjusted */
++#define R_TILEPRO_IMM16_X1_HA 30      /* X1 pipe high 16-bit, adjusted */
++#define R_TILEPRO_IMM16_X0_PCREL 31   /* X0 pipe PC relative 16 bit */
++#define R_TILEPRO_IMM16_X1_PCREL 32   /* X1 pipe PC relative 16 bit */
++#define R_TILEPRO_IMM16_X0_LO_PCREL 33        /* X0 pipe PC relative low 16 bit */
++#define R_TILEPRO_IMM16_X1_LO_PCREL 34        /* X1 pipe PC relative low 16 bit */
++#define R_TILEPRO_IMM16_X0_HI_PCREL 35        /* X0 pipe PC relative high 16 bit */
++#define R_TILEPRO_IMM16_X1_HI_PCREL 36        /* X1 pipe PC relative high 16 bit */
++#define R_TILEPRO_IMM16_X0_HA_PCREL 37        /* X0 pipe PC relative ha() 16 bit */
++#define R_TILEPRO_IMM16_X1_HA_PCREL 38        /* X1 pipe PC relative ha() 16 bit */
++#define R_TILEPRO_IMM16_X0_GOT        39      /* X0 pipe 16-bit GOT offset */
++#define R_TILEPRO_IMM16_X1_GOT        40      /* X1 pipe 16-bit GOT offset */
++#define R_TILEPRO_IMM16_X0_GOT_LO 41  /* X0 pipe low 16-bit GOT offset */
++#define R_TILEPRO_IMM16_X1_GOT_LO 42  /* X1 pipe low 16-bit GOT offset */
++#define R_TILEPRO_IMM16_X0_GOT_HI 43  /* X0 pipe high 16-bit GOT offset */
++#define R_TILEPRO_IMM16_X1_GOT_HI 44  /* X1 pipe high 16-bit GOT offset */
++#define R_TILEPRO_IMM16_X0_GOT_HA 45  /* X0 pipe ha() 16-bit GOT offset */
++#define R_TILEPRO_IMM16_X1_GOT_HA 46  /* X1 pipe ha() 16-bit GOT offset */
++#define R_TILEPRO_MMSTART_X0  47      /* X0 pipe mm "start" */
++#define R_TILEPRO_MMEND_X0    48      /* X0 pipe mm "end" */
++#define R_TILEPRO_MMSTART_X1  49      /* X1 pipe mm "start" */
++#define R_TILEPRO_MMEND_X1    50      /* X1 pipe mm "end" */
++#define R_TILEPRO_SHAMT_X0    51      /* X0 pipe shift amount */
++#define R_TILEPRO_SHAMT_X1    52      /* X1 pipe shift amount */
++#define R_TILEPRO_SHAMT_Y0    53      /* Y0 pipe shift amount */
++#define R_TILEPRO_SHAMT_Y1    54      /* Y1 pipe shift amount */
++#define R_TILEPRO_DEST_IMM8_X1        55      /* X1 pipe destination 8-bit */
++/* Relocs 56-59 are currently not defined.  */
++#define R_TILEPRO_TLS_GD_CALL 60      /* "jal" for TLS GD */
++#define R_TILEPRO_IMM8_X0_TLS_GD_ADD 61       /* X0 pipe "addi" for TLS GD */
++#define R_TILEPRO_IMM8_X1_TLS_GD_ADD 62       /* X1 pipe "addi" for TLS GD */
++#define R_TILEPRO_IMM8_Y0_TLS_GD_ADD 63       /* Y0 pipe "addi" for TLS GD */
++#define R_TILEPRO_IMM8_Y1_TLS_GD_ADD 64       /* Y1 pipe "addi" for TLS GD */
++#define R_TILEPRO_TLS_IE_LOAD 65      /* "lw_tls" for TLS IE */
++#define R_TILEPRO_IMM16_X0_TLS_GD 66  /* X0 pipe 16-bit TLS GD offset */
++#define R_TILEPRO_IMM16_X1_TLS_GD 67  /* X1 pipe 16-bit TLS GD offset */
++#define R_TILEPRO_IMM16_X0_TLS_GD_LO 68       /* X0 pipe low 16-bit TLS GD offset */
++#define R_TILEPRO_IMM16_X1_TLS_GD_LO 69       /* X1 pipe low 16-bit TLS GD offset */
++#define R_TILEPRO_IMM16_X0_TLS_GD_HI 70       /* X0 pipe high 16-bit TLS GD offset */
++#define R_TILEPRO_IMM16_X1_TLS_GD_HI 71       /* X1 pipe high 16-bit TLS GD offset */
++#define R_TILEPRO_IMM16_X0_TLS_GD_HA 72       /* X0 pipe ha() 16-bit TLS GD offset */
++#define R_TILEPRO_IMM16_X1_TLS_GD_HA 73       /* X1 pipe ha() 16-bit TLS GD offset */
++#define R_TILEPRO_IMM16_X0_TLS_IE 74  /* X0 pipe 16-bit TLS IE offset */
++#define R_TILEPRO_IMM16_X1_TLS_IE 75  /* X1 pipe 16-bit TLS IE offset */
++#define R_TILEPRO_IMM16_X0_TLS_IE_LO 76       /* X0 pipe low 16-bit TLS IE offset */
++#define R_TILEPRO_IMM16_X1_TLS_IE_LO 77       /* X1 pipe low 16-bit TLS IE offset */
++#define R_TILEPRO_IMM16_X0_TLS_IE_HI 78       /* X0 pipe high 16-bit TLS IE offset */
++#define R_TILEPRO_IMM16_X1_TLS_IE_HI 79       /* X1 pipe high 16-bit TLS IE offset */
++#define R_TILEPRO_IMM16_X0_TLS_IE_HA 80       /* X0 pipe ha() 16-bit TLS IE offset */
++#define R_TILEPRO_IMM16_X1_TLS_IE_HA 81       /* X1 pipe ha() 16-bit TLS IE offset */
++#define R_TILEPRO_TLS_DTPMOD32        82      /* ID of module containing symbol */
++#define R_TILEPRO_TLS_DTPOFF32        83      /* Offset in TLS block */
++#define R_TILEPRO_TLS_TPOFF32 84      /* Offset in static TLS block */
++#define R_TILEPRO_IMM16_X0_TLS_LE 85  /* X0 pipe 16-bit TLS LE offset */
++#define R_TILEPRO_IMM16_X1_TLS_LE 86  /* X1 pipe 16-bit TLS LE offset */
++#define R_TILEPRO_IMM16_X0_TLS_LE_LO 87       /* X0 pipe low 16-bit TLS LE offset */
++#define R_TILEPRO_IMM16_X1_TLS_LE_LO 88       /* X1 pipe low 16-bit TLS LE offset */
++#define R_TILEPRO_IMM16_X0_TLS_LE_HI 89       /* X0 pipe high 16-bit TLS LE offset */
++#define R_TILEPRO_IMM16_X1_TLS_LE_HI 90       /* X1 pipe high 16-bit TLS LE offset */
++#define R_TILEPRO_IMM16_X0_TLS_LE_HA 91       /* X0 pipe ha() 16-bit TLS LE offset */
++#define R_TILEPRO_IMM16_X1_TLS_LE_HA 92       /* X1 pipe ha() 16-bit TLS LE offset */
++
++#define R_TILEPRO_GNU_VTINHERIT       128     /* GNU C++ vtable hierarchy */
++#define R_TILEPRO_GNU_VTENTRY 129     /* GNU C++ vtable member usage */
++
++#define R_TILEPRO_NUM         130
++
++
++/* TILE-Gx relocations.  */
++#define R_TILEGX_NONE         0       /* No reloc */
++#define R_TILEGX_64           1       /* Direct 64 bit */
++#define R_TILEGX_32           2       /* Direct 32 bit */
++#define R_TILEGX_16           3       /* Direct 16 bit */
++#define R_TILEGX_8            4       /* Direct 8 bit */
++#define R_TILEGX_64_PCREL     5       /* PC relative 64 bit */
++#define R_TILEGX_32_PCREL     6       /* PC relative 32 bit */
++#define R_TILEGX_16_PCREL     7       /* PC relative 16 bit */
++#define R_TILEGX_8_PCREL      8       /* PC relative 8 bit */
++#define R_TILEGX_HW0          9       /* hword 0 16-bit */
++#define R_TILEGX_HW1          10      /* hword 1 16-bit */
++#define R_TILEGX_HW2          11      /* hword 2 16-bit */
++#define R_TILEGX_HW3          12      /* hword 3 16-bit */
++#define R_TILEGX_HW0_LAST     13      /* last hword 0 16-bit */
++#define R_TILEGX_HW1_LAST     14      /* last hword 1 16-bit */
++#define R_TILEGX_HW2_LAST     15      /* last hword 2 16-bit */
++#define R_TILEGX_COPY         16      /* Copy relocation */
++#define R_TILEGX_GLOB_DAT     17      /* Create GOT entry */
++#define R_TILEGX_JMP_SLOT     18      /* Create PLT entry */
++#define R_TILEGX_RELATIVE     19      /* Adjust by program base */
++#define R_TILEGX_BROFF_X1     20      /* X1 pipe branch offset */
++#define R_TILEGX_JUMPOFF_X1   21      /* X1 pipe jump offset */
++#define R_TILEGX_JUMPOFF_X1_PLT       22      /* X1 pipe jump offset to PLT */
++#define R_TILEGX_IMM8_X0      23      /* X0 pipe 8-bit */
++#define R_TILEGX_IMM8_Y0      24      /* Y0 pipe 8-bit */
++#define R_TILEGX_IMM8_X1      25      /* X1 pipe 8-bit */
++#define R_TILEGX_IMM8_Y1      26      /* Y1 pipe 8-bit */
++#define R_TILEGX_DEST_IMM8_X1 27      /* X1 pipe destination 8-bit */
++#define R_TILEGX_MT_IMM14_X1  28      /* X1 pipe mtspr */
++#define R_TILEGX_MF_IMM14_X1  29      /* X1 pipe mfspr */
++#define R_TILEGX_MMSTART_X0   30      /* X0 pipe mm "start" */
++#define R_TILEGX_MMEND_X0     31      /* X0 pipe mm "end" */
++#define R_TILEGX_SHAMT_X0     32      /* X0 pipe shift amount */
++#define R_TILEGX_SHAMT_X1     33      /* X1 pipe shift amount */
++#define R_TILEGX_SHAMT_Y0     34      /* Y0 pipe shift amount */
++#define R_TILEGX_SHAMT_Y1     35      /* Y1 pipe shift amount */
++#define R_TILEGX_IMM16_X0_HW0 36      /* X0 pipe hword 0 */
++#define R_TILEGX_IMM16_X1_HW0 37      /* X1 pipe hword 0 */
++#define R_TILEGX_IMM16_X0_HW1 38      /* X0 pipe hword 1 */
++#define R_TILEGX_IMM16_X1_HW1 39      /* X1 pipe hword 1 */
++#define R_TILEGX_IMM16_X0_HW2 40      /* X0 pipe hword 2 */
++#define R_TILEGX_IMM16_X1_HW2 41      /* X1 pipe hword 2 */
++#define R_TILEGX_IMM16_X0_HW3 42      /* X0 pipe hword 3 */
++#define R_TILEGX_IMM16_X1_HW3 43      /* X1 pipe hword 3 */
++#define R_TILEGX_IMM16_X0_HW0_LAST 44 /* X0 pipe last hword 0 */
++#define R_TILEGX_IMM16_X1_HW0_LAST 45 /* X1 pipe last hword 0 */
++#define R_TILEGX_IMM16_X0_HW1_LAST 46 /* X0 pipe last hword 1 */
++#define R_TILEGX_IMM16_X1_HW1_LAST 47 /* X1 pipe last hword 1 */
++#define R_TILEGX_IMM16_X0_HW2_LAST 48 /* X0 pipe last hword 2 */
++#define R_TILEGX_IMM16_X1_HW2_LAST 49 /* X1 pipe last hword 2 */
++#define R_TILEGX_IMM16_X0_HW0_PCREL 50        /* X0 pipe PC relative hword 0 */
++#define R_TILEGX_IMM16_X1_HW0_PCREL 51        /* X1 pipe PC relative hword 0 */
++#define R_TILEGX_IMM16_X0_HW1_PCREL 52        /* X0 pipe PC relative hword 1 */
++#define R_TILEGX_IMM16_X1_HW1_PCREL 53        /* X1 pipe PC relative hword 1 */
++#define R_TILEGX_IMM16_X0_HW2_PCREL 54        /* X0 pipe PC relative hword 2 */
++#define R_TILEGX_IMM16_X1_HW2_PCREL 55        /* X1 pipe PC relative hword 2 */
++#define R_TILEGX_IMM16_X0_HW3_PCREL 56        /* X0 pipe PC relative hword 3 */
++#define R_TILEGX_IMM16_X1_HW3_PCREL 57        /* X1 pipe PC relative hword 3 */
++#define R_TILEGX_IMM16_X0_HW0_LAST_PCREL 58 /* X0 pipe PC-rel last hword 0 */
++#define R_TILEGX_IMM16_X1_HW0_LAST_PCREL 59 /* X1 pipe PC-rel last hword 0 */
++#define R_TILEGX_IMM16_X0_HW1_LAST_PCREL 60 /* X0 pipe PC-rel last hword 1 */
++#define R_TILEGX_IMM16_X1_HW1_LAST_PCREL 61 /* X1 pipe PC-rel last hword 1 */
++#define R_TILEGX_IMM16_X0_HW2_LAST_PCREL 62 /* X0 pipe PC-rel last hword 2 */
++#define R_TILEGX_IMM16_X1_HW2_LAST_PCREL 63 /* X1 pipe PC-rel last hword 2 */
++#define R_TILEGX_IMM16_X0_HW0_GOT 64  /* X0 pipe hword 0 GOT offset */
++#define R_TILEGX_IMM16_X1_HW0_GOT 65  /* X1 pipe hword 0 GOT offset */
++/* Relocs 66-71 are currently not defined.  */
++#define R_TILEGX_IMM16_X0_HW0_LAST_GOT 72 /* X0 pipe last hword 0 GOT offset */
++#define R_TILEGX_IMM16_X1_HW0_LAST_GOT 73 /* X1 pipe last hword 0 GOT offset */
++#define R_TILEGX_IMM16_X0_HW1_LAST_GOT 74 /* X0 pipe last hword 1 GOT offset */
++#define R_TILEGX_IMM16_X1_HW1_LAST_GOT 75 /* X1 pipe last hword 1 GOT offset */
++/* Relocs 76-77 are currently not defined.  */
++#define R_TILEGX_IMM16_X0_HW0_TLS_GD 78       /* X0 pipe hword 0 TLS GD offset */
++#define R_TILEGX_IMM16_X1_HW0_TLS_GD 79       /* X1 pipe hword 0 TLS GD offset */
++#define R_TILEGX_IMM16_X0_HW0_TLS_LE 80       /* X0 pipe hword 0 TLS LE offset */
++#define R_TILEGX_IMM16_X1_HW0_TLS_LE 81       /* X1 pipe hword 0 TLS LE offset */
++#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE 82 /* X0 pipe last hword 0 LE off */
++#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE 83 /* X1 pipe last hword 0 LE off */
++#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE 84 /* X0 pipe last hword 1 LE off */
++#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE 85 /* X1 pipe last hword 1 LE off */
++#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD 86 /* X0 pipe last hword 0 GD off */
++#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD 87 /* X1 pipe last hword 0 GD off */
++#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD 88 /* X0 pipe last hword 1 GD off */
++#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD 89 /* X1 pipe last hword 1 GD off */
++/* Relocs 90-91 are currently not defined.  */
++#define R_TILEGX_IMM16_X0_HW0_TLS_IE 92       /* X0 pipe hword 0 TLS IE offset */
++#define R_TILEGX_IMM16_X1_HW0_TLS_IE 93       /* X1 pipe hword 0 TLS IE offset */
++/* Relocs 94-99 are currently not defined.  */
++#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE 100 /* X0 pipe last hword 0 IE off */
++#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE 101 /* X1 pipe last hword 0 IE off */
++#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE 102 /* X0 pipe last hword 1 IE off */
++#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE 103 /* X1 pipe last hword 1 IE off */
++/* Relocs 104-105 are currently not defined.  */
++#define R_TILEGX_TLS_DTPMOD64 106     /* 64-bit ID of symbol's module */
++#define R_TILEGX_TLS_DTPOFF64 107     /* 64-bit offset in TLS block */
++#define R_TILEGX_TLS_TPOFF64  108     /* 64-bit offset in static TLS block */
++#define R_TILEGX_TLS_DTPMOD32 109     /* 32-bit ID of symbol's module */
++#define R_TILEGX_TLS_DTPOFF32 110     /* 32-bit offset in TLS block */
++#define R_TILEGX_TLS_TPOFF32  111     /* 32-bit offset in static TLS block */
++#define R_TILEGX_TLS_GD_CALL  112     /* "jal" for TLS GD */
++#define R_TILEGX_IMM8_X0_TLS_GD_ADD 113       /* X0 pipe "addi" for TLS GD */
++#define R_TILEGX_IMM8_X1_TLS_GD_ADD 114       /* X1 pipe "addi" for TLS GD */
++#define R_TILEGX_IMM8_Y0_TLS_GD_ADD 115       /* Y0 pipe "addi" for TLS GD */
++#define R_TILEGX_IMM8_Y1_TLS_GD_ADD 116       /* Y1 pipe "addi" for TLS GD */
++#define R_TILEGX_TLS_IE_LOAD  117     /* "ld_tls" for TLS IE */
++#define R_TILEGX_IMM8_X0_TLS_ADD 118  /* X0 pipe "addi" for TLS GD/IE */
++#define R_TILEGX_IMM8_X1_TLS_ADD 119  /* X1 pipe "addi" for TLS GD/IE */
++#define R_TILEGX_IMM8_Y0_TLS_ADD 120  /* Y0 pipe "addi" for TLS GD/IE */
++#define R_TILEGX_IMM8_Y1_TLS_ADD 121  /* Y1 pipe "addi" for TLS GD/IE */
++
++#define R_TILEGX_GNU_VTINHERIT        128     /* GNU C++ vtable hierarchy */
++#define R_TILEGX_GNU_VTENTRY  129     /* GNU C++ vtable member usage */
++
++#define R_TILEGX_NUM          130
++
++#endif        /* elf.h */
+--- a/scripts/mod/mk_elfconfig.c
++++ b/scripts/mod/mk_elfconfig.c
+@@ -2,7 +2,11 @@
+ #include <stdio.h>
+ #include <stdlib.h>
+ #include <string.h>
++#ifndef __APPLE__
+ #include <elf.h>
++#else
++#include "elf.h"
++#endif
+ 
+ int
+ main(int argc, char **argv)
+--- a/scripts/mod/modpost.h
++++ b/scripts/mod/modpost.h
+@@ -8,7 +8,11 @@
+ #include <sys/mman.h>
+ #include <fcntl.h>
+ #include <unistd.h>
++#if !(defined(__APPLE__) || defined(__CYGWIN__))
+ #include <elf.h>
++#else
++#include "elf.h"
++#endif
+ 
+ #include "elfconfig.h"
+ 

diff --git a/target/linux/generic/hack-6.0/211-darwin-uuid-typedef-clash.patch b/target/linux/generic/hack-6.0/211-darwin-uuid-typedef-clash.patch
new file mode 100644 (file)
index 0000000..50a6227
--- /dev/null
+++ b/target/linux/generic/hack-6.0/211-darwin-uuid-typedef-clash.patch
@@ -0,0 +1,22 @@
+From e44fc2af1ddc452b6659d08c16973d65c73b7d0a Mon Sep 17 00:00:00 2001
+From: Kevin Darbyshire-Bryant <[email protected]>
+Date: Wed, 5 Feb 2020 18:36:43 +0000
+Subject: [PATCH] file2alias: build on macos
+
+Signed-off-by: Kevin Darbyshire-Bryant <[email protected]>
+---
+ scripts/mod/file2alias.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/scripts/mod/file2alias.c
++++ b/scripts/mod/file2alias.c
+@@ -38,6 +38,9 @@ typedef struct {
+       __u8 b[16];
+ } guid_t;
+ 
++#ifdef __APPLE__
++#define uuid_t compat_uuid_t
++#endif
+ /* backwards compatibility, don't use in new code */
+ typedef struct {
+       __u8 b[16];

diff --git a/target/linux/generic/hack-6.0/212-tools_portability.patch b/target/linux/generic/hack-6.0/212-tools_portability.patch
new file mode 100644 (file)
index 0000000..0b908f7
--- /dev/null
+++ b/target/linux/generic/hack-6.0/212-tools_portability.patch
@@ -0,0 +1,120 @@
+From 48232d3d931c95953ce2ddfe7da7bb164aef6a73 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Fri, 7 Jul 2017 17:03:16 +0200
+Subject: fix portability of some includes files in tools/ used on the host
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ tools/include/tools/be_byteshift.h |  4 ++++
+ tools/include/tools/le_byteshift.h |  4 ++++
+ tools/include/tools/linux_types.h  | 22 ++++++++++++++++++++++
+ 3 files changed, 30 insertions(+)
+ create mode 100644 tools/include/tools/linux_types.h
+
+--- a/tools/include/tools/be_byteshift.h
++++ b/tools/include/tools/be_byteshift.h
+@@ -2,6 +2,10 @@
+ #ifndef _TOOLS_BE_BYTESHIFT_H
+ #define _TOOLS_BE_BYTESHIFT_H
+ 
++#ifndef __linux__
++#include "linux_types.h"
++#endif
++
+ #include <stdint.h>
+ 
+ static inline uint16_t __get_unaligned_be16(const uint8_t *p)
+--- a/tools/include/tools/le_byteshift.h
++++ b/tools/include/tools/le_byteshift.h
+@@ -2,6 +2,10 @@
+ #ifndef _TOOLS_LE_BYTESHIFT_H
+ #define _TOOLS_LE_BYTESHIFT_H
+ 
++#ifndef __linux__
++#include "linux_types.h"
++#endif
++
+ #include <stdint.h>
+ 
+ static inline uint16_t __get_unaligned_le16(const uint8_t *p)
+--- /dev/null
++++ b/tools/include/tools/linux_types.h
+@@ -0,0 +1,26 @@
++#ifndef __LINUX_TYPES_H
++#define __LINUX_TYPES_H
++
++#include <stdint.h>
++
++typedef int8_t __s8;
++typedef uint8_t __u8;
++typedef uint8_t __be8;
++typedef uint8_t __le8;
++
++typedef int16_t __s16;
++typedef uint16_t __u16;
++typedef uint16_t __be16;
++typedef uint16_t __le16;
++
++typedef int32_t __s32;
++typedef uint32_t __u32;
++typedef uint32_t __be32;
++typedef uint32_t __le32;
++
++typedef int64_t __s64;
++typedef uint64_t __u64;
++typedef uint64_t __be64;
++typedef uint64_t __le64;
++
++#endif
+--- a/tools/include/linux/types.h
++++ b/tools/include/linux/types.h
+@@ -10,8 +10,12 @@
+ #define __SANE_USERSPACE_TYPES__      /* For PPC64, to get LL64 types */
+ #endif
+ 
++#ifndef __linux__
++#include <tools/linux_types.h>
++#else
+ #include <asm/types.h>
+ #include <asm/posix_types.h>
++#endif
+ 
+ struct page;
+ struct kmem_cache;
+--- a/tools/perf/pmu-events/jevents.py
++++ b/tools/perf/pmu-events/jevents.py
+@@ -684,6 +684,7 @@
+ #include "util/header.h"
+ #include "util/pmu.h"
+ #include <string.h>
++#include <strings.h>
+ #include <stddef.h>
+ 
+ struct compact_pmu_event {
+# --- a/tools/perf/pmu-events/jevents.c
+# +++ b/tools/perf/pmu-events/jevents.c
+# @@ -1,4 +1,6 @@
+# +#ifdef __linux__
+#  #define  _XOPEN_SOURCE 500  /* needed for nftw() */
+# +#endif
+#  #define  _GNU_SOURCE                /* needed for asprintf() */
+ 
+#  /* Parse event JSON files */
+# @@ -35,6 +37,7 @@
+#  #include <stdlib.h>
+#  #include <errno.h>
+#  #include <string.h>
+# +#include <strings.h>
+#  #include <ctype.h>
+#  #include <unistd.h>
+#  #include <stdarg.h>
+# --- a/tools/perf/pmu-events/json.c
+# +++ b/tools/perf/pmu-events/json.c
+# @@ -38,7 +38,6 @@
+#  #include <unistd.h>
+#  #include "jsmn.h"
+#  #include "json.h"
+# -#include <linux/kernel.h>
+ 
+ 
+#  static char *mapfile(const char *fn, size_t *size)

diff --git a/target/linux/generic/hack-6.0/214-spidev_h_portability.patch b/target/linux/generic/hack-6.0/214-spidev_h_portability.patch
new file mode 100644 (file)
index 0000000..db754a2
--- /dev/null
+++ b/target/linux/generic/hack-6.0/214-spidev_h_portability.patch
@@ -0,0 +1,24 @@
+From be9be95ff10e16a5b4ad36f903978d0cc5747024 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Fri, 7 Jul 2017 17:04:08 +0200
+Subject: kernel: fix linux/spi/spidev.h portability issues with musl
+
+Felix will try to get this define included into musl
+
+lede-commit: 795e7cf60de19e7a076a46874fab7bb88b43bbff
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/uapi/linux/spi/spidev.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/uapi/linux/spi/spidev.h
++++ b/include/uapi/linux/spi/spidev.h
+@@ -93,7 +93,7 @@ struct spi_ioc_transfer {
+ 
+ /* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */
+ #define SPI_MSGSIZE(N) \
+-      ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \
++      ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << 13)) \
+               ? ((N)*(sizeof (struct spi_ioc_transfer))) : 0)
+ #define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)])
+ 

diff --git a/target/linux/generic/hack-6.0/220-arm-gc_sections.patch b/target/linux/generic/hack-6.0/220-arm-gc_sections.patch
new file mode 100644 (file)
index 0000000..0aa3eb8
--- /dev/null
+++ b/target/linux/generic/hack-6.0/220-arm-gc_sections.patch
@@ -0,0 +1,123 @@
+From e3d8676f5722b7622685581e06e8f53e6138e3ab Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Sat, 15 Jul 2017 23:42:36 +0200
+Subject: use -ffunction-sections, -fdata-sections and --gc-sections
+
+In combination with kernel symbol export stripping this significantly reduces
+the kernel image size. Used on both ARM and MIPS architectures.
+
+Signed-off-by: Felix Fietkau <[email protected]>
+Signed-off-by: Jonas Gorski <[email protected]>
+Signed-off-by: Gabor Juhos <[email protected]>
+---
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -117,6 +117,7 @@ config ARM
+       select HAVE_UID16
+       select HAVE_VIRT_CPU_ACCOUNTING_GEN
+       select IRQ_FORCED_THREADING
++      select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
+       select MODULES_USE_ELF_REL
+       select NEED_DMA_MAP_STATE
+       select OF_EARLY_FLATTREE if OF
+--- a/arch/arm/boot/compressed/Makefile
++++ b/arch/arm/boot/compressed/Makefile
+@@ -92,6 +92,7 @@ endif
+ ifeq ($(CONFIG_USE_OF),y)
+ OBJS  += $(libfdt_objs) fdt_check_mem_start.o
+ endif
++KBUILD_CFLAGS_KERNEL := $(patsubst -f%-sections,,$(KBUILD_CFLAGS_KERNEL))
+ 
+ # -fstack-protector-strong triggers protection checks in this code,
+ # but it is being used too early to link to meaningful stack_chk logic.
+--- a/arch/arm/kernel/vmlinux.lds.S
++++ b/arch/arm/kernel/vmlinux.lds.S
+@@ -75,7 +75,7 @@ SECTIONS
+       . = ALIGN(4);
+       __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
+               __start___ex_table = .;
+-              ARM_MMU_KEEP(*(__ex_table))
++              KEEP(*(__ex_table))
+               __stop___ex_table = .;
+       }
+ 
+@@ -100,24 +100,24 @@ SECTIONS
+       }
+       .init.arch.info : {
+               __arch_info_begin = .;
+-              *(.arch.info.init)
++              KEEP(*(.arch.info.init))
+               __arch_info_end = .;
+       }
+       .init.tagtable : {
+               __tagtable_begin = .;
+-              *(.taglist.init)
++              KEEP(*(.taglist.init))
+               __tagtable_end = .;
+       }
+ #ifdef CONFIG_SMP_ON_UP
+       .init.smpalt : {
+               __smpalt_begin = .;
+-              *(.alt.smp.init)
++              KEEP(*(.alt.smp.init))
+               __smpalt_end = .;
+       }
+ #endif
+       .init.pv_table : {
+               __pv_table_begin = .;
+-              *(.pv_table)
++              KEEP(*(.pv_table))
+               __pv_table_end = .;
+       }
+ 
+--- a/arch/arm/include/asm/vmlinux.lds.h
++++ b/arch/arm/include/asm/vmlinux.lds.h
+@@ -42,13 +42,13 @@
+ #define PROC_INFO                                                     \
+               . = ALIGN(4);                                           \
+               __proc_info_begin = .;                                  \
+-              *(.proc.info.init)                                      \
++              KEEP(*(.proc.info.init))                                \
+               __proc_info_end = .;
+ 
+ #define IDMAP_TEXT                                                    \
+               ALIGN_FUNCTION();                                       \
+               __idmap_text_start = .;                                 \
+-              *(.idmap.text)                                          \
++              KEEP(*(.idmap.text))                                    \
+               __idmap_text_end = .;                                   \
+ 
+ #define ARM_DISCARD                                                   \
+@@ -109,12 +109,12 @@
+       . = ALIGN(8);                                                   \
+       .ARM.unwind_idx : {                                             \
+               __start_unwind_idx = .;                                 \
+-              *(.ARM.exidx*)                                          \
++              KEEP(*(.ARM.exidx*))                                    \
+               __stop_unwind_idx = .;                                  \
+       }                                                               \
+       .ARM.unwind_tab : {                                             \
+               __start_unwind_tab = .;                                 \
+-              *(.ARM.extab*)                                          \
++              KEEP(*(.ARM.extab*))                                    \
+               __stop_unwind_tab = .;                                  \
+       }
+ 
+@@ -126,7 +126,7 @@
+       __vectors_lma = .;                                              \
+       OVERLAY 0xffff0000 : NOCROSSREFS AT(__vectors_lma) {            \
+               .vectors {                                              \
+-                      *(.vectors)                                     \
++                      KEEP(*(.vectors))                               \
+               }                                                       \
+               .vectors.bhb.loop8 {                                    \
+                       *(.vectors.bhb.loop8)                           \
+@@ -144,7 +144,7 @@
+                                                                       \
+       __stubs_lma = .;                                                \
+       .stubs ADDR(.vectors) + 0x1000 : AT(__stubs_lma) {              \
+-              *(.stubs)                                               \
++              KEEP(*(.stubs))                                         \
+       }                                                               \
+       ARM_LMA(__stubs, .stubs);                                       \
+       . = __stubs_lma + SIZEOF(.stubs);                               \

diff --git a/target/linux/generic/hack-6.0/221-module_exports.patch b/target/linux/generic/hack-6.0/221-module_exports.patch
new file mode 100644 (file)
index 0000000..37af11e
--- /dev/null
+++ b/target/linux/generic/hack-6.0/221-module_exports.patch
@@ -0,0 +1,126 @@
+From b14784e7883390c20ed3ff904892255404a5914b Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Fri, 7 Jul 2017 17:05:53 +0200
+Subject: add an optional config option for stripping all unnecessary symbol exports from the kernel image
+
+lede-commit: bb5a40c64b7c4f4848509fa0a6625055fc9e66cc
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/asm-generic/vmlinux.lds.h | 18 +++++++++++++++---
+ include/linux/export.h            |  9 ++++++++-
+ scripts/Makefile.build            |  2 +-
+ 3 files changed, 24 insertions(+), 5 deletions(-)
+
+--- a/include/asm-generic/vmlinux.lds.h
++++ b/include/asm-generic/vmlinux.lds.h
+@@ -81,6 +81,16 @@
+ #define RO_EXCEPTION_TABLE
+ #endif
+ 
++#ifndef SYMTAB_KEEP
++#define SYMTAB_KEEP KEEP(*(SORT(___ksymtab+*)))
++#define SYMTAB_KEEP_GPL KEEP(*(SORT(___ksymtab_gpl+*)))
++#endif
++
++#ifndef SYMTAB_DISCARD
++#define SYMTAB_DISCARD
++#define SYMTAB_DISCARD_GPL
++#endif
++
+ /* Align . to a 8 byte boundary equals to maximum function alignment. */
+ #define ALIGN_FUNCTION()  . = ALIGN(8)
+ 
+@@ -484,14 +494,14 @@
+       /* Kernel symbol table: Normal symbols */                       \
+       __ksymtab         : AT(ADDR(__ksymtab) - LOAD_OFFSET) {         \
+               __start___ksymtab = .;                                  \
+-              KEEP(*(SORT(___ksymtab+*)))                             \
++              SYMTAB_KEEP                                             \
+               __stop___ksymtab = .;                                   \
+       }                                                               \
+                                                                       \
+       /* Kernel symbol table: GPL-only symbols */                     \
+       __ksymtab_gpl     : AT(ADDR(__ksymtab_gpl) - LOAD_OFFSET) {     \
+               __start___ksymtab_gpl = .;                              \
+-              KEEP(*(SORT(___ksymtab_gpl+*)))                         \
++              SYMTAB_KEEP_GPL                                         \
+               __stop___ksymtab_gpl = .;                               \
+       }                                                               \
+                                                                       \
+@@ -511,7 +521,7 @@
+                                                                       \
+       /* Kernel symbol table: strings */                              \
+         __ksymtab_strings : AT(ADDR(__ksymtab_strings) - LOAD_OFFSET) {       \
+-              *(__ksymtab_strings)                                    \
++              *(__ksymtab_strings+*)                                  \
+       }                                                               \
+                                                                       \
+       /* __*init sections */                                          \
+@@ -1018,6 +1028,8 @@
+ 
+ #define COMMON_DISCARDS                                                       \
+       SANITIZER_DISCARDS                                              \
++      SYMTAB_DISCARD                                                  \
++      SYMTAB_DISCARD_GPL                                              \
+       *(.discard)                                                     \
+       *(.discard.*)                                                   \
+       *(.modinfo)                                                     \
+--- a/include/linux/export.h
++++ b/include/linux/export.h
+@@ -84,6 +84,12 @@ struct kernel_symbol {
+ 
+ #else
+ 
++#ifdef MODULE
++#define __EXPORT_SUFFIX(sym)
++#else
++#define __EXPORT_SUFFIX(sym) "+" #sym
++#endif
++
+ /*
+  * For every exported symbol, do the following:
+  *
+@@ -101,7 +107,7 @@ struct kernel_symbol {
+       extern typeof(sym) sym;                                                 \
+       extern const char __kstrtab_##sym[];                                    \
+       extern const char __kstrtabns_##sym[];                                  \
+-      asm("   .section \"__ksymtab_strings\",\"aMS\",%progbits,1      \n"     \
++      asm("   .section \"__ksymtab_strings" __EXPORT_SUFFIX(sym) "\",\"aMS\",%progbits,1      \n"     \
+           "__kstrtab_" #sym ":                                        \n"     \
+           "   .asciz  \"" #sym "\"                                    \n"     \
+           "__kstrtabns_" #sym ":                                      \n"     \
+--- a/include/asm-generic/export.h
++++ b/include/asm-generic/export.h
+@@ -26,6 +26,12 @@
+ #endif
+ .endm
+ 
++#ifdef MODULE
++#define __EXPORT_SUFFIX(name)
++#else
++#define __EXPORT_SUFFIX(name) + #name
++#endif
++
+ /*
+  * note on .section use: we specify progbits since usage of the "M" (SHF_MERGE)
+  * section flag requires it. Use '%progbits' instead of '@progbits' since the
+@@ -39,7 +45,7 @@
+ __ksymtab_\name:
+       __put \val, __kstrtab_\name
+       .previous
+-      .section __ksymtab_strings,"aMS",%progbits,1
++      .section __ksymtab_strings __EXPORT_SUFFIX(name),"aMS",%progbits,1
+ __kstrtab_\name:
+       .asciz "\name"
+       .previous
+--- a/scripts/Makefile.build
++++ b/scripts/Makefile.build
+@@ -397,7 +397,7 @@ targets += $(real-dtb-y) $(lib-y) $(alwa
+ # Linker scripts preprocessor (.lds.S -> .lds)
+ # ---------------------------------------------------------------------------
+ quiet_cmd_cpp_lds_S = LDS     $@
+-      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \
++      cmd_cpp_lds_S = $(CPP) $(EXTRA_LDSFLAGS) $(cpp_flags) -P -U$(ARCH) \
+                            -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
+ 
+ $(obj)/%.lds: $(src)/%.lds.S FORCE

diff --git a/target/linux/generic/hack-6.0/230-openwrt_lzma_options.patch b/target/linux/generic/hack-6.0/230-openwrt_lzma_options.patch
new file mode 100644 (file)
index 0000000..a288784
--- /dev/null
+++ b/target/linux/generic/hack-6.0/230-openwrt_lzma_options.patch
@@ -0,0 +1,38 @@
+From b3d00b452467f621317953d9e4c6f9ae8dcfd271 Mon Sep 17 00:00:00 2001
+From: Imre Kaloz <[email protected]>
+Date: Fri, 7 Jul 2017 17:06:55 +0200
+Subject: use the openwrt lzma options for now
+
+lede-commit: 548de949f392049420a6a1feeef118b30ab8ea8c
+Signed-off-by: Imre Kaloz <[email protected]>
+---
+ lib/decompress.c              |  1 +
+ scripts/Makefile.lib          |  2 +-
+ usr/gen_initramfs_list.sh | 10 +++++-----
+ 3 files changed, 7 insertions(+), 6 deletions(-)
+
+--- a/lib/decompress.c
++++ b/lib/decompress.c
+@@ -53,6 +53,7 @@ static const struct compress_format comp
+       { {0x1f, 0x9e}, "gzip", gunzip },
+       { {0x42, 0x5a}, "bzip2", bunzip2 },
+       { {0x5d, 0x00}, "lzma", unlzma },
++      { {0x6d, 0x00}, "lzma-openwrt", unlzma },
+       { {0xfd, 0x37}, "xz", unxz },
+       { {0x89, 0x4c}, "lzo", unlzo },
+       { {0x02, 0x21}, "lz4", unlz4 },
+--- a/scripts/Makefile.lib
++++ b/scripts/Makefile.lib
+@@ -402,10 +402,10 @@ quiet_cmd_bzip2 = BZIP2   $@
+ # ---------------------------------------------------------------------------
+ 
+ quiet_cmd_lzma = LZMA    $@
+-      cmd_lzma = cat $(real-prereqs) | $(LZMA) -9 > $@
++      cmd_lzma = cat $(real-prereqs) | $(LZMA) e -d20 -lc1 -lp2 -pb2 -eos -si -so > $@
+ 
+ quiet_cmd_lzma_with_size = LZMA    $@
+-      cmd_lzma_with_size = { cat $(real-prereqs) | $(LZMA) -9; $(size_append); } > $@
++      cmd_lzma_with_size = { cat $(real-prereqs) | $(LZMA) e -d20 -lc1 -lp2 -pb2 -eos -si -so; $(size_append); } > $@
+ 
+ quiet_cmd_lzo = LZO     $@
+       cmd_lzo = { cat $(real-prereqs) | $(KLZOP) -9; $(size_append); } > $@

diff --git a/target/linux/generic/hack-6.0/250-netfilter_depends.patch b/target/linux/generic/hack-6.0/250-netfilter_depends.patch
new file mode 100644 (file)
index 0000000..495c73f
--- /dev/null
+++ b/target/linux/generic/hack-6.0/250-netfilter_depends.patch
@@ -0,0 +1,27 @@
+From: Felix Fietkau <[email protected]>
+Subject: hack: net: remove bogus netfilter dependencies
+
+lede-commit: 589d2a377dee27d206fc3725325309cf649e4df6
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ net/netfilter/Kconfig | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/net/netfilter/Kconfig
++++ b/net/netfilter/Kconfig
+@@ -243,7 +243,6 @@ config NF_CONNTRACK_FTP
+ 
+ config NF_CONNTRACK_H323
+       tristate "H.323 protocol support"
+-      depends on IPV6 || IPV6=n
+       depends on NETFILTER_ADVANCED
+       help
+         H.323 is a VoIP signalling protocol from ITU-T. As one of the most
+@@ -1106,7 +1105,6 @@ config NETFILTER_XT_TARGET_SECMARK
+ 
+ config NETFILTER_XT_TARGET_TCPMSS
+       tristate '"TCPMSS" target support'
+-      depends on IPV6 || IPV6=n
+       default m if NETFILTER_ADVANCED=n
+       help
+         This option adds a `TCPMSS' target, which allows you to alter the

diff --git a/target/linux/generic/hack-6.0/251-kconfig.patch b/target/linux/generic/hack-6.0/251-kconfig.patch
new file mode 100644 (file)
index 0000000..5a8a820
--- /dev/null
+++ b/target/linux/generic/hack-6.0/251-kconfig.patch
@@ -0,0 +1,199 @@
+From da3c50704f14132f4adf80d48e9a4cd5d46e54c9 Mon Sep 17 00:00:00 2001
+From: John Crispin <[email protected]>
+Date: Fri, 7 Jul 2017 17:09:21 +0200
+Subject: kconfig: owrt specifc dependencies
+
+Signed-off-by: John Crispin <[email protected]>
+---
+ crypto/Kconfig        | 10 +++++-----
+ drivers/bcma/Kconfig  |  1 +
+ drivers/ssb/Kconfig   |  3 ++-
+ lib/Kconfig           |  8 ++++----
+ net/netfilter/Kconfig |  2 +-
+ net/wireless/Kconfig  | 17 ++++++++++-------
+ sound/core/Kconfig    |  4 ++--
+ 7 files changed, 25 insertions(+), 20 deletions(-)
+
+--- a/crypto/Kconfig
++++ b/crypto/Kconfig
+@@ -34,7 +34,7 @@ config CRYPTO_FIPS
+         this is.
+ 
+ config CRYPTO_ALGAPI
+-      tristate
++      tristate "ALGAPI"
+       select CRYPTO_ALGAPI2
+       help
+         This option provides the API for cryptographic algorithms.
+@@ -43,7 +43,7 @@ config CRYPTO_ALGAPI2
+       tristate
+ 
+ config CRYPTO_AEAD
+-      tristate
++      tristate "AEAD"
+       select CRYPTO_AEAD2
+       select CRYPTO_ALGAPI
+ 
+@@ -54,7 +54,7 @@ config CRYPTO_AEAD2
+       select CRYPTO_RNG2
+ 
+ config CRYPTO_SKCIPHER
+-      tristate
++      tristate "SKCIPHER"
+       select CRYPTO_SKCIPHER2
+       select CRYPTO_ALGAPI
+ 
+@@ -64,7 +64,7 @@ config CRYPTO_SKCIPHER2
+       select CRYPTO_RNG2
+ 
+ config CRYPTO_HASH
+-      tristate
++      tristate "HASH"
+       select CRYPTO_HASH2
+       select CRYPTO_ALGAPI
+ 
+@@ -73,7 +73,7 @@ config CRYPTO_HASH2
+       select CRYPTO_ALGAPI2
+ 
+ config CRYPTO_RNG
+-      tristate
++      tristate "RNG"
+       select CRYPTO_RNG2
+       select CRYPTO_ALGAPI
+ 
+--- a/drivers/bcma/Kconfig
++++ b/drivers/bcma/Kconfig
+@@ -16,6 +16,7 @@ if BCMA
+ # Support for Block-I/O. SELECT this from the driver that needs it.
+ config BCMA_BLOCKIO
+       bool
++      default y
+ 
+ config BCMA_HOST_PCI_POSSIBLE
+       bool
+--- a/drivers/ssb/Kconfig
++++ b/drivers/ssb/Kconfig
+@@ -29,6 +29,7 @@ config SSB_SPROM
+ config SSB_BLOCKIO
+       bool
+       depends on SSB
++      default y
+ 
+ config SSB_PCIHOST_POSSIBLE
+       bool
+@@ -49,7 +50,7 @@ config SSB_PCIHOST
+ config SSB_B43_PCI_BRIDGE
+       bool
+       depends on SSB_PCIHOST
+-      default n
++      default y
+ 
+ config SSB_PCMCIAHOST_POSSIBLE
+       bool
+--- a/lib/Kconfig
++++ b/lib/Kconfig
+@@ -443,16 +443,16 @@ config BCH_CONST_T
+ # Textsearch support is select'ed if needed
+ #
+ config TEXTSEARCH
+-      bool
++      bool "Textsearch support"
+ 
+ config TEXTSEARCH_KMP
+-      tristate
++      tristate "Textsearch KMP"
+ 
+ config TEXTSEARCH_BM
+-      tristate
++      tristate "Textsearch BM"
+ 
+ config TEXTSEARCH_FSM
+-      tristate
++      tristate "Textsearch FSM"
+ 
+ config BTREE
+       bool
+--- a/net/netfilter/Kconfig
++++ b/net/netfilter/Kconfig
+@@ -11,7 +11,7 @@ config NETFILTER_INGRESS
+         infrastructure.
+ 
+ config NETFILTER_NETLINK
+-      tristate
++      tristate "Netfilter NFNETLINK interface"
+ 
+ config NETFILTER_FAMILY_BRIDGE
+       bool
+--- a/net/wireless/Kconfig
++++ b/net/wireless/Kconfig
+@@ -1,6 +1,6 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+ config WIRELESS_EXT
+-      bool
++      bool "Wireless extensions"
+ 
+ config WEXT_CORE
+       def_bool y
+@@ -12,10 +12,10 @@ config WEXT_PROC
+       depends on WEXT_CORE
+ 
+ config WEXT_SPY
+-      bool
++      bool "WEXT_SPY"
+ 
+ config WEXT_PRIV
+-      bool
++      bool "WEXT_PRIV"
+ 
+ config CFG80211
+       tristate "cfg80211 - wireless configuration API"
+@@ -204,7 +204,7 @@ config CFG80211_WEXT_EXPORT
+ endif # CFG80211
+ 
+ config LIB80211
+-      tristate
++      tristate "LIB80211"
+       default n
+       help
+         This options enables a library of common routines used
+@@ -213,17 +213,17 @@ config LIB80211
+         Drivers should select this themselves if needed.
+ 
+ config LIB80211_CRYPT_WEP
+-      tristate
++      tristate "LIB80211_CRYPT_WEP"
+       select CRYPTO_LIB_ARC4
+ 
+ config LIB80211_CRYPT_CCMP
+-      tristate
++      tristate "LIB80211_CRYPT_CCMP"
+       select CRYPTO
+       select CRYPTO_AES
+       select CRYPTO_CCM
+ 
+ config LIB80211_CRYPT_TKIP
+-      tristate
++      tristate "LIB80211_CRYPT_TKIP"
+       select CRYPTO_LIB_ARC4
+ 
+ config LIB80211_DEBUG
+--- a/sound/core/Kconfig
++++ b/sound/core/Kconfig
+@@ -17,7 +17,7 @@ config SND_DMAENGINE_PCM
+       tristate
+ 
+ config SND_HWDEP
+-      tristate
++      tristate "Sound hardware support"
+ 
+ config SND_SEQ_DEVICE
+       tristate
+@@ -27,7 +27,7 @@ config SND_RAWMIDI
+       select SND_SEQ_DEVICE if SND_SEQUENCER != n
+ 
+ config SND_COMPRESS_OFFLOAD
+-      tristate
++      tristate "Compression offloading support"
+ 
+ config SND_JACK
+       bool

diff --git a/target/linux/generic/hack-6.0/252-SATA_PMP.patch b/target/linux/generic/hack-6.0/252-SATA_PMP.patch
new file mode 100644 (file)
index 0000000..6502d1d
--- /dev/null
+++ b/target/linux/generic/hack-6.0/252-SATA_PMP.patch
@@ -0,0 +1,23 @@
+From 8c817e33be829c7249c2cfd59ff48ad5fac6a31d Mon Sep 17 00:00:00 2001
+From: Sungbo Eo <[email protected]>
+Date: Fri, 7 Jul 2017 17:09:21 +0200
+Subject: [PATCH] kconfig: solidify SATA_PMP config
+
+SATA_PMP option in kernel config file disappears for every kernel_oldconfig refresh.
+To prevent this, SATA_HOST is now selected automatically when SATA_PMP is enabled.
+This patch can be dropped if SATA_MV is ever re-added into the config.
+---
+ drivers/ata/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/ata/Kconfig
++++ b/drivers/ata/Kconfig
+@@ -112,7 +112,7 @@ config SATA_ZPODD
+ 
+ config SATA_PMP
+       bool "SATA Port Multiplier support"
+-      depends on SATA_HOST
++      select SATA_HOST
+       default y
+       help
+         This option adds support for SATA Port Multipliers

diff --git a/target/linux/generic/hack-6.0/253-ksmbd-config.patch b/target/linux/generic/hack-6.0/253-ksmbd-config.patch
new file mode 100644 (file)
index 0000000..a29cf3b
--- /dev/null
+++ b/target/linux/generic/hack-6.0/253-ksmbd-config.patch
@@ -0,0 +1,32 @@
+From dcd966fa7ca63f38cf7147e1184d13d66e2ca340 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 13:33:30 +0200
+Subject: [PATCH] Kconfig: add tristate for OID and ASNI string
+
+---
+ init/Kconfig | 2 +-
+ lib/Kconfig  | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/init/Kconfig
++++ b/init/Kconfig
+@@ -2384,7 +2384,7 @@ config PADATA
+       bool
+ 
+ config ASN1
+-      tristate
++      tristate "ASN1"
+       help
+         Build a simple ASN.1 grammar compiler that produces a bytecode output
+         that can be interpreted by the ASN.1 stream decoder and used to
+--- a/lib/Kconfig
++++ b/lib/Kconfig
+@@ -614,7 +614,7 @@ config LIBFDT
+       bool
+ 
+ config OID_REGISTRY
+-      tristate
++      tristate "OID"
+       help
+         Enable fast lookup object identifier registry.
+ 

diff --git a/target/linux/generic/hack-6.0/259-regmap_dynamic.patch b/target/linux/generic/hack-6.0/259-regmap_dynamic.patch
new file mode 100644 (file)
index 0000000..8cf6c03
--- /dev/null
+++ b/target/linux/generic/hack-6.0/259-regmap_dynamic.patch
@@ -0,0 +1,144 @@
+From 811d9e2268a62b830cfe93cd8bc929afcb8b198b Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Sat, 15 Jul 2017 21:12:38 +0200
+Subject: kernel: move regmap bloat out of the kernel image if it is only being used in modules
+
+lede-commit: 96f39119815028073583e4fca3a9c5fe9141e998
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ drivers/base/regmap/Kconfig  | 15 ++++++++++-----
+ drivers/base/regmap/Makefile | 12 ++++++++----
+ drivers/base/regmap/regmap.c |  3 +++
+ include/linux/regmap.h       |  2 +-
+ 4 files changed, 22 insertions(+), 10 deletions(-)
+
+--- a/drivers/base/regmap/Kconfig
++++ b/drivers/base/regmap/Kconfig
+@@ -4,10 +4,9 @@
+ # subsystems should select the appropriate symbols.
+ 
+ config REGMAP
+-      default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SOUNDWIRE || REGMAP_SOUNDWIRE_MBQ || REGMAP_SCCB || REGMAP_I3C || REGMAP_SPI_AVMM || REGMAP_MDIO)
+       select IRQ_DOMAIN if REGMAP_IRQ
+       select MDIO_BUS if REGMAP_MDIO
+-      bool
++      tristate
+ 
+ config REGCACHE_COMPRESSED
+       select LZO_COMPRESS
+@@ -15,53 +14,67 @@ config REGCACHE_COMPRESSED
+       bool
+ 
+ config REGMAP_AC97
++      select REGMAP
+       tristate
+ 
+ config REGMAP_I2C
++      select REGMAP
+       tristate
+       depends on I2C
+ 
+ config REGMAP_SLIMBUS
++      select REGMAP
+       tristate
+       depends on SLIMBUS
+ 
+ config REGMAP_SPI
++      select REGMAP
+       tristate
+       depends on SPI
+ 
+ config REGMAP_SPMI
++      select REGMAP
+       tristate
+       depends on SPMI
+ 
+ config REGMAP_W1
++      select REGMAP
+       tristate
+       depends on W1
+ 
+ config REGMAP_MDIO
++      select REGMAP
+       tristate
+ 
+ config REGMAP_MMIO
++      select REGMAP
+       tristate
+ 
+ config REGMAP_IRQ
++      select REGMAP
+       bool
+ 
+ config REGMAP_SOUNDWIRE
++      select REGMAP
+       tristate
+       depends on SOUNDWIRE
+ 
+ config REGMAP_SOUNDWIRE_MBQ
++      select REGMAP
+       tristate
+       depends on SOUNDWIRE
+ 
+ config REGMAP_SCCB
++      select REGMAP
+       tristate
+       depends on I2C
+ 
+ config REGMAP_I3C
++      select REGMAP
+       tristate
+       depends on I3C
+ 
+ config REGMAP_SPI_AVMM
++      select REGMAP
+       tristate
+       depends on SPI
+--- a/drivers/base/regmap/Makefile
++++ b/drivers/base/regmap/Makefile
+@@ -2,10 +2,14 @@
+ # For include/trace/define_trace.h to include trace.h
+ CFLAGS_regmap.o := -I$(src)
+ 
+-obj-$(CONFIG_REGMAP) += regmap.o regcache.o
+-obj-$(CONFIG_REGMAP) += regcache-rbtree.o regcache-flat.o
+-obj-$(CONFIG_REGCACHE_COMPRESSED) += regcache-lzo.o
+-obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o
++regmap-core-objs = regmap.o regcache.o regcache-rbtree.o regcache-flat.o
++ifdef CONFIG_DEBUG_FS
++regmap-core-objs += regmap-debugfs.o
++endif
++ifdef CONFIG_REGCACHE_COMPRESSED
++regmap-core-objs += regcache-lzo.o
++endif
++obj-$(CONFIG_REGMAP) += regmap-core.o
+ obj-$(CONFIG_REGMAP_AC97) += regmap-ac97.o
+ obj-$(CONFIG_REGMAP_I2C) += regmap-i2c.o
+ obj-$(CONFIG_REGMAP_SLIMBUS) += regmap-slimbus.o
+--- a/drivers/base/regmap/regmap.c
++++ b/drivers/base/regmap/regmap.c
+@@ -9,6 +9,7 @@
+ #include <linux/device.h>
+ #include <linux/slab.h>
+ #include <linux/export.h>
++#include <linux/module.h>
+ #include <linux/mutex.h>
+ #include <linux/err.h>
+ #include <linux/property.h>
+@@ -3348,3 +3349,5 @@ static int __init regmap_initcall(void)
+       return 0;
+ }
+ postcore_initcall(regmap_initcall);
++
++MODULE_LICENSE("GPL");
+--- a/include/linux/regmap.h
++++ b/include/linux/regmap.h
+@@ -180,7 +180,7 @@ struct reg_sequence {
+       __ret ?: __tmp; \
+ })
+ 
+-#ifdef CONFIG_REGMAP
++#if IS_REACHABLE(CONFIG_REGMAP)
+ 
+ enum regmap_endian {
+       /* Unspecified -> 0 -> Backwards compatible default */

diff --git a/target/linux/generic/hack-6.0/260-crypto_test_dependencies.patch b/target/linux/generic/hack-6.0/260-crypto_test_dependencies.patch
new file mode 100644 (file)
index 0000000..64daa82
--- /dev/null
+++ b/target/linux/generic/hack-6.0/260-crypto_test_dependencies.patch
@@ -0,0 +1,52 @@
+From fd1799b0bf5efa46dd3e6dfbbf3955564807e508 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Fri, 7 Jul 2017 17:12:51 +0200
+Subject: kernel: prevent cryptomgr from pulling in useless extra dependencies for tests that are not run
+
+Reduces kernel size after LZMA by about 5k on MIPS
+
+lede-commit: 044c316167e076479a344c59905e5b435b84a77f
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ crypto/Kconfig   | 13 ++++++-------
+ crypto/algboss.c |  4 ++++
+ 2 files changed, 10 insertions(+), 7 deletions(-)
+
+--- a/crypto/Kconfig
++++ b/crypto/Kconfig
+@@ -121,13 +121,13 @@ config CRYPTO_MANAGER
+         cbc(aes).
+ 
+ config CRYPTO_MANAGER2
+-      def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y)
+-      select CRYPTO_AEAD2
+-      select CRYPTO_HASH2
+-      select CRYPTO_SKCIPHER2
+-      select CRYPTO_AKCIPHER2
+-      select CRYPTO_KPP2
+-      select CRYPTO_ACOMP2
++      def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n && CRYPTO_ALGAPI=y && !CRYPTO_MANAGER_DISABLE_TESTS)
++      select CRYPTO_AEAD2 if !CRYPTO_MANAGER_DISABLE_TESTS
++      select CRYPTO_HASH2 if !CRYPTO_MANAGER_DISABLE_TESTS
++      select CRYPTO_SKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS
++      select CRYPTO_AKCIPHER2 if !CRYPTO_MANAGER_DISABLE_TESTS
++      select CRYPTO_KPP2 if !CRYPTO_MANAGER_DISABLE_TESTS
++      select CRYPTO_ACOMP2 if !CRYPTO_MANAGER_DISABLE_TESTS
+ 
+ config CRYPTO_USER
+       tristate "Userspace cryptographic algorithm configuration"
+--- a/crypto/algboss.c
++++ b/crypto/algboss.c
+@@ -211,8 +211,12 @@ static int cryptomgr_schedule_test(struc
+       type = alg->cra_flags;
+ 
+       /* Do not test internal algorithms. */
++#ifdef CONFIG_CRYPTO_MANAGER_DISABLE_TESTS
++      type |= CRYPTO_ALG_TESTED;
++#else
+       if (type & CRYPTO_ALG_INTERNAL)
+               type |= CRYPTO_ALG_TESTED;
++#endif
+ 
+       param->type = type;
+ 

diff --git a/target/linux/generic/hack-6.0/261-lib-arc4-unhide.patch b/target/linux/generic/hack-6.0/261-lib-arc4-unhide.patch
new file mode 100644 (file)
index 0000000..ee923c7
--- /dev/null
+++ b/target/linux/generic/hack-6.0/261-lib-arc4-unhide.patch
@@ -0,0 +1,24 @@
+From 241e5d3f7b0dd3c01f8c7fa83cbc9a3882286d53 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 13:35:18 +0200
+Subject: [PATCH] lib/crypto: add tristate string for ARC4
+
+This makes it possible to select CONFIG_CRYPTO_LIB_ARC4 directly. We 
+need this to be able to compile this into the kernel and make use of it 
+from backports.
+
+---
+ lib/crypto/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/lib/crypto/Kconfig
++++ b/lib/crypto/Kconfig
+@@ -6,7 +6,7 @@ config CRYPTO_LIB_AES
+       tristate
+ 
+ config CRYPTO_LIB_ARC4
+-      tristate
++      tristate "ARC4 cipher library"
+ 
+ config CRYPTO_ARCH_HAVE_LIB_BLAKE2S
+       bool

diff --git a/target/linux/generic/hack-6.0/280-rfkill-stubs.patch b/target/linux/generic/hack-6.0/280-rfkill-stubs.patch
new file mode 100644 (file)
index 0000000..7a650d1
--- /dev/null
+++ b/target/linux/generic/hack-6.0/280-rfkill-stubs.patch
@@ -0,0 +1,84 @@
+From 236c1acdfef5958010ac9814a9872e0a46fd78ee Mon Sep 17 00:00:00 2001
+From: John Crispin <[email protected]>
+Date: Fri, 7 Jul 2017 17:13:44 +0200
+Subject: rfkill: add fake rfkill support
+
+allow building of modules depending on RFKILL even if RFKILL is not enabled.
+
+Signed-off-by: John Crispin <[email protected]>
+---
+ include/linux/rfkill.h |  2 +-
+ net/Makefile           |  2 +-
+ net/rfkill/Kconfig     | 14 +++++++++-----
+ net/rfkill/Makefile    |  2 +-
+ 4 files changed, 12 insertions(+), 8 deletions(-)
+
+--- a/include/linux/rfkill.h
++++ b/include/linux/rfkill.h
+@@ -64,7 +64,7 @@ struct rfkill_ops {
+       int     (*set_block)(void *data, bool blocked);
+ };
+ 
+-#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
++#if defined(CONFIG_RFKILL_FULL) || defined(CONFIG_RFKILL_FULL_MODULE)
+ /**
+  * rfkill_alloc - Allocate rfkill structure
+  * @name: name of the struct -- the string is not copied internally
+--- a/net/Makefile
++++ b/net/Makefile
+@@ -52,7 +52,7 @@ obj-$(CONFIG_TIPC)           += tipc/
+ obj-$(CONFIG_NETLABEL)                += netlabel/
+ obj-$(CONFIG_IUCV)            += iucv/
+ obj-$(CONFIG_SMC)             += smc/
+-obj-$(CONFIG_RFKILL)          += rfkill/
++obj-$(CONFIG_RFKILL_FULL)     += rfkill/
+ obj-$(CONFIG_NET_9P)          += 9p/
+ obj-$(CONFIG_CAIF)            += caif/
+ obj-$(CONFIG_DCB)             += dcb/
+--- a/net/rfkill/Kconfig
++++ b/net/rfkill/Kconfig
+@@ -2,7 +2,11 @@
+ #
+ # RF switch subsystem configuration
+ #
+-menuconfig RFKILL
++config RFKILL
++      bool
++      default y
++
++menuconfig RFKILL_FULL
+       tristate "RF switch subsystem support"
+       help
+         Say Y here if you want to have control over RF switches
+@@ -14,19 +18,19 @@ menuconfig RFKILL
+ # LED trigger support
+ config RFKILL_LEDS
+       bool
+-      depends on RFKILL
++      depends on RFKILL_FULL
+       depends on LEDS_TRIGGERS = y || RFKILL = LEDS_TRIGGERS
+       default y
+ 
+ config RFKILL_INPUT
+       bool "RF switch input support" if EXPERT
+-      depends on RFKILL
++      depends on RFKILL_FULL
+       depends on INPUT = y || RFKILL = INPUT
+       default y if !EXPERT
+ 
+ config RFKILL_GPIO
+       tristate "GPIO RFKILL driver"
+-      depends on RFKILL
++      depends on RFKILL_FULL
+       depends on GPIOLIB || COMPILE_TEST
+       default n
+       help
+--- a/net/rfkill/Makefile
++++ b/net/rfkill/Makefile
+@@ -5,5 +5,5 @@
+ 
+ rfkill-y                      += core.o
+ rfkill-$(CONFIG_RFKILL_INPUT) += input.o
+-obj-$(CONFIG_RFKILL)          += rfkill.o
++obj-$(CONFIG_RFKILL_FULL)     += rfkill.o
+ obj-$(CONFIG_RFKILL_GPIO)     += rfkill-gpio.o

diff --git a/target/linux/generic/hack-6.0/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch b/target/linux/generic/hack-6.0/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch
new file mode 100644 (file)
index 0000000..f21f200
--- /dev/null
+++ b/target/linux/generic/hack-6.0/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch
@@ -0,0 +1,64 @@
+From: Ben Menchaca <[email protected]>
+Date: Fri, 7 Jun 2013 18:35:22 -0500
+Subject: MIPS: r4k_cache: use more efficient cache blast
+
+Optimize the compiler output for larger cache blast cases that are
+common for DMA-based networking.
+
+Signed-off-by: Ben Menchaca <[email protected]>
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+--- a/arch/mips/include/asm/r4kcache.h
++++ b/arch/mips/include/asm/r4kcache.h
+@@ -286,14 +286,46 @@ static inline void prot##extra##blast_##
+                                                   unsigned long end)  \
+ {                                                                     \
+       unsigned long lsize = cpu_##desc##_line_size();                 \
++      unsigned long lsize_2 = lsize * 2;                              \
++      unsigned long lsize_3 = lsize * 3;                              \
++      unsigned long lsize_4 = lsize * 4;                              \
++      unsigned long lsize_5 = lsize * 5;                              \
++      unsigned long lsize_6 = lsize * 6;                              \
++      unsigned long lsize_7 = lsize * 7;                              \
++      unsigned long lsize_8 = lsize * 8;                              \
+       unsigned long addr = start & ~(lsize - 1);                      \
+-      unsigned long aend = (end - 1) & ~(lsize - 1);                  \
++      unsigned long aend = (end + lsize - 1) & ~(lsize - 1);          \
++      int lines = (aend - addr) / lsize;                              \
+                                                                       \
+-      while (1) {                                                     \
++      while (lines >= 8) {                                            \
++              prot##cache_op(hitop, addr);                            \
++              prot##cache_op(hitop, addr + lsize);                    \
++              prot##cache_op(hitop, addr + lsize_2);                  \
++              prot##cache_op(hitop, addr + lsize_3);                  \
++              prot##cache_op(hitop, addr + lsize_4);                  \
++              prot##cache_op(hitop, addr + lsize_5);                  \
++              prot##cache_op(hitop, addr + lsize_6);                  \
++              prot##cache_op(hitop, addr + lsize_7);                  \
++              addr += lsize_8;                                        \
++              lines -= 8;                                             \
++      }                                                               \
++                                                                      \
++      if (lines & 0x4) {                                              \
++              prot##cache_op(hitop, addr);                            \
++              prot##cache_op(hitop, addr + lsize);                    \
++              prot##cache_op(hitop, addr + lsize_2);                  \
++              prot##cache_op(hitop, addr + lsize_3);                  \
++              addr += lsize_4;                                        \
++      }                                                               \
++                                                                      \
++      if (lines & 0x2) {                                              \
++              prot##cache_op(hitop, addr);                            \
++              prot##cache_op(hitop, addr + lsize);                    \
++              addr += lsize_2;                                        \
++      }                                                               \
++                                                                      \
++      if (lines & 0x1) {                                              \
+               prot##cache_op(hitop, addr);                            \
+-              if (addr == aend)                                       \
+-                      break;                                          \
+-              addr += lsize;                                          \
+       }                                                               \
+ }
+ 

diff --git a/target/linux/generic/hack-6.0/301-mips_image_cmdline_hack.patch b/target/linux/generic/hack-6.0/301-mips_image_cmdline_hack.patch
new file mode 100644 (file)
index 0000000..15e233a
--- /dev/null
+++ b/target/linux/generic/hack-6.0/301-mips_image_cmdline_hack.patch
@@ -0,0 +1,38 @@
+From: John Crispin <[email protected]>
+Subject: hack: kernel: add generic image_cmdline hack to MIPS targets
+
+lede-commit: d59f5b3a987a48508257a0ddbaeadc7909f9f976
+Signed-off-by: Gabor Juhos <[email protected]>
+---
+ arch/mips/Kconfig       | 4 ++++
+ arch/mips/kernel/head.S | 6 ++++++
+ 2 files changed, 10 insertions(+)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -1180,6 +1180,10 @@ config MIPS_MSC
+ config SYNC_R4K
+       bool
+ 
++config IMAGE_CMDLINE_HACK
++      bool "OpenWrt specific image command line hack"
++      default n
++
+ config NO_IOPORT_MAP
+       def_bool n
+ 
+--- a/arch/mips/kernel/head.S
++++ b/arch/mips/kernel/head.S
+@@ -79,6 +79,12 @@ FEXPORT(__kernel_entry)
+       j       kernel_entry
+ #endif /* CONFIG_BOOT_RAW */
+ 
++#ifdef CONFIG_IMAGE_CMDLINE_HACK
++      .ascii  "CMDLINE:"
++EXPORT(__image_cmdline)
++      .fill   0x400
++#endif /* CONFIG_IMAGE_CMDLINE_HACK */
++
+       __REF
+ 
+ NESTED(kernel_entry, 16, sp)                  # kernel entry point

diff --git a/target/linux/generic/hack-6.0/321-powerpc_crtsavres_prereq.patch b/target/linux/generic/hack-6.0/321-powerpc_crtsavres_prereq.patch
new file mode 100644 (file)
index 0000000..215528a
--- /dev/null
+++ b/target/linux/generic/hack-6.0/321-powerpc_crtsavres_prereq.patch
@@ -0,0 +1,38 @@
+From 107c0964cb8db7ca28ac5199426414fdab3c274d Mon Sep 17 00:00:00 2001
+From: "Alexandros C. Couloumbis" <[email protected]>
+Date: Fri, 7 Jul 2017 17:14:51 +0200
+Subject: hack: arch: powerpc: drop register save/restore library from modules
+
+Upstream GCC uses a libgcc function for saving/restoring registers. This
+makes the code bigger, and upstream kernels need to carry that function
+for every single kernel module. Our GCC is patched to avoid those
+references, so we can drop the extra bloat for modules.
+
+lede-commit: e8e1084654f50904e6bf77b70b2de3f137d7b3ec
+Signed-off-by: Alexandros C. Couloumbis <[email protected]>
+---
+ arch/powerpc/Makefile | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/arch/powerpc/Makefile
++++ b/arch/powerpc/Makefile
+@@ -61,19 +61,6 @@ machine-$(CONFIG_PPC64) += 64
+ machine-$(CONFIG_CPU_LITTLE_ENDIAN) += le
+ UTS_MACHINE := $(subst $(space),,$(machine-y))
+ 
+-# XXX This needs to be before we override LD below
+-ifdef CONFIG_PPC32
+-KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
+-else
+-ifeq ($(call ld-ifversion, -ge, 22500, y),y)
+-# Have the linker provide sfpr if possible.
+-# There is a corresponding test in arch/powerpc/lib/Makefile
+-KBUILD_LDFLAGS_MODULE += --save-restore-funcs
+-else
+-KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
+-endif
+-endif
+-
+ ifdef CONFIG_CPU_LITTLE_ENDIAN
+ KBUILD_CFLAGS += -mlittle-endian
+ KBUILD_LDFLAGS        += -EL

diff --git a/target/linux/generic/hack-6.0/402-mtd-blktrans-call-add-disks-after-mtd-device.patch b/target/linux/generic/hack-6.0/402-mtd-blktrans-call-add-disks-after-mtd-device.patch
new file mode 100644 (file)
index 0000000..ea44bc0
--- /dev/null
+++ b/target/linux/generic/hack-6.0/402-mtd-blktrans-call-add-disks-after-mtd-device.patch
@@ -0,0 +1,112 @@
+From 0bccc3722bdd88e8ae995e77ef9f7b77ee4cbdee Mon Sep 17 00:00:00 2001
+From: Daniel Golle <[email protected]>
+Date: Wed, 7 Apr 2021 22:45:54 +0100
+Subject: [PATCH 2/2] mtd: blktrans: call add disks after mtd device
+To: [email protected]
+Cc: Vignesh Raghavendra <[email protected]>,
+    Richard Weinberger <[email protected]>,
+    Miquel Raynal <[email protected]>,
+    David Woodhouse <[email protected]>
+
+Calling device_add_disk while holding mtd_table_mutex leads
+to deadlock in case part_bits!=0 as block partition parsers
+will try to open the newly created disks, trying to acquire
+mutex once again.
+Move device_add_disk to additional function called after
+add partitions of an MTD device have been added and locks
+have been released.
+
+Signed-off-by: Daniel Golle <[email protected]>
+---
+ drivers/mtd/mtd_blkdevs.c    | 33 ++++++++++++++++++++++++++-------
+ drivers/mtd/mtdcore.c        |  3 +++
+ include/linux/mtd/blktrans.h |  1 +
+ 3 files changed, 30 insertions(+), 7 deletions(-)
+
+--- a/drivers/mtd/mtd_blkdevs.c
++++ b/drivers/mtd/mtd_blkdevs.c
+@@ -384,19 +384,8 @@ int add_mtd_blktrans_dev(struct mtd_blkt
+       if (new->readonly)
+               set_disk_ro(gd, 1);
+ 
+-      ret = device_add_disk(&new->mtd->dev, gd, NULL);
+-      if (ret)
+-              goto out_cleanup_disk;
+-
+-      if (new->disk_attributes) {
+-              ret = sysfs_create_group(&disk_to_dev(gd)->kobj,
+-                                      new->disk_attributes);
+-              WARN_ON(ret);
+-      }
+       return 0;
+ 
+-out_cleanup_disk:
+-      put_disk(new->disk);
+ out_free_tag_set:
+       blk_mq_free_tag_set(new->tag_set);
+ out_kfree_tag_set:
+@@ -402,6 +395,35 @@ out_list_del:
+       return ret;
+ }
+ 
++void register_mtd_blktrans_devs(void)
++{
++      struct mtd_blktrans_ops *tr;
++      struct mtd_blktrans_dev *dev, *next;
++      int ret;
++
++      list_for_each_entry(tr, &blktrans_majors, list) {
++              list_for_each_entry_safe(dev, next, &tr->devs, list) {
++                      if (disk_live(dev->disk))
++                              continue;
++
++                      ret = device_add_disk(&dev->mtd->dev, dev->disk, NULL);
++                      if (ret)
++                              goto out_cleanup_disk;
++
++                      if (dev->disk_attributes) {
++                              ret = sysfs_create_group(&disk_to_dev(dev->disk)->kobj,
++                                                      dev->disk_attributes);
++                              WARN_ON(ret);
++                      }
++              }
++      }
++
++      return;
++
++out_cleanup_disk:
++      put_disk(dev->disk);
++}
++
+ int del_mtd_blktrans_dev(struct mtd_blktrans_dev *old)
+ {
+       unsigned long flags;
+--- a/drivers/mtd/mtdcore.c
++++ b/drivers/mtd/mtdcore.c
+@@ -31,6 +31,7 @@
+ 
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
++#include <linux/mtd/blktrans.h>
+ 
+ #include "mtdcore.h"
+ 
+@@ -1073,6 +1074,8 @@ int mtd_device_parse_register(struct mtd
+ 
+       ret = mtd_otp_nvmem_add(mtd);
+ 
++      register_mtd_blktrans_devs();
++
+ out:
+       if (ret && device_is_registered(&mtd->dev))
+               del_mtd_device(mtd);
+--- a/include/linux/mtd/blktrans.h
++++ b/include/linux/mtd/blktrans.h
+@@ -76,6 +76,7 @@ extern int deregister_mtd_blktrans(struc
+ extern int add_mtd_blktrans_dev(struct mtd_blktrans_dev *dev);
+ extern int del_mtd_blktrans_dev(struct mtd_blktrans_dev *dev);
+ extern int mtd_blktrans_cease_background(struct mtd_blktrans_dev *dev);
++extern void register_mtd_blktrans_devs(void);
+ 
+ /**
+  * module_mtd_blktrans() - Helper macro for registering a mtd blktrans driver

diff --git a/target/linux/generic/hack-6.0/410-block-fit-partition-parser.patch b/target/linux/generic/hack-6.0/410-block-fit-partition-parser.patch
new file mode 100644 (file)
index 0000000..854621b
--- /dev/null
+++ b/target/linux/generic/hack-6.0/410-block-fit-partition-parser.patch
@@ -0,0 +1,191 @@
+From 69357074558daf6ff24c9f58714935e9e095a865 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 13:37:33 +0200
+Subject: [PATCH] kernel: add block fit partition parser
+
+---
+ block/blk.h                     |  2 ++
+ block/partitions/Kconfig        |  7 +++++++
+ block/partitions/Makefile       |  1 +
+ block/partitions/check.h        |  3 +++
+ block/partitions/core.c         | 17 +++++++++++++++++
+ block/partitions/efi.c          |  8 ++++++++
+ block/partitions/efi.h          |  3 +++
+ block/partitions/msdos.c        | 10 ++++++++++
+ drivers/mtd/mtd_blkdevs.c       |  2 ++
+ drivers/mtd/ubi/block.c         |  3 +++
+ include/linux/msdos_partition.h |  1 +
+ 11 files changed, 57 insertions(+)
+
+--- a/block/blk.h
++++ b/block/blk.h
+@@ -354,6 +354,8 @@ void blk_free_ext_minor(unsigned int min
+ #define ADDPART_FLAG_NONE     0
+ #define ADDPART_FLAG_RAID     1
+ #define ADDPART_FLAG_WHOLEDISK        2
++#define ADDPART_FLAG_READONLY 4
++#define ADDPART_FLAG_ROOTDEV  8
+ int bdev_add_partition(struct gendisk *disk, int partno, sector_t start,
+               sector_t length);
+ int bdev_del_partition(struct gendisk *disk, int partno);
+--- a/block/partitions/Kconfig
++++ b/block/partitions/Kconfig
+@@ -101,6 +101,13 @@ config ATARI_PARTITION
+         Say Y here if you would like to use hard disks under Linux which
+         were partitioned under the Atari OS.
+ 
++config FIT_PARTITION
++      bool "Flattened-Image-Tree (FIT) partition support" if PARTITION_ADVANCED
++      default n
++      help
++        Say Y here if your system needs to mount the filesystem part of
++        a Flattened-Image-Tree (FIT) image commonly used with Das U-Boot.
++
+ config IBM_PARTITION
+       bool "IBM disk label and partition support"
+       depends on PARTITION_ADVANCED && S390
+--- a/block/partitions/Makefile
++++ b/block/partitions/Makefile
+@@ -8,6 +8,7 @@ obj-$(CONFIG_ACORN_PARTITION) += acorn.o
+ obj-$(CONFIG_AMIGA_PARTITION) += amiga.o
+ obj-$(CONFIG_ATARI_PARTITION) += atari.o
+ obj-$(CONFIG_AIX_PARTITION) += aix.o
++obj-$(CONFIG_FIT_PARTITION) += fit.o
+ obj-$(CONFIG_CMDLINE_PARTITION) += cmdline.o
+ obj-$(CONFIG_MAC_PARTITION) += mac.o
+ obj-$(CONFIG_LDM_PARTITION) += ldm.o
+--- a/block/partitions/check.h
++++ b/block/partitions/check.h
+@@ -58,6 +58,7 @@ int amiga_partition(struct parsed_partit
+ int atari_partition(struct parsed_partitions *state);
+ int cmdline_partition(struct parsed_partitions *state);
+ int efi_partition(struct parsed_partitions *state);
++int fit_partition(struct parsed_partitions *state);
+ int ibm_partition(struct parsed_partitions *);
+ int karma_partition(struct parsed_partitions *state);
+ int ldm_partition(struct parsed_partitions *state);
+@@ -68,3 +69,5 @@ int sgi_partition(struct parsed_partitio
+ int sun_partition(struct parsed_partitions *state);
+ int sysv68_partition(struct parsed_partitions *state);
+ int ultrix_partition(struct parsed_partitions *state);
++
++int parse_fit_partitions(struct parsed_partitions *state, u64 start_sector, u64 nr_sectors, int *slot, int add_remain);
+--- a/block/partitions/core.c
++++ b/block/partitions/core.c
+@@ -12,6 +12,10 @@
+ #include <linux/vmalloc.h>
+ #include <linux/blktrace_api.h>
+ #include <linux/raid/detect.h>
++#ifdef CONFIG_FIT_PARTITION
++#include <linux/root_dev.h>
++#endif
++
+ #include "check.h"
+ 
+ static int (*check_part[])(struct parsed_partitions *) = {
+@@ -48,6 +52,9 @@ static int (*check_part[])(struct parsed
+ #ifdef CONFIG_EFI_PARTITION
+       efi_partition,          /* this must come before msdos */
+ #endif
++#ifdef CONFIG_FIT_PARTITION
++      fit_partition,
++#endif
+ #ifdef CONFIG_SGI_PARTITION
+       sgi_partition,
+ #endif
+@@ -408,6 +415,11 @@ static struct block_device *add_partitio
+                       goto out_del;
+       }
+ 
++#ifdef CONFIG_FIT_PARTITION
++      if (flags & ADDPART_FLAG_READONLY)
++              bdev->bd_read_only = true;
++#endif
++
+       /* everything is up and running, commence */
+       err = xa_insert(&disk->part_tbl, partno, bdev, GFP_KERNEL);
+       if (err)
+@@ -598,6 +610,11 @@ static bool blk_add_partition(struct gen
+           (state->parts[p].flags & ADDPART_FLAG_RAID))
+               md_autodetect_dev(part->bd_dev);
+ 
++#ifdef CONFIG_FIT_PARTITION
++      if ((state->parts[p].flags & ADDPART_FLAG_ROOTDEV) && ROOT_DEV == 0)
++              ROOT_DEV = part->bd_dev;
++#endif
++
+       return true;
+ }
+ 
+--- a/block/partitions/efi.c
++++ b/block/partitions/efi.c
+@@ -716,6 +716,9 @@ int efi_partition(struct parsed_partitio
+       gpt_entry *ptes = NULL;
+       u32 i;
+       unsigned ssz = queue_logical_block_size(state->disk->queue) / 512;
++#ifdef CONFIG_FIT_PARTITION
++      u32 extra_slot = 64;
++#endif
+ 
+       if (!find_valid_gpt(state, &gpt, &ptes) || !gpt || !ptes) {
+               kfree(gpt);
+@@ -749,6 +752,11 @@ int efi_partition(struct parsed_partitio
+                               ARRAY_SIZE(ptes[i].partition_name));
+               utf16_le_to_7bit(ptes[i].partition_name, label_max, info->volname);
+               state->parts[i + 1].has_info = true;
++#ifdef CONFIG_FIT_PARTITION
++              /* If this is a U-Boot FIT volume it may have subpartitions */
++              if (!efi_guidcmp(ptes[i].partition_type_guid, PARTITION_LINUX_FIT_GUID))
++                      (void) parse_fit_partitions(state, start * ssz, size * ssz, &extra_slot, 1);
++#endif
+       }
+       kfree(ptes);
+       kfree(gpt);
+--- a/block/partitions/efi.h
++++ b/block/partitions/efi.h
+@@ -52,6 +52,9 @@
+ #define PARTITION_LINUX_LVM_GUID \
+     EFI_GUID( 0xe6d6d379, 0xf507, 0x44c2, \
+               0xa2, 0x3c, 0x23, 0x8f, 0x2a, 0x3d, 0xf9, 0x28)
++#define PARTITION_LINUX_FIT_GUID \
++    EFI_GUID( 0xcae9be83, 0xb15f, 0x49cc, \
++              0x86, 0x3f, 0x08, 0x1b, 0x74, 0x4a, 0x2d, 0x93)
+ 
+ typedef struct _gpt_header {
+       __le64 signature;
+--- a/block/partitions/msdos.c
++++ b/block/partitions/msdos.c
+@@ -564,6 +564,15 @@ static void parse_minix(struct parsed_pa
+ #endif /* CONFIG_MINIX_SUBPARTITION */
+ }
+ 
++static void parse_fit_mbr(struct parsed_partitions *state,
++                        sector_t offset, sector_t size, int origin)
++{
++#ifdef CONFIG_FIT_PARTITION
++      u32 extra_slot = 64;
++      (void) parse_fit_partitions(state, offset, size, &extra_slot, 1);
++#endif /* CONFIG_FIT_PARTITION */
++}
++
+ static struct {
+       unsigned char id;
+       void (*parse)(struct parsed_partitions *, sector_t, sector_t, int);
+@@ -575,6 +584,7 @@ static struct {
+       {UNIXWARE_PARTITION, parse_unixware},
+       {SOLARIS_X86_PARTITION, parse_solaris_x86},
+       {NEW_SOLARIS_X86_PARTITION, parse_solaris_x86},
++      {FIT_PARTITION, parse_fit_mbr},
+       {0, NULL},
+ };
+ 
+--- a/include/linux/msdos_partition.h
++++ b/include/linux/msdos_partition.h
+@@ -31,6 +31,7 @@ enum msdos_sys_ind {
+       LINUX_LVM_PARTITION = 0x8e,
+       LINUX_RAID_PARTITION = 0xfd,    /* autodetect RAID partition */
+ 
++      FIT_PARTITION = 0x2e,           /* U-Boot uImage.FIT */
+       SOLARIS_X86_PARTITION = 0x82,   /* also Linux swap partitions */
+       NEW_SOLARIS_X86_PARTITION = 0xbf,
+ 

diff --git a/target/linux/generic/hack-6.0/420-mtd-set-rootfs-to-be-root-dev.patch b/target/linux/generic/hack-6.0/420-mtd-set-rootfs-to-be-root-dev.patch
new file mode 100644 (file)
index 0000000..90254c6
--- /dev/null
+++ b/target/linux/generic/hack-6.0/420-mtd-set-rootfs-to-be-root-dev.patch
@@ -0,0 +1,39 @@
+From: Gabor Juhos <[email protected]>
+Subject: kernel/3.1[02]: move MTD root device setup code to mtdcore
+
+The current code only allows to automatically set
+root device on MTD partitions. Move the code to MTD
+core to allow to use it with all MTD devices.
+
+Signed-off-by: Gabor Juhos <[email protected]>
+---
+ drivers/mtd/mtdcore.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/mtd/mtdcore.c
++++ b/drivers/mtd/mtdcore.c
+@@ -27,6 +27,7 @@
+ #include <linux/reboot.h>
+ #include <linux/leds.h>
+ #include <linux/debugfs.h>
++#include <linux/root_dev.h>
+ #include <linux/nvmem-provider.h>
+ 
+ #include <linux/mtd/mtd.h>
+@@ -768,6 +769,16 @@ int add_mtd_device(struct mtd_info *mtd)
+          of this try_ nonsense, and no bitching about it
+          either. :) */
+       __module_get(THIS_MODULE);
++
++      if (!strcmp(mtd->name, "rootfs") &&
++          IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) &&
++          ROOT_DEV == 0) {
++              unsigned int index = mtd->index;
++              pr_notice("mtd: device %d (%s) set to be root filesystem\n",
++                        mtd->index, mtd->name);
++              ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, index);
++      }
++
+       return 0;
+ 
+ fail_nvmem_add:

diff --git a/target/linux/generic/hack-6.0/430-mtk-bmt-support.patch b/target/linux/generic/hack-6.0/430-mtk-bmt-support.patch
new file mode 100644 (file)
index 0000000..1476f4f
--- /dev/null
+++ b/target/linux/generic/hack-6.0/430-mtk-bmt-support.patch
@@ -0,0 +1,33 @@
+From ac84397efb3b3868c71c10ad7521161773228a17 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 13:41:44 +0200
+Subject: [PATCH] mtd/nand: add MediaTek NAND bad block managment table
+
+---
+ drivers/mtd/nand/Kconfig  | 4 ++++
+ drivers/mtd/nand/Makefile | 1 +
+ 2 files changed, 5 insertions(+)
+
+--- a/drivers/mtd/nand/Kconfig
++++ b/drivers/mtd/nand/Kconfig
+@@ -46,6 +46,10 @@ config MTD_NAND_ECC_SW_BCH
+         ECC codes. They are used with NAND devices requiring more than 1 bit
+         of error correction.
+ 
++config MTD_NAND_MTK_BMT
++      bool "Support MediaTek NAND Bad-block Management Table"
++      default n
++
+ config MTD_NAND_ECC_MXIC
+       bool "Macronix external hardware ECC engine"
+       depends on HAS_IOMEM
+--- a/drivers/mtd/nand/Makefile
++++ b/drivers/mtd/nand/Makefile
+@@ -2,6 +2,7 @@
+ nandcore-objs := core.o bbt.o
+ obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
+ obj-$(CONFIG_MTD_NAND_ECC_MEDIATEK) += ecc-mtk.o
++obj-$(CONFIG_MTD_NAND_MTK_BMT)        += mtk_bmt.o mtk_bmt_v2.o mtk_bmt_bbt.o mtk_bmt_nmbm.o
+ 
+ obj-y += onenand/
+ obj-y += raw/

diff --git a/target/linux/generic/hack-6.0/531-debloat_lzma.patch b/target/linux/generic/hack-6.0/531-debloat_lzma.patch
new file mode 100644 (file)
index 0000000..2f70eee
--- /dev/null
+++ b/target/linux/generic/hack-6.0/531-debloat_lzma.patch
@@ -0,0 +1,1040 @@
+From 3fd297761ac246c54d7723c57fca95c112b99465 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Sat, 15 Jul 2017 21:15:44 +0200
+Subject: lzma: de-bloat the lzma library used by jffs2
+
+lede-commit: 3fd1dd08fbcbb78b34efefd32c3032e5c99108d6
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/linux/lzma/LzFind.h  |  17 ---
+ include/linux/lzma/LzmaDec.h | 101 ---------------
+ include/linux/lzma/LzmaEnc.h |  20 ---
+ lib/lzma/LzFind.c            | 287 ++++---------------------------------------
+ lib/lzma/LzmaDec.c           |  86 +------------
+ lib/lzma/LzmaEnc.c           | 172 ++------------------------
+ 6 files changed, 42 insertions(+), 641 deletions(-)
+
+--- a/include/linux/lzma/LzFind.h
++++ b/include/linux/lzma/LzFind.h
+@@ -55,11 +55,6 @@ typedef struct _CMatchFinder
+ 
+ #define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
+ 
+-int MatchFinder_NeedMove(CMatchFinder *p);
+-Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
+-void MatchFinder_MoveBlock(CMatchFinder *p);
+-void MatchFinder_ReadIfRequired(CMatchFinder *p);
+-
+ void MatchFinder_Construct(CMatchFinder *p);
+ 
+ /* Conditions:
+@@ -70,12 +65,6 @@ int MatchFinder_Create(CMatchFinder *p,
+     UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
+     ISzAlloc *alloc);
+ void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
+-void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
+-void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
+-
+-UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
+-    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
+-    UInt32 *distances, UInt32 maxLen);
+ 
+ /*
+ Conditions:
+@@ -102,12 +91,6 @@ typedef struct _IMatchFinder
+ 
+ void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
+ 
+-void MatchFinder_Init(CMatchFinder *p);
+-UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
+-UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
+-void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
+-void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
+-
+ #ifdef __cplusplus
+ }
+ #endif
+--- a/include/linux/lzma/LzmaDec.h
++++ b/include/linux/lzma/LzmaDec.h
+@@ -31,14 +31,6 @@ typedef struct _CLzmaProps
+   UInt32 dicSize;
+ } CLzmaProps;
+ 
+-/* LzmaProps_Decode - decodes properties
+-Returns:
+-  SZ_OK
+-  SZ_ERROR_UNSUPPORTED - Unsupported properties
+-*/
+-
+-SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
+-
+ 
+ /* ---------- LZMA Decoder state ---------- */
+ 
+@@ -70,8 +62,6 @@ typedef struct
+ 
+ #define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
+ 
+-void LzmaDec_Init(CLzmaDec *p);
+-
+ /* There are two types of LZMA streams:
+      0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
+      1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
+@@ -108,97 +98,6 @@ typedef enum
+ 
+ /* ELzmaStatus is used only as output value for function call */
+ 
+-
+-/* ---------- Interfaces ---------- */
+-
+-/* There are 3 levels of interfaces:
+-     1) Dictionary Interface
+-     2) Buffer Interface
+-     3) One Call Interface
+-   You can select any of these interfaces, but don't mix functions from different
+-   groups for same object. */
+-
+-
+-/* There are two variants to allocate state for Dictionary Interface:
+-     1) LzmaDec_Allocate / LzmaDec_Free
+-     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
+-   You can use variant 2, if you set dictionary buffer manually.
+-   For Buffer Interface you must always use variant 1.
+-
+-LzmaDec_Allocate* can return:
+-  SZ_OK
+-  SZ_ERROR_MEM         - Memory allocation error
+-  SZ_ERROR_UNSUPPORTED - Unsupported properties
+-*/
+-
+-SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
+-void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
+-
+-SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
+-void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
+-
+-/* ---------- Dictionary Interface ---------- */
+-
+-/* You can use it, if you want to eliminate the overhead for data copying from
+-   dictionary to some other external buffer.
+-   You must work with CLzmaDec variables directly in this interface.
+-
+-   STEPS:
+-     LzmaDec_Constr()
+-     LzmaDec_Allocate()
+-     for (each new stream)
+-     {
+-       LzmaDec_Init()
+-       while (it needs more decompression)
+-       {
+-         LzmaDec_DecodeToDic()
+-         use data from CLzmaDec::dic and update CLzmaDec::dicPos
+-       }
+-     }
+-     LzmaDec_Free()
+-*/
+-
+-/* LzmaDec_DecodeToDic
+-
+-   The decoding to internal dictionary buffer (CLzmaDec::dic).
+-   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
+-
+-finishMode:
+-  It has meaning only if the decoding reaches output limit (dicLimit).
+-  LZMA_FINISH_ANY - Decode just dicLimit bytes.
+-  LZMA_FINISH_END - Stream must be finished after dicLimit.
+-
+-Returns:
+-  SZ_OK
+-    status:
+-      LZMA_STATUS_FINISHED_WITH_MARK
+-      LZMA_STATUS_NOT_FINISHED
+-      LZMA_STATUS_NEEDS_MORE_INPUT
+-      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
+-  SZ_ERROR_DATA - Data error
+-*/
+-
+-SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
+-    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
+-
+-
+-/* ---------- Buffer Interface ---------- */
+-
+-/* It's zlib-like interface.
+-   See LzmaDec_DecodeToDic description for information about STEPS and return results,
+-   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
+-   to work with CLzmaDec variables manually.
+-
+-finishMode:
+-  It has meaning only if the decoding reaches output limit (*destLen).
+-  LZMA_FINISH_ANY - Decode just destLen bytes.
+-  LZMA_FINISH_END - Stream must be finished after (*destLen).
+-*/
+-
+-SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
+-    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
+-
+-
+ /* ---------- One Call Interface ---------- */
+ 
+ /* LzmaDecode
+--- a/include/linux/lzma/LzmaEnc.h
++++ b/include/linux/lzma/LzmaEnc.h
+@@ -31,9 +31,6 @@ typedef struct _CLzmaEncProps
+ } CLzmaEncProps;
+ 
+ void LzmaEncProps_Init(CLzmaEncProps *p);
+-void LzmaEncProps_Normalize(CLzmaEncProps *p);
+-UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
+-
+ 
+ /* ---------- CLzmaEncHandle Interface ---------- */
+ 
+@@ -53,26 +50,9 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
+ void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
+ SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
+ SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
+-SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
+-    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
+ SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
+     int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
+ 
+-/* ---------- One Call Interface ---------- */
+-
+-/* LzmaEncode
+-Return code:
+-  SZ_OK               - OK
+-  SZ_ERROR_MEM        - Memory allocation error
+-  SZ_ERROR_PARAM      - Incorrect paramater
+-  SZ_ERROR_OUTPUT_EOF - output buffer overflow
+-  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
+-*/
+-
+-SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
+-    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
+-    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
+-
+ #ifdef __cplusplus
+ }
+ #endif
+--- a/lib/lzma/LzFind.c
++++ b/lib/lzma/LzFind.c
+@@ -14,9 +14,15 @@
+ 
+ #define kStartMaxLen 3
+ 
++#if 0
++#define DIRECT_INPUT  p->directInput
++#else
++#define DIRECT_INPUT  1
++#endif
++
+ static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
+ {
+-  if (!p->directInput)
++  if (!DIRECT_INPUT)
+   {
+     alloc->Free(alloc, p->bufferBase);
+     p->bufferBase = 0;
+@@ -28,7 +34,7 @@ static void LzInWindow_Free(CMatchFinder
+ static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
+ {
+   UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
+-  if (p->directInput)
++  if (DIRECT_INPUT)
+   {
+     p->blockSize = blockSize;
+     return 1;
+@@ -42,12 +48,12 @@ static int LzInWindow_Create(CMatchFinde
+   return (p->bufferBase != 0);
+ }
+ 
+-Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
+-Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
++static Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
++static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
+ 
+-UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
++static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
+ 
+-void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
++static void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
+ {
+   p->posLimit -= subValue;
+   p->pos -= subValue;
+@@ -58,7 +64,7 @@ static void MatchFinder_ReadBlock(CMatch
+ {
+   if (p->streamEndWasReached || p->result != SZ_OK)
+     return;
+-  if (p->directInput)
++  if (DIRECT_INPUT)
+   {
+     UInt32 curSize = 0xFFFFFFFF - p->streamPos;
+     if (curSize > p->directInputRem)
+@@ -89,7 +95,7 @@ static void MatchFinder_ReadBlock(CMatch
+   }
+ }
+ 
+-void MatchFinder_MoveBlock(CMatchFinder *p)
++static void MatchFinder_MoveBlock(CMatchFinder *p)
+ {
+   memmove(p->bufferBase,
+     p->buffer - p->keepSizeBefore,
+@@ -97,22 +103,14 @@ void MatchFinder_MoveBlock(CMatchFinder
+   p->buffer = p->bufferBase + p->keepSizeBefore;
+ }
+ 
+-int MatchFinder_NeedMove(CMatchFinder *p)
++static int MatchFinder_NeedMove(CMatchFinder *p)
+ {
+-  if (p->directInput)
++  if (DIRECT_INPUT)
+     return 0;
+   /* if (p->streamEndWasReached) return 0; */
+   return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
+ }
+ 
+-void MatchFinder_ReadIfRequired(CMatchFinder *p)
+-{
+-  if (p->streamEndWasReached)
+-    return;
+-  if (p->keepSizeAfter >= p->streamPos - p->pos)
+-    MatchFinder_ReadBlock(p);
+-}
+-
+ static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
+ {
+   if (MatchFinder_NeedMove(p))
+@@ -268,7 +266,7 @@ static void MatchFinder_SetLimits(CMatch
+   p->posLimit = p->pos + limit;
+ }
+ 
+-void MatchFinder_Init(CMatchFinder *p)
++static void MatchFinder_Init(CMatchFinder *p)
+ {
+   UInt32 i;
+   for (i = 0; i < p->hashSizeSum; i++)
+@@ -287,7 +285,7 @@ static UInt32 MatchFinder_GetSubValue(CM
+   return (p->pos - p->historySize - 1) & kNormalizeMask;
+ }
+ 
+-void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
++static void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
+ {
+   UInt32 i;
+   for (i = 0; i < numItems; i++)
+@@ -319,38 +317,7 @@ static void MatchFinder_CheckLimits(CMat
+   MatchFinder_SetLimits(p);
+ }
+ 
+-static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
+-    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
+-    UInt32 *distances, UInt32 maxLen)
+-{
+-  son[_cyclicBufferPos] = curMatch;
+-  for (;;)
+-  {
+-    UInt32 delta = pos - curMatch;
+-    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
+-      return distances;
+-    {
+-      const Byte *pb = cur - delta;
+-      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
+-      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
+-      {
+-        UInt32 len = 0;
+-        while (++len != lenLimit)
+-          if (pb[len] != cur[len])
+-            break;
+-        if (maxLen < len)
+-        {
+-          *distances++ = maxLen = len;
+-          *distances++ = delta - 1;
+-          if (len == lenLimit)
+-            return distances;
+-        }
+-      }
+-    }
+-  }
+-}
+-
+-UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
++static UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
+     UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
+     UInt32 *distances, UInt32 maxLen)
+ {
+@@ -460,10 +427,10 @@ static void SkipMatchesSpec(UInt32 lenLi
+   p->buffer++; \
+   if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
+ 
+-#define MOVE_POS_RET MOVE_POS return offset;
+-
+ static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
+ 
++#define MOVE_POS_RET MatchFinder_MovePos(p); return offset;
++
+ #define GET_MATCHES_HEADER2(minLen, ret_op) \
+   UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
+   lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
+@@ -479,62 +446,7 @@ static void MatchFinder_MovePos(CMatchFi
+   distances + offset, maxLen) - distances); MOVE_POS_RET;
+ 
+ #define SKIP_FOOTER \
+-  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
+-
+-static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+-{
+-  UInt32 offset;
+-  GET_MATCHES_HEADER(2)
+-  HASH2_CALC;
+-  curMatch = p->hash[hashValue];
+-  p->hash[hashValue] = p->pos;
+-  offset = 0;
+-  GET_MATCHES_FOOTER(offset, 1)
+-}
+-
+-UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+-{
+-  UInt32 offset;
+-  GET_MATCHES_HEADER(3)
+-  HASH_ZIP_CALC;
+-  curMatch = p->hash[hashValue];
+-  p->hash[hashValue] = p->pos;
+-  offset = 0;
+-  GET_MATCHES_FOOTER(offset, 2)
+-}
+-
+-static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+-{
+-  UInt32 hash2Value, delta2, maxLen, offset;
+-  GET_MATCHES_HEADER(3)
+-
+-  HASH3_CALC;
+-
+-  delta2 = p->pos - p->hash[hash2Value];
+-  curMatch = p->hash[kFix3HashSize + hashValue];
+-
+-  p->hash[hash2Value] =
+-  p->hash[kFix3HashSize + hashValue] = p->pos;
+-
+-
+-  maxLen = 2;
+-  offset = 0;
+-  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
+-  {
+-    for (; maxLen != lenLimit; maxLen++)
+-      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
+-        break;
+-    distances[0] = maxLen;
+-    distances[1] = delta2 - 1;
+-    offset = 2;
+-    if (maxLen == lenLimit)
+-    {
+-      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
+-      MOVE_POS_RET;
+-    }
+-  }
+-  GET_MATCHES_FOOTER(offset, maxLen)
+-}
++  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MatchFinder_MovePos(p);
+ 
+ static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+ {
+@@ -583,108 +495,6 @@ static UInt32 Bt4_MatchFinder_GetMatches
+   GET_MATCHES_FOOTER(offset, maxLen)
+ }
+ 
+-static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+-{
+-  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
+-  GET_MATCHES_HEADER(4)
+-
+-  HASH4_CALC;
+-
+-  delta2 = p->pos - p->hash[                hash2Value];
+-  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
+-  curMatch = p->hash[kFix4HashSize + hashValue];
+-
+-  p->hash[                hash2Value] =
+-  p->hash[kFix3HashSize + hash3Value] =
+-  p->hash[kFix4HashSize + hashValue] = p->pos;
+-
+-  maxLen = 1;
+-  offset = 0;
+-  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
+-  {
+-    distances[0] = maxLen = 2;
+-    distances[1] = delta2 - 1;
+-    offset = 2;
+-  }
+-  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
+-  {
+-    maxLen = 3;
+-    distances[offset + 1] = delta3 - 1;
+-    offset += 2;
+-    delta2 = delta3;
+-  }
+-  if (offset != 0)
+-  {
+-    for (; maxLen != lenLimit; maxLen++)
+-      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
+-        break;
+-    distances[offset - 2] = maxLen;
+-    if (maxLen == lenLimit)
+-    {
+-      p->son[p->cyclicBufferPos] = curMatch;
+-      MOVE_POS_RET;
+-    }
+-  }
+-  if (maxLen < 3)
+-    maxLen = 3;
+-  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
+-    distances + offset, maxLen) - (distances));
+-  MOVE_POS_RET
+-}
+-
+-UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
+-{
+-  UInt32 offset;
+-  GET_MATCHES_HEADER(3)
+-  HASH_ZIP_CALC;
+-  curMatch = p->hash[hashValue];
+-  p->hash[hashValue] = p->pos;
+-  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
+-    distances, 2) - (distances));
+-  MOVE_POS_RET
+-}
+-
+-static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+-{
+-  do
+-  {
+-    SKIP_HEADER(2)
+-    HASH2_CALC;
+-    curMatch = p->hash[hashValue];
+-    p->hash[hashValue] = p->pos;
+-    SKIP_FOOTER
+-  }
+-  while (--num != 0);
+-}
+-
+-void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+-{
+-  do
+-  {
+-    SKIP_HEADER(3)
+-    HASH_ZIP_CALC;
+-    curMatch = p->hash[hashValue];
+-    p->hash[hashValue] = p->pos;
+-    SKIP_FOOTER
+-  }
+-  while (--num != 0);
+-}
+-
+-static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+-{
+-  do
+-  {
+-    UInt32 hash2Value;
+-    SKIP_HEADER(3)
+-    HASH3_CALC;
+-    curMatch = p->hash[kFix3HashSize + hashValue];
+-    p->hash[hash2Value] =
+-    p->hash[kFix3HashSize + hashValue] = p->pos;
+-    SKIP_FOOTER
+-  }
+-  while (--num != 0);
+-}
+-
+ static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+ {
+   do
+@@ -701,61 +511,12 @@ static void Bt4_MatchFinder_Skip(CMatchF
+   while (--num != 0);
+ }
+ 
+-static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+-{
+-  do
+-  {
+-    UInt32 hash2Value, hash3Value;
+-    SKIP_HEADER(4)
+-    HASH4_CALC;
+-    curMatch = p->hash[kFix4HashSize + hashValue];
+-    p->hash[                hash2Value] =
+-    p->hash[kFix3HashSize + hash3Value] =
+-    p->hash[kFix4HashSize + hashValue] = p->pos;
+-    p->son[p->cyclicBufferPos] = curMatch;
+-    MOVE_POS
+-  }
+-  while (--num != 0);
+-}
+-
+-void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
+-{
+-  do
+-  {
+-    SKIP_HEADER(3)
+-    HASH_ZIP_CALC;
+-    curMatch = p->hash[hashValue];
+-    p->hash[hashValue] = p->pos;
+-    p->son[p->cyclicBufferPos] = curMatch;
+-    MOVE_POS
+-  }
+-  while (--num != 0);
+-}
+-
+ void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
+ {
+   vTable->Init = (Mf_Init_Func)MatchFinder_Init;
+   vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
+   vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
+   vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
+-  if (!p->btMode)
+-  {
+-    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
+-    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
+-  }
+-  else if (p->numHashBytes == 2)
+-  {
+-    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
+-    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
+-  }
+-  else if (p->numHashBytes == 3)
+-  {
+-    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
+-    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
+-  }
+-  else
+-  {
+-    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
+-    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
+-  }
++  vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
++  vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
+ }
+--- a/lib/lzma/LzmaDec.c
++++ b/lib/lzma/LzmaDec.c
+@@ -682,7 +682,7 @@ static void LzmaDec_InitRc(CLzmaDec *p,
+   p->needFlush = 0;
+ }
+ 
+-void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
++static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
+ {
+   p->needFlush = 1;
+   p->remainLen = 0;
+@@ -698,7 +698,7 @@ void LzmaDec_InitDicAndState(CLzmaDec *p
+     p->needInitState = 1;
+ }
+ 
+-void LzmaDec_Init(CLzmaDec *p)
++static void LzmaDec_Init(CLzmaDec *p)
+ {
+   p->dicPos = 0;
+   LzmaDec_InitDicAndState(p, True, True);
+@@ -716,7 +716,7 @@ static void LzmaDec_InitStateReal(CLzmaD
+   p->needInitState = 0;
+ }
+ 
+-SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
++static SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
+     ELzmaFinishMode finishMode, ELzmaStatus *status)
+ {
+   SizeT inSize = *srcLen;
+@@ -837,65 +837,13 @@ SRes LzmaDec_DecodeToDic(CLzmaDec *p, Si
+   return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
+ }
+ 
+-SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
+-{
+-  SizeT outSize = *destLen;
+-  SizeT inSize = *srcLen;
+-  *srcLen = *destLen = 0;
+-  for (;;)
+-  {
+-    SizeT inSizeCur = inSize, outSizeCur, dicPos;
+-    ELzmaFinishMode curFinishMode;
+-    SRes res;
+-    if (p->dicPos == p->dicBufSize)
+-      p->dicPos = 0;
+-    dicPos = p->dicPos;
+-    if (outSize > p->dicBufSize - dicPos)
+-    {
+-      outSizeCur = p->dicBufSize;
+-      curFinishMode = LZMA_FINISH_ANY;
+-    }
+-    else
+-    {
+-      outSizeCur = dicPos + outSize;
+-      curFinishMode = finishMode;
+-    }
+-
+-    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
+-    src += inSizeCur;
+-    inSize -= inSizeCur;
+-    *srcLen += inSizeCur;
+-    outSizeCur = p->dicPos - dicPos;
+-    memcpy(dest, p->dic + dicPos, outSizeCur);
+-    dest += outSizeCur;
+-    outSize -= outSizeCur;
+-    *destLen += outSizeCur;
+-    if (res != 0)
+-      return res;
+-    if (outSizeCur == 0 || outSize == 0)
+-      return SZ_OK;
+-  }
+-}
+-
+-void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
++static void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
+ {
+   alloc->Free(alloc, p->probs);
+   p->probs = 0;
+ }
+ 
+-static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
+-{
+-  alloc->Free(alloc, p->dic);
+-  p->dic = 0;
+-}
+-
+-void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
+-{
+-  LzmaDec_FreeProbs(p, alloc);
+-  LzmaDec_FreeDict(p, alloc);
+-}
+-
+-SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
++static SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
+ {
+   UInt32 dicSize;
+   Byte d;
+@@ -935,7 +883,7 @@ static SRes LzmaDec_AllocateProbs2(CLzma
+   return SZ_OK;
+ }
+ 
+-SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
++static SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
+ {
+   CLzmaProps propNew;
+   RINOK(LzmaProps_Decode(&propNew, props, propsSize));
+@@ -943,28 +891,6 @@ SRes LzmaDec_AllocateProbs(CLzmaDec *p,
+   p->prop = propNew;
+   return SZ_OK;
+ }
+-
+-SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
+-{
+-  CLzmaProps propNew;
+-  SizeT dicBufSize;
+-  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
+-  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
+-  dicBufSize = propNew.dicSize;
+-  if (p->dic == 0 || dicBufSize != p->dicBufSize)
+-  {
+-    LzmaDec_FreeDict(p, alloc);
+-    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
+-    if (p->dic == 0)
+-    {
+-      LzmaDec_FreeProbs(p, alloc);
+-      return SZ_ERROR_MEM;
+-    }
+-  }
+-  p->dicBufSize = dicBufSize;
+-  p->prop = propNew;
+-  return SZ_OK;
+-}
+ 
+ SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
+     const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
+--- a/lib/lzma/LzmaEnc.c
++++ b/lib/lzma/LzmaEnc.c
+@@ -53,7 +53,7 @@ void LzmaEncProps_Init(CLzmaEncProps *p)
+   p->writeEndMark = 0;
+ }
+ 
+-void LzmaEncProps_Normalize(CLzmaEncProps *p)
++static void LzmaEncProps_Normalize(CLzmaEncProps *p)
+ {
+   int level = p->level;
+   if (level < 0) level = 5;
+@@ -76,7 +76,7 @@ void LzmaEncProps_Normalize(CLzmaEncProp
+       #endif
+ }
+ 
+-UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
++static UInt32 __maybe_unused LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
+ {
+   CLzmaEncProps props = *props2;
+   LzmaEncProps_Normalize(&props);
+@@ -93,7 +93,7 @@ UInt32 LzmaEncProps_GetDictSize(const CL
+ 
+ #define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
+ 
+-UInt32 GetPosSlot1(UInt32 pos)
++static UInt32 GetPosSlot1(UInt32 pos)
+ {
+   UInt32 res;
+   BSR2_RET(pos, res);
+@@ -107,7 +107,7 @@ UInt32 GetPosSlot1(UInt32 pos)
+ #define kNumLogBits (9 + (int)sizeof(size_t) / 2)
+ #define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
+ 
+-void LzmaEnc_FastPosInit(Byte *g_FastPos)
++static void LzmaEnc_FastPosInit(Byte *g_FastPos)
+ {
+   int c = 2, slotFast;
+   g_FastPos[0] = 0;
+@@ -339,58 +339,6 @@ typedef struct
+   CSaveState saveState;
+ } CLzmaEnc;
+ 
+-void LzmaEnc_SaveState(CLzmaEncHandle pp)
+-{
+-  CLzmaEnc *p = (CLzmaEnc *)pp;
+-  CSaveState *dest = &p->saveState;
+-  int i;
+-  dest->lenEnc = p->lenEnc;
+-  dest->repLenEnc = p->repLenEnc;
+-  dest->state = p->state;
+-
+-  for (i = 0; i < kNumStates; i++)
+-  {
+-    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
+-    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
+-  }
+-  for (i = 0; i < kNumLenToPosStates; i++)
+-    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
+-  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
+-  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
+-  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
+-  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
+-  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
+-  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
+-  memcpy(dest->reps, p->reps, sizeof(p->reps));
+-  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
+-}
+-
+-void LzmaEnc_RestoreState(CLzmaEncHandle pp)
+-{
+-  CLzmaEnc *dest = (CLzmaEnc *)pp;
+-  const CSaveState *p = &dest->saveState;
+-  int i;
+-  dest->lenEnc = p->lenEnc;
+-  dest->repLenEnc = p->repLenEnc;
+-  dest->state = p->state;
+-
+-  for (i = 0; i < kNumStates; i++)
+-  {
+-    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
+-    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
+-  }
+-  for (i = 0; i < kNumLenToPosStates; i++)
+-    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
+-  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
+-  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
+-  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
+-  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
+-  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
+-  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
+-  memcpy(dest->reps, p->reps, sizeof(p->reps));
+-  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
+-}
+-
+ SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
+ {
+   CLzmaEnc *p = (CLzmaEnc *)pp;
+@@ -600,7 +548,7 @@ static void LitEnc_EncodeMatched(CRangeE
+   while (symbol < 0x10000);
+ }
+ 
+-void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
++static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
+ {
+   UInt32 i;
+   for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
+@@ -1676,7 +1624,7 @@ static void FillDistancesPrices(CLzmaEnc
+   p->matchPriceCount = 0;
+ }
+ 
+-void LzmaEnc_Construct(CLzmaEnc *p)
++static void LzmaEnc_Construct(CLzmaEnc *p)
+ {
+   RangeEnc_Construct(&p->rc);
+   MatchFinder_Construct(&p->matchFinderBase);
+@@ -1709,7 +1657,7 @@ CLzmaEncHandle LzmaEnc_Create(ISzAlloc *
+   return p;
+ }
+ 
+-void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
++static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
+ {
+   alloc->Free(alloc, p->litProbs);
+   alloc->Free(alloc, p->saveState.litProbs);
+@@ -1717,7 +1665,7 @@ void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAl
+   p->saveState.litProbs = 0;
+ }
+ 
+-void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
++static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
+ {
+   #ifndef _7ZIP_ST
+   MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
+@@ -1947,7 +1895,7 @@ static SRes LzmaEnc_Alloc(CLzmaEnc *p, U
+   return SZ_OK;
+ }
+ 
+-void LzmaEnc_Init(CLzmaEnc *p)
++static void LzmaEnc_Init(CLzmaEnc *p)
+ {
+   UInt32 i;
+   p->state = 0;
+@@ -2005,7 +1953,7 @@ void LzmaEnc_Init(CLzmaEnc *p)
+   p->lpMask = (1 << p->lp) - 1;
+ }
+ 
+-void LzmaEnc_InitPrices(CLzmaEnc *p)
++static void LzmaEnc_InitPrices(CLzmaEnc *p)
+ {
+   if (!p->fastMode)
+   {
+@@ -2037,26 +1985,6 @@ static SRes LzmaEnc_AllocAndInit(CLzmaEn
+   return SZ_OK;
+ }
+ 
+-static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
+-    ISzAlloc *alloc, ISzAlloc *allocBig)
+-{
+-  CLzmaEnc *p = (CLzmaEnc *)pp;
+-  p->matchFinderBase.stream = inStream;
+-  p->needInit = 1;
+-  p->rc.outStream = outStream;
+-  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
+-}
+-
+-SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
+-    ISeqInStream *inStream, UInt32 keepWindowSize,
+-    ISzAlloc *alloc, ISzAlloc *allocBig)
+-{
+-  CLzmaEnc *p = (CLzmaEnc *)pp;
+-  p->matchFinderBase.stream = inStream;
+-  p->needInit = 1;
+-  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
+-}
+-
+ static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
+ {
+   p->matchFinderBase.directInput = 1;
+@@ -2064,7 +1992,7 @@ static void LzmaEnc_SetInputBuf(CLzmaEnc
+   p->matchFinderBase.directInputRem = srcLen;
+ }
+ 
+-SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
++static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
+     UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
+ {
+   CLzmaEnc *p = (CLzmaEnc *)pp;
+@@ -2074,7 +2002,7 @@ SRes LzmaEnc_MemPrepare(CLzmaEncHandle p
+   return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
+ }
+ 
+-void LzmaEnc_Finish(CLzmaEncHandle pp)
++static void LzmaEnc_Finish(CLzmaEncHandle pp)
+ {
+   #ifndef _7ZIP_ST
+   CLzmaEnc *p = (CLzmaEnc *)pp;
+@@ -2107,53 +2035,6 @@ static size_t MyWrite(void *pp, const vo
+   return size;
+ }
+ 
+-
+-UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
+-{
+-  const CLzmaEnc *p = (CLzmaEnc *)pp;
+-  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
+-}
+-
+-const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
+-{
+-  const CLzmaEnc *p = (CLzmaEnc *)pp;
+-  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
+-}
+-
+-SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
+-    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
+-{
+-  CLzmaEnc *p = (CLzmaEnc *)pp;
+-  UInt64 nowPos64;
+-  SRes res;
+-  CSeqOutStreamBuf outStream;
+-
+-  outStream.funcTable.Write = MyWrite;
+-  outStream.data = dest;
+-  outStream.rem = *destLen;
+-  outStream.overflow = False;
+-
+-  p->writeEndMark = False;
+-  p->finished = False;
+-  p->result = SZ_OK;
+-
+-  if (reInit)
+-    LzmaEnc_Init(p);
+-  LzmaEnc_InitPrices(p);
+-  nowPos64 = p->nowPos64;
+-  RangeEnc_Init(&p->rc);
+-  p->rc.outStream = &outStream.funcTable;
+-
+-  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
+-
+-  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
+-  *destLen -= outStream.rem;
+-  if (outStream.overflow)
+-    return SZ_ERROR_OUTPUT_EOF;
+-
+-  return res;
+-}
+-
+ static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
+ {
+   SRes res = SZ_OK;
+@@ -2184,13 +2065,6 @@ static SRes LzmaEnc_Encode2(CLzmaEnc *p,
+   return res;
+ }
+ 
+-SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
+-    ISzAlloc *alloc, ISzAlloc *allocBig)
+-{
+-  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
+-  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
+-}
+-
+ SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
+ {
+   CLzmaEnc *p = (CLzmaEnc *)pp;
+@@ -2247,25 +2121,3 @@ SRes LzmaEnc_MemEncode(CLzmaEncHandle pp
+     return SZ_ERROR_OUTPUT_EOF;
+   return res;
+ }
+-
+-SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
+-    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
+-    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
+-{
+-  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
+-  SRes res;
+-  if (p == 0)
+-    return SZ_ERROR_MEM;
+-
+-  res = LzmaEnc_SetProps(p, props);
+-  if (res == SZ_OK)
+-  {
+-    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
+-    if (res == SZ_OK)
+-      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
+-          writeEndMark, progress, alloc, allocBig);
+-  }
+-
+-  LzmaEnc_Destroy(p, alloc, allocBig);
+-  return res;
+-}

diff --git a/target/linux/generic/hack-6.0/600-bridge_offload.patch b/target/linux/generic/hack-6.0/600-bridge_offload.patch
new file mode 100644 (file)
index 0000000..6462044
--- /dev/null
+++ b/target/linux/generic/hack-6.0/600-bridge_offload.patch
@@ -0,0 +1,846 @@
+From 11c3fae5afa6cac444d12622e2cf5af60a99c1ef Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 13:43:15 +0200
+Subject: [PATCH] net/bridge: add bridge offload
+
+---
+ include/linux/if_bridge.h       |   1 +
+ net/bridge/Makefile             |   2 +-
+ net/bridge/br.c                 |   8 +
+ net/bridge/br_device.c          |   2 +
+ net/bridge/br_fdb.c             |   5 +
+ net/bridge/br_forward.c         |   3 +
+ net/bridge/br_if.c              |   6 +-
+ net/bridge/br_input.c           |   5 +
+ net/bridge/br_offload.c         | 438 ++++++++++++++++++++++++++++++++
+ net/bridge/br_private.h         |  22 +-
+ net/bridge/br_private_offload.h |  23 ++
+ net/bridge/br_stp.c             |   3 +
+ net/bridge/br_sysfs_br.c        |  35 +++
+ net/bridge/br_sysfs_if.c        |   2 +
+ net/bridge/br_vlan_tunnel.c     |   3 +
+ 15 files changed, 555 insertions(+), 3 deletions(-)
+ create mode 100644 net/bridge/br_offload.c
+ create mode 100644 net/bridge/br_private_offload.h
+
+--- a/include/linux/if_bridge.h
++++ b/include/linux/if_bridge.h
+@@ -59,6 +59,7 @@ struct br_ip_list {
+ #define BR_TX_FWD_OFFLOAD     BIT(20)
+ #define BR_PORT_LOCKED                BIT(21)
+ #define BR_BPDU_FILTER                BIT(22)
++#define BR_OFFLOAD            BIT(23)
+ 
+ #define BR_DEFAULT_AGEING_TIME        (300 * HZ)
+ 
+--- a/net/bridge/Makefile
++++ b/net/bridge/Makefile
+@@ -5,7 +5,7 @@
+ 
+ obj-$(CONFIG_BRIDGE) += bridge.o
+ 
+-bridge-y      := br.o br_device.o br_fdb.o br_forward.o br_if.o br_input.o \
++bridge-y      := br.o br_device.o br_fdb.o br_forward.o br_if.o br_input.o br_offload.o \
+                       br_ioctl.o br_stp.o br_stp_bpdu.o \
+                       br_stp_if.o br_stp_timer.o br_netlink.o \
+                       br_netlink_tunnel.o br_arp_nd_proxy.o
+--- a/net/bridge/br.c
++++ b/net/bridge/br.c
+@@ -18,6 +18,7 @@
+ #include <net/switchdev.h>
+ 
+ #include "br_private.h"
++#include "br_private_offload.h"
+ 
+ /*
+  * Handle changes in state of network devices enslaved to a bridge.
+@@ -381,6 +382,10 @@ static int __init br_init(void)
+       if (err)
+               goto err_out;
+ 
++      err = br_offload_init();
++      if (err)
++              goto err_out0;
++
+       err = register_pernet_subsys(&br_net_ops);
+       if (err)
+               goto err_out1;
+@@ -430,6 +435,8 @@ err_out3:
+ err_out2:
+       unregister_pernet_subsys(&br_net_ops);
+ err_out1:
++      br_offload_fini();
++err_out0:
+       br_fdb_fini();
+ err_out:
+       stp_proto_unregister(&br_stp_proto);
+@@ -452,6 +459,7 @@ static void __exit br_deinit(void)
+ #if IS_ENABLED(CONFIG_ATM_LANE)
+       br_fdb_test_addr_hook = NULL;
+ #endif
++      br_offload_fini();
+       br_fdb_fini();
+ }
+ 
+--- a/net/bridge/br_device.c
++++ b/net/bridge/br_device.c
+@@ -524,6 +524,8 @@ void br_dev_setup(struct net_device *dev
+       br->bridge_hello_time = br->hello_time = 2 * HZ;
+       br->bridge_forward_delay = br->forward_delay = 15 * HZ;
+       br->bridge_ageing_time = br->ageing_time = BR_DEFAULT_AGEING_TIME;
++      br->offload_cache_size = 128;
++      br->offload_cache_reserved = 8;
+       dev->max_mtu = ETH_MAX_MTU;
+ 
+       br_netfilter_rtable_init(br);
+--- a/net/bridge/br_fdb.c
++++ b/net/bridge/br_fdb.c
+@@ -23,6 +23,7 @@
+ #include <net/switchdev.h>
+ #include <trace/events/bridge.h>
+ #include "br_private.h"
++#include "br_private_offload.h"
+ 
+ static const struct rhashtable_params br_fdb_rht_params = {
+       .head_offset = offsetof(struct net_bridge_fdb_entry, rhnode),
+@@ -185,6 +185,8 @@ static void fdb_notify(struct net_bridge
+       struct sk_buff *skb;
+       int err = -ENOBUFS;
+ 
++      br_offload_fdb_update(fdb);
++
+       if (swdev_notify)
+               br_switchdev_fdb_notify(br, fdb, type);
+ 
+@@ -518,6 +519,8 @@ static struct net_bridge_fdb_entry *fdb_
+       fdb->key.vlan_id = vid;
+       fdb->flags = flags;
+       fdb->updated = fdb->used = jiffies;
++      INIT_HLIST_HEAD(&fdb->offload_in);
++      INIT_HLIST_HEAD(&fdb->offload_out);
+       err = rhashtable_lookup_insert_fast(&br->fdb_hash_tbl, &fdb->rhnode,
+                                           br_fdb_rht_params);
+       if (err) {
+--- a/net/bridge/br_forward.c
++++ b/net/bridge/br_forward.c
+@@ -16,6 +16,7 @@
+ #include <linux/if_vlan.h>
+ #include <linux/netfilter_bridge.h>
+ #include "br_private.h"
++#include "br_private_offload.h"
+ 
+ /* Don't forward packets to originating port or forwarding disabled */
+ static inline int should_deliver(const struct net_bridge_port *p,
+@@ -32,6 +33,8 @@ static inline int should_deliver(const s
+ 
+ int br_dev_queue_push_xmit(struct net *net, struct sock *sk, struct sk_buff *skb)
+ {
++      br_offload_output(skb);
++
+       skb_push(skb, ETH_HLEN);
+       if (!is_skb_forwardable(skb->dev, skb))
+               goto drop;
+--- a/net/bridge/br_if.c
++++ b/net/bridge/br_if.c
+@@ -25,6 +25,7 @@
+ #include <net/net_namespace.h>
+ 
+ #include "br_private.h"
++#include "br_private_offload.h"
+ 
+ /*
+  * Determine initial path cost based on speed.
+@@ -428,7 +429,7 @@ static struct net_bridge_port *new_nbp(s
+       p->path_cost = port_cost(dev);
+       p->priority = 0x8000 >> BR_PORT_BITS;
+       p->port_no = index;
+-      p->flags = BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD | BR_BCAST_FLOOD;
++      p->flags = BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD | BR_BCAST_FLOOD | BR_OFFLOAD;
+       br_init_port(p);
+       br_set_state(p, BR_STATE_DISABLED);
+       br_stp_port_timer_init(p);
+@@ -771,6 +772,9 @@ void br_port_flags_change(struct net_bri
+ 
+       if (mask & BR_NEIGH_SUPPRESS)
+               br_recalculate_neigh_suppress_enabled(br);
++
++      if (mask & BR_OFFLOAD)
++              br_offload_port_state(p);
+ }
+ 
+ bool br_port_flag_is_set(const struct net_device *dev, unsigned long flag)
+--- a/net/bridge/br_input.c
++++ b/net/bridge/br_input.c
+@@ -22,6 +22,7 @@
+ #include <linux/rculist.h>
+ #include "br_private.h"
+ #include "br_private_tunnel.h"
++#include "br_private_offload.h"
+ 
+ static int
+ br_netif_receive_skb(struct net *net, struct sock *sk, struct sk_buff *skb)
+@@ -171,6 +172,7 @@ int br_handle_frame_finish(struct net *n
+                       dst->used = now;
+               br_forward(dst->dst, skb, local_rcv, false);
+       } else {
++              br_offload_skb_disable(skb);
+               if (!mcast_hit)
+                       br_flood(br, skb, pkt_type, local_rcv, false);
+               else
+@@ -304,6 +306,9 @@ static rx_handler_result_t br_handle_fra
+       memset(skb->cb, 0, sizeof(struct br_input_skb_cb));
+ 
+       p = br_port_get_rcu(skb->dev);
++      if (br_offload_input(p, skb))
++              return RX_HANDLER_CONSUMED;
++
+       if (p->flags & BR_VLAN_TUNNEL)
+               br_handle_ingress_vlan_tunnel(skb, p, nbp_vlan_group_rcu(p));
+ 
+--- /dev/null
++++ b/net/bridge/br_offload.c
+@@ -0,0 +1,438 @@
++// SPDX-License-Identifier: GPL-2.0-only
++#include <linux/kernel.h>
++#include <linux/workqueue.h>
++#include "br_private.h"
++#include "br_private_offload.h"
++
++static DEFINE_SPINLOCK(offload_lock);
++
++struct bridge_flow_key {
++      u8 dest[ETH_ALEN];
++      u8 src[ETH_ALEN];
++#ifdef CONFIG_BRIDGE_VLAN_FILTERING
++      u16 vlan_tag;
++      bool vlan_present;
++#endif
++};
++
++struct bridge_flow {
++      struct net_bridge_port *port;
++      struct rhash_head node;
++      struct bridge_flow_key key;
++#ifdef CONFIG_BRIDGE_VLAN_FILTERING
++      bool vlan_out_present;
++      u16 vlan_out;
++#endif
++
++      unsigned long used;
++      struct net_bridge_fdb_entry *fdb_in, *fdb_out;
++      struct hlist_node fdb_list_in, fdb_list_out;
++
++      struct rcu_head rcu;
++};
++
++static const struct rhashtable_params flow_params = {
++      .automatic_shrinking = true,
++      .head_offset = offsetof(struct bridge_flow, node),
++      .key_len = sizeof(struct bridge_flow_key),
++      .key_offset = offsetof(struct bridge_flow, key),
++};
++
++static struct kmem_cache *offload_cache __read_mostly;
++
++static void
++flow_rcu_free(struct rcu_head *head)
++{
++      struct bridge_flow *flow;
++
++      flow = container_of(head, struct bridge_flow, rcu);
++      kmem_cache_free(offload_cache, flow);
++}
++
++static void
++__br_offload_flow_free(struct bridge_flow *flow)
++{
++      flow->used = 0;
++      hlist_del(&flow->fdb_list_in);
++      hlist_del(&flow->fdb_list_out);
++
++      call_rcu(&flow->rcu, flow_rcu_free);
++}
++
++static void
++br_offload_flow_free(struct bridge_flow *flow)
++{
++      if (rhashtable_remove_fast(&flow->port->offload.rht, &flow->node,
++                                 flow_params) != 0)
++              return;
++
++      __br_offload_flow_free(flow);
++}
++
++static bool
++br_offload_flow_fdb_refresh_time(struct bridge_flow *flow,
++                               struct net_bridge_fdb_entry *fdb)
++{
++      if (!time_after(flow->used, fdb->updated))
++              return false;
++
++      fdb->updated = flow->used;
++
++      return true;
++}
++
++
++static void
++br_offload_flow_refresh_time(struct bridge_flow *flow)
++{
++      br_offload_flow_fdb_refresh_time(flow, flow->fdb_in);
++      br_offload_flow_fdb_refresh_time(flow, flow->fdb_out);
++}
++
++static void
++br_offload_destroy_cb(void *ptr, void *arg)
++{
++      struct bridge_flow *flow = ptr;
++
++      __br_offload_flow_free(flow);
++}
++
++static bool
++br_offload_need_gc(struct net_bridge_port *p)
++{
++      return (atomic_read(&p->offload.rht.nelems) +
++              p->br->offload_cache_reserved) >= p->br->offload_cache_size;
++}
++
++static void
++br_offload_gc_work(struct work_struct *work)
++{
++      struct rhashtable_iter hti;
++      struct net_bridge_port *p;
++      struct bridge_flow *gc_flow = NULL;
++      struct bridge_flow *flow;
++      unsigned long gc_used;
++
++      p = container_of(work, struct net_bridge_port, offload.gc_work);
++
++      if (!br_offload_need_gc(p))
++              return;
++
++      rhashtable_walk_enter(&p->offload.rht, &hti);
++      rhashtable_walk_start(&hti);
++      while ((flow = rhashtable_walk_next(&hti)) != NULL) {
++              unsigned long used;
++
++              if (IS_ERR(flow))
++                      continue;
++
++              used = READ_ONCE(flow->used);
++              if (!used)
++                      continue;
++
++              if (gc_flow && !time_before(used, gc_used))
++                      continue;
++
++              gc_flow = flow;
++              gc_used = used;
++      }
++      rhashtable_walk_stop(&hti);
++      rhashtable_walk_exit(&hti);
++
++      if (!gc_flow)
++              return;
++
++      spin_lock_bh(&offload_lock);
++      if (br_offload_need_gc(p) && gc_flow &&
++          gc_flow->used == gc_used)
++              br_offload_flow_free(gc_flow);
++      if (p->offload.enabled && br_offload_need_gc(p))
++              queue_work(system_long_wq, work);
++      spin_unlock_bh(&offload_lock);
++
++}
++
++void br_offload_port_state(struct net_bridge_port *p)
++{
++      struct net_bridge_port_offload *o = &p->offload;
++      bool enabled = true;
++      bool flush = false;
++
++      if (p->state != BR_STATE_FORWARDING ||
++          !(p->flags & BR_OFFLOAD))
++              enabled = false;
++
++      spin_lock_bh(&offload_lock);
++      if (o->enabled == enabled)
++              goto out;
++
++      if (enabled) {
++              if (!o->gc_work.func)
++                      INIT_WORK(&o->gc_work, br_offload_gc_work);
++              rhashtable_init(&o->rht, &flow_params);
++      } else {
++              flush = true;
++              rhashtable_free_and_destroy(&o->rht, br_offload_destroy_cb, o);
++      }
++
++      o->enabled = enabled;
++
++out:
++      spin_unlock_bh(&offload_lock);
++
++      if (flush)
++              flush_work(&o->gc_work);
++}
++
++void br_offload_fdb_update(const struct net_bridge_fdb_entry *fdb)
++{
++      struct bridge_flow *f;
++      struct hlist_node *tmp;
++
++      spin_lock_bh(&offload_lock);
++
++      hlist_for_each_entry_safe(f, tmp, &fdb->offload_in, fdb_list_in)
++              br_offload_flow_free(f);
++
++      hlist_for_each_entry_safe(f, tmp, &fdb->offload_out, fdb_list_out)
++              br_offload_flow_free(f);
++
++      spin_unlock_bh(&offload_lock);
++}
++
++static void
++br_offload_prepare_key(struct net_bridge_port *p, struct bridge_flow_key *key,
++                     struct sk_buff *skb)
++{
++      memset(key, 0, sizeof(*key));
++      memcpy(key, eth_hdr(skb), 2 * ETH_ALEN);
++#ifdef CONFIG_BRIDGE_VLAN_FILTERING
++      if (!br_opt_get(p->br, BROPT_VLAN_ENABLED))
++              return;
++
++      if (!skb_vlan_tag_present(skb) || skb->vlan_proto != p->br->vlan_proto)
++              return;
++
++      key->vlan_present = true;
++      key->vlan_tag = skb_vlan_tag_get_id(skb);
++#endif
++}
++
++void br_offload_output(struct sk_buff *skb)
++{
++      struct net_bridge_port_offload *o;
++      struct br_input_skb_cb *cb = (struct br_input_skb_cb *)skb->cb;
++      struct net_bridge_port *p, *inp;
++      struct net_device *dev;
++      struct net_bridge_fdb_entry *fdb_in, *fdb_out;
++      struct net_bridge_vlan_group *vg;
++      struct bridge_flow_key key;
++      struct bridge_flow *flow;
++      u16 vlan;
++
++      if (!cb->offload)
++              return;
++
++      rcu_read_lock();
++
++      p = br_port_get_rcu(skb->dev);
++      if (!p)
++              goto out;
++
++      o = &p->offload;
++      if (!o->enabled)
++              goto out;
++
++      if (atomic_read(&p->offload.rht.nelems) >= p->br->offload_cache_size)
++              goto out;
++
++      dev = dev_get_by_index_rcu(dev_net(p->br->dev), cb->input_ifindex);
++      if (!dev)
++              goto out;
++
++      inp = br_port_get_rcu(dev);
++      if (!inp)
++              goto out;
++
++      vg = nbp_vlan_group_rcu(inp);
++      vlan = cb->input_vlan_present ? cb->input_vlan_tag : br_get_pvid(vg);
++      fdb_in = br_fdb_find_rcu(p->br, eth_hdr(skb)->h_source, vlan);
++      if (!fdb_in || !fdb_in->dst)
++              goto out;
++
++      vg = nbp_vlan_group_rcu(p);
++      vlan = skb_vlan_tag_present(skb) ? skb_vlan_tag_get_id(skb) : br_get_pvid(vg);
++      fdb_out = br_fdb_find_rcu(p->br, eth_hdr(skb)->h_dest, vlan);
++      if (!fdb_out || !fdb_out->dst)
++              goto out;
++
++      br_offload_prepare_key(p, &key, skb);
++#ifdef CONFIG_BRIDGE_VLAN_FILTERING
++      key.vlan_present = cb->input_vlan_present;
++      key.vlan_tag = cb->input_vlan_tag;
++#endif
++
++      flow = kmem_cache_alloc(offload_cache, GFP_ATOMIC);
++      flow->port = inp;
++      memcpy(&flow->key, &key, sizeof(key));
++
++#ifdef CONFIG_BRIDGE_VLAN_FILTERING
++      flow->vlan_out_present = skb_vlan_tag_present(skb);
++      flow->vlan_out = skb_vlan_tag_get(skb);
++#endif
++
++      flow->fdb_in = fdb_in;
++      flow->fdb_out = fdb_out;
++      flow->used = jiffies;
++
++      spin_lock_bh(&offload_lock);
++      if (!o->enabled ||
++          atomic_read(&p->offload.rht.nelems) >= p->br->offload_cache_size ||
++          rhashtable_insert_fast(&inp->offload.rht, &flow->node, flow_params)) {
++              kmem_cache_free(offload_cache, flow);
++              goto out_unlock;
++      }
++
++      hlist_add_head(&flow->fdb_list_in, &fdb_in->offload_in);
++      hlist_add_head(&flow->fdb_list_out, &fdb_out->offload_out);
++
++      if (br_offload_need_gc(p))
++              queue_work(system_long_wq, &p->offload.gc_work);
++
++out_unlock:
++      spin_unlock_bh(&offload_lock);
++
++out:
++      rcu_read_unlock();
++}
++
++bool br_offload_input(struct net_bridge_port *p, struct sk_buff *skb)
++{
++      struct net_bridge_port_offload *o = &p->offload;
++      struct br_input_skb_cb *cb = (struct br_input_skb_cb *)skb->cb;
++      struct bridge_flow_key key;
++      struct net_bridge_port *dst;
++      struct bridge_flow *flow;
++      unsigned long now = jiffies;
++      bool ret = false;
++
++      if (skb->len < sizeof(key))
++              return false;
++
++      if (!o->enabled)
++              return false;
++
++      if (is_multicast_ether_addr(eth_hdr(skb)->h_dest))
++              return false;
++
++      br_offload_prepare_key(p, &key, skb);
++
++      rcu_read_lock();
++      flow = rhashtable_lookup(&o->rht, &key, flow_params);
++      if (!flow) {
++              cb->offload = 1;
++#ifdef CONFIG_BRIDGE_VLAN_FILTERING
++              cb->input_vlan_present = key.vlan_present != 0;
++              cb->input_vlan_tag = key.vlan_tag;
++#endif
++              cb->input_ifindex = p->dev->ifindex;
++              goto out;
++      }
++
++      if (flow->fdb_in->dst != p)
++              goto out;
++
++      dst = flow->fdb_out->dst;
++      if (!dst)
++              goto out;
++
++      ret = true;
++#ifdef CONFIG_BRIDGE_VLAN_FILTERING
++      if (!flow->vlan_out_present && key.vlan_present) {
++              __vlan_hwaccel_clear_tag(skb);
++      } else if (flow->vlan_out_present) {
++              if (skb_vlan_tag_present(skb) &&
++                  skb->vlan_proto != p->br->vlan_proto) {
++                      /* Protocol-mismatch, empty out vlan_tci for new tag */
++                      skb_push(skb, ETH_HLEN);
++                      skb = vlan_insert_tag_set_proto(skb, skb->vlan_proto,
++                                                      skb_vlan_tag_get(skb));
++                      if (unlikely(!skb))
++                              goto out;
++
++                      skb_pull(skb, ETH_HLEN);
++                      skb_reset_mac_len(skb);
++              }
++
++              __vlan_hwaccel_put_tag(skb, p->br->vlan_proto,
++                                     flow->vlan_out);
++      }
++#endif
++
++      skb->dev = dst->dev;
++      skb_push(skb, ETH_HLEN);
++
++      if (skb_warn_if_lro(skb) || !is_skb_forwardable(skb->dev, skb)) {
++              kfree_skb(skb);
++              goto out;
++      }
++
++      if (now - flow->used >= HZ) {
++              flow->used = now;
++              br_offload_flow_refresh_time(flow);
++      }
++
++      skb_forward_csum(skb);
++      dev_queue_xmit(skb);
++
++out:
++      rcu_read_unlock();
++      return ret;
++}
++
++static void
++br_offload_check_gc(struct net_bridge *br)
++{
++      struct net_bridge_port *p;
++
++      spin_lock_bh(&br->lock);
++      list_for_each_entry(p, &br->port_list, list)
++              if (br_offload_need_gc(p))
++                      queue_work(system_long_wq, &p->offload.gc_work);
++      spin_unlock_bh(&br->lock);
++}
++
++
++int br_offload_set_cache_size(struct net_bridge *br, unsigned long val,
++                             struct netlink_ext_ack *extack)
++{
++      br->offload_cache_size = val;
++      br_offload_check_gc(br);
++
++      return 0;
++}
++
++int br_offload_set_cache_reserved(struct net_bridge *br, unsigned long val,
++                                 struct netlink_ext_ack *extack)
++{
++      br->offload_cache_reserved = val;
++      br_offload_check_gc(br);
++
++      return 0;
++}
++
++int __init br_offload_init(void)
++{
++      offload_cache = kmem_cache_create("bridge_offload_cache",
++                                        sizeof(struct bridge_flow),
++                                        0, SLAB_HWCACHE_ALIGN, NULL);
++      if (!offload_cache)
++              return -ENOMEM;
++
++      return 0;
++}
++
++void br_offload_fini(void)
++{
++      kmem_cache_destroy(offload_cache);
++}
+--- a/net/bridge/br_private.h
++++ b/net/bridge/br_private.h
+@@ -268,7 +268,13 @@ struct net_bridge_fdb_entry {
+       unsigned long                   updated ____cacheline_aligned_in_smp;
+       unsigned long                   used;
+ 
+-      struct rcu_head                 rcu;
++      union {
++              struct {
++                      struct hlist_head               offload_in;
++                      struct hlist_head               offload_out;
++              };
++              struct rcu_head                 rcu;
++      };
+ };
+ 
+ #define MDB_PG_FLAGS_PERMANENT        BIT(0)
+@@ -343,6 +349,12 @@ struct net_bridge_mdb_entry {
+       struct rcu_head                 rcu;
+ };
+ 
++struct net_bridge_port_offload {
++      struct rhashtable               rht;
++      struct work_struct              gc_work;
++      bool                            enabled;
++};
++
+ struct net_bridge_port {
+       struct net_bridge               *br;
+       struct net_device               *dev;
+@@ -403,6 +415,7 @@ struct net_bridge_port {
+       u16                             backup_redirected_cnt;
+ 
+       struct bridge_stp_xstats        stp_xstats;
++      struct net_bridge_port_offload  offload;
+ };
+ 
+ #define kobj_to_brport(obj)   container_of(obj, struct net_bridge_port, kobj)
+@@ -519,6 +532,9 @@ struct net_bridge {
+       struct kobject                  *ifobj;
+       u32                             auto_cnt;
+ 
++      u32                             offload_cache_size;
++      u32                             offload_cache_reserved;
++
+ #ifdef CONFIG_NET_SWITCHDEV
+       /* Counter used to make sure that hardware domains get unique
+        * identifiers in case a bridge spans multiple switchdev instances.
+@@ -553,6 +569,10 @@ struct br_input_skb_cb {
+ #ifdef CONFIG_NETFILTER_FAMILY_BRIDGE
+       u8 br_netfilter_broute:1;
+ #endif
++      u8 offload:1;
++      u8 input_vlan_present:1;
++      u16 input_vlan_tag;
++      int input_ifindex;
+ 
+ #ifdef CONFIG_NET_SWITCHDEV
+       /* Set if TX data plane offloading is used towards at least one
+--- /dev/null
++++ b/net/bridge/br_private_offload.h
+@@ -0,0 +1,23 @@
++#ifndef __BR_OFFLOAD_H
++#define __BR_OFFLOAD_H
++
++bool br_offload_input(struct net_bridge_port *p, struct sk_buff *skb);
++void br_offload_output(struct sk_buff *skb);
++void br_offload_port_state(struct net_bridge_port *p);
++void br_offload_fdb_update(const struct net_bridge_fdb_entry *fdb);
++int br_offload_init(void);
++void br_offload_fini(void);
++int br_offload_set_cache_size(struct net_bridge *br, unsigned long val,
++                             struct netlink_ext_ack *extack);
++int br_offload_set_cache_reserved(struct net_bridge *br, unsigned long val,
++                                 struct netlink_ext_ack *extack);
++
++static inline void br_offload_skb_disable(struct sk_buff *skb)
++{
++      struct br_input_skb_cb *cb = (struct br_input_skb_cb *)skb->cb;
++
++      if (cb->offload)
++              cb->offload = 0;
++}
++
++#endif
+--- a/net/bridge/br_stp.c
++++ b/net/bridge/br_stp.c
+@@ -12,6 +12,7 @@
+ 
+ #include "br_private.h"
+ #include "br_private_stp.h"
++#include "br_private_offload.h"
+ 
+ /* since time values in bpdu are in jiffies and then scaled (1/256)
+  * before sending, make sure that is at least one STP tick.
+@@ -52,6 +53,8 @@ void br_set_state(struct net_bridge_port
+                               (unsigned int) p->port_no, p->dev->name,
+                               br_port_state_names[p->state]);
+ 
++      br_offload_port_state(p);
++
+       if (p->br->stp_enabled == BR_KERNEL_STP) {
+               switch (p->state) {
+               case BR_STATE_BLOCKING:
+--- a/net/bridge/br_sysfs_br.c
++++ b/net/bridge/br_sysfs_br.c
+@@ -18,6 +18,7 @@
+ #include <linux/sched/signal.h>
+ 
+ #include "br_private.h"
++#include "br_private_offload.h"
+ 
+ /* IMPORTANT: new bridge options must be added with netlink support only
+  *            please do not add new sysfs entries
+@@ -930,6 +931,38 @@ static ssize_t vlan_stats_per_port_store
+ static DEVICE_ATTR_RW(vlan_stats_per_port);
+ #endif
+ 
++static ssize_t offload_cache_size_show(struct device *d,
++                                     struct device_attribute *attr,
++                                     char *buf)
++{
++      struct net_bridge *br = to_bridge(d);
++      return sprintf(buf, "%u\n", br->offload_cache_size);
++}
++
++static ssize_t offload_cache_size_store(struct device *d,
++                                      struct device_attribute *attr,
++                                      const char *buf, size_t len)
++{
++      return store_bridge_parm(d, buf, len, br_offload_set_cache_size);
++}
++static DEVICE_ATTR_RW(offload_cache_size);
++
++static ssize_t offload_cache_reserved_show(struct device *d,
++                                     struct device_attribute *attr,
++                                     char *buf)
++{
++      struct net_bridge *br = to_bridge(d);
++      return sprintf(buf, "%u\n", br->offload_cache_reserved);
++}
++
++static ssize_t offload_cache_reserved_store(struct device *d,
++                                      struct device_attribute *attr,
++                                      const char *buf, size_t len)
++{
++      return store_bridge_parm(d, buf, len, br_offload_set_cache_reserved);
++}
++static DEVICE_ATTR_RW(offload_cache_reserved);
++
+ static struct attribute *bridge_attrs[] = {
+       &dev_attr_forward_delay.attr,
+       &dev_attr_hello_time.attr,
+@@ -984,6 +1017,8 @@ static struct attribute *bridge_attrs[]
+       &dev_attr_vlan_stats_enabled.attr,
+       &dev_attr_vlan_stats_per_port.attr,
+ #endif
++      &dev_attr_offload_cache_size.attr,
++      &dev_attr_offload_cache_reserved.attr,
+       NULL
+ };
+ 
+--- a/net/bridge/br_sysfs_if.c
++++ b/net/bridge/br_sysfs_if.c
+@@ -241,6 +241,7 @@ BRPORT_ATTR_FLAG(broadcast_flood, BR_BCA
+ BRPORT_ATTR_FLAG(neigh_suppress, BR_NEIGH_SUPPRESS);
+ BRPORT_ATTR_FLAG(isolated, BR_ISOLATED);
+ BRPORT_ATTR_FLAG(bpdu_filter, BR_BPDU_FILTER);
++BRPORT_ATTR_FLAG(offload, BR_OFFLOAD);
+ 
+ #ifdef CONFIG_BRIDGE_IGMP_SNOOPING
+ static ssize_t show_multicast_router(struct net_bridge_port *p, char *buf)
+@@ -295,6 +296,7 @@ static const struct brport_attribute *br
+       &brport_attr_isolated,
+       &brport_attr_bpdu_filter,
+       &brport_attr_backup_port,
++      &brport_attr_offload,
+       NULL
+ };
+ 
+--- a/net/bridge/br_vlan_tunnel.c
++++ b/net/bridge/br_vlan_tunnel.c
+@@ -15,6 +15,7 @@
+ 
+ #include "br_private.h"
+ #include "br_private_tunnel.h"
++#include "br_private_offload.h"
+ 
+ static inline int br_vlan_tunid_cmp(struct rhashtable_compare_arg *arg,
+                                   const void *ptr)
+@@ -180,6 +181,7 @@ void br_handle_ingress_vlan_tunnel(struc
+       skb_dst_drop(skb);
+ 
+       __vlan_hwaccel_put_tag(skb, p->br->vlan_proto, vlan->vid);
++      br_offload_skb_disable(skb);
+ }
+ 
+ int br_handle_egress_vlan_tunnel(struct sk_buff *skb,
+@@ -201,6 +203,7 @@ int br_handle_egress_vlan_tunnel(struct
+       if (err)
+               return err;
+ 
++      br_offload_skb_disable(skb);
+       tunnel_dst = rcu_dereference(vlan->tinfo.tunnel_dst);
+       if (tunnel_dst && dst_hold_safe(&tunnel_dst->dst))
+               skb_dst_set(skb, &tunnel_dst->dst);

diff --git a/target/linux/generic/hack-6.0/645-netfilter-connmark-introduce-set-dscpmark.patch b/target/linux/generic/hack-6.0/645-netfilter-connmark-introduce-set-dscpmark.patch
new file mode 100644 (file)
index 0000000..2d3fe01
--- /dev/null
+++ b/target/linux/generic/hack-6.0/645-netfilter-connmark-introduce-set-dscpmark.patch
@@ -0,0 +1,212 @@
+From eda40b8c8c82e0f2789d6bc8bf63846dce2e8f32 Mon Sep 17 00:00:00 2001
+From: Kevin Darbyshire-Bryant <[email protected]>
+Date: Sat, 23 Mar 2019 09:29:49 +0000
+Subject: [PATCH] netfilter: connmark: introduce set-dscpmark
+
+set-dscpmark is a method of storing the DSCP of an ip packet into
+conntrack mark.  In combination with a suitable tc filter action
+(act_ctinfo) DSCP values are able to be stored in the mark on egress and
+restored on ingress across links that otherwise alter or bleach DSCP.
+
+This is useful for qdiscs such as CAKE which are able to shape according
+to policies based on DSCP.
+
+Ingress classification is traditionally a challenging task since
+iptables rules haven't yet run and tc filter/eBPF programs are pre-NAT
+lookups, hence are unable to see internal IPv4 addresses as used on the
+typical home masquerading gateway.
+
+x_tables CONNMARK set-dscpmark target solves the problem of storing the
+DSCP to the conntrack mark in a way suitable for the new act_ctinfo tc
+action to restore.
+
+The set-dscpmark option accepts 2 parameters, a 32bit 'dscpmask' and a
+32bit 'statemask'.  The dscp mask must be 6 contiguous bits and
+represents the area where the DSCP will be stored in the connmark.  The
+state mask is a minimum 1 bit length mask that must not overlap with the
+dscpmask.  It represents a flag which is set when the DSCP has been
+stored in the conntrack mark. This is useful to implement a 'one shot'
+iptables based classification where the 'complicated' iptables rules are
+only run once to classify the connection on initial (egress) packet and
+subsequent packets are all marked/restored with the same DSCP.  A state
+mask of zero disables the setting of a status bit/s.
+
+example syntax with a suitably modified iptables user space application:
+
+iptables -A QOS_MARK_eth0 -t mangle -j CONNMARK --set-dscpmark 0xfc000000/0x01000000
+
+Would store the DSCP in the top 6 bits of the 32bit mark field, and use
+the LSB of the top byte as the 'DSCP has been stored' marker.
+
+|----0xFC----conntrack mark----000000---|
+| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0|
+| DSCP       | unused | flag  |unused   |
+|-----------------------0x01---000000---|
+      ^                   ^
+      |                   |
+      ---|             Conditional flag
+         |             set this when dscp
+|-ip diffserv-|        stored in mark
+| 6 bits      |
+|-------------|
+
+an identically configured tc action to restore looks like:
+
+tc filter show dev eth0 ingress
+filter parent ffff: protocol all pref 10 u32 chain 0
+filter parent ffff: protocol all pref 10 u32 chain 0 fh 800: ht divisor 1
+filter parent ffff: protocol all pref 10 u32 chain 0 fh 800::800 order 2048 key ht 800 bkt 0 flowid 1: not_in_hw
+  match 00000000/00000000 at 0
+       action order 1: ctinfo zone 0 pipe
+        index 2 ref 1 bind 1 dscp 0xfc000000/0x1000000
+
+       action order 2: mirred (Egress Redirect to device ifb4eth0) stolen
+       index 1 ref 1 bind 1
+
+|----0xFC----conntrack mark----000000---|
+| Bits 31-26 | bit 25 | bit24 |~~~ Bit 0|
+| DSCP       | unused | flag  |unused   |
+|-----------------------0x01---000000---|
+      |                   |
+      |                   |
+      ---|             Conditional flag
+         v             only restore if set
+|-ip diffserv-|
+| 6 bits      |
+|-------------|
+
+Signed-off-by: Kevin Darbyshire-Bryant <[email protected]>
+---
+ include/uapi/linux/netfilter/xt_connmark.h | 10 ++++
+ net/netfilter/xt_connmark.c                | 55 ++++++++++++++++++----
+ 2 files changed, 57 insertions(+), 8 deletions(-)
+
+--- a/include/uapi/linux/netfilter/xt_connmark.h
++++ b/include/uapi/linux/netfilter/xt_connmark.h
+@@ -20,6 +20,11 @@ enum {
+ };
+ 
+ enum {
++      XT_CONNMARK_VALUE =     (1 << 0),
++      XT_CONNMARK_DSCP =      (1 << 1)
++};
++
++enum {
+       D_SHIFT_LEFT = 0,
+       D_SHIFT_RIGHT,
+ };
+@@ -34,6 +39,11 @@ struct xt_connmark_tginfo2 {
+       __u8 shift_dir, shift_bits, mode;
+ };
+ 
++struct xt_connmark_tginfo3 {
++      __u32 ctmark, ctmask, nfmask;
++      __u8 shift_dir, shift_bits, mode, func;
++};
++
+ struct xt_connmark_mtinfo1 {
+       __u32 mark, mask;
+       __u8 invert;
+--- a/net/netfilter/xt_connmark.c
++++ b/net/netfilter/xt_connmark.c
+@@ -24,12 +24,13 @@ MODULE_ALIAS("ipt_connmark");
+ MODULE_ALIAS("ip6t_connmark");
+ 
+ static unsigned int
+-connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo2 *info)
++connmark_tg_shift(struct sk_buff *skb, const struct xt_connmark_tginfo3 *info)
+ {
+       enum ip_conntrack_info ctinfo;
+       u_int32_t new_targetmark;
+       struct nf_conn *ct;
+       u_int32_t newmark;
++      u_int8_t dscp;
+ 
+       ct = nf_ct_get(skb, &ctinfo);
+       if (ct == NULL)
+@@ -37,12 +38,24 @@ connmark_tg_shift(struct sk_buff *skb, c
+ 
+       switch (info->mode) {
+       case XT_CONNMARK_SET:
+-              newmark = (ct->mark & ~info->ctmask) ^ info->ctmark;
+-              if (info->shift_dir == D_SHIFT_RIGHT)
+-                      newmark >>= info->shift_bits;
+-              else
+-                      newmark <<= info->shift_bits;
++              newmark = ct->mark;
++              if (info->func & XT_CONNMARK_VALUE) {
++                      newmark = (newmark & ~info->ctmask) ^ info->ctmark;
++                      if (info->shift_dir == D_SHIFT_RIGHT)
++                              newmark >>= info->shift_bits;
++                      else
++                              newmark <<= info->shift_bits;
++              } else if (info->func & XT_CONNMARK_DSCP) {
++                      if (skb->protocol == htons(ETH_P_IP))
++                              dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
++                      else if (skb->protocol == htons(ETH_P_IPV6))
++                              dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
++                      else    /* protocol doesn't have diffserv */
++                              break;
+ 
++                      newmark = (newmark & ~info->ctmark) |
++                                (info->ctmask | (dscp << info->shift_bits));
++              }
+               if (ct->mark != newmark) {
+                       ct->mark = newmark;
+                       nf_conntrack_event_cache(IPCT_MARK, ct);
+@@ -81,20 +94,36 @@ static unsigned int
+ connmark_tg(struct sk_buff *skb, const struct xt_action_param *par)
+ {
+       const struct xt_connmark_tginfo1 *info = par->targinfo;
+-      const struct xt_connmark_tginfo2 info2 = {
++      const struct xt_connmark_tginfo3 info3 = {
+               .ctmark = info->ctmark,
+               .ctmask = info->ctmask,
+               .nfmask = info->nfmask,
+               .mode   = info->mode,
++              .func   = XT_CONNMARK_VALUE
+       };
+ 
+-      return connmark_tg_shift(skb, &info2);
++      return connmark_tg_shift(skb, &info3);
+ }
+ 
+ static unsigned int
+ connmark_tg_v2(struct sk_buff *skb, const struct xt_action_param *par)
+ {
+       const struct xt_connmark_tginfo2 *info = par->targinfo;
++      const struct xt_connmark_tginfo3 info3 = {
++              .ctmark = info->ctmark,
++              .ctmask = info->ctmask,
++              .nfmask = info->nfmask,
++              .mode   = info->mode,
++              .func   = XT_CONNMARK_VALUE
++      };
++
++      return connmark_tg_shift(skb, &info3);
++}
++
++static unsigned int
++connmark_tg_v3(struct sk_buff *skb, const struct xt_action_param *par)
++{
++      const struct xt_connmark_tginfo3 *info = par->targinfo;
+ 
+       return connmark_tg_shift(skb, info);
+ }
+@@ -165,6 +194,16 @@ static struct xt_target connmark_tg_reg[
+               .targetsize     = sizeof(struct xt_connmark_tginfo2),
+               .destroy        = connmark_tg_destroy,
+               .me             = THIS_MODULE,
++      },
++      {
++              .name           = "CONNMARK",
++              .revision       = 3,
++              .family         = NFPROTO_UNSPEC,
++              .checkentry     = connmark_tg_check,
++              .target         = connmark_tg_v3,
++              .targetsize     = sizeof(struct xt_connmark_tginfo3),
++              .destroy        = connmark_tg_destroy,
++              .me             = THIS_MODULE,
+       }
+ };
+ 

diff --git a/target/linux/generic/hack-6.0/650-netfilter-add-xt_FLOWOFFLOAD-target.patch b/target/linux/generic/hack-6.0/650-netfilter-add-xt_FLOWOFFLOAD-target.patch
new file mode 100644 (file)
index 0000000..94b376d
--- /dev/null
+++ b/target/linux/generic/hack-6.0/650-netfilter-add-xt_FLOWOFFLOAD-target.patch
@@ -0,0 +1,798 @@
+From: Felix Fietkau <[email protected]>
+Date: Tue, 20 Feb 2018 15:56:02 +0100
+Subject: [PATCH] netfilter: add xt_FLOWOFFLOAD target
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ create mode 100644 net/netfilter/xt_OFFLOAD.c
+
+--- a/net/netfilter/Kconfig
++++ b/net/netfilter/Kconfig
+@@ -1011,6 +1010,15 @@ config NETFILTER_XT_TARGET_NOTRACK
+       depends on NETFILTER_ADVANCED
+       select NETFILTER_XT_TARGET_CT
+ 
++config NETFILTER_XT_TARGET_FLOWOFFLOAD
++      tristate '"FLOWOFFLOAD" target support'
++      depends on NF_FLOW_TABLE
++      depends on NETFILTER_INGRESS
++      help
++        This option adds a `FLOWOFFLOAD' target, which uses the nf_flow_offload
++        module to speed up processing of packets by bypassing the usual
++        netfilter chains
++
+ config NETFILTER_XT_TARGET_RATEEST
+       tristate '"RATEEST" target support'
+       depends on NETFILTER_ADVANCED
+--- a/net/netfilter/Makefile
++++ b/net/netfilter/Makefile
+@@ -143,6 +143,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIF
+ obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o
++obj-$(CONFIG_NETFILTER_XT_TARGET_FLOWOFFLOAD) += xt_FLOWOFFLOAD.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_HMARK) += xt_HMARK.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o
+--- /dev/null
++++ b/net/netfilter/xt_FLOWOFFLOAD.c
+@@ -0,0 +1,697 @@
++/*
++ * Copyright (C) 2018-2021 Felix Fietkau <[email protected]>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/netfilter.h>
++#include <linux/netfilter/xt_FLOWOFFLOAD.h>
++#include <linux/if_vlan.h>
++#include <net/ip.h>
++#include <net/netfilter/nf_conntrack.h>
++#include <net/netfilter/nf_conntrack_extend.h>
++#include <net/netfilter/nf_conntrack_helper.h>
++#include <net/netfilter/nf_flow_table.h>
++
++struct xt_flowoffload_hook {
++      struct hlist_node list;
++      struct nf_hook_ops ops;
++      struct net *net;
++      bool registered;
++      bool used;
++};
++
++struct xt_flowoffload_table {
++      struct nf_flowtable ft;
++      struct hlist_head hooks;
++      struct delayed_work work;
++};
++
++struct nf_forward_info {
++      const struct net_device *indev;
++      const struct net_device *outdev;
++      const struct net_device *hw_outdev;
++      struct id {
++              __u16   id;
++              __be16  proto;
++      } encap[NF_FLOW_TABLE_ENCAP_MAX];
++      u8 num_encaps;
++      u8 ingress_vlans;
++      u8 h_source[ETH_ALEN];
++      u8 h_dest[ETH_ALEN];
++      enum flow_offload_xmit_type xmit_type;
++};
++
++static DEFINE_SPINLOCK(hooks_lock);
++
++struct xt_flowoffload_table flowtable[2];
++
++static unsigned int
++xt_flowoffload_net_hook(void *priv, struct sk_buff *skb,
++                      const struct nf_hook_state *state)
++{
++      struct vlan_ethhdr *veth;
++      __be16 proto;
++
++      switch (skb->protocol) {
++      case htons(ETH_P_8021Q):
++              veth = (struct vlan_ethhdr *)skb_mac_header(skb);
++              proto = veth->h_vlan_encapsulated_proto;
++              break;
++      case htons(ETH_P_PPP_SES):
++              proto = nf_flow_pppoe_proto(skb);
++              break;
++      default:
++              proto = skb->protocol;
++              break;
++      }
++
++      switch (proto) {
++      case htons(ETH_P_IP):
++              return nf_flow_offload_ip_hook(priv, skb, state);
++      case htons(ETH_P_IPV6):
++              return nf_flow_offload_ipv6_hook(priv, skb, state);
++      }
++
++      return NF_ACCEPT;
++}
++
++static int
++xt_flowoffload_create_hook(struct xt_flowoffload_table *table,
++                         struct net_device *dev)
++{
++      struct xt_flowoffload_hook *hook;
++      struct nf_hook_ops *ops;
++
++      hook = kzalloc(sizeof(*hook), GFP_ATOMIC);
++      if (!hook)
++              return -ENOMEM;
++
++      ops = &hook->ops;
++      ops->pf = NFPROTO_NETDEV;
++      ops->hooknum = NF_NETDEV_INGRESS;
++      ops->priority = 10;
++      ops->priv = &table->ft;
++      ops->hook = xt_flowoffload_net_hook;
++      ops->dev = dev;
++
++      hlist_add_head(&hook->list, &table->hooks);
++      mod_delayed_work(system_power_efficient_wq, &table->work, 0);
++
++      return 0;
++}
++
++static struct xt_flowoffload_hook *
++flow_offload_lookup_hook(struct xt_flowoffload_table *table,
++                       struct net_device *dev)
++{
++      struct xt_flowoffload_hook *hook;
++
++      hlist_for_each_entry(hook, &table->hooks, list) {
++              if (hook->ops.dev == dev)
++                      return hook;
++      }
++
++      return NULL;
++}
++
++static void
++xt_flowoffload_check_device(struct xt_flowoffload_table *table,
++                          struct net_device *dev)
++{
++      struct xt_flowoffload_hook *hook;
++
++      if (!dev)
++              return;
++
++      spin_lock_bh(&hooks_lock);
++      hook = flow_offload_lookup_hook(table, dev);
++      if (hook)
++              hook->used = true;
++      else
++              xt_flowoffload_create_hook(table, dev);
++      spin_unlock_bh(&hooks_lock);
++}
++
++static void
++xt_flowoffload_register_hooks(struct xt_flowoffload_table *table)
++{
++      struct xt_flowoffload_hook *hook;
++
++restart:
++      hlist_for_each_entry(hook, &table->hooks, list) {
++              if (hook->registered)
++                      continue;
++
++              hook->registered = true;
++              hook->net = dev_net(hook->ops.dev);
++              spin_unlock_bh(&hooks_lock);
++              nf_register_net_hook(hook->net, &hook->ops);
++              if (table->ft.flags & NF_FLOWTABLE_HW_OFFLOAD)
++                      table->ft.type->setup(&table->ft, hook->ops.dev,
++                                            FLOW_BLOCK_BIND);
++              spin_lock_bh(&hooks_lock);
++              goto restart;
++      }
++
++}
++
++static bool
++xt_flowoffload_cleanup_hooks(struct xt_flowoffload_table *table)
++{
++      struct xt_flowoffload_hook *hook;
++      bool active = false;
++
++restart:
++      spin_lock_bh(&hooks_lock);
++      hlist_for_each_entry(hook, &table->hooks, list) {
++              if (hook->used || !hook->registered) {
++                      active = true;
++                      continue;
++              }
++
++              hlist_del(&hook->list);
++              spin_unlock_bh(&hooks_lock);
++              if (table->ft.flags & NF_FLOWTABLE_HW_OFFLOAD)
++                      table->ft.type->setup(&table->ft, hook->ops.dev,
++                                            FLOW_BLOCK_UNBIND);
++              nf_unregister_net_hook(hook->net, &hook->ops);
++              kfree(hook);
++              goto restart;
++      }
++      spin_unlock_bh(&hooks_lock);
++
++      return active;
++}
++
++static void
++xt_flowoffload_check_hook(struct nf_flowtable *flowtable,
++                        struct flow_offload *flow, void *data)
++{
++      struct xt_flowoffload_table *table;
++      struct flow_offload_tuple *tuple0 = &flow->tuplehash[0].tuple;
++      struct flow_offload_tuple *tuple1 = &flow->tuplehash[1].tuple;
++      struct xt_flowoffload_hook *hook;
++
++      table = container_of(flowtable, struct xt_flowoffload_table, ft);
++
++      spin_lock_bh(&hooks_lock);
++      hlist_for_each_entry(hook, &table->hooks, list) {
++              if (hook->ops.dev->ifindex != tuple0->iifidx &&
++                  hook->ops.dev->ifindex != tuple1->iifidx)
++                      continue;
++
++              hook->used = true;
++      }
++      spin_unlock_bh(&hooks_lock);
++}
++
++static void
++xt_flowoffload_hook_work(struct work_struct *work)
++{
++      struct xt_flowoffload_table *table;
++      struct xt_flowoffload_hook *hook;
++      int err;
++
++      table = container_of(work, struct xt_flowoffload_table, work.work);
++
++      spin_lock_bh(&hooks_lock);
++      xt_flowoffload_register_hooks(table);
++      hlist_for_each_entry(hook, &table->hooks, list)
++              hook->used = false;
++      spin_unlock_bh(&hooks_lock);
++
++      err = nf_flow_table_iterate(&table->ft, xt_flowoffload_check_hook,
++                                  NULL);
++      if (err && err != -EAGAIN)
++              goto out;
++
++      if (!xt_flowoffload_cleanup_hooks(table))
++              return;
++
++out:
++      queue_delayed_work(system_power_efficient_wq, &table->work, HZ);
++}
++
++static bool
++xt_flowoffload_skip(struct sk_buff *skb, int family)
++{
++      if (skb_sec_path(skb))
++              return true;
++
++      if (family == NFPROTO_IPV4) {
++              const struct ip_options *opt = &(IPCB(skb)->opt);
++
++              if (unlikely(opt->optlen))
++                      return true;
++      }
++
++      return false;
++}
++
++static enum flow_offload_xmit_type nf_xmit_type(struct dst_entry *dst)
++{
++      if (dst_xfrm(dst))
++              return FLOW_OFFLOAD_XMIT_XFRM;
++
++      return FLOW_OFFLOAD_XMIT_NEIGH;
++}
++
++static void nf_default_forward_path(struct nf_flow_route *route,
++                                  struct dst_entry *dst_cache,
++                                  enum ip_conntrack_dir dir,
++                                  struct net_device **dev)
++{
++      dev[!dir] = dst_cache->dev;
++      route->tuple[!dir].in.ifindex   = dst_cache->dev->ifindex;
++      route->tuple[dir].dst           = dst_cache;
++      route->tuple[dir].xmit_type     = nf_xmit_type(dst_cache);
++}
++
++static bool nf_is_valid_ether_device(const struct net_device *dev)
++{
++      if (!dev || (dev->flags & IFF_LOOPBACK) || dev->type != ARPHRD_ETHER ||
++          dev->addr_len != ETH_ALEN || !is_valid_ether_addr(dev->dev_addr))
++              return false;
++
++      return true;
++}
++
++static void nf_dev_path_info(const struct net_device_path_stack *stack,
++                           struct nf_forward_info *info,
++                           unsigned char *ha)
++{
++      const struct net_device_path *path;
++      int i;
++
++      memcpy(info->h_dest, ha, ETH_ALEN);
++
++      for (i = 0; i < stack->num_paths; i++) {
++              path = &stack->path[i];
++              switch (path->type) {
++              case DEV_PATH_ETHERNET:
++              case DEV_PATH_DSA:
++              case DEV_PATH_VLAN:
++              case DEV_PATH_PPPOE:
++                      info->indev = path->dev;
++                      if (is_zero_ether_addr(info->h_source))
++                              memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN);
++
++                      if (path->type == DEV_PATH_ETHERNET)
++                              break;
++                      if (path->type == DEV_PATH_DSA) {
++                              i = stack->num_paths;
++                              break;
++                      }
++
++                      /* DEV_PATH_VLAN and DEV_PATH_PPPOE */
++                      if (info->num_encaps >= NF_FLOW_TABLE_ENCAP_MAX) {
++                              info->indev = NULL;
++                              break;
++                      }
++                      if (!info->outdev)
++                              info->outdev = path->dev;
++                      info->encap[info->num_encaps].id = path->encap.id;
++                      info->encap[info->num_encaps].proto = path->encap.proto;
++                      info->num_encaps++;
++                      if (path->type == DEV_PATH_PPPOE)
++                              memcpy(info->h_dest, path->encap.h_dest, ETH_ALEN);
++                      break;
++              case DEV_PATH_BRIDGE:
++                      if (is_zero_ether_addr(info->h_source))
++                              memcpy(info->h_source, path->dev->dev_addr, ETH_ALEN);
++
++                      switch (path->bridge.vlan_mode) {
++                      case DEV_PATH_BR_VLAN_UNTAG_HW:
++                              info->ingress_vlans |= BIT(info->num_encaps - 1);
++                              break;
++                      case DEV_PATH_BR_VLAN_TAG:
++                              info->encap[info->num_encaps].id = path->bridge.vlan_id;
++                              info->encap[info->num_encaps].proto = path->bridge.vlan_proto;
++                              info->num_encaps++;
++                              break;
++                      case DEV_PATH_BR_VLAN_UNTAG:
++                              info->num_encaps--;
++                              break;
++                      case DEV_PATH_BR_VLAN_KEEP:
++                              break;
++                      }
++                      break;
++              default:
++                      info->indev = NULL;
++                      break;
++              }
++      }
++      if (!info->outdev)
++              info->outdev = info->indev;
++
++      info->hw_outdev = info->indev;
++
++      if (nf_is_valid_ether_device(info->indev))
++              info->xmit_type = FLOW_OFFLOAD_XMIT_DIRECT;
++}
++
++static int nf_dev_fill_forward_path(const struct nf_flow_route *route,
++                                   const struct dst_entry *dst_cache,
++                                   const struct nf_conn *ct,
++                                   enum ip_conntrack_dir dir, u8 *ha,
++                                   struct net_device_path_stack *stack)
++{
++      const void *daddr = &ct->tuplehash[!dir].tuple.src.u3;
++      struct net_device *dev = dst_cache->dev;
++      struct neighbour *n;
++      u8 nud_state;
++
++      if (!nf_is_valid_ether_device(dev))
++              goto out;
++
++      n = dst_neigh_lookup(dst_cache, daddr);
++      if (!n)
++              return -1;
++
++      read_lock_bh(&n->lock);
++      nud_state = n->nud_state;
++      ether_addr_copy(ha, n->ha);
++      read_unlock_bh(&n->lock);
++      neigh_release(n);
++
++      if (!(nud_state & NUD_VALID))
++              return -1;
++
++out:
++      return dev_fill_forward_path(dev, ha, stack);
++}
++
++static void nf_dev_forward_path(struct nf_flow_route *route,
++                              const struct nf_conn *ct,
++                              enum ip_conntrack_dir dir,
++                              struct net_device **devs)
++{
++      const struct dst_entry *dst = route->tuple[dir].dst;
++      struct net_device_path_stack stack;
++      struct nf_forward_info info = {};
++      unsigned char ha[ETH_ALEN];
++      int i;
++
++      if (nf_dev_fill_forward_path(route, dst, ct, dir, ha, &stack) >= 0)
++              nf_dev_path_info(&stack, &info, ha);
++
++      devs[!dir] = (struct net_device *)info.indev;
++      if (!info.indev)
++              return;
++
++      route->tuple[!dir].in.ifindex = info.indev->ifindex;
++      for (i = 0; i < info.num_encaps; i++) {
++              route->tuple[!dir].in.encap[i].id = info.encap[i].id;
++              route->tuple[!dir].in.encap[i].proto = info.encap[i].proto;
++      }
++      route->tuple[!dir].in.num_encaps = info.num_encaps;
++      route->tuple[!dir].in.ingress_vlans = info.ingress_vlans;
++
++      if (info.xmit_type == FLOW_OFFLOAD_XMIT_DIRECT) {
++              memcpy(route->tuple[dir].out.h_source, info.h_source, ETH_ALEN);
++              memcpy(route->tuple[dir].out.h_dest, info.h_dest, ETH_ALEN);
++              route->tuple[dir].out.ifindex = info.outdev->ifindex;
++              route->tuple[dir].out.hw_ifindex = info.hw_outdev->ifindex;
++              route->tuple[dir].xmit_type = info.xmit_type;
++      }
++}
++
++static int
++xt_flowoffload_route(struct sk_buff *skb, const struct nf_conn *ct,
++                   const struct xt_action_param *par,
++                   struct nf_flow_route *route, enum ip_conntrack_dir dir,
++                   struct net_device **devs)
++{
++      struct dst_entry *this_dst = skb_dst(skb);
++      struct dst_entry *other_dst = NULL;
++      struct flowi fl;
++
++      memset(&fl, 0, sizeof(fl));
++      switch (xt_family(par)) {
++      case NFPROTO_IPV4:
++              fl.u.ip4.daddr = ct->tuplehash[dir].tuple.src.u3.ip;
++              fl.u.ip4.flowi4_oif = xt_in(par)->ifindex;
++              break;
++      case NFPROTO_IPV6:
++              fl.u.ip6.saddr = ct->tuplehash[!dir].tuple.dst.u3.in6;
++              fl.u.ip6.daddr = ct->tuplehash[dir].tuple.src.u3.in6;
++              fl.u.ip6.flowi6_oif = xt_in(par)->ifindex;
++              break;
++      }
++
++      nf_route(xt_net(par), &other_dst, &fl, false, xt_family(par));
++      if (!other_dst)
++              return -ENOENT;
++
++      nf_default_forward_path(route, this_dst, dir, devs);
++      nf_default_forward_path(route, other_dst, !dir, devs);
++
++      if (route->tuple[dir].xmit_type == FLOW_OFFLOAD_XMIT_NEIGH &&
++          route->tuple[!dir].xmit_type == FLOW_OFFLOAD_XMIT_NEIGH) {
++              nf_dev_forward_path(route, ct, dir, devs);
++              nf_dev_forward_path(route, ct, !dir, devs);
++      }
++
++      return 0;
++}
++
++static unsigned int
++flowoffload_tg(struct sk_buff *skb, const struct xt_action_param *par)
++{
++      struct xt_flowoffload_table *table;
++      const struct xt_flowoffload_target_info *info = par->targinfo;
++      struct tcphdr _tcph, *tcph = NULL;
++      enum ip_conntrack_info ctinfo;
++      enum ip_conntrack_dir dir;
++      struct nf_flow_route route = {};
++      struct flow_offload *flow = NULL;
++      struct net_device *devs[2] = {};
++      struct nf_conn *ct;
++      struct net *net;
++
++      if (xt_flowoffload_skip(skb, xt_family(par)))
++              return XT_CONTINUE;
++
++      ct = nf_ct_get(skb, &ctinfo);
++      if (ct == NULL)
++              return XT_CONTINUE;
++
++      switch (ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.dst.protonum) {
++      case IPPROTO_TCP:
++              if (ct->proto.tcp.state != TCP_CONNTRACK_ESTABLISHED)
++                      return XT_CONTINUE;
++
++              tcph = skb_header_pointer(skb, par->thoff,
++                                        sizeof(_tcph), &_tcph);
++              if (unlikely(!tcph || tcph->fin || tcph->rst))
++                      return XT_CONTINUE;
++              break;
++      case IPPROTO_UDP:
++              break;
++      default:
++              return XT_CONTINUE;
++      }
++
++      if (nf_ct_ext_exist(ct, NF_CT_EXT_HELPER) ||
++          ct->status & (IPS_SEQ_ADJUST | IPS_NAT_CLASH))
++              return XT_CONTINUE;
++
++      if (!nf_ct_is_confirmed(ct))
++              return XT_CONTINUE;
++
++      devs[dir] = xt_out(par);
++      devs[!dir] = xt_in(par);
++
++      if (!devs[dir] || !devs[!dir])
++              return XT_CONTINUE;
++
++      if (test_and_set_bit(IPS_OFFLOAD_BIT, &ct->status))
++              return XT_CONTINUE;
++
++      dir = CTINFO2DIR(ctinfo);
++
++      if (xt_flowoffload_route(skb, ct, par, &route, dir, devs) < 0)
++              goto err_flow_route;
++
++      flow = flow_offload_alloc(ct);
++      if (!flow)
++              goto err_flow_alloc;
++
++      if (flow_offload_route_init(flow, &route) < 0)
++              goto err_flow_add;
++
++      if (tcph) {
++              ct->proto.tcp.seen[0].flags |= IP_CT_TCP_FLAG_BE_LIBERAL;
++              ct->proto.tcp.seen[1].flags |= IP_CT_TCP_FLAG_BE_LIBERAL;
++      }
++
++      table = &flowtable[!!(info->flags & XT_FLOWOFFLOAD_HW)];
++
++      net = read_pnet(&table->ft.net);
++      if (!net)
++              write_pnet(&table->ft.net, xt_net(par));
++
++      if (flow_offload_add(&table->ft, flow) < 0)
++              goto err_flow_add;
++
++      xt_flowoffload_check_device(table, devs[0]);
++      xt_flowoffload_check_device(table, devs[1]);
++
++      dst_release(route.tuple[!dir].dst);
++
++      return XT_CONTINUE;
++
++err_flow_add:
++      flow_offload_free(flow);
++err_flow_alloc:
++      dst_release(route.tuple[!dir].dst);
++err_flow_route:
++      clear_bit(IPS_OFFLOAD_BIT, &ct->status);
++
++      return XT_CONTINUE;
++}
++
++static int flowoffload_chk(const struct xt_tgchk_param *par)
++{
++      struct xt_flowoffload_target_info *info = par->targinfo;
++
++      if (info->flags & ~XT_FLOWOFFLOAD_MASK)
++              return -EINVAL;
++
++      return 0;
++}
++
++static struct xt_target offload_tg_reg __read_mostly = {
++      .family         = NFPROTO_UNSPEC,
++      .name           = "FLOWOFFLOAD",
++      .revision       = 0,
++      .targetsize     = sizeof(struct xt_flowoffload_target_info),
++      .usersize       = sizeof(struct xt_flowoffload_target_info),
++      .checkentry     = flowoffload_chk,
++      .target         = flowoffload_tg,
++      .me             = THIS_MODULE,
++};
++
++static int flow_offload_netdev_event(struct notifier_block *this,
++                                   unsigned long event, void *ptr)
++{
++      struct xt_flowoffload_hook *hook0, *hook1;
++      struct net_device *dev = netdev_notifier_info_to_dev(ptr);
++
++      if (event != NETDEV_UNREGISTER)
++              return NOTIFY_DONE;
++
++      spin_lock_bh(&hooks_lock);
++      hook0 = flow_offload_lookup_hook(&flowtable[0], dev);
++      if (hook0)
++              hlist_del(&hook0->list);
++
++      hook1 = flow_offload_lookup_hook(&flowtable[1], dev);
++      if (hook1)
++              hlist_del(&hook1->list);
++      spin_unlock_bh(&hooks_lock);
++
++      if (hook0) {
++              nf_unregister_net_hook(hook0->net, &hook0->ops);
++              kfree(hook0);
++      }
++
++      if (hook1) {
++              nf_unregister_net_hook(hook1->net, &hook1->ops);
++              kfree(hook1);
++      }
++
++      nf_flow_table_cleanup(dev);
++
++      return NOTIFY_DONE;
++}
++
++static struct notifier_block flow_offload_netdev_notifier = {
++      .notifier_call  = flow_offload_netdev_event,
++};
++
++static int nf_flow_rule_route_inet(struct net *net,
++                                 const struct flow_offload *flow,
++                                 enum flow_offload_tuple_dir dir,
++                                 struct nf_flow_rule *flow_rule)
++{
++      const struct flow_offload_tuple *flow_tuple = &flow->tuplehash[dir].tuple;
++      int err;
++
++      switch (flow_tuple->l3proto) {
++      case NFPROTO_IPV4:
++              err = nf_flow_rule_route_ipv4(net, flow, dir, flow_rule);
++              break;
++      case NFPROTO_IPV6:
++              err = nf_flow_rule_route_ipv6(net, flow, dir, flow_rule);
++              break;
++      default:
++              err = -1;
++              break;
++      }
++
++      return err;
++}
++
++static struct nf_flowtable_type flowtable_inet = {
++      .family         = NFPROTO_INET,
++      .init           = nf_flow_table_init,
++      .setup          = nf_flow_table_offload_setup,
++      .action         = nf_flow_rule_route_inet,
++      .free           = nf_flow_table_free,
++      .hook           = xt_flowoffload_net_hook,
++      .owner          = THIS_MODULE,
++};
++
++static int init_flowtable(struct xt_flowoffload_table *tbl)
++{
++      INIT_DELAYED_WORK(&tbl->work, xt_flowoffload_hook_work);
++      tbl->ft.type = &flowtable_inet;
++
++      return nf_flow_table_init(&tbl->ft);
++}
++
++static int __init xt_flowoffload_tg_init(void)
++{
++      int ret;
++
++      register_netdevice_notifier(&flow_offload_netdev_notifier);
++
++      ret = init_flowtable(&flowtable[0]);
++      if (ret)
++              return ret;
++
++      ret = init_flowtable(&flowtable[1]);
++      if (ret)
++              goto cleanup;
++
++      flowtable[1].ft.flags = NF_FLOWTABLE_HW_OFFLOAD;
++
++      ret = xt_register_target(&offload_tg_reg);
++      if (ret)
++              goto cleanup2;
++
++      return 0;
++
++cleanup2:
++      nf_flow_table_free(&flowtable[1].ft);
++cleanup:
++      nf_flow_table_free(&flowtable[0].ft);
++      return ret;
++}
++
++static void __exit xt_flowoffload_tg_exit(void)
++{
++      xt_unregister_target(&offload_tg_reg);
++      unregister_netdevice_notifier(&flow_offload_netdev_notifier);
++      nf_flow_table_free(&flowtable[0].ft);
++      nf_flow_table_free(&flowtable[1].ft);
++}
++
++MODULE_LICENSE("GPL");
++module_init(xt_flowoffload_tg_init);
++module_exit(xt_flowoffload_tg_exit);
+--- a/net/netfilter/nf_flow_table_core.c
++++ b/net/netfilter/nf_flow_table_core.c
+@@ -7,7 +7,6 @@
+ #include <linux/netdevice.h>
+ #include <net/ip.h>
+ #include <net/ip6_route.h>
+-#include <net/netfilter/nf_tables.h>
+ #include <net/netfilter/nf_flow_table.h>
+ #include <net/netfilter/nf_conntrack.h>
+ #include <net/netfilter/nf_conntrack_core.h>
+@@ -380,8 +379,7 @@ flow_offload_lookup(struct nf_flowtable
+ }
+ EXPORT_SYMBOL_GPL(flow_offload_lookup);
+ 
+-static int
+-nf_flow_table_iterate(struct nf_flowtable *flow_table,
++int nf_flow_table_iterate(struct nf_flowtable *flow_table,
+                     void (*iter)(struct nf_flowtable *flowtable,
+                                  struct flow_offload *flow, void *data),
+                     void *data)
+@@ -435,6 +433,7 @@ static void nf_flow_offload_gc_step(stru
+               nf_flow_offload_stats(flow_table, flow);
+       }
+ }
++EXPORT_SYMBOL_GPL(nf_flow_table_iterate);
+ 
+ static void nf_flow_offload_work_gc(struct work_struct *work)
+ {
+--- /dev/null
++++ b/include/uapi/linux/netfilter/xt_FLOWOFFLOAD.h
+@@ -0,0 +1,17 @@
++/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
++#ifndef _XT_FLOWOFFLOAD_H
++#define _XT_FLOWOFFLOAD_H
++
++#include <linux/types.h>
++
++enum {
++      XT_FLOWOFFLOAD_HW       = 1 << 0,
++
++      XT_FLOWOFFLOAD_MASK     = XT_FLOWOFFLOAD_HW
++};
++
++struct xt_flowoffload_target_info {
++      __u32 flags;
++};
++
++#endif /* _XT_FLOWOFFLOAD_H */
+--- a/include/net/netfilter/nf_flow_table.h
++++ b/include/net/netfilter/nf_flow_table.h
+@@ -275,6 +275,11 @@ void nf_flow_table_free(struct nf_flowta
+ 
+ void flow_offload_teardown(struct flow_offload *flow);
+ 
++int nf_flow_table_iterate(struct nf_flowtable *flow_table,
++                      void (*iter)(struct nf_flowtable *flowtable,
++                                   struct flow_offload *flow, void *data),
++                      void *data);
++
+ void nf_flow_snat_port(const struct flow_offload *flow,
+                      struct sk_buff *skb, unsigned int thoff,
+                      u8 protocol, enum flow_offload_tuple_dir dir);

diff --git a/target/linux/generic/hack-6.0/651-wireless_mesh_header.patch b/target/linux/generic/hack-6.0/651-wireless_mesh_header.patch
new file mode 100644 (file)
index 0000000..12a031e
--- /dev/null
+++ b/target/linux/generic/hack-6.0/651-wireless_mesh_header.patch
@@ -0,0 +1,24 @@
+From 6d3bc769657b0ee7c7506dad9911111c4226a7ea Mon Sep 17 00:00:00 2001
+From: Imre Kaloz <[email protected]>
+Date: Fri, 7 Jul 2017 17:21:05 +0200
+Subject: mac80211: increase wireless mesh header size
+
+lede-commit 3d4466cfd8f75f717efdb1f96fdde3c70d865fc1
+Signed-off-by: Imre Kaloz <[email protected]>
+---
+ include/linux/netdevice.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/include/linux/netdevice.h
++++ b/include/linux/netdevice.h
+@@ -145,8 +145,8 @@ static inline bool dev_xmit_complete(int
+ 
+ #if defined(CONFIG_HYPERV_NET)
+ # define LL_MAX_HEADER 128
+-#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25)
+-# if defined(CONFIG_MAC80211_MESH)
++#elif defined(CONFIG_WLAN) || IS_ENABLED(CONFIG_AX25) || 1
++# if defined(CONFIG_MAC80211_MESH) || 1
+ #  define LL_MAX_HEADER 128
+ # else
+ #  define LL_MAX_HEADER 96

diff --git a/target/linux/generic/hack-6.0/660-fq_codel_defaults.patch b/target/linux/generic/hack-6.0/660-fq_codel_defaults.patch
new file mode 100644 (file)
index 0000000..5541c0b
--- /dev/null
+++ b/target/linux/generic/hack-6.0/660-fq_codel_defaults.patch
@@ -0,0 +1,27 @@
+From a6ccb238939b25851474a279b20367fd24a0e816 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Fri, 7 Jul 2017 17:21:53 +0200
+Subject:  hack: net: fq_codel: tune defaults for small devices
+
+Assume that x86_64 devices always have a big memory and do not need this 
+optimization compared to devices with only 32 MB or 64 MB RAM.
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ net/sched/sch_fq_codel.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/net/sched/sch_fq_codel.c
++++ b/net/sched/sch_fq_codel.c
+@@ -469,7 +469,11 @@ static int fq_codel_init(struct Qdisc *s
+ 
+       sch->limit = 10*1024;
+       q->flows_cnt = 1024;
++#ifdef CONFIG_X86_64
+       q->memory_limit = 32 << 20; /* 32 MBytes */
++#else
++      q->memory_limit = 4 << 20; /* 4 MBytes */
++#endif
+       q->drop_batch_size = 64;
+       q->quantum = psched_mtu(qdisc_dev(sch));
+       INIT_LIST_HEAD(&q->new_flows);

diff --git a/target/linux/generic/hack-6.0/661-kernel-ct-size-the-hashtable-more-adequately.patch b/target/linux/generic/hack-6.0/661-kernel-ct-size-the-hashtable-more-adequately.patch
new file mode 100644 (file)
index 0000000..134e210
--- /dev/null
+++ b/target/linux/generic/hack-6.0/661-kernel-ct-size-the-hashtable-more-adequately.patch
@@ -0,0 +1,25 @@
+From 804fbb3f2ec9283f7b778e057a68bfff440a0be6 Mon Sep 17 00:00:00 2001
+From: Rui Salvaterra <[email protected]>
+Date: Wed, 30 Mar 2022 22:51:55 +0100
+Subject: [PATCH] kernel: ct: size the hashtable more adequately
+
+To set the default size of the connection tracking hash table, a divider of
+16384 becomes inadequate for a router handling lots of connections. Divide by
+2048 instead, making the default size scale better with the available RAM.
+
+Signed-off-by: Rui Salvaterra <[email protected]>
+---
+ net/netfilter/nf_conntrack_core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/net/netfilter/nf_conntrack_core.c
++++ b/net/netfilter/nf_conntrack_core.c
+@@ -2727,7 +2727,7 @@ int nf_conntrack_init_start(void)
+ 
+       if (!nf_conntrack_htable_size) {
+               nf_conntrack_htable_size
+-                      = (((nr_pages << PAGE_SHIFT) / 16384)
++                      = (((nr_pages << PAGE_SHIFT) / 2048)
+                          / sizeof(struct hlist_head));
+               if (BITS_PER_LONG >= 64 &&
+                   nr_pages > (4 * (1024 * 1024 * 1024 / PAGE_SIZE)))

diff --git a/target/linux/generic/hack-6.0/700-swconfig_switch_drivers.patch b/target/linux/generic/hack-6.0/700-swconfig_switch_drivers.patch
new file mode 100644 (file)
index 0000000..48be440
--- /dev/null
+++ b/target/linux/generic/hack-6.0/700-swconfig_switch_drivers.patch
@@ -0,0 +1,131 @@
+From 36e516290611e613aa92996cb4339561452695b4 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Fri, 7 Jul 2017 17:24:23 +0200
+Subject: net: swconfig: adds openwrt switch layer
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ drivers/net/phy/Kconfig   | 83 +++++++++++++++++++++++++++++++++++++++++++++++
+ drivers/net/phy/Makefile  | 15 +++++++++
+ include/uapi/linux/Kbuild |  1 +
+ 3 files changed, 99 insertions(+)
+
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -61,6 +61,80 @@ config SFP
+       depends on HWMON || HWMON=n
+       select MDIO_I2C
+ 
++comment "Switch configuration API + drivers"
++
++config SWCONFIG
++      tristate "Switch configuration API"
++      help
++        Switch configuration API using netlink. This allows
++        you to configure the VLAN features of certain switches.
++
++config SWCONFIG_LEDS
++      bool "Switch LED trigger support"
++      depends on (SWCONFIG && LEDS_TRIGGERS)
++
++config ADM6996_PHY
++      tristate "Driver for ADM6996 switches"
++      select SWCONFIG
++      help
++        Currently supports the ADM6996FC and ADM6996M switches.
++        Support for FC is very limited.
++
++config AR8216_PHY
++      tristate "Driver for Atheros AR8216/8327 switches"
++      select SWCONFIG
++      select ETHERNET_PACKET_MANGLE
++
++config AR8216_PHY_LEDS
++      bool "Atheros AR8216 switch LED support"
++      depends on (AR8216_PHY && LEDS_CLASS)
++
++source "drivers/net/phy/b53/Kconfig"
++
++config IP17XX_PHY
++      tristate "Driver for IC+ IP17xx switches"
++      select SWCONFIG
++
++config PSB6970_PHY
++      tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch"
++      select SWCONFIG
++
++config RTL8306_PHY
++      tristate "Driver for Realtek RTL8306S switches"
++      select SWCONFIG
++
++config RTL8366_SMI
++      tristate "Driver for the RTL8366 SMI interface"
++      depends on GPIOLIB
++      help
++        This module implements the SMI interface protocol which is used
++        by some RTL8366 ethernet switch devices via the generic GPIO API.
++
++if RTL8366_SMI
++
++config RTL8366_SMI_DEBUG_FS
++      bool "RTL8366 SMI interface debugfs support"
++        depends on DEBUG_FS
++        default n
++
++config RTL8366S_PHY
++      tristate "Driver for the Realtek RTL8366S switch"
++      select SWCONFIG
++
++config RTL8366RB_PHY
++      tristate "Driver for the Realtek RTL8366RB switch"
++      select SWCONFIG
++
++config RTL8367_PHY
++      tristate "Driver for the Realtek RTL8367R/M switches"
++      select SWCONFIG
++
++config RTL8367B_PHY
++      tristate "Driver fot the Realtek RTL8367R-VB switch"
++      select SWCONFIG
++
++endif # RTL8366_SMI
++
+ comment "MII PHY device drivers"
+ 
+ config AMD_PHY
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -24,6 +24,21 @@ libphy-$(CONFIG_LED_TRIGGER_PHY)    += phy_
+ obj-$(CONFIG_PHYLINK)         += phylink.o
+ obj-$(CONFIG_PHYLIB)          += libphy.o
+ 
++obj-$(CONFIG_SWCONFIG)                += swconfig.o
++obj-$(CONFIG_ADM6996_PHY)     += adm6996.o
++obj-$(CONFIG_AR8216_PHY)      += ar8xxx.o
++ar8xxx-y                      += ar8216.o
++ar8xxx-y                      += ar8327.o
++obj-$(CONFIG_SWCONFIG_B53)    += b53/
++obj-$(CONFIG_IP17XX_PHY)      += ip17xx.o
++obj-$(CONFIG_PSB6970_PHY)     += psb6970.o
++obj-$(CONFIG_RTL8306_PHY)     += rtl8306.o
++obj-$(CONFIG_RTL8366_SMI)     += rtl8366_smi.o
++obj-$(CONFIG_RTL8366S_PHY)    += rtl8366s.o
++obj-$(CONFIG_RTL8366RB_PHY)   += rtl8366rb.o
++obj-$(CONFIG_RTL8367_PHY)     += rtl8367.o
++obj-$(CONFIG_RTL8367B_PHY)    += rtl8367b.o
++
+ obj-$(CONFIG_NETWORK_PHY_TIMESTAMPING) += mii_timestamper.o
+ 
+ obj-$(CONFIG_SFP)             += sfp.o
+--- a/include/linux/platform_data/b53.h
++++ b/include/linux/platform_data/b53.h
+@@ -29,6 +29,9 @@ struct b53_platform_data {
+       u32 chip_id;
+       u16 enabled_ports;
+ 
++      /* allow to specify an ethX alias */
++      const char *alias;
++
+       /* only used by MMAP'd driver */
+       unsigned big_endian:1;
+       void __iomem *regs;

diff --git a/target/linux/generic/hack-6.0/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch b/target/linux/generic/hack-6.0/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch
new file mode 100644 (file)
index 0000000..8f2e6e0
--- /dev/null
+++ b/target/linux/generic/hack-6.0/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch
@@ -0,0 +1,21 @@
+From ebd924d773223593142d417c41d4ee6fa16f1805 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 13:45:56 +0200
+Subject: [PATCH] net/dsa/mv88e6xxx: disable ATU violation
+
+---
+ drivers/net/dsa/mv88e6xxx/chip.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/net/dsa/mv88e6xxx/chip.c
++++ b/drivers/net/dsa/mv88e6xxx/chip.c
+@@ -2981,6 +2981,9 @@ static int mv88e6xxx_setup_port(struct m
+       else
+               reg = 1 << port;
+ 
++      /* Disable ATU member violation interrupt */
++      reg |= MV88E6XXX_PORT_ASSOC_VECTOR_IGNORE_WRONG;
++
+       err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR,
+                                  reg);
+       if (err)

diff --git a/target/linux/generic/hack-6.0/720-net-phy-add-aqr-phys.patch b/target/linux/generic/hack-6.0/720-net-phy-add-aqr-phys.patch
new file mode 100644 (file)
index 0000000..de6fdb3
--- /dev/null
+++ b/target/linux/generic/hack-6.0/720-net-phy-add-aqr-phys.patch
@@ -0,0 +1,120 @@
+From: Birger Koblitz <[email protected]>
+Date: Sun, 5 Sep 2021 15:13:10 +0200
+Subject: [PATCH] kernel: Add AQR113C and AQR813 support
+
+This hack adds support for the Aquantia 4th generation, 10GBit
+PHYs AQR113C and AQR813.
+
+Signed-off-by: Birger Koblitz <[email protected]>
+
+--- a/drivers/net/phy/aquantia_main.c
++++ b/drivers/net/phy/aquantia_main.c
+@@ -20,6 +20,7 @@
+ #define PHY_ID_AQCS109        0x03a1b5c2
+ #define PHY_ID_AQR405 0x03a1b4b0
+ #define PHY_ID_AQR113C        0x31c31c12
++#define PHY_ID_AQR813 0x31c31cb2
+ 
+ #define MDIO_PHYXS_VEND_IF_STATUS             0xe812
+ #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK   GENMASK(7, 3)
+@@ -372,6 +374,49 @@ static int aqr107_read_rate(struct phy_d
+       return 0;
+ }
+ 
++static int aqr113c_read_status(struct phy_device *phydev)
++{
++      int val, ret;
++
++      ret = aqr_read_status(phydev);
++      if (ret)
++              return ret;
++
++      if (!phydev->link || phydev->autoneg == AUTONEG_DISABLE)
++              return 0;
++
++      // On AQR113C, the speed returned by aqr_read_status is wrong
++      aqr107_read_rate(phydev);
++
++      val = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_VEND_IF_STATUS);
++      if (val < 0)
++              return val;
++
++      switch (FIELD_GET(MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK, val)) {
++      case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR:
++              phydev->interface = PHY_INTERFACE_MODE_10GKR;
++              break;
++      case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI:
++              phydev->interface = PHY_INTERFACE_MODE_10GBASER;
++              break;
++      case MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII:
++              phydev->interface = PHY_INTERFACE_MODE_USXGMII;
++              break;
++      case MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII:
++              phydev->interface = PHY_INTERFACE_MODE_SGMII;
++              break;
++      case MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII:
++              phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
++              break;
++      default:
++              phydev->interface = PHY_INTERFACE_MODE_NA;
++              break;
++      }
++
++      /* Read downshifted rate from vendor register */
++      return aqr107_read_rate(phydev);
++}
++
+ static int aqr107_read_status(struct phy_device *phydev)
+ {
+       int val, ret;
+@@ -502,7 +547,7 @@ static void aqr107_chip_info(struct phy_
+       build_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID, val);
+       prov_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_PROV_ID, val);
+ 
+-      phydev_dbg(phydev, "FW %u.%u, Build %u, Provisioning %u\n",
++      phydev_info(phydev, "FW %u.%u, Build %u, Provisioning %u\n",
+                  fw_major, fw_minor, build_id, prov_id);
+ }
+ 
+@@ -706,7 +706,7 @@ static struct phy_driver aqr_driver[] =
+       .config_aneg    = aqr_config_aneg,
+       .config_intr    = aqr_config_intr,
+       .handle_interrupt       = aqr_handle_interrupt,
+-      .read_status    = aqr107_read_status,
++      .read_status    = aqr113c_read_status,
+       .get_tunable    = aqr107_get_tunable,
+       .set_tunable    = aqr107_set_tunable,
+       .suspend        = aqr107_suspend,
+@@ -708,6 +762,24 @@ static struct phy_driver aqr_driver[] =
+       .handle_interrupt = aqr_handle_interrupt,
+       .read_status    = aqr_read_status,
+ },
++{
++      PHY_ID_MATCH_MODEL(PHY_ID_AQR813),
++      .name           = "Aquantia AQR813",
++      .probe          = aqr107_probe,
++      .config_init    = aqr107_config_init,
++      .config_aneg    = aqr_config_aneg,
++      .config_intr    = aqr_config_intr,
++      .handle_interrupt = aqr_handle_interrupt,
++      .read_status    = aqr113c_read_status,
++      .get_tunable    = aqr107_get_tunable,
++      .set_tunable    = aqr107_set_tunable,
++      .suspend        = aqr107_suspend,
++      .resume         = aqr107_resume,
++      .get_sset_count = aqr107_get_sset_count,
++      .get_strings    = aqr107_get_strings,
++      .get_stats      = aqr107_get_stats,
++      .link_change_notify = aqr107_link_change_notify,
++},
+ };
+ 
+ module_phy_driver(aqr_driver);
+@@ -709,6 +790,7 @@ static struct mdio_device_id __maybe_unu
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) },
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
++      { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
+       { }
+ };
+ 

diff --git a/target/linux/generic/hack-6.0/721-net-add-packet-mangeling.patch b/target/linux/generic/hack-6.0/721-net-add-packet-mangeling.patch
new file mode 100644 (file)
index 0000000..29c4318
--- /dev/null
+++ b/target/linux/generic/hack-6.0/721-net-add-packet-mangeling.patch
@@ -0,0 +1,167 @@
+From ffe387740bbe88dd88bbe04d6375902708003d6e Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Fri, 7 Jul 2017 17:25:00 +0200
+Subject: net: add packet mangeling
+
+ar8216 switches have a hardware bug, which renders normal 802.1q support
+unusable. Packet mangling is required to fix up the vlan for incoming
+packets.
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/linux/netdevice.h | 11 +++++++++++
+ include/linux/skbuff.h    | 14 ++++----------
+ net/Kconfig               |  6 ++++++
+ net/core/dev.c            | 20 +++++++++++++++-----
+ net/core/skbuff.c         | 17 +++++++++++++++++
+ net/ethernet/eth.c        |  6 ++++++
+ 6 files changed, 59 insertions(+), 15 deletions(-)
+
+--- a/include/linux/netdevice.h
++++ b/include/linux/netdevice.h
+@@ -1655,6 +1655,7 @@ enum netdev_priv_flags {
+       IFF_LIVE_RENAME_OK              = 1<<30,
+       IFF_TX_SKB_NO_LINEAR            = BIT_ULL(31),
+       IFF_CHANGE_PROTO_DOWN           = BIT_ULL(32),
++      IFF_NO_IP_ALIGN                 = BIT_ULL(33),
+ };
+ 
+ #define IFF_802_1Q_VLAN                       IFF_802_1Q_VLAN
+@@ -1687,6 +1691,7 @@ enum netdev_priv_flags {
+ #define IFF_L3MDEV_RX_HANDLER         IFF_L3MDEV_RX_HANDLER
+ #define IFF_LIVE_RENAME_OK            IFF_LIVE_RENAME_OK
+ #define IFF_TX_SKB_NO_LINEAR          IFF_TX_SKB_NO_LINEAR
++#define IFF_NO_IP_ALIGN               IFF_NO_IP_ALIGN
+ 
+ /* Specifies the type of the struct net_device::ml_priv pointer */
+ enum netdev_ml_priv_type {
+@@ -2048,6 +2054,11 @@ struct net_device {
+       const struct tlsdev_ops *tlsdev_ops;
+ #endif
+ 
++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
++      void (*eth_mangle_rx)(struct net_device *dev, struct sk_buff *skb);
++      struct sk_buff *(*eth_mangle_tx)(struct net_device *dev, struct sk_buff *skb);
++#endif
++
+       const struct header_ops *header_ops;
+ 
+       unsigned char           operstate;
+@@ -2122,6 +2133,10 @@ struct net_device {
+       struct mctp_dev __rcu   *mctp_ptr;
+ #endif
+ 
++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
++      void                    *phy_ptr; /* PHY device specific data */
++#endif
++
+ /*
+  * Cache lines mostly used on receive path (including eth_type_trans())
+  */
+--- a/include/linux/skbuff.h
++++ b/include/linux/skbuff.h
+@@ -2816,6 +2816,10 @@ static inline int pskb_trim(struct sk_bu
+       return (len < skb->len) ? __pskb_trim(skb, len) : 0;
+ }
+ 
++extern struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev,
++              unsigned int length, gfp_t gfp);
++
++
+ /**
+  *    pskb_trim_unique - remove end from a paged unique (not cloned) buffer
+  *    @skb: buffer to alter
+@@ -2966,16 +2970,6 @@ static inline struct sk_buff *dev_alloc_
+ }
+ 
+ 
+-static inline struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev,
+-              unsigned int length, gfp_t gfp)
+-{
+-      struct sk_buff *skb = __netdev_alloc_skb(dev, length + NET_IP_ALIGN, gfp);
+-
+-      if (NET_IP_ALIGN && skb)
+-              skb_reserve(skb, NET_IP_ALIGN);
+-      return skb;
+-}
+-
+ static inline struct sk_buff *netdev_alloc_skb_ip_align(struct net_device *dev,
+               unsigned int length)
+ {
+--- a/net/Kconfig
++++ b/net/Kconfig
+@@ -26,6 +26,12 @@ menuconfig NET
+ 
+ if NET
+ 
++config ETHERNET_PACKET_MANGLE
++      bool
++      help
++        This option can be selected by phy drivers that need to mangle
++        packets going in or out of an ethernet device.
++
+ config WANT_COMPAT_NETLINK_MESSAGES
+       bool
+       help
+--- a/net/core/dev.c
++++ b/net/core/dev.c
+@@ -3588,6 +3588,11 @@ static int xmit_one(struct sk_buff *skb,
+       if (dev_nit_active(dev))
+               dev_queue_xmit_nit(skb, dev);
+ 
++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
++      if (dev->eth_mangle_tx && !(skb = dev->eth_mangle_tx(dev, skb)))
++              return NETDEV_TX_OK;
++#endif
++
+       len = skb->len;
+       trace_net_dev_start_xmit(skb, dev);
+       rc = netdev_start_xmit(skb, dev, txq, more);
+--- a/net/core/skbuff.c
++++ b/net/core/skbuff.c
+@@ -61,6 +61,7 @@
+ #include <linux/if_vlan.h>
+ #include <linux/mpls.h>
+ #include <linux/kcov.h>
++#include <linux/if.h>
+ 
+ #include <net/protocol.h>
+ #include <net/dst.h>
+@@ -602,6 +603,22 @@ skb_fail:
+ }
+ EXPORT_SYMBOL(__napi_alloc_skb);
+ 
++struct sk_buff *__netdev_alloc_skb_ip_align(struct net_device *dev,
++              unsigned int length, gfp_t gfp)
++{
++      struct sk_buff *skb = __netdev_alloc_skb(dev, length + NET_IP_ALIGN, gfp);
++
++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
++      if (dev && (dev->priv_flags & IFF_NO_IP_ALIGN))
++              return skb;
++#endif
++
++      if (NET_IP_ALIGN && skb)
++              skb_reserve(skb, NET_IP_ALIGN);
++      return skb;
++}
++EXPORT_SYMBOL(__netdev_alloc_skb_ip_align);
++
+ void skb_add_rx_frag(struct sk_buff *skb, int i, struct page *page, int off,
+                    int size, unsigned int truesize)
+ {
+--- a/net/ethernet/eth.c
++++ b/net/ethernet/eth.c
+@@ -170,6 +170,12 @@ __be16 eth_type_trans(struct sk_buff *sk
+       const struct ethhdr *eth;
+ 
+       skb->dev = dev;
++
++#ifdef CONFIG_ETHERNET_PACKET_MANGLE
++      if (dev->eth_mangle_rx)
++              dev->eth_mangle_rx(dev, skb);
++#endif
++
+       skb_reset_mac_header(skb);
+ 
+       eth = (struct ethhdr *)skb->data;

diff --git a/target/linux/generic/hack-6.0/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch b/target/linux/generic/hack-6.0/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
new file mode 100644 (file)
index 0000000..d4024f1
--- /dev/null
+++ b/target/linux/generic/hack-6.0/722-net-phy-aquantia-enable-AQR112-and-AQR412.patch
@@ -0,0 +1,147 @@
+From 5f62951fba63a9f9cfff564209426bdea5fcc371 Mon Sep 17 00:00:00 2001
+From: Alex Marginean <[email protected]>
+Date: Tue, 27 Aug 2019 15:16:56 +0300
+Subject: [PATCH] drivers: net: phy: aquantia: enable AQR112 and AQR412
+
+Adds support for AQR112 and AQR412 which is mostly based on existing code
+with the addition of code configuring the protocol on system side.
+This allows changing the system side protocol without having to deploy a
+different firmware on the PHY.
+
+Signed-off-by: Alex Marginean <[email protected]>
+---
+ drivers/net/phy/aquantia_main.c | 88 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 88 insertions(+)
+
+--- a/drivers/net/phy/aquantia_main.c
++++ b/drivers/net/phy/aquantia_main.c
+@@ -20,6 +20,8 @@
+ #define PHY_ID_AQR405 0x03a1b4b0
+ #define PHY_ID_AQR113C        0x31c31c12
+ #define PHY_ID_AQR813 0x31c31cb2
++#define PHY_ID_AQR112 0x03a1b662
++#define PHY_ID_AQR412 0x03a1b712
+ 
+ #define MDIO_PHYXS_VEND_IF_STATUS             0xe812
+ #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK   GENMASK(7, 3)
+@@ -126,6 +128,29 @@
+ #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL2    BIT(1)
+ #define VEND1_GLOBAL_INT_VEND_MASK_GLOBAL3    BIT(0)
+ 
++/* registers in MDIO_MMD_VEND1 region */
++#define AQUANTIA_VND1_GLOBAL_SC                       0x000
++#define  AQUANTIA_VND1_GLOBAL_SC_LP           BIT(0xb)
++
++/* global start rate, the protocol associated with this speed is used by default
++ * on SI.
++ */
++#define AQUANTIA_VND1_GSTART_RATE             0x31a
++#define  AQUANTIA_VND1_GSTART_RATE_OFF                0
++#define  AQUANTIA_VND1_GSTART_RATE_100M               1
++#define  AQUANTIA_VND1_GSTART_RATE_1G         2
++#define  AQUANTIA_VND1_GSTART_RATE_10G                3
++#define  AQUANTIA_VND1_GSTART_RATE_2_5G               4
++#define  AQUANTIA_VND1_GSTART_RATE_5G         5
++
++/* SYSCFG registers for 100M, 1G, 2.5G, 5G, 10G */
++#define AQUANTIA_VND1_GSYSCFG_BASE            0x31b
++#define AQUANTIA_VND1_GSYSCFG_100M            0
++#define AQUANTIA_VND1_GSYSCFG_1G              1
++#define AQUANTIA_VND1_GSYSCFG_2_5G            2
++#define AQUANTIA_VND1_GSYSCFG_5G              3
++#define AQUANTIA_VND1_GSYSCFG_10G             4
++
+ struct aqr107_hw_stat {
+       const char *name;
+       int reg;
+@@ -257,6 +282,51 @@ static int aqr_config_aneg(struct phy_de
+       return genphy_c45_check_and_restart_aneg(phydev, changed);
+ }
+ 
++static struct {
++      u16 syscfg;
++      int cnt;
++      u16 start_rate;
++} aquantia_syscfg[PHY_INTERFACE_MODE_MAX] = {
++      [PHY_INTERFACE_MODE_SGMII] =      {0x04b, AQUANTIA_VND1_GSYSCFG_1G,
++                                         AQUANTIA_VND1_GSTART_RATE_1G},
++      [PHY_INTERFACE_MODE_2500BASEX] = {0x144, AQUANTIA_VND1_GSYSCFG_2_5G,
++                                         AQUANTIA_VND1_GSTART_RATE_2_5G},
++      [PHY_INTERFACE_MODE_XGMII] =      {0x100, AQUANTIA_VND1_GSYSCFG_10G,
++                                         AQUANTIA_VND1_GSTART_RATE_10G},
++      [PHY_INTERFACE_MODE_USXGMII] =    {0x080, AQUANTIA_VND1_GSYSCFG_10G,
++                                         AQUANTIA_VND1_GSTART_RATE_10G},
++};
++
++/* Sets up protocol on system side before calling aqr_config_aneg */
++static int aqr_config_aneg_set_prot(struct phy_device *phydev)
++{
++      int if_type = phydev->interface;
++      int i;
++
++      if (!aquantia_syscfg[if_type].cnt)
++              return 0;
++
++      /* set PHY in low power mode so we can configure protocols */
++      phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GLOBAL_SC,
++                    AQUANTIA_VND1_GLOBAL_SC_LP);
++      mdelay(10);
++
++      /* set the default rate to enable the SI link */
++      phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
++                    aquantia_syscfg[if_type].start_rate);
++
++      for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++)
++              phy_write_mmd(phydev, MDIO_MMD_VEND1,
++                            AQUANTIA_VND1_GSYSCFG_BASE + i,
++                            aquantia_syscfg[if_type].syscfg);
++
++      /* wake PHY back up */
++      phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GLOBAL_SC, 0);
++      mdelay(10);
++
++      return aqr_config_aneg(phydev);
++}
++
+ static int aqr_config_intr(struct phy_device *phydev)
+ {
+       bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED;
+@@ -780,6 +850,30 @@ static struct phy_driver aqr_driver[] =
+       .get_stats      = aqr107_get_stats,
+       .link_change_notify = aqr107_link_change_notify,
+ },
++{
++      PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
++      .name           = "Aquantia AQR112",
++      .probe          = aqr107_probe,
++      .config_aneg    = aqr_config_aneg_set_prot,
++      .config_intr    = aqr_config_intr,
++      .handle_interrupt = aqr_handle_interrupt,
++      .read_status    = aqr107_read_status,
++      .get_sset_count = aqr107_get_sset_count,
++      .get_strings    = aqr107_get_strings,
++      .get_stats      = aqr107_get_stats,
++},
++{
++      PHY_ID_MATCH_MODEL(PHY_ID_AQR412),
++      .name           = "Aquantia AQR412",
++      .probe          = aqr107_probe,
++      .config_aneg    = aqr_config_aneg_set_prot,
++      .config_intr    = aqr_config_intr,
++      .handle_interrupt = aqr_handle_interrupt,
++      .read_status    = aqr107_read_status,
++      .get_sset_count = aqr107_get_sset_count,
++      .get_strings    = aqr107_get_strings,
++      .get_stats      = aqr107_get_stats,
++},
+ };
+ 
+ module_phy_driver(aqr_driver);
+@@ -790,5 +884,7 @@ static struct mdio_device_id __maybe_unu
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
++      { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
++      { PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
+       { }
+ };

diff --git a/target/linux/generic/hack-6.0/723-net-phy-aquantia-fix-system-side-protocol-mi.patch b/target/linux/generic/hack-6.0/723-net-phy-aquantia-fix-system-side-protocol-mi.patch
new file mode 100644 (file)
index 0000000..d99b495
--- /dev/null
+++ b/target/linux/generic/hack-6.0/723-net-phy-aquantia-fix-system-side-protocol-mi.patch
@@ -0,0 +1,34 @@
+From 5f008cb22f60da4e10375f22266c1a4e20b1252e Mon Sep 17 00:00:00 2001
+From: Alex Marginean <[email protected]>
+Date: Fri, 20 Sep 2019 18:22:52 +0300
+Subject: [PATCH] drivers: net: phy: aquantia: fix system side protocol
+ misconfiguration
+
+Do not set up protocols for speeds that are not supported by FW.  Enabling
+these protocols leads to link issues on system side.
+
+Signed-off-by: Alex Marginean <[email protected]>
+---
+ drivers/net/phy/aquantia_main.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/phy/aquantia_main.c
++++ b/drivers/net/phy/aquantia_main.c
+@@ -315,10 +315,16 @@ static int aqr_config_aneg_set_prot(stru
+       phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE,
+                     aquantia_syscfg[if_type].start_rate);
+ 
+-      for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++)
++      for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++) {
++              u16 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1,
++                                     AQUANTIA_VND1_GSYSCFG_BASE + i);
++              if (!reg)
++                      continue;
++
+               phy_write_mmd(phydev, MDIO_MMD_VEND1,
+                             AQUANTIA_VND1_GSYSCFG_BASE + i,
+                             aquantia_syscfg[if_type].syscfg);
++      }
+ 
+       /* wake PHY back up */
+       phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GLOBAL_SC, 0);

diff --git a/target/linux/generic/hack-6.0/724-net-phy-aquantia-Add-AQR113-driver-support.patch b/target/linux/generic/hack-6.0/724-net-phy-aquantia-Add-AQR113-driver-support.patch
new file mode 100644 (file)
index 0000000..dd32690
--- /dev/null
+++ b/target/linux/generic/hack-6.0/724-net-phy-aquantia-Add-AQR113-driver-support.patch
@@ -0,0 +1,42 @@
+From 2e677e4ae8f8330f68013163b060d0fda3a43095 Mon Sep 17 00:00:00 2001
+From: "Langer, Thomas" <[email protected]>
+Date: Fri, 9 Jul 2021 17:36:46 +0200
+Subject: [PATCH] PONRTSYS-8842: aquantia: Add AQR113 driver support
+
+Add a new entry for AQR113 PHY_ID
+---
+ drivers/net/phy/aquantia_main.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/net/phy/aquantia_main.c
++++ b/drivers/net/phy/aquantia_main.c
+@@ -21,6 +21,7 @@
+ #define PHY_ID_AQR813 0x31c31cb2
+ #define PHY_ID_AQR112 0x03a1b662
+ #define PHY_ID_AQR412 0x03a1b712
++#define PHY_ID_AQR113 0x31c31c40
+ 
+ #define MDIO_PHYXS_VEND_IF_STATUS             0xe812
+ #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK   GENMASK(7, 3)
+@@ -869,6 +870,14 @@ static struct phy_driver aqr_driver[] =
+       .get_strings    = aqr107_get_strings,
+       .get_stats      = aqr107_get_stats,
+ },
++{
++      PHY_ID_MATCH_MODEL(PHY_ID_AQR113),
++      .name           = "Aquantia AQR113",
++      .config_aneg    = aqr_config_aneg,
++      .config_intr    = aqr_config_intr,
++      .handle_interrupt = aqr_handle_interrupt,
++      .read_status    = aqr107_read_status,
++},
+ };
+ 
+ module_phy_driver(aqr_driver);
+@@ -790,5 +884,6 @@ static struct mdio_device_id __maybe_unu
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
++      { PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },
+       { }
+ };

diff --git a/target/linux/generic/hack-6.0/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch b/target/linux/generic/hack-6.0/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
new file mode 100644 (file)
index 0000000..57edfc1
--- /dev/null
+++ b/target/linux/generic/hack-6.0/725-net-phy-aquantia-add-PHY_IDs-for-AQR112-variants.patch
@@ -0,0 +1,62 @@
+From 3b92ee7b7899b6beffb2b484c58326e36612a873 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <[email protected]>
+Date: Thu, 23 Dec 2021 14:52:56 +0000
+Subject: [PATCH] net: phy: aquantia: add PHY_ID for AQR112R
+
+As advised by Ian Chang this PHY is used in Puzzle devices.
+
+Signed-off-by: Daniel Golle <[email protected]>
+---
+ drivers/net/phy/aquantia_main.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/net/phy/aquantia_main.c
++++ b/drivers/net/phy/aquantia_main.c
+@@ -21,6 +21,8 @@
+ #define PHY_ID_AQR112 0x03a1b662
+ #define PHY_ID_AQR412 0x03a1b712
+ #define PHY_ID_AQR113 0x31c31c40
++#define PHY_ID_AQR112C        0x03a1b790
++#define PHY_ID_AQR112R        0x31c31d12
+ 
+ #define MDIO_PHYXS_VEND_IF_STATUS             0xe812
+ #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK   GENMASK(7, 3)
+@@ -870,6 +872,30 @@ static struct phy_driver aqr_driver[] =
+       .handle_interrupt = aqr_handle_interrupt,
+       .read_status    = aqr107_read_status,
+ },
++{
++      PHY_ID_MATCH_MODEL(PHY_ID_AQR112C),
++      .name           = "Aquantia AQR112C",
++      .probe          = aqr107_probe,
++      .config_aneg    = aqr_config_aneg_set_prot,
++      .config_intr    = aqr_config_intr,
++      .handle_interrupt = aqr_handle_interrupt,
++      .read_status    = aqr107_read_status,
++      .get_sset_count = aqr107_get_sset_count,
++      .get_strings    = aqr107_get_strings,
++      .get_stats      = aqr107_get_stats,
++},
++{
++      PHY_ID_MATCH_MODEL(PHY_ID_AQR112R),
++      .name           = "Aquantia AQR112R",
++      .probe          = aqr107_probe,
++      .config_aneg    = aqr_config_aneg_set_prot,
++      .config_intr    = aqr_config_intr,
++      .handle_interrupt = aqr_handle_interrupt,
++      .read_status    = aqr107_read_status,
++      .get_sset_count = aqr107_get_sset_count,
++      .get_strings    = aqr107_get_strings,
++      .get_stats      = aqr107_get_stats,
++},
+ };
+ 
+ module_phy_driver(aqr_driver);
+@@ -900,5 +926,7 @@ static struct mdio_device_id __maybe_unu
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
+       { PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },
++      { PHY_ID_MATCH_MODEL(PHY_ID_AQR112C) },
++      { PHY_ID_MATCH_MODEL(PHY_ID_AQR112R) },
+       { }
+ };

diff --git a/target/linux/generic/hack-6.0/760-net-usb-r8152-add-LED-configuration-from-OF.patch b/target/linux/generic/hack-6.0/760-net-usb-r8152-add-LED-configuration-from-OF.patch
new file mode 100644 (file)
index 0000000..c315dcf
--- /dev/null
+++ b/target/linux/generic/hack-6.0/760-net-usb-r8152-add-LED-configuration-from-OF.patch
@@ -0,0 +1,74 @@
+From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001
+From: David Bauer <[email protected]>
+Date: Sun, 26 Jul 2020 02:38:31 +0200
+Subject: [PATCH] net: usb: r8152: add LED configuration from OF
+
+This adds the ability to configure the LED configuration register using
+OF. This way, the correct value for board specific LED configuration can
+be determined.
+
+Signed-off-by: David Bauer <[email protected]>
+---
+ drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+
+--- a/drivers/net/usb/r8152.c
++++ b/drivers/net/usb/r8152.c
+@@ -11,6 +11,7 @@
+ #include <linux/mii.h>
+ #include <linux/ethtool.h>
+ #include <linux/usb.h>
++#include <linux/of.h>
+ #include <linux/crc32.h>
+ #include <linux/if_vlan.h>
+ #include <linux/uaccess.h>
+@@ -6864,6 +6865,22 @@ static void rtl_tally_reset(struct r8152
+       ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
+ }
+ 
++static int r8152_led_configuration(struct r8152 *tp)
++{
++      u32 led_data;
++      int ret;
++
++      ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data",
++                                                              &led_data);
++
++      if (ret)
++              return ret;
++      
++      ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data);
++
++      return 0;
++}
++
+ static void r8152b_init(struct r8152 *tp)
+ {
+       u32 ocp_data;
+@@ -6905,6 +6922,8 @@ static void r8152b_init(struct r8152 *tp
+       ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
+       ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
+       ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
++
++      r8152_led_configuration(tp);
+ }
+ 
+ static void r8153_init(struct r8152 *tp)
+@@ -7045,6 +7064,8 @@ static void r8153_init(struct r8152 *tp)
+               tp->coalesce = COALESCE_SLOW;
+               break;
+       }
++
++      r8152_led_configuration(tp);
+ }
+ 
+ static void r8153b_init(struct r8152 *tp)
+@@ -7127,6 +7148,8 @@ static void r8153b_init(struct r8152 *tp
+       rtl_tally_reset(tp);
+ 
+       tp->coalesce = 15000;   /* 15 us */
++
++      r8152_led_configuration(tp);
+ }
+ 
+ static void r8153c_init(struct r8152 *tp)

diff --git a/target/linux/generic/hack-6.0/761-dt-bindings-net-add-RTL8152-binding-documentation.patch b/target/linux/generic/hack-6.0/761-dt-bindings-net-add-RTL8152-binding-documentation.patch
new file mode 100644 (file)
index 0000000..be262b9
--- /dev/null
+++ b/target/linux/generic/hack-6.0/761-dt-bindings-net-add-RTL8152-binding-documentation.patch
@@ -0,0 +1,54 @@
+From 3ee05f4aa64fc86af3be5bc176ba5808de9260a7 Mon Sep 17 00:00:00 2001
+From: David Bauer <[email protected]>
+Date: Sun, 26 Jul 2020 15:30:33 +0200
+Subject: [PATCH] dt-bindings: net: add RTL8152 binding documentation
+
+Add binding documentation for the Realtek RTL8152 / RTL8153 USB ethernet
+adapters.
+
+Signed-off-by: David Bauer <[email protected]>
+---
+ .../bindings/net/realtek,rtl8152.yaml         | 36 +++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl8152.yaml
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/net/realtek,rtl8152.yaml
+@@ -0,0 +1,36 @@
++# SPDX-License-Identifier: GPL-2.0
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/net/realtek,rtl8152.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Realtek RTL8152/RTL8153 series USB ethernet
++
++maintainers:
++  - David Bauer <[email protected]>
++
++properties:
++  compatible:
++    oneOf:
++      - items:
++          - enum:
++              - realtek,rtl8152
++              - realtek,rtl8153
++
++  reg:
++    description: The device number on the USB bus
++
++  realtek,led-data:
++    description: Value to be written to the LED configuration register.
++
++required:
++  - compatible
++  - reg
++
++examples:
++  - |
++    usb-eth@2 {
++      compatible = "realtek,rtl8153";
++      reg = <2>;
++      realtek,led-data = <0x87>;
++    };
+\ No newline at end of file

diff --git a/target/linux/generic/hack-6.0/773-bgmac-add-srab-switch.patch b/target/linux/generic/hack-6.0/773-bgmac-add-srab-switch.patch
new file mode 100644 (file)
index 0000000..1e4fc44
--- /dev/null
+++ b/target/linux/generic/hack-6.0/773-bgmac-add-srab-switch.patch
@@ -0,0 +1,98 @@
+From 3cb240533ab787899dc7f17aa7d6c5b4810e2e58 Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <[email protected]>
+Date: Fri, 7 Jul 2017 17:26:01 +0200
+Subject: bcm53xx: bgmac: use srab switch driver
+
+use the srab switch driver on these SoCs.
+
+Signed-off-by: Hauke Mehrtens <[email protected]>
+---
+ drivers/net/ethernet/broadcom/bgmac-bcma.c |  1 +
+ drivers/net/ethernet/broadcom/bgmac.c      | 24 ++++++++++++++++++++++++
+ drivers/net/ethernet/broadcom/bgmac.h      |  4 ++++
+ 3 files changed, 29 insertions(+)
+
+--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c
++++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c
+@@ -280,6 +280,7 @@ static int bgmac_probe(struct bcma_devic
+               bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
+               bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
+               bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
++              bgmac->feature_flags |= BGMAC_FEAT_SRAB;
+               break;
+       default:
+               bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
+--- a/drivers/net/ethernet/broadcom/bgmac.c
++++ b/drivers/net/ethernet/broadcom/bgmac.c
+@@ -12,6 +12,7 @@
+ #include <linux/bcma/bcma.h>
+ #include <linux/etherdevice.h>
+ #include <linux/interrupt.h>
++#include <linux/platform_data/b53.h>
+ #include <linux/bcm47xx_nvram.h>
+ #include <linux/phy.h>
+ #include <linux/phy_fixed.h>
+@@ -1408,6 +1409,17 @@ static const struct ethtool_ops bgmac_et
+       .set_link_ksettings     = phy_ethtool_set_link_ksettings,
+ };
+ 
++static struct b53_platform_data bgmac_b53_pdata = {
++};
++
++static struct platform_device bgmac_b53_dev = {
++      .name           = "b53-srab-switch",
++      .id             = -1,
++      .dev            = {
++              .platform_data = &bgmac_b53_pdata,
++      },
++};
++
+ /**************************************************
+  * MII
+  **************************************************/
+@@ -1542,6 +1554,14 @@ int bgmac_enet_probe(struct bgmac *bgmac
+       /* Omit FCS from max MTU size */
+       net_dev->max_mtu = BGMAC_RX_MAX_FRAME_SIZE - ETH_FCS_LEN;
+ 
++      if ((bgmac->feature_flags & BGMAC_FEAT_SRAB) && !bgmac_b53_pdata.regs) {
++              bgmac_b53_pdata.regs = ioremap(0x18007000, 0x1000);
++
++              err = platform_device_register(&bgmac_b53_dev);
++              if (!err)
++                      bgmac->b53_device = &bgmac_b53_dev;
++      }
++
+       err = register_netdev(bgmac->net_dev);
+       if (err) {
+               dev_err(bgmac->dev, "Cannot register net device\n");
+@@ -1564,6 +1584,10 @@ EXPORT_SYMBOL_GPL(bgmac_enet_probe);
+ 
+ void bgmac_enet_remove(struct bgmac *bgmac)
+ {
++      if (bgmac->b53_device)
++              platform_device_unregister(&bgmac_b53_dev);
++      bgmac->b53_device = NULL;
++
+       unregister_netdev(bgmac->net_dev);
+       phy_disconnect(bgmac->net_dev->phydev);
+       netif_napi_del(&bgmac->napi);
+--- a/drivers/net/ethernet/broadcom/bgmac.h
++++ b/drivers/net/ethernet/broadcom/bgmac.h
+@@ -390,6 +390,7 @@
+ #define BGMAC_FEAT_CC4_IF_SW_TYPE_RGMII       BIT(18)
+ #define BGMAC_FEAT_CC7_IF_TYPE_RGMII  BIT(19)
+ #define BGMAC_FEAT_IDM_MASK           BIT(20)
++#define BGMAC_FEAT_SRAB                       BIT(21)
+ 
+ struct bgmac_slot_info {
+       union {
+@@ -495,6 +496,9 @@ struct bgmac {
+       void (*cmn_maskset32)(struct bgmac *bgmac, u16 offset, u32 mask,
+                             u32 set);
+       int (*phy_connect)(struct bgmac *bgmac);
++
++      /* platform device for associated switch */
++      struct platform_device *b53_device;
+ };
+ 
+ struct bgmac *bgmac_alloc(struct device *dev);

diff --git a/target/linux/generic/hack-6.0/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-6.0/780-usb-net-MeigLink_modem_support.patch
new file mode 100644 (file)
index 0000000..671df7d
--- /dev/null
+++ b/target/linux/generic/hack-6.0/780-usb-net-MeigLink_modem_support.patch
@@ -0,0 +1,43 @@
+From f81700b6bb2eda3756247bce472d8eaf6f466f61 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 13:49:26 +0200
+Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support
+
+---
+ drivers/net/usb/qmi_wwan.c  | 1 +
+ drivers/usb/serial/option.c | 7 +++++++
+ 2 files changed, 8 insertions(+)
+
+--- a/drivers/net/usb/qmi_wwan.c
++++ b/drivers/net/usb/qmi_wwan.c
+@@ -1085,6 +1085,7 @@ static const struct usb_device_id produc
+       {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0620)},   /* Quectel EM160R-GL */
+       {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0800)},   /* Quectel RM500Q-GL */
+       {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0801)},   /* Quectel RM520N */
++      {QMI_MATCH_FF_FF_FF(0x05c6, 0xf601)},   /* MeigLink SLM750 */
+ 
+       /* 3. Combined interface devices matching on interface number */
+       {QMI_FIXED_INTF(0x0408, 0xea42, 4)},    /* Yota / Megafon M100-1 */
+--- a/drivers/usb/serial/option.c
++++ b/drivers/usb/serial/option.c
+@@ -243,6 +243,8 @@ static void option_instat_callback(struc
+ #define UBLOX_PRODUCT_R6XX                    0x90fa
+ /* These Yuga products use Qualcomm's vendor ID */
+ #define YUGA_PRODUCT_CLM920_NC5                       0x9625
++/* These MeigLink products use Qualcomm's vendor ID */
++#define MEIGLINK_PRODUCT_SLM750                       0xf601
+ 
+ #define QUECTEL_VENDOR_ID                     0x2c7c
+ /* These Quectel products use Quectel's vendor ID */
+@@ -1133,6 +1135,11 @@ static const struct usb_device_id option
+       { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG95, 0xff, 0, 0) },
+       { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96),
+         .driver_info = RSVD(4) },
++      /* Meiglink products using Qualcomm vendor ID */
++      // Works OK. In case of some issues check macros that are used by Quectel Products
++      { USB_DEVICE_AND_INTERFACE_INFO(QUALCOMM_VENDOR_ID, MEIGLINK_PRODUCT_SLM750, 0xff, 0xff, 0xff),
++        .driver_info = NUMEP2 },
++      { USB_DEVICE_AND_INTERFACE_INFO(QUALCOMM_VENDOR_ID, MEIGLINK_PRODUCT_SLM750, 0xff, 0, 0) },
+       { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0xff, 0xff),
+         .driver_info = RSVD(1) | RSVD(2) | RSVD(3) | RSVD(4) | NUMEP2 },
+       { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0, 0) },

diff --git a/target/linux/generic/hack-6.0/800-GPIO-add-named-gpio-exports.patch b/target/linux/generic/hack-6.0/800-GPIO-add-named-gpio-exports.patch
new file mode 100644 (file)
index 0000000..3d34231
--- /dev/null
+++ b/target/linux/generic/hack-6.0/800-GPIO-add-named-gpio-exports.patch
@@ -0,0 +1,162 @@
+From cc809a441d8f2924f785eb863dfa6aef47a25b0b Mon Sep 17 00:00:00 2001
+From: John Crispin <[email protected]>
+Date: Tue, 12 Aug 2014 20:49:27 +0200
+Subject: [PATCH 30/36] GPIO: add named gpio exports
+
+Signed-off-by: John Crispin <[email protected]>
+--- a/drivers/gpio/gpiolib-of.c
++++ b/drivers/gpio/gpiolib-of.c
+@@ -19,6 +19,8 @@
+ #include <linux/pinctrl/pinctrl.h>
+ #include <linux/slab.h>
+ #include <linux/gpio/machine.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
+ 
+ #include "gpiolib.h"
+ #include "gpiolib-of.h"
+@@ -1057,3 +1059,72 @@ void of_gpio_dev_init(struct gpio_chip *
+       else
+               gc->of_node = gdev->dev.of_node;
+ }
++
++#ifdef CONFIG_GPIO_SYSFS
++
++static struct of_device_id gpio_export_ids[] = {
++      { .compatible = "gpio-export" },
++      { /* sentinel */ }
++};
++
++static int of_gpio_export_probe(struct platform_device *pdev)
++{
++      struct device_node *np = pdev->dev.of_node;
++      struct device_node *cnp;
++      u32 val;
++      int nb = 0;
++
++      for_each_child_of_node(np, cnp) {
++              const char *name = NULL;
++              int gpio;
++              bool dmc;
++              int max_gpio = 1;
++              int i;
++
++              of_property_read_string(cnp, "gpio-export,name", &name);
++
++              if (!name)
++                      max_gpio = of_gpio_count(cnp);
++
++              for (i = 0; i < max_gpio; i++) {
++                      unsigned flags = 0;
++                      enum of_gpio_flags of_flags;
++
++                      gpio = of_get_gpio_flags(cnp, i, &of_flags);
++                      if (!gpio_is_valid(gpio))
++                              return gpio;
++
++                      if (of_flags == OF_GPIO_ACTIVE_LOW)
++                              flags |= GPIOF_ACTIVE_LOW;
++
++                      if (!of_property_read_u32(cnp, "gpio-export,output", &val))
++                              flags |= val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
++                      else
++                              flags |= GPIOF_IN;
++
++                      if (devm_gpio_request_one(&pdev->dev, gpio, flags, name ? name : of_node_full_name(np)))
++                              continue;
++
++                      dmc = of_property_read_bool(cnp, "gpio-export,direction_may_change");
++                      gpio_export_with_name(gpio, dmc, name);
++                      nb++;
++              }
++      }
++
++      dev_info(&pdev->dev, "%d gpio(s) exported\n", nb);
++
++      return 0;
++}
++
++static struct platform_driver gpio_export_driver = {
++      .driver         = {
++              .name           = "gpio-export",
++              .owner  = THIS_MODULE,
++              .of_match_table = of_match_ptr(gpio_export_ids),
++      },
++      .probe          = of_gpio_export_probe,
++};
++
++module_platform_driver(gpio_export_driver);
++
++#endif
+--- a/include/asm-generic/gpio.h
++++ b/include/asm-generic/gpio.h
+@@ -125,6 +125,12 @@ static inline int gpio_export(unsigned g
+       return gpiod_export(gpio_to_desc(gpio), direction_may_change);
+ }
+ 
++int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name);
++static inline int gpio_export_with_name(unsigned gpio, bool direction_may_change, const char *name)
++{
++      return __gpiod_export(gpio_to_desc(gpio), direction_may_change, name);
++}
++
+ static inline int gpio_export_link(struct device *dev, const char *name,
+                                  unsigned gpio)
+ {
+--- a/include/linux/gpio/consumer.h
++++ b/include/linux/gpio/consumer.h
+@@ -715,6 +715,7 @@ static inline void devm_acpi_dev_remove_
+ 
+ #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS)
+ 
++int _gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name);
+ int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
+ int gpiod_export_link(struct device *dev, const char *name,
+                     struct gpio_desc *desc);
+@@ -722,6 +723,13 @@ void gpiod_unexport(struct gpio_desc *de
+ 
+ #else  /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */
+ 
++static inline int _gpiod_export(struct gpio_desc *desc,
++                             bool direction_may_change,
++                             const char *name)
++{
++      return -ENOSYS;
++}
++
+ static inline int gpiod_export(struct gpio_desc *desc,
+                              bool direction_may_change)
+ {
+--- a/drivers/gpio/gpiolib-sysfs.c
++++ b/drivers/gpio/gpiolib-sysfs.c
+@@ -561,7 +561,7 @@ static struct class gpio_class = {
+  *
+  * Returns zero on success, else an error.
+  */
+-int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
++int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name)
+ {
+       struct gpio_chip        *chip;
+       struct gpio_device      *gdev;
+@@ -623,6 +623,8 @@ int gpiod_export(struct gpio_desc *desc,
+       offset = gpio_chip_hwgpio(desc);
+       if (chip->names && chip->names[offset])
+               ioname = chip->names[offset];
++      if (name)
++              ioname = name;
+ 
+       dev = device_create_with_groups(&gpio_class, &gdev->dev,
+                                       MKDEV(0, 0), data, gpio_groups,
+@@ -644,6 +646,12 @@ err_unlock:
+       gpiod_dbg(desc, "%s: status %d\n", __func__, status);
+       return status;
+ }
++EXPORT_SYMBOL_GPL(__gpiod_export);
++
++int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
++{
++      return __gpiod_export(desc, direction_may_change, NULL);
++}
+ EXPORT_SYMBOL_GPL(gpiod_export);
+ 
+ static int match_export(struct device *dev, const void *desc)

diff --git a/target/linux/generic/hack-6.0/901-debloat_sock_diag.patch b/target/linux/generic/hack-6.0/901-debloat_sock_diag.patch
new file mode 100644 (file)
index 0000000..88cd2d1
--- /dev/null
+++ b/target/linux/generic/hack-6.0/901-debloat_sock_diag.patch
@@ -0,0 +1,164 @@
+From 3b6115d6b57a263bdc8c9b1df273bd4a7955eead Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Sat, 8 Jul 2017 08:16:31 +0200
+Subject: debloat: add some debloat patches, strip down procfs and make O_DIRECT support optional, saves ~15K after lzma on MIPS
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ net/Kconfig         | 3 +++
+ net/core/Makefile   | 3 ++-
+ net/core/sock.c     | 2 ++
+ net/ipv4/Kconfig    | 1 +
+ net/netlink/Kconfig | 1 +
+ net/packet/Kconfig  | 1 +
+ net/unix/Kconfig    | 1 +
+ 7 files changed, 11 insertions(+), 1 deletion(-)
+
+--- a/net/Kconfig
++++ b/net/Kconfig
+@@ -104,6 +104,9 @@ source "net/mptcp/Kconfig"
+ 
+ endif # if INET
+ 
++config SOCK_DIAG
++      bool
++
+ config NETWORK_SECMARK
+       bool "Security Marking"
+       help
+--- a/net/core/Makefile
++++ b/net/core/Makefile
+@@ -10,11 +10,12 @@ obj-$(CONFIG_SYSCTL) += sysctl_net_core.
+ 
+ obj-y              += dev.o dev_addr_lists.o dst.o netevent.o \
+                       neighbour.o rtnetlink.o utils.o link_watch.o filter.o \
+-                      sock_diag.o dev_ioctl.o tso.o sock_reuseport.o \
++                      dev_ioctl.o tso.o sock_reuseport.o \
+                       fib_notifier.o xdp.o flow_offload.o gro.o
+ 
+ obj-$(CONFIG_NETDEV_ADDR_LIST_TEST) += dev_addr_lists_test.o
+ 
++obj-$(CONFIG_SOCK_DIAG) += sock_diag.o
+ obj-y += net-sysfs.o
+ obj-$(CONFIG_PAGE_POOL) += page_pool.o
+ obj-$(CONFIG_PROC_FS) += net-procfs.o
+--- a/net/core/sock.c
++++ b/net/core/sock.c
+@@ -114,6 +114,7 @@
+ #include <linux/memcontrol.h>
+ #include <linux/prefetch.h>
+ #include <linux/compat.h>
++#include <linux/cookie.h>
+ 
+ #include <linux/uaccess.h>
+ 
+@@ -143,6 +144,7 @@
+ 
+ static DEFINE_MUTEX(proto_list_mutex);
+ static LIST_HEAD(proto_list);
++DEFINE_COOKIE(sock_cookie);
+ 
+ static void sock_inuse_add(struct net *net, int val);
+ 
+@@ -545,6 +547,18 @@ discard_and_relse:
+ }
+ EXPORT_SYMBOL(__sk_receive_skb);
+ 
++u64 __sock_gen_cookie(struct sock *sk)
++{
++      while (1) {
++              u64 res = atomic64_read(&sk->sk_cookie);
++
++              if (res)
++                      return res;
++              res = gen_cookie_next(&sock_cookie);
++              atomic64_cmpxchg(&sk->sk_cookie, 0, res);
++      }
++}
++
+ INDIRECT_CALLABLE_DECLARE(struct dst_entry *ip6_dst_check(struct dst_entry *,
+                                                         u32));
+ INDIRECT_CALLABLE_DECLARE(struct dst_entry *ipv4_dst_check(struct dst_entry *,
+@@ -1983,9 +1997,11 @@ static void __sk_free(struct sock *sk)
+       if (likely(sk->sk_net_refcnt))
+               sock_inuse_add(sock_net(sk), -1);
+ 
++#ifdef CONFIG_SOCK_DIAG
+       if (unlikely(sk->sk_net_refcnt && sock_diag_has_destroy_listeners(sk)))
+               sock_diag_broadcast_destroy(sk);
+       else
++#endif
+               sk_destruct(sk);
+ }
+ 
+--- a/net/core/sock_diag.c
++++ b/net/core/sock_diag.c
+@@ -11,7 +11,6 @@
+ #include <linux/tcp.h>
+ #include <linux/workqueue.h>
+ #include <linux/nospec.h>
+-#include <linux/cookie.h>
+ #include <linux/inet_diag.h>
+ #include <linux/sock_diag.h>
+ 
+@@ -20,20 +19,6 @@ static int (*inet_rcv_compat)(struct sk_
+ static DEFINE_MUTEX(sock_diag_table_mutex);
+ static struct workqueue_struct *broadcast_wq;
+ 
+-DEFINE_COOKIE(sock_cookie);
+-
+-u64 __sock_gen_cookie(struct sock *sk)
+-{
+-      while (1) {
+-              u64 res = atomic64_read(&sk->sk_cookie);
+-
+-              if (res)
+-                      return res;
+-              res = gen_cookie_next(&sock_cookie);
+-              atomic64_cmpxchg(&sk->sk_cookie, 0, res);
+-      }
+-}
+-
+ int sock_diag_check_cookie(struct sock *sk, const __u32 *cookie)
+ {
+       u64 res;
+--- a/net/ipv4/Kconfig
++++ b/net/ipv4/Kconfig
+@@ -414,6 +414,7 @@ config INET_TUNNEL
+ 
+ config INET_DIAG
+       tristate "INET: socket monitoring interface"
++      select SOCK_DIAG
+       default y
+       help
+         Support for INET (TCP, DCCP, etc) socket monitoring interface used by
+--- a/net/netlink/Kconfig
++++ b/net/netlink/Kconfig
+@@ -5,6 +5,7 @@
+ 
+ config NETLINK_DIAG
+       tristate "NETLINK: socket monitoring interface"
++      select SOCK_DIAG
+       default n
+       help
+         Support for NETLINK socket monitoring interface used by the ss tool.
+--- a/net/packet/Kconfig
++++ b/net/packet/Kconfig
+@@ -19,6 +19,7 @@ config PACKET
+ config PACKET_DIAG
+       tristate "Packet: sockets monitoring interface"
+       depends on PACKET
++      select SOCK_DIAG
+       default n
+       help
+         Support for PF_PACKET sockets monitoring interface used by the ss tool.
+--- a/net/unix/Kconfig
++++ b/net/unix/Kconfig
+@@ -33,6 +33,7 @@ config       AF_UNIX_OOB
+ config UNIX_DIAG
+       tristate "UNIX: socket monitoring interface"
+       depends on UNIX
++      select SOCK_DIAG
+       default n
+       help
+         Support for UNIX socket monitoring interface used by the ss tool.

diff --git a/target/linux/generic/hack-6.0/902-debloat_proc.patch b/target/linux/generic/hack-6.0/902-debloat_proc.patch
new file mode 100644 (file)
index 0000000..33d637f
--- /dev/null
+++ b/target/linux/generic/hack-6.0/902-debloat_proc.patch
@@ -0,0 +1,408 @@
+From 9e3f1d0805b2d919904dd9a4ff0d956314cc3cba Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Sat, 8 Jul 2017 08:20:09 +0200
+Subject: debloat: procfs
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ fs/locks.c               |  2 ++
+ fs/proc/Kconfig          |  5 +++++
+ fs/proc/consoles.c       |  3 +++
+ fs/proc/proc_tty.c       | 11 ++++++++++-
+ include/net/snmp.h       | 18 +++++++++++++++++-
+ ipc/msg.c                |  3 +++
+ ipc/sem.c                |  2 ++
+ ipc/shm.c                |  2 ++
+ ipc/util.c               |  3 +++
+ kernel/exec_domain.c     |  2 ++
+ kernel/irq/proc.c        |  9 +++++++++
+ kernel/time/timer_list.c |  2 ++
+ mm/vmalloc.c             |  2 ++
+ mm/vmstat.c              |  8 +++++---
+ net/8021q/vlanproc.c     |  6 ++++++
+ net/core/net-procfs.c    | 18 ++++++++++++------
+ net/core/sock.c          |  2 ++
+ net/ipv4/fib_trie.c      | 18 ++++++++++++------
+ net/ipv4/proc.c          |  3 +++
+ net/ipv4/route.c         |  3 +++
+ 20 files changed, 105 insertions(+), 17 deletions(-)
+
+--- a/fs/locks.c
++++ b/fs/locks.c
+@@ -2929,6 +2929,8 @@ static const struct seq_operations locks
+ 
+ static int __init proc_locks_init(void)
+ {
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return 0;
+       proc_create_seq_private("locks", 0, NULL, &locks_seq_operations,
+                       sizeof(struct locks_iterator), NULL);
+       return 0;
+--- a/fs/proc/Kconfig
++++ b/fs/proc/Kconfig
+@@ -100,6 +100,11 @@ config PROC_CHILDREN
+         Say Y if you are running any user-space software which takes benefit from
+         this interface. For example, rkt is such a piece of software.
+ 
++config PROC_STRIPPED
++      default n
++      depends on EXPERT
++      bool "Strip non-essential /proc functionality to reduce code size"
++
+ config PROC_PID_ARCH_STATUS
+       def_bool n
+       depends on PROC_FS
+--- a/fs/proc/consoles.c
++++ b/fs/proc/consoles.c
+@@ -92,6 +92,9 @@ static const struct seq_operations conso
+ 
+ static int __init proc_consoles_init(void)
+ {
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return 0;
++
+       proc_create_seq("consoles", 0, NULL, &consoles_op);
+       return 0;
+ }
+--- a/fs/proc/proc_tty.c
++++ b/fs/proc/proc_tty.c
+@@ -133,7 +133,10 @@ static const struct seq_operations tty_d
+ void proc_tty_register_driver(struct tty_driver *driver)
+ {
+       struct proc_dir_entry *ent;
+-              
++
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return;
++
+       if (!driver->driver_name || driver->proc_entry ||
+           !driver->ops->proc_show)
+               return;
+@@ -150,6 +153,9 @@ void proc_tty_unregister_driver(struct t
+ {
+       struct proc_dir_entry *ent;
+ 
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return;
++
+       ent = driver->proc_entry;
+       if (!ent)
+               return;
+@@ -164,6 +170,9 @@ void proc_tty_unregister_driver(struct t
+  */
+ void __init proc_tty_init(void)
+ {
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return;
++
+       if (!proc_mkdir("tty", NULL))
+               return;
+       proc_mkdir("tty/ldisc", NULL);  /* Preserved: it's userspace visible */
+--- a/include/net/snmp.h
++++ b/include/net/snmp.h
+@@ -124,6 +124,21 @@ struct linux_tls_mib {
+ #define DECLARE_SNMP_STAT(type, name) \
+       extern __typeof__(type) __percpu *name
+ 
++#ifdef CONFIG_PROC_STRIPPED
++#define __SNMP_STATS_DUMMY(mib)       \
++      do { (void) mib->mibs[0]; } while(0)
++
++#define __SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib)
++#define SNMP_INC_STATS_ATOMIC_LONG(mib, field) __SNMP_STATS_DUMMY(mib)
++#define SNMP_INC_STATS(mib, field) __SNMP_STATS_DUMMY(mib)
++#define SNMP_DEC_STATS(mib, field) __SNMP_STATS_DUMMY(mib)
++#define __SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib)
++#define SNMP_ADD_STATS(mib, field, addend) __SNMP_STATS_DUMMY(mib)
++#define SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib)
++#define __SNMP_UPD_PO_STATS(mib, basefield, addend) __SNMP_STATS_DUMMY(mib)
++
++#else
++
+ #define __SNMP_INC_STATS(mib, field)  \
+                       __this_cpu_inc(mib->mibs[field])
+ 
+@@ -154,8 +169,9 @@ struct linux_tls_mib {
+               __this_cpu_add(ptr[basefield##OCTETS], addend); \
+       } while (0)
+ 
++#endif
+ 
+-#if BITS_PER_LONG==32
++#if (BITS_PER_LONG==32) && !defined(CONFIG_PROC_STRIPPED)
+ 
+ #define __SNMP_ADD_STATS64(mib, field, addend)                                \
+       do {                                                            \
+--- a/ipc/msg.c
++++ b/ipc/msg.c
+@@ -1350,6 +1350,9 @@ void __init msg_init(void)
+ {
+       msg_init_ns(&init_ipc_ns);
+ 
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return;
++
+       ipc_init_proc_interface("sysvipc/msg",
+                               "       key      msqid perms      cbytes       qnum lspid lrpid   uid   gid  cuid  cgid      stime      rtime      ctime\n",
+                               IPC_MSG_IDS, sysvipc_msg_proc_show);
+--- a/ipc/sem.c
++++ b/ipc/sem.c
+@@ -268,6 +268,8 @@ void sem_exit_ns(struct ipc_namespace *n
+ void __init sem_init(void)
+ {
+       sem_init_ns(&init_ipc_ns);
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return;
+       ipc_init_proc_interface("sysvipc/sem",
+                               "       key      semid perms      nsems   uid   gid  cuid  cgid      otime      ctime\n",
+                               IPC_SEM_IDS, sysvipc_sem_proc_show);
+--- a/ipc/shm.c
++++ b/ipc/shm.c
+@@ -154,6 +154,8 @@ pure_initcall(ipc_ns_init);
+ 
+ void __init shm_init(void)
+ {
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return;
+       ipc_init_proc_interface("sysvipc/shm",
+ #if BITS_PER_LONG <= 32
+                               "       key      shmid perms       size  cpid  lpid nattch   uid   gid  cuid  cgid      atime      dtime      ctime        rss       swap\n",
+--- a/ipc/util.c
++++ b/ipc/util.c
+@@ -141,6 +141,9 @@ void __init ipc_init_proc_interface(cons
+       struct proc_dir_entry *pde;
+       struct ipc_proc_iface *iface;
+ 
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return;
++
+       iface = kmalloc(sizeof(*iface), GFP_KERNEL);
+       if (!iface)
+               return;
+--- a/kernel/exec_domain.c
++++ b/kernel/exec_domain.c
+@@ -29,6 +29,8 @@ static int execdomains_proc_show(struct
+ 
+ static int __init proc_execdomains_init(void)
+ {
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return 0;
+       proc_create_single("execdomains", 0, NULL, execdomains_proc_show);
+       return 0;
+ }
+--- a/kernel/irq/proc.c
++++ b/kernel/irq/proc.c
+@@ -341,6 +341,9 @@ void register_irq_proc(unsigned int irq,
+       void __maybe_unused *irqp = (void *)(unsigned long) irq;
+       char name [MAX_NAMELEN];
+ 
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP))
++              return;
++
+       if (!root_irq_dir || (desc->irq_data.chip == &no_irq_chip))
+               return;
+ 
+@@ -394,6 +397,9 @@ void unregister_irq_proc(unsigned int ir
+ {
+       char name [MAX_NAMELEN];
+ 
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP))
++              return;
++
+       if (!root_irq_dir || !desc->dir)
+               return;
+ #ifdef CONFIG_SMP
+@@ -432,6 +438,9 @@ void init_irq_proc(void)
+       unsigned int irq;
+       struct irq_desc *desc;
+ 
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED) && !IS_ENABLED(CONFIG_SMP))
++              return;
++
+       /* create /proc/irq */
+       root_irq_dir = proc_mkdir("irq", NULL);
+       if (!root_irq_dir)
+--- a/kernel/time/timer_list.c
++++ b/kernel/time/timer_list.c
+@@ -350,6 +350,8 @@ static int __init init_timer_list_procfs
+ {
+       struct proc_dir_entry *pe;
+ 
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return 0;
+       pe = proc_create_seq_private("timer_list", 0400, NULL, &timer_list_sops,
+                       sizeof(struct timer_list_iter), NULL);
+       if (!pe)
+--- a/mm/vmalloc.c
++++ b/mm/vmalloc.c
+@@ -3962,6 +3962,8 @@ static const struct seq_operations vmall
+ 
+ static int __init proc_vmalloc_init(void)
+ {
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return 0;
+       if (IS_ENABLED(CONFIG_NUMA))
+               proc_create_seq_private("vmallocinfo", 0400, NULL,
+                               &vmalloc_op,
+--- a/mm/vmstat.c
++++ b/mm/vmstat.c
+@@ -2083,10 +2083,12 @@ void __init init_mm_internals(void)
+       start_shepherd_timer();
+ #endif
+ #ifdef CONFIG_PROC_FS
+-      proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op);
+-      proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op);
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) {
++              proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op);
++              proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op);
++              proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op);
++      }
+       proc_create_seq("vmstat", 0444, NULL, &vmstat_op);
+-      proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op);
+ #endif
+ }
+ 
+--- a/net/8021q/vlanproc.c
++++ b/net/8021q/vlanproc.c
+@@ -93,6 +93,9 @@ void vlan_proc_cleanup(struct net *net)
+ {
+       struct vlan_net *vn = net_generic(net, vlan_net_id);
+ 
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return;
++
+       if (vn->proc_vlan_conf)
+               remove_proc_entry(name_conf, vn->proc_vlan_dir);
+ 
+@@ -112,6 +115,9 @@ int __net_init vlan_proc_init(struct net
+ {
+       struct vlan_net *vn = net_generic(net, vlan_net_id);
+ 
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return 0;
++
+       vn->proc_vlan_dir = proc_net_mkdir(net, name_root, net->proc_net);
+       if (!vn->proc_vlan_dir)
+               goto err;
+--- a/net/core/net-procfs.c
++++ b/net/core/net-procfs.c
+@@ -317,10 +317,12 @@ static int __net_init dev_proc_net_init(
+       if (!proc_create_net("dev", 0444, net->proc_net, &dev_seq_ops,
+                       sizeof(struct seq_net_private)))
+               goto out;
+-      if (!proc_create_seq("softnet_stat", 0444, net->proc_net,
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
++                      !proc_create_seq("softnet_stat", 0444, net->proc_net,
+                        &softnet_seq_ops))
+               goto out_dev;
+-      if (!proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops,
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
++                      !proc_create_net("ptype", 0444, net->proc_net, &ptype_seq_ops,
+                       sizeof(struct seq_net_private)))
+               goto out_softnet;
+ 
+@@ -330,9 +332,11 @@ static int __net_init dev_proc_net_init(
+ out:
+       return rc;
+ out_ptype:
+-      remove_proc_entry("ptype", net->proc_net);
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
++              remove_proc_entry("ptype", net->proc_net);
+ out_softnet:
+-      remove_proc_entry("softnet_stat", net->proc_net);
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
++              remove_proc_entry("softnet_stat", net->proc_net);
+ out_dev:
+       remove_proc_entry("dev", net->proc_net);
+       goto out;
+@@ -342,8 +346,10 @@ static void __net_exit dev_proc_net_exit
+ {
+       wext_proc_exit(net);
+ 
+-      remove_proc_entry("ptype", net->proc_net);
+-      remove_proc_entry("softnet_stat", net->proc_net);
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) {
++              remove_proc_entry("ptype", net->proc_net);
++              remove_proc_entry("softnet_stat", net->proc_net);
++      }
+       remove_proc_entry("dev", net->proc_net);
+ }
+ 
+--- a/net/core/sock.c
++++ b/net/core/sock.c
+@@ -3855,6 +3855,8 @@ static __net_initdata struct pernet_oper
+ 
+ static int __init proto_init(void)
+ {
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return 0;
+       return register_pernet_subsys(&proto_net_ops);
+ }
+ 
+--- a/net/ipv4/fib_trie.c
++++ b/net/ipv4/fib_trie.c
+@@ -3022,11 +3022,13 @@ static const struct seq_operations fib_r
+ 
+ int __net_init fib_proc_init(struct net *net)
+ {
+-      if (!proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops,
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
++                      !proc_create_net("fib_trie", 0444, net->proc_net, &fib_trie_seq_ops,
+                       sizeof(struct fib_trie_iter)))
+               goto out1;
+ 
+-      if (!proc_create_net_single("fib_triestat", 0444, net->proc_net,
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED) &&
++                      !proc_create_net_single("fib_triestat", 0444, net->proc_net,
+                       fib_triestat_seq_show, NULL))
+               goto out2;
+ 
+@@ -3037,17 +3039,21 @@ int __net_init fib_proc_init(struct net
+       return 0;
+ 
+ out3:
+-      remove_proc_entry("fib_triestat", net->proc_net);
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
++              remove_proc_entry("fib_triestat", net->proc_net);
+ out2:
+-      remove_proc_entry("fib_trie", net->proc_net);
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED))
++              remove_proc_entry("fib_trie", net->proc_net);
+ out1:
+       return -ENOMEM;
+ }
+ 
+ void __net_exit fib_proc_exit(struct net *net)
+ {
+-      remove_proc_entry("fib_trie", net->proc_net);
+-      remove_proc_entry("fib_triestat", net->proc_net);
++      if (!IS_ENABLED(CONFIG_PROC_STRIPPED)) {
++              remove_proc_entry("fib_trie", net->proc_net);
++              remove_proc_entry("fib_triestat", net->proc_net);
++      }
+       remove_proc_entry("route", net->proc_net);
+ }
+ 
+--- a/net/ipv4/proc.c
++++ b/net/ipv4/proc.c
+@@ -553,5 +553,8 @@ static __net_initdata struct pernet_oper
+ 
+ int __init ip_misc_proc_init(void)
+ {
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return 0;
++
+       return register_pernet_subsys(&ip_proc_ops);
+ }
+--- a/net/ipv4/route.c
++++ b/net/ipv4/route.c
+@@ -387,6 +387,9 @@ static struct pernet_operations ip_rt_pr
+ 
+ static int __init ip_rt_proc_init(void)
+ {
++      if (IS_ENABLED(CONFIG_PROC_STRIPPED))
++              return 0;
++
+       return register_pernet_subsys(&ip_rt_proc_ops);
+ }
+ 

diff --git a/target/linux/generic/hack-6.0/904-debloat_dma_buf.patch b/target/linux/generic/hack-6.0/904-debloat_dma_buf.patch
new file mode 100644 (file)
index 0000000..8eb7053
--- /dev/null
+++ b/target/linux/generic/hack-6.0/904-debloat_dma_buf.patch
@@ -0,0 +1,94 @@
+From e3692cb2fcd5ba1244512a0f43b8118f65f1c375 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Sat, 8 Jul 2017 08:20:43 +0200
+Subject: debloat: dmabuf
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ drivers/base/Kconfig      |  2 +-
+ drivers/dma-buf/Makefile  | 10 +++++++---
+ drivers/dma-buf/dma-buf.c |  4 +++-
+ kernel/sched/core.c       |  1 +
+ 4 files changed, 12 insertions(+), 5 deletions(-)
+
+--- a/drivers/base/Kconfig
++++ b/drivers/base/Kconfig
+@@ -187,7 +187,7 @@ config SOC_BUS
+ source "drivers/base/regmap/Kconfig"
+ 
+ config DMA_SHARED_BUFFER
+-      bool
++      tristate
+       default n
+       select IRQ_WORK
+       help
+--- a/drivers/dma-buf/heaps/Makefile
++++ b/drivers/dma-buf/heaps/Makefile
+@@ -1,3 +1,3 @@
+ # SPDX-License-Identifier: GPL-2.0
+-obj-$(CONFIG_DMABUF_HEAPS_SYSTEM)     += system_heap.o
+-obj-$(CONFIG_DMABUF_HEAPS_CMA)                += cma_heap.o
++dma-buf-objs-$(CONFIG_DMABUF_HEAPS_SYSTEM)    += system_heap.o
++dma-buf-objs-$(CONFIG_DMABUF_HEAPS_CMA)               += cma_heap.o
+--- a/drivers/dma-buf/Makefile
++++ b/drivers/dma-buf/Makefile
+@@ -1,18 +1,22 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+-obj-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \
++obj-$(CONFIG_DMA_SHARED_BUFFER) := dma-shared-buffer.o
++
++dma-buf-objs-y := dma-buf.o dma-fence.o dma-fence-array.o dma-fence-chain.o \
+        dma-fence-unwrap.o dma-resv.o
+-obj-$(CONFIG_DMABUF_HEAPS)    += dma-heap.o
+-obj-$(CONFIG_DMABUF_HEAPS)    += heaps/
+-obj-$(CONFIG_SYNC_FILE)               += sync_file.o
+-obj-$(CONFIG_SW_SYNC)         += sw_sync.o sync_debug.o
+-obj-$(CONFIG_UDMABUF)         += udmabuf.o
+-obj-$(CONFIG_DMABUF_SYSFS_STATS) += dma-buf-sysfs-stats.o
++dma-buf-objs-$(CONFIG_DMABUF_HEAPS)   += dma-heap.o
++obj-$(CONFIG_DMABUF_HEAPS)            += heaps/
++dma-buf-objs-$(CONFIG_SYNC_FILE)      += sync_file.o
++dma-buf-objs-$(CONFIG_SW_SYNC)                += sw_sync.o sync_debug.o
++dma-buf-objs-$(CONFIG_UDMABUF)                += udmabuf.o
++dma-buf-objs-$(CONFIG_DMABUF_SYSFS_STATS) += dma-buf-sysfs-stats.o
+ 
+ dmabuf_selftests-y := \
+       selftest.o \
+       st-dma-fence.o \
+       st-dma-fence-chain.o \
+       st-dma-fence-unwrap.o \
+       st-dma-resv.o
+ 
+-obj-$(CONFIG_DMABUF_SELFTESTS)        += dmabuf_selftests.o
++dma-buf-objs-$(CONFIG_DMABUF_SELFTESTS)       += dmabuf_selftests.o
++
++dma-shared-buffer-objs :=  $(dma-buf-objs-y)
+--- a/drivers/dma-buf/dma-buf.c
++++ b/drivers/dma-buf/dma-buf.c
+@@ -1513,4 +1513,5 @@ static void __exit dma_buf_deinit(void)
+       kern_unmount(dma_buf_mnt);
+       dma_buf_uninit_sysfs_statistics();
+ }
+-__exitcall(dma_buf_deinit);
++module_exit(dma_buf_deinit);
++MODULE_LICENSE("GPL");
+--- a/kernel/sched/core.c
++++ b/kernel/sched/core.c
+@@ -4175,6 +4175,7 @@ int wake_up_state(struct task_struct *p,
+ {
+       return try_to_wake_up(p, state, 0);
+ }
++EXPORT_SYMBOL_GPL(wake_up_state);
+ 
+ /*
+  * Perform scheduler related setup for a newly forked process p.
+--- a/fs/d_path.c
++++ b/fs/d_path.c
+@@ -316,6 +316,7 @@ char *dynamic_dname(struct dentry *dentr
+       buffer += buflen - sz;
+       return memcpy(buffer, temp, sz);
+ }
++EXPORT_SYMBOL_GPL(dynamic_dname);
+ 
+ char *simple_dname(struct dentry *dentry, char *buffer, int buflen)
+ {

diff --git a/target/linux/generic/hack-6.0/910-kobject_uevent.patch b/target/linux/generic/hack-6.0/910-kobject_uevent.patch
new file mode 100644 (file)
index 0000000..c4c41ca
--- /dev/null
+++ b/target/linux/generic/hack-6.0/910-kobject_uevent.patch
@@ -0,0 +1,32 @@
+From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Sun, 16 Jul 2017 16:56:10 +0200
+Subject: lib: add uevent_next_seqnum()
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/linux/kobject.h |  5 +++++
+ lib/kobject_uevent.c    | 37 +++++++++++++++++++++++++++++++++++++
+ 2 files changed, 42 insertions(+)
+
+--- a/lib/kobject_uevent.c
++++ b/lib/kobject_uevent.c
+@@ -179,6 +179,18 @@ out:
+       return r;
+ }
+ 
++u64 uevent_next_seqnum(void)
++{
++      u64 seq;
++
++      mutex_lock(&uevent_sock_mutex);
++      seq = ++uevent_seqnum;
++      mutex_unlock(&uevent_sock_mutex);
++
++      return seq;
++}
++EXPORT_SYMBOL_GPL(uevent_next_seqnum);
++
+ /**
+  * kobject_synth_uevent - send synthetic uevent with arguments
+  *

diff --git a/target/linux/generic/hack-6.0/911-kobject_add_broadcast_uevent.patch b/target/linux/generic/hack-6.0/911-kobject_add_broadcast_uevent.patch
new file mode 100644 (file)
index 0000000..a487d55
--- /dev/null
+++ b/target/linux/generic/hack-6.0/911-kobject_add_broadcast_uevent.patch
@@ -0,0 +1,76 @@
+From 0d37e6edc09c99e683dd91ca0e83bbc0df8477b3 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <[email protected]>
+Date: Sun, 16 Jul 2017 16:56:10 +0200
+Subject: lib: add uevent_next_seqnum()
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/linux/kobject.h |  5 +++++
+ lib/kobject_uevent.c    | 37 +++++++++++++++++++++++++++++++++++++
+ 2 files changed, 42 insertions(+)
+
+--- a/include/linux/kobject.h
++++ b/include/linux/kobject.h
+@@ -32,6 +32,8 @@
+ #define UEVENT_NUM_ENVP                       64      /* number of env pointers */
+ #define UEVENT_BUFFER_SIZE            2048    /* buffer for the variables */
+ 
++struct sk_buff;
++
+ #ifdef CONFIG_UEVENT_HELPER
+ /* path to the userspace helper executed on an event */
+ extern char uevent_helper[];
+@@ -244,4 +246,7 @@ int kobject_synth_uevent(struct kobject
+ __printf(2, 3)
+ int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...);
+ 
++int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group,
++                   gfp_t allocation);
++
+ #endif /* _KOBJECT_H_ */
+--- a/lib/kobject_uevent.c
++++ b/lib/kobject_uevent.c
+@@ -691,6 +691,43 @@ int add_uevent_var(struct kobj_uevent_en
+ EXPORT_SYMBOL_GPL(add_uevent_var);
+ 
+ #if defined(CONFIG_NET)
++int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group,
++                   gfp_t allocation)
++{
++      struct uevent_sock *ue_sk;
++      int err = 0;
++
++      /* send netlink message */
++      mutex_lock(&uevent_sock_mutex);
++      list_for_each_entry(ue_sk, &uevent_sock_list, list) {
++              struct sock *uevent_sock = ue_sk->sk;
++              struct sk_buff *skb2;
++
++              skb2 = skb_clone(skb, allocation);
++              if (!skb2)
++                      break;
++
++              err = netlink_broadcast(uevent_sock, skb2, pid, group,
++                                      allocation);
++              if (err)
++                      break;
++      }
++      mutex_unlock(&uevent_sock_mutex);
++
++      kfree_skb(skb);
++      return err;
++}
++#else
++int broadcast_uevent(struct sk_buff *skb, __u32 pid, __u32 group,
++                   gfp_t allocation)
++{
++      kfree_skb(skb);
++      return 0;
++}
++#endif
++EXPORT_SYMBOL_GPL(broadcast_uevent);
++
++#if defined(CONFIG_NET)
+ static int uevent_net_broadcast(struct sock *usk, struct sk_buff *skb,
+                               struct netlink_ext_ack *extack)
+ {

diff --git a/target/linux/generic/hack-6.0/920-device_tree_cmdline.patch b/target/linux/generic/hack-6.0/920-device_tree_cmdline.patch
new file mode 100644 (file)
index 0000000..b75c0fa
--- /dev/null
+++ b/target/linux/generic/hack-6.0/920-device_tree_cmdline.patch
@@ -0,0 +1,21 @@
+From e08bcbbaa52fcc41f02743fd2e62a33255ce52da Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 13:52:28 +0200
+Subject: [PATCH] of/ftd: add device tree cmdline
+
+---
+ drivers/of/fdt.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/of/fdt.c
++++ b/drivers/of/fdt.c
+@@ -1158,6 +1158,9 @@ int __init early_init_dt_scan_chosen(uns
+       p = of_get_flat_dt_prop(node, "bootargs", &l);
+       if (p != NULL && l > 0)
+               strlcpy(cmdline, p, min(l, COMMAND_LINE_SIZE));
++      p = of_get_flat_dt_prop(node, "bootargs-append", &l);
++      if (p != NULL && l > 0)
++              strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE));
+ 
+       /*
+        * CONFIG_CMDLINE is meant to be a default in case nothing else

diff --git a/target/linux/generic/hack-6.0/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch b/target/linux/generic/hack-6.0/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch
new file mode 100644 (file)
index 0000000..4f4d6c7
--- /dev/null
+++ b/target/linux/generic/hack-6.0/930-Revert-Revert-Revert-driver-core-Set-fw_devlink-on-b.patch
@@ -0,0 +1,30 @@
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <[email protected]>
+Date: Tue, 19 Jul 2022 06:17:48 +0200
+Subject: [PATCH] Revert "Revert "Revert "driver core: Set fw_devlink=on by
+ default"""
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This reverts commit ea718c699055c8566eb64432388a04974c43b2ea.
+
+With of_platform_populate() called for MTD partitions that commit breaks
+probing devices which reference MTD in device tree.
+
+Link: https://lore.kernel.org/all/[email protected]/T/#u
+Signed-off-by: Rafał Miłecki <[email protected]>
+---
+ drivers/base/core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/base/core.c
++++ b/drivers/base/core.c
+@@ -1562,7 +1562,7 @@ static void device_links_purge(struct de
+ #define FW_DEVLINK_FLAGS_RPM          (FW_DEVLINK_FLAGS_ON | \
+                                        DL_FLAG_PM_RUNTIME)
+ 
+-static u32 fw_devlink_flags = FW_DEVLINK_FLAGS_ON;
++static u32 fw_devlink_flags = FW_DEVLINK_FLAGS_PERMISSIVE;
+ static int __init fw_devlink_setup(char *arg)
+ {
+       if (!arg)

diff --git a/target/linux/generic/pending-6.0/100-compiler.h-only-include-asm-rwonce.h-for-kernel-code.patch b/target/linux/generic/pending-6.0/100-compiler.h-only-include-asm-rwonce.h-for-kernel-code.patch
new file mode 100644 (file)
index 0000000..22f52c1
--- /dev/null
+++ b/target/linux/generic/pending-6.0/100-compiler.h-only-include-asm-rwonce.h-for-kernel-code.patch
@@ -0,0 +1,29 @@
+From: Felix Fietkau <[email protected]>
+Date: Thu, 22 Oct 2020 22:00:03 +0200
+Subject: [PATCH] compiler.h: only include asm/rwonce.h for kernel code
+
+This header file is not in uapi, which makes any user space code that includes
+linux/compiler.h to fail with the error 'asm/rwonce.h: No such file or directory'
+
+Fixes: e506ea451254 ("compiler.h: Split {READ,WRITE}_ONCE definitions out into rwonce.h")
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+
+--- a/include/linux/compiler.h
++++ b/include/linux/compiler.h
+@@ -220,6 +220,8 @@ void ftrace_likely_update(struct ftrace_
+ #define function_nocfi(x) (x)
+ #endif
+ 
++#include <asm/rwonce.h>
++
+ #endif /* __KERNEL__ */
+ 
+ /*
+@@ -252,6 +254,4 @@ static inline void *offset_to_ptr(const
+  */
+ #define prevent_tail_call_optimization()      mb()
+ 
+-#include <asm/rwonce.h>
+-
+ #endif /* __LINUX_COMPILER_H */

diff --git a/target/linux/generic/pending-6.0/101-Use-stddefs.h-instead-of-compiler.h.patch b/target/linux/generic/pending-6.0/101-Use-stddefs.h-instead-of-compiler.h.patch
new file mode 100644 (file)
index 0000000..55388fb
--- /dev/null
+++ b/target/linux/generic/pending-6.0/101-Use-stddefs.h-instead-of-compiler.h.patch
@@ -0,0 +1,22 @@
+From d3c5b26768dbe990c4e1bd79e420c11ce7491d51 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 11:36:00 +0200
+Subject: [PATCH] swab: use stddefs.h instead of compiler.h
+
+Fix an issue with kernel headers that broke perf.
+
+---
+ include/uapi/linux/swab.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/uapi/linux/swab.h
++++ b/include/uapi/linux/swab.h
+@@ -3,7 +3,7 @@
+ #define _UAPI_LINUX_SWAB_H
+ 
+ #include <linux/types.h>
+-#include <linux/compiler.h>
++#include <linux/stddef.h>
+ #include <asm/bitsperlong.h>
+ #include <asm/swab.h>
+ 

diff --git a/target/linux/generic/pending-6.0/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch b/target/linux/generic/pending-6.0/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch
new file mode 100644 (file)
index 0000000..95a9656
--- /dev/null
+++ b/target/linux/generic/pending-6.0/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch
@@ -0,0 +1,57 @@
+From: Felix Fietkau <[email protected]>
+Date: Wed, 18 Apr 2018 10:50:05 +0200
+Subject: [PATCH] MIPS: only process negative stack offsets on stack traces
+
+Fixes endless back traces in cases where the compiler emits a stack
+pointer increase in a branch delay slot (probably for some form of
+function return).
+
+[    3.475442] BUG: MAX_STACK_TRACE_ENTRIES too low!
+[    3.480070] turning off the locking correctness validator.
+[    3.485521] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.14.34 #0
+[    3.491475] Stack : 00000000 00000000 00000000 00000000 80e0fce2 00000034 00000000 00000000
+[    3.499764]         87c3838c 80696377 8061047c 00000000 00000001 00000001 87c2d850 6534689f
+[    3.508059]         00000000 00000000 80e10000 00000000 00000000 000000cf 0000000f 00000000
+[    3.516353]         00000000 806a0000 00076891 00000000 00000000 00000000 ffffffff 00000000
+[    3.524648]         806c0000 00000004 80e10000 806a0000 00000003 80690000 00000000 80700000
+[    3.532942]         ...
+[    3.535362] Call Trace:
+[    3.537818] [<80010a48>] show_stack+0x58/0x100
+[    3.542207] [<804c2f78>] dump_stack+0xe8/0x170
+[    3.546613] [<80079f90>] save_trace+0xf0/0x110
+[    3.551010] [<8007b1ec>] mark_lock+0x33c/0x78c
+[    3.555413] [<8007bf48>] __lock_acquire+0x2ac/0x1a08
+[    3.560337] [<8007de60>] lock_acquire+0x64/0x8c
+[    3.564846] [<804e1570>] _raw_spin_lock_irqsave+0x54/0x78
+[    3.570186] [<801b618c>] kernfs_notify+0x94/0xac
+[    3.574770] [<801b7b10>] sysfs_notify+0x74/0xa0
+[    3.579257] [<801b618c>] kernfs_notify+0x94/0xac
+[    3.583839] [<801b7b10>] sysfs_notify+0x74/0xa0
+[    3.588329] [<801b618c>] kernfs_notify+0x94/0xac
+[    3.592911] [<801b7b10>] sysfs_notify+0x74/0xa0
+[    3.597401] [<801b618c>] kernfs_notify+0x94/0xac
+[    3.601983] [<801b7b10>] sysfs_notify+0x74/0xa0
+[    3.606473] [<801b618c>] kernfs_notify+0x94/0xac
+[    3.611055] [<801b7b10>] sysfs_notify+0x74/0xa0
+[    3.615545] [<801b618c>] kernfs_notify+0x94/0xac
+[    3.620125] [<801b7b10>] sysfs_notify+0x74/0xa0
+[    3.624619] [<801b618c>] kernfs_notify+0x94/0xac
+[    3.629197] [<801b7b10>] sysfs_notify+0x74/0xa0
+[    3.633691] [<801b618c>] kernfs_notify+0x94/0xac
+[    3.638269] [<801b7b10>] sysfs_notify+0x74/0xa0
+[    3.642763] [<801b618c>] kernfs_notify+0x94/0xac
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+
+--- a/arch/mips/kernel/process.c
++++ b/arch/mips/kernel/process.c
+@@ -393,6 +393,8 @@ static inline int is_sp_move_ins(union m
+ 
+       if (ip->i_format.opcode == addiu_op ||
+           ip->i_format.opcode == daddiu_op) {
++              if (ip->i_format.simmediate > 0)
++                      return 0;
+               *frame_size = -ip->i_format.simmediate;
+               return 1;
+       }

diff --git a/target/linux/generic/pending-6.0/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-6.0/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
new file mode 100644 (file)
index 0000000..4e347a4
--- /dev/null
+++ b/target/linux/generic/pending-6.0/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch
@@ -0,0 +1,82 @@
+From: Tobias Wolf <[email protected]>
+Subject: mm: Fix alloc_node_mem_map with ARCH_PFN_OFFSET calculation
+
+An rt288x (ralink) based router (Belkin F5D8235 v1) does not boot with any
+kernel beyond version 4.3 resulting in:
+
+BUG: Bad page state in process swapper  pfn:086ac
+
+bisect resulted in:
+
+a1c34a3bf00af2cede839879502e12dc68491ad5 is the first bad commit
+commit a1c34a3bf00af2cede839879502e12dc68491ad5
+Author: Laura Abbott <[email protected]>
+Date:   Thu Nov 5 18:48:46 2015 -0800
+
+    mm: Don't offset memmap for flatmem
+
+    Srinivas Kandagatla reported bad page messages when trying to remove the
+    bottom 2MB on an ARM based IFC6410 board
+
+      BUG: Bad page state in process swapper  pfn:fffa8
+      page:ef7fb500 count:0 mapcount:0 mapping:  (null) index:0x0
+      flags: 0x96640253(locked|error|dirty|active|arch_1|reclaim|mlocked)
+      page dumped because: PAGE_FLAGS_CHECK_AT_FREE flag(s) set
+      bad because of flags:
+      flags: 0x200041(locked|active|mlocked)
+      Modules linked in:
+      CPU: 0 PID: 0 Comm: swapper Not tainted 3.19.0-rc3-00007-g412f9ba-dirty
+#816
+      Hardware name: Qualcomm (Flattened Device Tree)
+        unwind_backtrace
+        show_stack
+        dump_stack
+        bad_page
+        free_pages_prepare
+        free_hot_cold_page
+        __free_pages
+        free_highmem_page
+        mem_init
+        start_kernel
+      Disabling lock debugging due to kernel taint
+    [...]
+:040000 040000 2de013c372345fd471cd58f0553c9b38b0ef1cc4
+0a8156f848733dfa21e16c196dfb6c0a76290709 M      mm
+
+This fix for ARM does not account ARCH_PFN_OFFSET for mem_map as later used by
+page_to_pfn anymore.
+
+The following output was generated with two hacked in printk statements:
+
+printk("before %p vs. %p or %p\n", mem_map, mem_map - offset, mem_map -
+(pgdat->node_start_pfn - ARCH_PFN_OFFSET));
+               if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
+                       mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET);
+printk("after %p\n", mem_map);
+
+Output:
+
+[    0.000000] before 8861b280 vs. 8861b280 or 8851b280
+[    0.000000] after 8851b280
+
+As seen in the first line mem_map with subtraction of offset does not equal the
+mem_map after subtraction of ARCH_PFN_OFFSET.
+
+After adding the offset of ARCH_PFN_OFFSET as well to mem_map as the
+previously calculated offset is zero for the named platform it is able to boot
+4.4 and 4.9-rc7 again.
+
+Signed-off-by: Tobias Wolf <[email protected]>
+---
+
+--- a/mm/page_alloc.c
++++ b/mm/page_alloc.c
+@@ -7556,7 +7556,7 @@ static void __init alloc_node_mem_map(st
+       if (pgdat == NODE_DATA(0)) {
+               mem_map = NODE_DATA(0)->node_mem_map;
+               if (page_to_pfn(mem_map) != pgdat->node_start_pfn)
+-                      mem_map -= offset;
++                      mem_map -= offset + (pgdat->node_start_pfn - ARCH_PFN_OFFSET);
+       }
+ #endif
+ }

diff --git a/target/linux/generic/pending-6.0/130-add-linux-spidev-compatible-si3210.patch b/target/linux/generic/pending-6.0/130-add-linux-spidev-compatible-si3210.patch
new file mode 100644 (file)
index 0000000..0367ab0
--- /dev/null
+++ b/target/linux/generic/pending-6.0/130-add-linux-spidev-compatible-si3210.patch
@@ -0,0 +1,18 @@
+From: Giuseppe Lippolis <[email protected]>
+Subject: Add the linux,spidev compatible in spidev Several device in ramips have this binding in the dts
+
+Signed-off-by: Giuseppe Lippolis <[email protected]>
+---
+ drivers/spi/spidev.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/spi/spidev.c
++++ b/drivers/spi/spidev.c
+@@ -696,6 +696,7 @@ static const struct of_device_id spidev_
+       { .compatible = "menlo,m53cpld", .data = &spidev_of_check },
+       { .compatible = "cisco,spi-petra", .data = &spidev_of_check },
+       { .compatible = "micron,spi-authenta", .data = &spidev_of_check },
++      { .compatible = "siliconlabs,si3210" },
+       {},
+ };
+ MODULE_DEVICE_TABLE(of, spidev_dt_ids);

diff --git a/target/linux/generic/pending-6.0/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch b/target/linux/generic/pending-6.0/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch
new file mode 100644 (file)
index 0000000..8f40ae3
--- /dev/null
+++ b/target/linux/generic/pending-6.0/140-jffs2-use-.rename2-and-add-RENAME_WHITEOUT-support.patch
@@ -0,0 +1,81 @@
+From: Felix Fietkau <[email protected]>
+Subject: jffs2: use .rename2 and add RENAME_WHITEOUT support
+
+It is required for renames on overlayfs
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+
+--- a/fs/jffs2/dir.c
++++ b/fs/jffs2/dir.c
+@@ -614,8 +614,8 @@ static int jffs2_rmdir (struct inode *di
+       return ret;
+ }
+ 
+-static int jffs2_mknod (struct user_namespace *mnt_userns, struct inode *dir_i,
+-                      struct dentry *dentry, umode_t mode, dev_t rdev)
++static int __jffs2_mknod (struct user_namespace *mnt_userns, struct inode *dir_i,
++                        struct dentry *dentry, umode_t mode, dev_t rdev, bool whiteout)
+ {
+       struct jffs2_inode_info *f, *dir_f;
+       struct jffs2_sb_info *c;
+@@ -754,7 +754,11 @@ static int jffs2_mknod (struct user_name
+       mutex_unlock(&dir_f->sem);
+       jffs2_complete_reservation(c);
+ 
+-      d_instantiate_new(dentry, inode);
++      if (!whiteout)
++              d_instantiate_new(dentry, inode);
++      else
++              unlock_new_inode(inode);
++
+       return 0;
+ 
+  fail:
+@@ -762,6 +766,19 @@ static int jffs2_mknod (struct user_name
+       return ret;
+ }
+ 
++static int jffs2_mknod (struct user_namespace *mnt_userns, struct inode *dir_i,
++                        struct dentry *dentry, umode_t mode, dev_t rdev)
++{
++      return __jffs2_mknod(mnt_userns, dir_i, dentry, mode, rdev, false);
++}
++
++static int jffs2_whiteout (struct user_namespace *mnt_userns, struct inode *old_dir,
++                          struct dentry *old_dentry)
++{
++      return __jffs2_mknod(mnt_userns, old_dir, old_dentry, S_IFCHR | WHITEOUT_MODE,
++                           WHITEOUT_DEV, true);
++}
++
+ static int jffs2_rename (struct user_namespace *mnt_userns,
+                        struct inode *old_dir_i, struct dentry *old_dentry,
+                        struct inode *new_dir_i, struct dentry *new_dentry,
+@@ -773,7 +790,7 @@ static int jffs2_rename (struct user_nam
+       uint8_t type;
+       uint32_t now;
+ 
+-      if (flags & ~RENAME_NOREPLACE)
++      if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT))
+               return -EINVAL;
+ 
+       /* The VFS will check for us and prevent trying to rename a
+@@ -839,9 +856,14 @@ static int jffs2_rename (struct user_nam
+       if (d_is_dir(old_dentry) && !victim_f)
+               inc_nlink(new_dir_i);
+ 
+-      /* Unlink the original */
+-      ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i),
+-                            old_dentry->d_name.name, old_dentry->d_name.len, NULL, now);
++      if (flags & RENAME_WHITEOUT)
++              /* Replace with whiteout */
++              ret = jffs2_whiteout(mnt_userns, old_dir_i, old_dentry);
++      else
++              /* Unlink the original */
++              ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i),
++                                    old_dentry->d_name.name,
++                                    old_dentry->d_name.len, NULL, now);
+ 
+       /* We don't touch inode->i_nlink */
+ 

diff --git a/target/linux/generic/pending-6.0/141-jffs2-add-RENAME_EXCHANGE-support.patch b/target/linux/generic/pending-6.0/141-jffs2-add-RENAME_EXCHANGE-support.patch
new file mode 100644 (file)
index 0000000..f58fc79
--- /dev/null
+++ b/target/linux/generic/pending-6.0/141-jffs2-add-RENAME_EXCHANGE-support.patch
@@ -0,0 +1,73 @@
+From: Felix Fietkau <[email protected]>
+Subject: jffs2: add RENAME_EXCHANGE support
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+
+--- a/fs/jffs2/dir.c
++++ b/fs/jffs2/dir.c
+@@ -787,18 +787,31 @@ static int jffs2_rename (struct user_nam
+       int ret;
+       struct jffs2_sb_info *c = JFFS2_SB_INFO(old_dir_i->i_sb);
+       struct jffs2_inode_info *victim_f = NULL;
++      struct inode *fst_inode = d_inode(old_dentry);
++      struct inode *snd_inode = d_inode(new_dentry);
+       uint8_t type;
+       uint32_t now;
+ 
+-      if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT))
++      if (flags & ~(RENAME_NOREPLACE|RENAME_WHITEOUT|RENAME_EXCHANGE))
+               return -EINVAL;
+ 
++      if ((flags & RENAME_EXCHANGE) && (old_dir_i != new_dir_i)) {
++              if (S_ISDIR(fst_inode->i_mode) && !S_ISDIR(snd_inode->i_mode)) {
++                      inc_nlink(new_dir_i);
++                      drop_nlink(old_dir_i);
++              }
++              else if (!S_ISDIR(fst_inode->i_mode) && S_ISDIR(snd_inode->i_mode)) {
++                      drop_nlink(new_dir_i);
++                      inc_nlink(old_dir_i);
++              }
++      }
++
+       /* The VFS will check for us and prevent trying to rename a
+        * file over a directory and vice versa, but if it's a directory,
+        * the VFS can't check whether the victim is empty. The filesystem
+        * needs to do that for itself.
+        */
+-      if (d_really_is_positive(new_dentry)) {
++      if (d_really_is_positive(new_dentry) && !(flags & RENAME_EXCHANGE)) {
+               victim_f = JFFS2_INODE_INFO(d_inode(new_dentry));
+               if (d_is_dir(new_dentry)) {
+                       struct jffs2_full_dirent *fd;
+@@ -833,7 +846,7 @@ static int jffs2_rename (struct user_nam
+       if (ret)
+               return ret;
+ 
+-      if (victim_f) {
++      if (victim_f && !(flags & RENAME_EXCHANGE)) {
+               /* There was a victim. Kill it off nicely */
+               if (d_is_dir(new_dentry))
+                       clear_nlink(d_inode(new_dentry));
+@@ -859,6 +872,12 @@ static int jffs2_rename (struct user_nam
+       if (flags & RENAME_WHITEOUT)
+               /* Replace with whiteout */
+               ret = jffs2_whiteout(mnt_userns, old_dir_i, old_dentry);
++      else if (flags & RENAME_EXCHANGE)
++              /* Replace the original */
++              ret = jffs2_do_link(c, JFFS2_INODE_INFO(old_dir_i),
++                                  d_inode(new_dentry)->i_ino, type,
++                                  old_dentry->d_name.name, old_dentry->d_name.len,
++                                  now);
+       else
+               /* Unlink the original */
+               ret = jffs2_do_unlink(c, JFFS2_INODE_INFO(old_dir_i),
+@@ -890,7 +909,7 @@ static int jffs2_rename (struct user_nam
+               return ret;
+       }
+ 
+-      if (d_is_dir(old_dentry))
++      if (d_is_dir(old_dentry) && !(flags & RENAME_EXCHANGE))
+               drop_nlink(old_dir_i);
+ 
+       new_dir_i->i_mtime = new_dir_i->i_ctime = old_dir_i->i_mtime = old_dir_i->i_ctime = ITIME(now);

diff --git a/target/linux/generic/pending-6.0/142-jffs2-add-splice-ops.patch b/target/linux/generic/pending-6.0/142-jffs2-add-splice-ops.patch
new file mode 100644 (file)
index 0000000..de847a1
--- /dev/null
+++ b/target/linux/generic/pending-6.0/142-jffs2-add-splice-ops.patch
@@ -0,0 +1,20 @@
+From: Felix Fietkau <[email protected]>
+Subject: jffs2: add splice ops
+
+Add splice_read using generic_file_splice_read.
+Add splice_write using iter_file_splice_write
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+
+--- a/fs/jffs2/file.c
++++ b/fs/jffs2/file.c
+@@ -53,6 +53,8 @@ const struct file_operations jffs2_file_
+       .open =         generic_file_open,
+       .read_iter =    generic_file_read_iter,
+       .write_iter =   generic_file_write_iter,
++      .splice_read =  generic_file_splice_read,
++      .splice_write = iter_file_splice_write,
+       .unlocked_ioctl=jffs2_ioctl,
+       .mmap =         generic_file_readonly_mmap,
+       .fsync =        jffs2_fsync,

diff --git a/target/linux/generic/pending-6.0/150-bridge_allow_receiption_on_disabled_port.patch b/target/linux/generic/pending-6.0/150-bridge_allow_receiption_on_disabled_port.patch
new file mode 100644 (file)
index 0000000..9968a79
--- /dev/null
+++ b/target/linux/generic/pending-6.0/150-bridge_allow_receiption_on_disabled_port.patch
@@ -0,0 +1,45 @@
+From: Stephen Hemminger <[email protected]>
+Subject: bridge: allow receiption on disabled port
+
+When an ethernet device is enslaved to a bridge, and the bridge STP
+detects loss of carrier (or operational state down), then normally
+packet receiption is blocked.
+
+This breaks control applications like WPA which maybe expecting to
+receive packets to negotiate to bring link up. The bridge needs to
+block forwarding packets from these disabled ports, but there is no
+hard requirement to not allow local packet delivery.
+
+Signed-off-by: Stephen Hemminger <[email protected]>
+Signed-off-by: Felix Fietkau <[email protected]>
+
+--- a/net/bridge/br_input.c
++++ b/net/bridge/br_input.c
+@@ -204,6 +204,9 @@ static void __br_handle_local_finish(str
+ /* note: already called with rcu_read_lock */
+ static int br_handle_local_finish(struct net *net, struct sock *sk, struct sk_buff *skb)
+ {
++      struct net_bridge_port *p = br_port_get_rcu(skb->dev);
++
++      if (p->state != BR_STATE_DISABLED)
+       __br_handle_local_finish(skb);
+ 
+       /* return 1 to signal the okfn() was called so it's ok to use the skb */
+@@ -369,6 +372,17 @@ static rx_handler_result_t br_handle_fra
+ 
+ forward:
+       switch (p->state) {
++      case BR_STATE_DISABLED:
++              if (ether_addr_equal(p->br->dev->dev_addr, dest))
++                      skb->pkt_type = PACKET_HOST;
++
++              if (NF_HOOK(NFPROTO_BRIDGE, NF_BR_PRE_ROUTING,
++                      dev_net(skb->dev), NULL, skb, skb->dev, NULL,
++                      br_handle_local_finish) == 1) {
++                      return RX_HANDLER_PASS;
++              }
++              break;
++
+       case BR_STATE_FORWARDING:
+       case BR_STATE_LEARNING:
+               if (ether_addr_equal(p->br->dev->dev_addr, dest))

diff --git a/target/linux/generic/pending-6.0/190-rtc-rs5c372-support_alarms_up_to_1_week.patch b/target/linux/generic/pending-6.0/190-rtc-rs5c372-support_alarms_up_to_1_week.patch
new file mode 100644 (file)
index 0000000..13b79b5
--- /dev/null
+++ b/target/linux/generic/pending-6.0/190-rtc-rs5c372-support_alarms_up_to_1_week.patch
@@ -0,0 +1,94 @@
+From: Daniel González Cabanelas <[email protected]>
+Subject: [PATCH 1/2] rtc: rs5c372: support alarms up to 1 week
+
+The Ricoh R2221x, R2223x, RS5C372, RV5C387A chips can handle 1 week
+alarms.
+
+Read the "wday" alarm register and convert it to a date to support up 1
+week in our driver.
+
+Signed-off-by: Daniel González Cabanelas <[email protected]>
+---
+ drivers/rtc/rtc-rs5c372.c | 48 ++++++++++++++++++++++++++++++++++-----
+ 1 file changed, 42 insertions(+), 6 deletions(-)
+
+--- a/drivers/rtc/rtc-rs5c372.c
++++ b/drivers/rtc/rtc-rs5c372.c
+@@ -393,7 +393,9 @@ static int rs5c_read_alarm(struct device
+ {
+       struct i2c_client       *client = to_i2c_client(dev);
+       struct rs5c372          *rs5c = i2c_get_clientdata(client);
+-      int                     status;
++      int                     status, wday_offs;
++      struct rtc_time         rtc;
++      unsigned long           alarm_secs;
+ 
+       status = rs5c_get_regs(rs5c);
+       if (status < 0)
+@@ -403,6 +405,30 @@ static int rs5c_read_alarm(struct device
+       t->time.tm_sec = 0;
+       t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
+       t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
++      t->time.tm_wday = ffs(rs5c->regs[RS5C_REG_ALARM_A_WDAY] & 0x7f) - 1;
++
++      /* determine the day, month and year based on alarm wday, taking as a
++       * reference the current time from the rtc
++       */
++      status = rs5c372_rtc_read_time(dev, &rtc);
++      if (status < 0)
++              return status;
++
++      wday_offs = t->time.tm_wday - rtc.tm_wday;
++      alarm_secs = mktime64(rtc.tm_year + 1900,
++                            rtc.tm_mon + 1,
++                            rtc.tm_mday + wday_offs,
++                            t->time.tm_hour,
++                            t->time.tm_min,
++                            t->time.tm_sec);
++
++      if (wday_offs < 0 || (wday_offs == 0 &&
++                            (t->time.tm_hour < rtc.tm_hour ||
++                             (t->time.tm_hour == rtc.tm_hour &&
++                              t->time.tm_min <= rtc.tm_min))))
++              alarm_secs += 7 * 86400;
++
++      rtc_time64_to_tm(alarm_secs, &t->time);
+ 
+       /* ... and status */
+       t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
+@@ -417,12 +443,20 @@ static int rs5c_set_alarm(struct device
+       struct rs5c372          *rs5c = i2c_get_clientdata(client);
+       int                     status, addr, i;
+       unsigned char           buf[3];
++      struct rtc_time         rtc_tm;
++      unsigned long           rtc_secs, alarm_secs;
+ 
+-      /* only handle up to 24 hours in the future, like RTC_ALM_SET */
+-      if (t->time.tm_mday != -1
+-                      || t->time.tm_mon != -1
+-                      || t->time.tm_year != -1)
++      /* chip only can handle alarms up to one week in the future*/
++      status = rs5c372_rtc_read_time(dev, &rtc_tm);
++      if (status)
++              return status;
++      rtc_secs = rtc_tm_to_time64(&rtc_tm);
++      alarm_secs = rtc_tm_to_time64(&t->time);
++      if (alarm_secs >= rtc_secs + 7 * 86400) {
++              dev_err(dev, "%s: alarm maximum is one week in the future (%d)\n",
++                      __func__, status);
+               return -EINVAL;
++      }
+ 
+       /* REVISIT: round up tm_sec */
+ 
+@@ -443,7 +477,9 @@ static int rs5c_set_alarm(struct device
+       /* set alarm */
+       buf[0] = bin2bcd(t->time.tm_min);
+       buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
+-      buf[2] = 0x7f;  /* any/all days */
++      /* each bit is the day of the week, 0x7f means all days */
++      buf[2] = (t->time.tm_wday >= 0 && t->time.tm_wday < 7) ?
++                BIT(t->time.tm_wday) : 0x7f;
+ 
+       for (i = 0; i < sizeof(buf); i++) {
+               addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);

diff --git a/target/linux/generic/pending-6.0/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch b/target/linux/generic/pending-6.0/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch
new file mode 100644 (file)
index 0000000..7e9d0e6
--- /dev/null
+++ b/target/linux/generic/pending-6.0/191-rtc-rs5c372-let_the_alarm_to_be_used_as_wakeup_source.patch
@@ -0,0 +1,70 @@
+From: Daniel González Cabanelas <[email protected]>
+Subject: [PATCH 2/2] rtc: rs5c372: let the alarm to be used as wakeup source
+
+Currently there is no use for the interrupts on the rs5c372 RTC and the
+wakealarm isn't enabled. There are some devices like NASes which use this
+RTC to wake up from the power off state when the INTR pin is activated by
+the alarm clock.
+
+Enable the alarm and let to be used as a wakeup source.
+
+Tested on a Buffalo LS421DE NAS.
+
+Signed-off-by: Daniel González Cabanelas <[email protected]>
+---
+ drivers/rtc/rtc-rs5c372.c | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+--- a/drivers/rtc/rtc-rs5c372.c
++++ b/drivers/rtc/rtc-rs5c372.c
+@@ -654,6 +654,7 @@ static int rs5c372_probe(struct i2c_clie
+       int err = 0;
+       int smbus_mode = 0;
+       struct rs5c372 *rs5c372;
++      bool rs5c372_can_wakeup_device = false;
+ 
+       dev_dbg(&client->dev, "%s\n", __func__);
+ 
+@@ -689,6 +690,12 @@ static int rs5c372_probe(struct i2c_clie
+       else
+               rs5c372->type = id->driver_data;
+ 
++#ifdef CONFIG_OF
++      if(of_property_read_bool(client->dev.of_node,
++                                            "wakeup-source"))
++              rs5c372_can_wakeup_device = true;
++#endif
++
+       /* we read registers 0x0f then 0x00-0x0f; skip the first one */
+       rs5c372->regs = &rs5c372->buf[1];
+       rs5c372->smbus = smbus_mode;
+@@ -722,6 +729,8 @@ static int rs5c372_probe(struct i2c_clie
+               goto exit;
+       }
+ 
++      rs5c372->has_irq = 1;
++
+       /* if the oscillator lost power and no other software (like
+        * the bootloader) set it up, do it here.
+        *
+@@ -748,6 +757,10 @@ static int rs5c372_probe(struct i2c_clie
+                       );
+ 
+       /* REVISIT use client->irq to register alarm irq ... */
++      if (rs5c372_can_wakeup_device) {
++              device_init_wakeup(&client->dev, true);
++      }
++
+       rs5c372->rtc = devm_rtc_device_register(&client->dev,
+                                       rs5c372_driver.driver.name,
+                                       &rs5c372_rtc_ops, THIS_MODULE);
+@@ -761,6 +774,9 @@ static int rs5c372_probe(struct i2c_clie
+       if (err)
+               goto exit;
+ 
++      /* the rs5c372 alarm only supports a minute accuracy */
++      rs5c372->rtc->uie_unsupported = 1;
++
+       return 0;
+ 
+ exit:

diff --git a/target/linux/generic/pending-6.0/203-kallsyms_uncompressed.patch b/target/linux/generic/pending-6.0/203-kallsyms_uncompressed.patch
new file mode 100644 (file)
index 0000000..1c01217
--- /dev/null
+++ b/target/linux/generic/pending-6.0/203-kallsyms_uncompressed.patch
@@ -0,0 +1,119 @@
+From: Felix Fietkau <[email protected]>
+Subject: kernel: add a config option for keeping the kallsyms table uncompressed, saving ~9kb kernel size after lzma on ar71xx
+
+[[email protected]: added to my upstream queue 30.12.2016]
+lede-commit: e0e3509b5ce2ccf93d4d67ea907613f5f7ec2eed
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ init/Kconfig            | 11 +++++++++++
+ kernel/kallsyms.c       |  8 ++++++++
+ scripts/kallsyms.c      | 12 ++++++++++++
+ scripts/link-vmlinux.sh |  4 ++++
+ 4 files changed, 35 insertions(+)
+
+--- a/init/Kconfig
++++ b/init/Kconfig
+@@ -1443,6 +1443,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
+         the unaligned access emulation.
+         see arch/parisc/kernel/unaligned.c for reference
+ 
++config KALLSYMS_UNCOMPRESSED
++      bool "Keep kallsyms uncompressed"
++      depends on KALLSYMS
++      help
++              Normally kallsyms contains compressed symbols (using a token table),
++              reducing the uncompressed kernel image size. Keeping the symbol table
++              uncompressed significantly improves the size of this part in compressed
++              kernel images.
++
++              Say N unless you need compressed kernel images to be small.
++
+ config HAVE_PCSPKR_PLATFORM
+       bool
+ 
+--- a/kernel/kallsyms.c
++++ b/kernel/kallsyms.c
+@@ -80,6 +80,11 @@ static unsigned int kallsyms_expand_symb
+        * For every byte on the compressed symbol data, copy the table
+        * entry for that byte.
+        */
++#ifdef CONFIG_KALLSYMS_UNCOMPRESSED
++      memcpy(result, data + 1, len - 1);
++      result += len - 1;
++      len = 0;
++#endif
+       while (len) {
+               tptr = &kallsyms_token_table[kallsyms_token_index[*data]];
+               data++;
+@@ -112,6 +117,9 @@ tail:
+  */
+ static char kallsyms_get_symbol_type(unsigned int off)
+ {
++#ifdef CONFIG_KALLSYMS_UNCOMPRESSED
++      return kallsyms_names[off + 1];
++#endif
+       /*
+        * Get just the first code, look it up in the token table,
+        * and return the first char from this token.
+--- a/scripts/kallsyms.c
++++ b/scripts/kallsyms.c
+@@ -58,6 +58,7 @@ static struct addr_range percpu_range =
+ static struct sym_entry **table;
+ static unsigned int table_size, table_cnt;
+ static int all_symbols;
++static int uncompressed;
+ static int absolute_percpu;
+ static int base_relative;
+ 
+@@ -486,6 +487,9 @@ static void write_src(void)
+ 
+       free(markers);
+ 
++      if (uncompressed)
++              return;
++
+       output_label("kallsyms_token_table");
+       off = 0;
+       for (i = 0; i < 256; i++) {
+@@ -537,6 +541,9 @@ static unsigned char *find_token(unsigne
+ {
+       int i;
+ 
++      if (uncompressed)
++              return NULL;
++
+       for (i = 0; i < len - 1; i++) {
+               if (str[i] == token[0] && str[i+1] == token[1])
+                       return &str[i];
+@@ -609,6 +616,9 @@ static void optimize_result(void)
+ {
+       int i, best;
+ 
++      if (uncompressed)
++              return;
++
+       /* using the '\0' symbol last allows compress_symbols to use standard
+        * fast string functions */
+       for (i = 255; i >= 0; i--) {
+@@ -773,6 +783,8 @@ int main(int argc, char **argv)
+                               absolute_percpu = 1;
+                       else if (strcmp(argv[i], "--base-relative") == 0)
+                               base_relative = 1;
++                      else if (strcmp(argv[i], "--uncompressed") == 0)
++                              uncompressed = 1;
+                       else
+                               usage();
+               }
+--- a/scripts/link-vmlinux.sh
++++ b/scripts/link-vmlinux.sh
+@@ -266,6 +266,10 @@ kallsyms()
+               kallsymopt="${kallsymopt} --base-relative"
+       fi
+ 
++      if is_enabled CONFIG_KALLSYMS_UNCOMPRESSED; then
++              kallsymopt="${kallsymopt} --uncompressed"
++      fi
++
+       info KSYMS ${2}
+       ${NM} -n ${1} | scripts/kallsyms ${kallsymopt} > ${2}
+ }

diff --git a/target/linux/generic/pending-6.0/205-backtrace_module_info.patch b/target/linux/generic/pending-6.0/205-backtrace_module_info.patch
new file mode 100644 (file)
index 0000000..6379ce0
--- /dev/null
+++ b/target/linux/generic/pending-6.0/205-backtrace_module_info.patch
@@ -0,0 +1,41 @@
+From: Felix Fietkau <[email protected]>
+Subject: kernel: when KALLSYMS is disabled, print module address + size for matching backtrace entries
+
+[[email protected]: felix will add this to his upstream queue]
+
+lede-commit 53827cdc824556cda910b23ce5030c363b8f1461
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ lib/vsprintf.c | 15 +++++++++++----
+ 1 file changed, 11 insertions(+), 4 deletions(-)
+
+--- a/lib/vsprintf.c
++++ b/lib/vsprintf.c
+@@ -1003,8 +1003,10 @@ char *symbol_string(char *buf, char *end
+                   struct printf_spec spec, const char *fmt)
+ {
+       unsigned long value;
+-#ifdef CONFIG_KALLSYMS
+       char sym[KSYM_SYMBOL_LEN];
++#ifndef CONFIG_KALLSYMS
++      struct module *mod;
++      int len;
+ #endif
+ 
+       if (fmt[1] == 'R')
+@@ -1025,8 +1027,14 @@ char *symbol_string(char *buf, char *end
+ 
+       return string_nocheck(buf, end, sym, spec);
+ #else
+-      return special_hex_number(buf, end, value, sizeof(void *));
++      len = snprintf(sym, sizeof(sym), "0x%lx", value);
++      mod = __module_address(value);
++      if (mod)
++              snprintf(sym + len, sizeof(sym) - len, " [%s@%p+0x%x]",
++                       mod->name, mod->core_layout.base,
++                       mod->core_layout.size);
+ #endif
++      return string(buf, end, sym, spec);
+ }
+ 
+ static const struct printf_spec default_str_spec = {

diff --git a/target/linux/generic/pending-6.0/240-remove-unsane-filenames-from-deps_initramfs-list.patch b/target/linux/generic/pending-6.0/240-remove-unsane-filenames-from-deps_initramfs-list.patch
new file mode 100644 (file)
index 0000000..29cfade
--- /dev/null
+++ b/target/linux/generic/pending-6.0/240-remove-unsane-filenames-from-deps_initramfs-list.patch
@@ -0,0 +1,30 @@
+From: Gabor Juhos <[email protected]>
+Subject: usr: sanitize deps_initramfs list
+
+If any filename in the intramfs dependency
+list contains a colon, that causes a kernel
+build error like this:
+
+/devel/openwrt/build_dir/linux-ar71xx_generic/linux-3.6.6/usr/Makefile:58: *** multiple target patterns.  Stop.
+make[5]: *** [usr] Error 2
+
+Fix it by removing such filenames from the
+deps_initramfs list.
+
+Signed-off-by: Gabor Juhos <[email protected]>
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ usr/Makefile | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+--- a/usr/Makefile
++++ b/usr/Makefile
+@@ -61,6 +61,8 @@ hostprogs := gen_init_cpio
+ # The dependency list is generated by gen_initramfs.sh -l
+ -include $(obj)/.initramfs_data.cpio.d
+ 
++deps_initramfs := $(foreach v,$(deps_initramfs),$(if $(findstring :,$(v)),,$(v)))
++
+ # do not try to update files included in initramfs
+ $(deps_initramfs): ;
+ 

diff --git a/target/linux/generic/pending-6.0/261-enable_wilink_platform_without_drivers.patch b/target/linux/generic/pending-6.0/261-enable_wilink_platform_without_drivers.patch
new file mode 100644 (file)
index 0000000..cd31f9d
--- /dev/null
+++ b/target/linux/generic/pending-6.0/261-enable_wilink_platform_without_drivers.patch
@@ -0,0 +1,20 @@
+From: Imre Kaloz <[email protected]>
+Subject: [PATCH] hack: net: wireless: make the wl12xx glue code available with
+ compat-wireless, too
+
+Signed-off-by: Imre Kaloz <[email protected]>
+---
+ drivers/net/wireless/ti/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/wireless/ti/Kconfig
++++ b/drivers/net/wireless/ti/Kconfig
+@@ -20,7 +20,7 @@ source "drivers/net/wireless/ti/wlcore/K
+ 
+ config WILINK_PLATFORM_DATA
+       bool "TI WiLink platform data"
+-      depends on WLCORE_SDIO || WL1251_SDIO
++      depends on WLCORE_SDIO || WL1251_SDIO || ARCH_OMAP2PLUS
+       default y
+       help
+       Small platform data bit needed to pass data to the sdio modules.

diff --git a/target/linux/generic/pending-6.0/270-platform-mikrotik-build-bits.patch b/target/linux/generic/pending-6.0/270-platform-mikrotik-build-bits.patch
new file mode 100644 (file)
index 0000000..f847db9
--- /dev/null
+++ b/target/linux/generic/pending-6.0/270-platform-mikrotik-build-bits.patch
@@ -0,0 +1,31 @@
+From c2deb5ef01a0ef09088832744cbace9e239a6ee0 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= <[email protected]>
+Date: Sat, 28 Mar 2020 12:11:50 +0100
+Subject: [PATCH] generic: platform/mikrotik build bits (5.4)
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This patch adds platform/mikrotik kernel build bits
+
+Signed-off-by: Thibaut VARÈNE <[email protected]>
+---
+ drivers/platform/Kconfig  | 2 ++
+ drivers/platform/Makefile | 1 +
+ 2 files changed, 3 insertions(+)
+
+--- a/drivers/platform/Kconfig
++++ b/drivers/platform/Kconfig
+@@ -15,3 +15,5 @@ source "drivers/platform/mellanox/Kconfi
+ source "drivers/platform/surface/Kconfig"
+ 
+ source "drivers/platform/x86/Kconfig"
++
++source "drivers/platform/mikrotik/Kconfig"
+--- a/drivers/platform/Makefile
++++ b/drivers/platform/Makefile
+@@ -10,3 +10,4 @@ obj-$(CONFIG_OLPC_EC)                += olpc/
+ obj-$(CONFIG_GOLDFISH)                += goldfish/
+ obj-$(CONFIG_CHROME_PLATFORMS)        += chrome/
+ obj-$(CONFIG_SURFACE_PLATFORMS)       += surface/
++obj-$(CONFIG_MIKROTIK)                += mikrotik/

diff --git a/target/linux/generic/pending-6.0/300-mips_expose_boot_raw.patch b/target/linux/generic/pending-6.0/300-mips_expose_boot_raw.patch
new file mode 100644 (file)
index 0000000..05d0249
--- /dev/null
+++ b/target/linux/generic/pending-6.0/300-mips_expose_boot_raw.patch
@@ -0,0 +1,40 @@
+From: Mark Miller <[email protected]>
+Subject: mips: expose CONFIG_BOOT_RAW
+
+This exposes the CONFIG_BOOT_RAW symbol in Kconfig. This is needed on
+certain Broadcom chipsets running CFE in order to load the kernel.
+
+Signed-off-by: Mark Miller <[email protected]>
+Acked-by: Rob Landley <[email protected]>
+---
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -1100,9 +1100,6 @@ config FW_ARC
+ config ARCH_MAY_HAVE_PC_FDC
+       bool
+ 
+-config BOOT_RAW
+-      bool
+-
+ config CEVT_BCM1480
+       bool
+ 
+@@ -3182,6 +3179,18 @@ choice
+               bool "Extend builtin kernel arguments with bootloader arguments"
+ endchoice
+ 
++config BOOT_RAW
++      bool "Enable the kernel to be executed from the load address"
++      default n
++      help
++       Allow the kernel to be executed from the load address for
++       bootloaders which cannot read the ELF format. This places
++       a jump to start_kernel at the load address.
++
++       If unsure, say N.
++
++
++
+ endmenu
+ 
+ config LOCKDEP_SUPPORT

diff --git a/target/linux/generic/pending-6.0/302-mips_no_branch_likely.patch b/target/linux/generic/pending-6.0/302-mips_no_branch_likely.patch
new file mode 100644 (file)
index 0000000..271923f
--- /dev/null
+++ b/target/linux/generic/pending-6.0/302-mips_no_branch_likely.patch
@@ -0,0 +1,22 @@
+From: Felix Fietkau <[email protected]>
+Subject: mips: use -mno-branch-likely for kernel and userspace
+
+saves ~11k kernel size after lzma and ~12k squashfs size in the
+
+lede-commit: 41a039f46450ffae9483d6216422098669da2900
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ arch/mips/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -95,7 +95,7 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin
+ # machines may also.  Since BFD is incredibly buggy with respect to
+ # crossformat linking we rely on the elf2ecoff tool for format conversion.
+ #
+-cflags-y                      += -G 0 -mno-abicalls -fno-pic -pipe
++cflags-y                      += -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely
+ cflags-y                      += -msoft-float
+ LDFLAGS_vmlinux                       += -G 0 -static -n -nostdlib
+ KBUILD_AFLAGS_MODULE          += -mlong-calls

diff --git a/target/linux/generic/pending-6.0/305-mips_module_reloc.patch b/target/linux/generic/pending-6.0/305-mips_module_reloc.patch
new file mode 100644 (file)
index 0000000..bbea1f6
--- /dev/null
+++ b/target/linux/generic/pending-6.0/305-mips_module_reloc.patch
@@ -0,0 +1,370 @@
+From: Felix Fietkau <[email protected]>
+Subject: mips: replace -mlong-calls with -mno-long-calls to make function calls faster in kernel modules to achieve this, try to
+
+lede-commit: 3b3d64743ba2a874df9d70cd19e242205b0a788c
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ arch/mips/Makefile             |   5 +
+ arch/mips/include/asm/module.h |   5 +
+ arch/mips/kernel/module.c      | 279 ++++++++++++++++++++++++++++++++++++++++-
+ 3 files changed, 284 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -98,8 +98,18 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin
+ cflags-y                      += -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely
+ cflags-y                      += -msoft-float
+ LDFLAGS_vmlinux                       += -G 0 -static -n -nostdlib
++ifdef CONFIG_64BIT
+ KBUILD_AFLAGS_MODULE          += -mlong-calls
+ KBUILD_CFLAGS_MODULE          += -mlong-calls
++else
++  ifdef CONFIG_DYNAMIC_FTRACE
++    KBUILD_AFLAGS_MODULE      += -mlong-calls
++    KBUILD_CFLAGS_MODULE      += -mlong-calls
++  else
++    KBUILD_AFLAGS_MODULE      += -mno-long-calls
++    KBUILD_CFLAGS_MODULE      += -mno-long-calls
++  endif
++endif
+ 
+ ifeq ($(CONFIG_RELOCATABLE),y)
+ LDFLAGS_vmlinux                       += --emit-relocs
+--- a/arch/mips/include/asm/module.h
++++ b/arch/mips/include/asm/module.h
+@@ -12,6 +12,11 @@ struct mod_arch_specific {
+       const struct exception_table_entry *dbe_start;
+       const struct exception_table_entry *dbe_end;
+       struct mips_hi16 *r_mips_hi16_list;
++
++      void *phys_plt_tbl;
++      void *virt_plt_tbl;
++      unsigned int phys_plt_offset;
++      unsigned int virt_plt_offset;
+ };
+ 
+ typedef uint8_t Elf64_Byte;           /* Type for a 8-bit quantity.  */
+--- a/arch/mips/kernel/module.c
++++ b/arch/mips/kernel/module.c
+@@ -31,23 +31,261 @@ struct mips_hi16 {
+ static LIST_HEAD(dbe_list);
+ static DEFINE_SPINLOCK(dbe_lock);
+ 
+-#ifdef MODULE_START
++/*
++ * Get the potential max trampolines size required of the init and
++ * non-init sections. Only used if we cannot find enough contiguous
++ * physically mapped memory to put the module into.
++ */
++static unsigned int
++get_plt_size(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
++             const char *secstrings, unsigned int symindex, bool is_init)
++{
++      unsigned long ret = 0;
++      unsigned int i, j;
++      Elf_Sym *syms;
++
++      /* Everything marked ALLOC (this includes the exported symbols) */
++      for (i = 1; i < hdr->e_shnum; ++i) {
++              unsigned int info = sechdrs[i].sh_info;
++
++              if (sechdrs[i].sh_type != SHT_REL
++                  && sechdrs[i].sh_type != SHT_RELA)
++                      continue;
++
++              /* Not a valid relocation section? */
++              if (info >= hdr->e_shnum)
++                      continue;
++
++              /* Don't bother with non-allocated sections */
++              if (!(sechdrs[info].sh_flags & SHF_ALLOC))
++                      continue;
++
++              /* If it's called *.init*, and we're not init, we're
++                   not interested */
++              if ((strstr(secstrings + sechdrs[i].sh_name, ".init") != 0)
++                  != is_init)
++                      continue;
++
++              syms = (Elf_Sym *) sechdrs[symindex].sh_addr;
++              if (sechdrs[i].sh_type == SHT_REL) {
++                      Elf_Mips_Rel *rel = (void *) sechdrs[i].sh_addr;
++                      unsigned int size = sechdrs[i].sh_size / sizeof(*rel);
++
++                      for (j = 0; j < size; ++j) {
++                              Elf_Sym *sym;
++
++                              if (ELF_MIPS_R_TYPE(rel[j]) != R_MIPS_26)
++                                      continue;
++
++                              sym = syms + ELF_MIPS_R_SYM(rel[j]);
++                              if (!is_init && sym->st_shndx != SHN_UNDEF)
++                                      continue;
++
++                              ret += 4 * sizeof(int);
++                      }
++              } else {
++                      Elf_Mips_Rela *rela = (void *) sechdrs[i].sh_addr;
++                      unsigned int size = sechdrs[i].sh_size / sizeof(*rela);
++
++                      for (j = 0; j < size; ++j) {
++                              Elf_Sym *sym;
++
++                              if (ELF_MIPS_R_TYPE(rela[j]) != R_MIPS_26)
++                                      continue;
++
++                              sym = syms + ELF_MIPS_R_SYM(rela[j]);
++                              if (!is_init && sym->st_shndx != SHN_UNDEF)
++                                      continue;
++
++                              ret += 4 * sizeof(int);
++                      }
++              }
++      }
++
++      return ret;
++}
++
++#ifndef MODULE_START
++static void *alloc_phys(unsigned long size)
++{
++      unsigned order;
++      struct page *page;
++      struct page *p;
++
++      size = PAGE_ALIGN(size);
++      order = get_order(size);
++
++      page = alloc_pages(GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN |
++                      __GFP_THISNODE, order);
++      if (!page)
++              return NULL;
++
++      split_page(page, order);
++
++      /* mark all pages except for the last one */
++      for (p = page; p + 1 < page + (size >> PAGE_SHIFT); ++p)
++              set_bit(PG_owner_priv_1, &p->flags);
++
++      for (p = page + (size >> PAGE_SHIFT); p < page + (1 << order); ++p)
++              __free_page(p);
++
++      return page_address(page);
++}
++#endif
++
++static void free_phys(void *ptr)
++{
++      struct page *page;
++      bool free;
++
++      page = virt_to_page(ptr);
++      do {
++              free = test_and_clear_bit(PG_owner_priv_1, &page->flags);
++              __free_page(page);
++              page++;
++      } while (free);
++}
++
++
+ void *module_alloc(unsigned long size)
+ {
++#ifdef MODULE_START
+       return __vmalloc_node_range(size, 1, MODULE_START, MODULE_END,
+                               GFP_KERNEL, PAGE_KERNEL, 0, NUMA_NO_NODE,
+                               __builtin_return_address(0));
++#else
++      void *ptr;
++
++      if (size == 0)
++              return NULL;
++
++      ptr = alloc_phys(size);
++
++      /* If we failed to allocate physically contiguous memory,
++       * fall back to regular vmalloc. The module loader code will
++       * create jump tables to handle long jumps */
++      if (!ptr)
++              return vmalloc(size);
++
++      return ptr;
++#endif
+ }
++
++static inline bool is_phys_addr(void *ptr)
++{
++#ifdef CONFIG_64BIT
++      return (KSEGX((unsigned long)ptr) == CKSEG0);
++#else
++      return (KSEGX(ptr) == KSEG0);
+ #endif
++}
++
++/* Free memory returned from module_alloc */
++void module_memfree(void *module_region)
++{
++      if (is_phys_addr(module_region))
++              free_phys(module_region);
++      else
++              vfree(module_region);
++}
++
++static void *__module_alloc(int size, bool phys)
++{
++      void *ptr;
++
++      if (phys)
++              ptr = kmalloc(size, GFP_KERNEL);
++      else
++              ptr = vmalloc(size);
++      return ptr;
++}
++
++static void __module_free(void *ptr)
++{
++      if (is_phys_addr(ptr))
++              kfree(ptr);
++      else
++              vfree(ptr);
++}
++
++int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
++                            char *secstrings, struct module *mod)
++{
++      unsigned int symindex = 0;
++      unsigned int core_size, init_size;
++      int i;
++
++      mod->arch.phys_plt_offset = 0;
++      mod->arch.virt_plt_offset = 0;
++      mod->arch.phys_plt_tbl = NULL;
++      mod->arch.virt_plt_tbl = NULL;
++
++      if (IS_ENABLED(CONFIG_64BIT))
++              return 0;
++
++      for (i = 1; i < hdr->e_shnum; i++)
++              if (sechdrs[i].sh_type == SHT_SYMTAB)
++                      symindex = i;
++
++      core_size = get_plt_size(hdr, sechdrs, secstrings, symindex, false);
++      init_size = get_plt_size(hdr, sechdrs, secstrings, symindex, true);
++
++      if ((core_size + init_size) == 0)
++              return 0;
++
++      mod->arch.phys_plt_tbl = __module_alloc(core_size + init_size, 1);
++      if (!mod->arch.phys_plt_tbl)
++              return -ENOMEM;
++
++      mod->arch.virt_plt_tbl = __module_alloc(core_size + init_size, 0);
++      if (!mod->arch.virt_plt_tbl) {
++              __module_free(mod->arch.phys_plt_tbl);
++              mod->arch.phys_plt_tbl = NULL;
++              return -ENOMEM;
++      }
++
++      return 0;
++}
+ 
+ static void apply_r_mips_32(u32 *location, u32 base, Elf_Addr v)
+ {
+       *location = base + v;
+ }
+ 
++static Elf_Addr add_plt_entry_to(unsigned *plt_offset,
++                               void *start, Elf_Addr v)
++{
++      unsigned *tramp = start + *plt_offset;
++      *plt_offset += 4 * sizeof(int);
++
++      /* adjust carry for addiu */
++      if (v & 0x00008000)
++              v += 0x10000;
++
++      tramp[0] = 0x3c190000 | (v >> 16);      /* lui t9, hi16 */
++      tramp[1] = 0x27390000 | (v & 0xffff);   /* addiu t9, t9, lo16 */
++      tramp[2] = 0x03200008;                  /* jr t9 */
++      tramp[3] = 0x00000000;                  /* nop */
++
++      return (Elf_Addr) tramp;
++}
++
++static Elf_Addr add_plt_entry(struct module *me, void *location, Elf_Addr v)
++{
++      if (is_phys_addr(location))
++              return add_plt_entry_to(&me->arch.phys_plt_offset,
++                              me->arch.phys_plt_tbl, v);
++      else
++              return add_plt_entry_to(&me->arch.virt_plt_offset,
++                              me->arch.virt_plt_tbl, v);
++
++}
++
+ static int apply_r_mips_26(struct module *me, u32 *location, u32 base,
+                          Elf_Addr v)
+ {
++      u32 ofs = base & 0x03ffffff;
++
+       if (v % 4) {
+               pr_err("module %s: dangerous R_MIPS_26 relocation\n",
+                      me->name);
+@@ -55,13 +293,17 @@ static int apply_r_mips_26(struct module
+       }
+ 
+       if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
+-              pr_err("module %s: relocation overflow\n",
+-                     me->name);
+-              return -ENOEXEC;
++              v = add_plt_entry(me, location, v + (ofs << 2));
++              if (!v) {
++                      pr_err("module %s: relocation overflow\n",
++                             me->name);
++                      return -ENOEXEC;
++              }
++              ofs = 0;
+       }
+ 
+       *location = (*location & ~0x03ffffff) |
+-                  ((base + (v >> 2)) & 0x03ffffff);
++                  ((ofs + (v >> 2)) & 0x03ffffff);
+ 
+       return 0;
+ }
+@@ -441,9 +683,36 @@ int module_finalize(const Elf_Ehdr *hdr,
+               list_add(&me->arch.dbe_list, &dbe_list);
+               spin_unlock_irq(&dbe_lock);
+       }
++
++      /* Get rid of the fixup trampoline if we're running the module
++       * from physically mapped address space */
++      if (me->arch.phys_plt_offset == 0) {
++              __module_free(me->arch.phys_plt_tbl);
++              me->arch.phys_plt_tbl = NULL;
++      }
++      if (me->arch.virt_plt_offset == 0) {
++              __module_free(me->arch.virt_plt_tbl);
++              me->arch.virt_plt_tbl = NULL;
++      }
++
+       return 0;
+ }
+ 
++void module_arch_freeing_init(struct module *mod)
++{
++      if (mod->state == MODULE_STATE_LIVE)
++              return;
++
++      if (mod->arch.phys_plt_tbl) {
++              __module_free(mod->arch.phys_plt_tbl);
++              mod->arch.phys_plt_tbl = NULL;
++      }
++      if (mod->arch.virt_plt_tbl) {
++              __module_free(mod->arch.virt_plt_tbl);
++              mod->arch.virt_plt_tbl = NULL;
++      }
++}
++
+ void module_arch_cleanup(struct module *mod)
+ {
+       spin_lock_irq(&dbe_lock);

diff --git a/target/linux/generic/pending-6.0/307-mips_highmem_offset.patch b/target/linux/generic/pending-6.0/307-mips_highmem_offset.patch
new file mode 100644 (file)
index 0000000..0529b0c
--- /dev/null
+++ b/target/linux/generic/pending-6.0/307-mips_highmem_offset.patch
@@ -0,0 +1,19 @@
+From: Felix Fietkau <[email protected]>
+Subject: kernel: adjust mips highmem offset to avoid the need for -mlong-calls on systems with >256M RAM
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ arch/mips/include/asm/mach-generic/spaces.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/include/asm/mach-generic/spaces.h
++++ b/arch/mips/include/asm/mach-generic/spaces.h
+@@ -46,7 +46,7 @@
+  * Memory above this physical address will be considered highmem.
+  */
+ #ifndef HIGHMEM_START
+-#define HIGHMEM_START         _AC(0x20000000, UL)
++#define HIGHMEM_START         _AC(0x10000000, UL)
+ #endif
+ 
+ #endif /* CONFIG_32BIT */

diff --git a/target/linux/generic/pending-6.0/308-mips32r2_tune.patch b/target/linux/generic/pending-6.0/308-mips32r2_tune.patch
new file mode 100644 (file)
index 0000000..ef92a5d
--- /dev/null
+++ b/target/linux/generic/pending-6.0/308-mips32r2_tune.patch
@@ -0,0 +1,22 @@
+From: Felix Fietkau <[email protected]>
+Subject: kernel: add -mtune=34kc to MIPS CFLAGS when building for mips32r2
+
+This provides a good tradeoff across at least 24Kc-74Kc, while also
+producing smaller code.
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ arch/mips/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -175,7 +175,7 @@ cflags-$(CONFIG_CPU_VR41XX)        += -march=r4
+ cflags-$(CONFIG_CPU_R4X00)    += -march=r4600 -Wa,--trap
+ cflags-$(CONFIG_CPU_TX49XX)   += -march=r4600 -Wa,--trap
+ cflags-$(CONFIG_CPU_MIPS32_R1)        += -march=mips32 -Wa,--trap
+-cflags-$(CONFIG_CPU_MIPS32_R2)        += -march=mips32r2 -Wa,--trap
++cflags-$(CONFIG_CPU_MIPS32_R2)        += -march=mips32r2 -mtune=34kc -Wa,--trap
+ cflags-$(CONFIG_CPU_MIPS32_R5)        += -march=mips32r5 -Wa,--trap -modd-spreg
+ cflags-$(CONFIG_CPU_MIPS32_R6)        += -march=mips32r6 -Wa,--trap -modd-spreg
+ cflags-$(CONFIG_CPU_MIPS64_R1)        += -march=mips64 -Wa,--trap

diff --git a/target/linux/generic/pending-6.0/310-arm_module_unresolved_weak_sym.patch b/target/linux/generic/pending-6.0/310-arm_module_unresolved_weak_sym.patch
new file mode 100644 (file)
index 0000000..191dc6a
--- /dev/null
+++ b/target/linux/generic/pending-6.0/310-arm_module_unresolved_weak_sym.patch
@@ -0,0 +1,22 @@
+From: Felix Fietkau <[email protected]>
+Subject: fix errors in unresolved weak symbols on arm
+
+lede-commit: 570699d4838a907c3ef9f2819bf19eb72997b32f
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ arch/arm/kernel/module.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm/kernel/module.c
++++ b/arch/arm/kernel/module.c
+@@ -105,6 +105,10 @@ apply_relocate(Elf32_Shdr *sechdrs, cons
+                       return -ENOEXEC;
+               }
+ 
++              if ((IS_ERR_VALUE(sym->st_value) || !sym->st_value) &&
++                  ELF_ST_BIND(sym->st_info) == STB_WEAK)
++                      continue;
++
+               loc = dstsec->sh_addr + rel->r_offset;
+ 
+               switch (ELF32_R_TYPE(rel->r_info)) {

diff --git a/target/linux/generic/pending-6.0/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch b/target/linux/generic/pending-6.0/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch
new file mode 100644 (file)
index 0000000..3a5f5a2
--- /dev/null
+++ b/target/linux/generic/pending-6.0/330-MIPS-kexec-Accept-command-line-parameters-from-users.patch
@@ -0,0 +1,283 @@
+From: Yousong Zhou <[email protected]>
+Subject: MIPS: kexec: Accept command line parameters from userspace.
+
+Signed-off-by: Yousong Zhou <[email protected]>
+---
+ arch/mips/kernel/machine_kexec.c   |  153 +++++++++++++++++++++++++++++++-----
+ arch/mips/kernel/machine_kexec.h   |   20 +++++
+ arch/mips/kernel/relocate_kernel.S |   21 +++--
+ 3 files changed, 167 insertions(+), 27 deletions(-)
+ create mode 100644 arch/mips/kernel/machine_kexec.h
+
+--- a/arch/mips/kernel/machine_kexec.c
++++ b/arch/mips/kernel/machine_kexec.c
+@@ -9,14 +9,11 @@
+ #include <linux/delay.h>
+ #include <linux/libfdt.h>
+ 
++#include <asm/bootinfo.h>
+ #include <asm/cacheflush.h>
+ #include <asm/page.h>
+-
+-extern const unsigned char relocate_new_kernel[];
+-extern const size_t relocate_new_kernel_size;
+-
+-extern unsigned long kexec_start_address;
+-extern unsigned long kexec_indirection_page;
++#include <linux/uaccess.h>
++#include "machine_kexec.h"
+ 
+ static unsigned long reboot_code_buffer;
+ 
+@@ -30,6 +27,101 @@ void (*_crash_smp_send_stop)(void) = NUL
+ void (*_machine_kexec_shutdown)(void) = NULL;
+ void (*_machine_crash_shutdown)(struct pt_regs *regs) = NULL;
+ 
++static void machine_kexec_print_args(void)
++{
++      unsigned long argc = (int)kexec_args[0];
++      int i;
++
++      pr_info("kexec_args[0] (argc): %lu\n", argc);
++      pr_info("kexec_args[1] (argv): %p\n", (void *)kexec_args[1]);
++      pr_info("kexec_args[2] (env ): %p\n", (void *)kexec_args[2]);
++      pr_info("kexec_args[3] (desc): %p\n", (void *)kexec_args[3]);
++
++      for (i = 0; i < argc; i++) {
++              pr_info("kexec_argv[%d] = %p, %s\n",
++                              i, kexec_argv[i], kexec_argv[i]);
++      }
++}
++
++static void machine_kexec_init_argv(struct kimage *image)
++{
++      void __user *buf = NULL;
++      size_t bufsz;
++      size_t size;
++      int i;
++
++      bufsz = 0;
++      for (i = 0; i < image->nr_segments; i++) {
++              struct kexec_segment *seg;
++
++              seg = &image->segment[i];
++              if (seg->bufsz < 6)
++                      continue;
++
++              if (strncmp((char *) seg->buf, "kexec ", 6))
++                      continue;
++
++              buf = seg->buf;
++              bufsz = seg->bufsz;
++              break;
++      }
++
++      if (!buf)
++              return;
++
++      size = KEXEC_COMMAND_LINE_SIZE;
++      size = min(size, bufsz);
++      if (size < bufsz)
++              pr_warn("kexec command line truncated to %zd bytes\n", size);
++
++      /* Copy to kernel space */
++      if (copy_from_user(kexec_argv_buf, buf, size))
++              pr_warn("kexec command line copy to kernel space failed\n");
++
++      kexec_argv_buf[size - 1] = 0;
++}
++
++static void machine_kexec_parse_argv(struct kimage *image)
++{
++      char *reboot_code_buffer;
++      int reloc_delta;
++      char *ptr;
++      int argc;
++      int i;
++
++      ptr = kexec_argv_buf;
++      argc = 0;
++
++      /*
++       * convert command line string to array of parameters
++       * (as bootloader does).
++       */
++      while (ptr && *ptr && (KEXEC_MAX_ARGC > argc)) {
++              if (*ptr == ' ') {
++                      *ptr++ = '\0';
++                      continue;
++              }
++
++              kexec_argv[argc++] = ptr;
++              ptr = strchr(ptr, ' ');
++      }
++
++      if (!argc)
++              return;
++
++      kexec_args[0] = argc;
++      kexec_args[1] = (unsigned long)kexec_argv;
++      kexec_args[2] = 0;
++      kexec_args[3] = 0;
++
++      reboot_code_buffer = page_address(image->control_code_page);
++      reloc_delta = reboot_code_buffer - (char *)kexec_relocate_new_kernel;
++
++      kexec_args[1] += reloc_delta;
++      for (i = 0; i < argc; i++)
++              kexec_argv[i] += reloc_delta;
++}
++
+ static void kexec_image_info(const struct kimage *kimage)
+ {
+       unsigned long i;
+@@ -99,6 +191,18 @@ machine_kexec_prepare(struct kimage *kim
+ #endif
+ 
+       kexec_image_info(kimage);
++      /*
++       * Whenever arguments passed from kexec-tools, Init the arguments as
++       * the original ones to try avoiding booting failure.
++       */
++
++      kexec_args[0] = fw_arg0;
++      kexec_args[1] = fw_arg1;
++      kexec_args[2] = fw_arg2;
++      kexec_args[3] = fw_arg3;
++
++      machine_kexec_init_argv(kimage);
++      machine_kexec_parse_argv(kimage);
+ 
+       if (_machine_kexec_prepare)
+               return _machine_kexec_prepare(kimage);
+@@ -161,7 +265,7 @@ machine_crash_shutdown(struct pt_regs *r
+ void kexec_nonboot_cpu_jump(void)
+ {
+       local_flush_icache_range((unsigned long)relocated_kexec_smp_wait,
+-                               reboot_code_buffer + relocate_new_kernel_size);
++                               reboot_code_buffer + KEXEC_RELOCATE_NEW_KERNEL_SIZE);
+ 
+       relocated_kexec_smp_wait(NULL);
+ }
+@@ -199,7 +303,7 @@ void kexec_reboot(void)
+        * machine_kexec() CPU.
+        */
+       local_flush_icache_range(reboot_code_buffer,
+-                               reboot_code_buffer + relocate_new_kernel_size);
++                               reboot_code_buffer + KEXEC_RELOCATE_NEW_KERNEL_SIZE);
+ 
+       do_kexec = (void *)reboot_code_buffer;
+       do_kexec();
+@@ -212,10 +316,12 @@ machine_kexec(struct kimage *image)
+       unsigned long *ptr;
+ 
+       reboot_code_buffer =
+-        (unsigned long)page_address(image->control_code_page);
++              (unsigned long)page_address(image->control_code_page);
++      pr_info("reboot_code_buffer = %p\n", (void *)reboot_code_buffer);
+ 
+       kexec_start_address =
+               (unsigned long) phys_to_virt(image->start);
++      pr_info("kexec_start_address = %p\n", (void *)kexec_start_address);
+ 
+       if (image->type == KEXEC_TYPE_DEFAULT) {
+               kexec_indirection_page =
+@@ -223,9 +329,19 @@ machine_kexec(struct kimage *image)
+       } else {
+               kexec_indirection_page = (unsigned long)&image->head;
+       }
++      pr_info("kexec_indirection_page = %p\n", (void *)kexec_indirection_page);
+ 
+-      memcpy((void*)reboot_code_buffer, relocate_new_kernel,
+-             relocate_new_kernel_size);
++      pr_info("Where is memcpy: %p\n", memcpy);
++      pr_info("kexec_relocate_new_kernel = %p, kexec_relocate_new_kernel_end = %p\n",
++              (void *)kexec_relocate_new_kernel, &kexec_relocate_new_kernel_end);
++      pr_info("Copy %lu bytes from %p to %p\n", KEXEC_RELOCATE_NEW_KERNEL_SIZE,
++              (void *)kexec_relocate_new_kernel, (void *)reboot_code_buffer);
++      memcpy((void*)reboot_code_buffer, kexec_relocate_new_kernel,
++             KEXEC_RELOCATE_NEW_KERNEL_SIZE);
++
++      pr_info("Before _print_args().\n");
++      machine_kexec_print_args();
++      pr_info("Before eval loop.\n");
+ 
+       /*
+        * The generic kexec code builds a page list with physical
+@@ -256,7 +372,7 @@ machine_kexec(struct kimage *image)
+ #ifdef CONFIG_SMP
+       /* All secondary cpus now may jump to kexec_wait cycle */
+       relocated_kexec_smp_wait = reboot_code_buffer +
+-              (void *)(kexec_smp_wait - relocate_new_kernel);
++              (void *)(kexec_smp_wait - kexec_relocate_new_kernel);
+       smp_wmb();
+       atomic_set(&kexec_ready_to_reboot, 1);
+ #endif
+--- /dev/null
++++ b/arch/mips/kernel/machine_kexec.h
+@@ -0,0 +1,20 @@
++#ifndef _MACHINE_KEXEC_H
++#define _MACHINE_KEXEC_H
++
++#ifndef __ASSEMBLY__
++extern const unsigned char kexec_relocate_new_kernel[];
++extern unsigned long kexec_relocate_new_kernel_end;
++extern unsigned long kexec_start_address;
++extern unsigned long kexec_indirection_page;
++
++extern char kexec_argv_buf[];
++extern char *kexec_argv[];
++
++#define KEXEC_RELOCATE_NEW_KERNEL_SIZE        ((unsigned long)&kexec_relocate_new_kernel_end - (unsigned long)kexec_relocate_new_kernel)
++#endif /* !__ASSEMBLY__ */
++
++#define KEXEC_COMMAND_LINE_SIZE               256
++#define KEXEC_ARGV_SIZE                       (KEXEC_COMMAND_LINE_SIZE / 16)
++#define KEXEC_MAX_ARGC                        (KEXEC_ARGV_SIZE / sizeof(long))
++
++#endif
+--- a/arch/mips/kernel/relocate_kernel.S
++++ b/arch/mips/kernel/relocate_kernel.S
+@@ -10,10 +10,11 @@
+ #include <asm/mipsregs.h>
+ #include <asm/stackframe.h>
+ #include <asm/addrspace.h>
++#include "machine_kexec.h"
+ 
+ #include <kernel-entry-init.h>
+ 
+-LEAF(relocate_new_kernel)
++LEAF(kexec_relocate_new_kernel)
+       PTR_L a0,       arg0
+       PTR_L a1,       arg1
+       PTR_L a2,       arg2
+@@ -98,7 +99,7 @@ done:
+ #endif
+       /* jump to kexec_start_address */
+       j               s1
+-      END(relocate_new_kernel)
++      END(kexec_relocate_new_kernel)
+ 
+ #ifdef CONFIG_SMP
+ /*
+@@ -181,9 +182,15 @@ kexec_indirection_page:
+       PTR_WD          0
+       .size           kexec_indirection_page, PTRSIZE
+ 
+-relocate_new_kernel_end:
++kexec_argv_buf:
++      EXPORT(kexec_argv_buf)
++      .skip           KEXEC_COMMAND_LINE_SIZE
++      .size           kexec_argv_buf, KEXEC_COMMAND_LINE_SIZE
++
++kexec_argv:
++      EXPORT(kexec_argv)
++      .skip           KEXEC_ARGV_SIZE
++      .size           kexec_argv, KEXEC_ARGV_SIZE
+ 
+-relocate_new_kernel_size:
+-      EXPORT(relocate_new_kernel_size)
+-      PTR_WD          relocate_new_kernel_end - relocate_new_kernel
+-      .size           relocate_new_kernel_size, PTRSIZE
++kexec_relocate_new_kernel_end:
++      EXPORT(kexec_relocate_new_kernel_end)

diff --git a/target/linux/generic/pending-6.0/332-arc-add-OWRTDTB-section.patch b/target/linux/generic/pending-6.0/332-arc-add-OWRTDTB-section.patch
new file mode 100644 (file)
index 0000000..30158cf
--- /dev/null
+++ b/target/linux/generic/pending-6.0/332-arc-add-OWRTDTB-section.patch
@@ -0,0 +1,84 @@
+From bb0c3b0175240bf152fd7c644821a0cf9f77c37c Mon Sep 17 00:00:00 2001
+From: Evgeniy Didin <[email protected]>
+Date: Fri, 15 Mar 2019 18:53:38 +0300
+Subject: [PATCH] arc add OWRTDTB section
+
+This change allows OpenWRT to patch resulting kernel binary with
+external .dtb.
+
+That allows us to re-use exactky the same vmlinux on different boards
+given its ARC core configurations match (at least cache line sizes etc).
+
+""patch-dtb" searches for ASCII "OWRTDTB:" strign and copies external
+.dtb right after it, keeping the string in place.
+
+Signed-off-by: Eugeniy Paltsev <[email protected]>
+Signed-off-by: Alexey Brodkin <[email protected]>
+Signed-off-by: Evgeniy Didin <[email protected]>
+---
+ arch/arc/kernel/head.S        | 10 ++++++++++
+ arch/arc/kernel/setup.c       |  4 +++-
+ arch/arc/kernel/vmlinux.lds.S | 13 +++++++++++++
+ 3 files changed, 26 insertions(+), 1 deletion(-)
+
+--- a/arch/arc/kernel/head.S
++++ b/arch/arc/kernel/head.S
+@@ -88,6 +88,16 @@
+       DSP_EARLY_INIT
+ .endm
+ 
++      ; Here "patch-dtb" will embed external .dtb
++      ; Note "patch-dtb" searches for ASCII "OWRTDTB:" string
++      ; and pastes .dtb right after it, hense the string precedes
++      ; __image_dtb symbol.
++      .section .owrt, "aw",@progbits
++      .ascii  "OWRTDTB:"
++ENTRY(__image_dtb)
++      .fill   0x4000
++END(__image_dtb)
++
+       .section .init.text, "ax",@progbits
+ 
+ ;----------------------------------------------------------------
+--- a/arch/arc/kernel/setup.c
++++ b/arch/arc/kernel/setup.c
+@@ -495,6 +495,8 @@ static inline bool uboot_arg_invalid(uns
+ /* We always pass 0 as magic from U-boot */
+ #define UBOOT_MAGIC_VALUE     0
+ 
++extern struct boot_param_header __image_dtb;
++
+ void __init handle_uboot_args(void)
+ {
+       bool use_embedded_dtb = true;
+@@ -533,7 +535,7 @@ void __init handle_uboot_args(void)
+ ignore_uboot_args:
+ 
+       if (use_embedded_dtb) {
+-              machine_desc = setup_machine_fdt(__dtb_start);
++              machine_desc = setup_machine_fdt(&__image_dtb);
+               if (!machine_desc)
+                       panic("Embedded DT invalid\n");
+       }
+--- a/arch/arc/kernel/vmlinux.lds.S
++++ b/arch/arc/kernel/vmlinux.lds.S
+@@ -27,6 +27,19 @@ SECTIONS
+ 
+       . = CONFIG_LINUX_LINK_BASE;
+ 
++      /*
++      * In OpenWRT we want to patch built binary embedding .dtb of choice.
++      * This is implemented with "patch-dtb" utility which searches for
++      * "OWRTDTB:" string in first 16k of image and if it is found
++      * copies .dtb right after mentioned string.
++      *
++      * Note: "OWRTDTB:" won't be overwritten with .dtb, .dtb will follow it.
++      */
++      .owrt : {
++              *(.owrt)
++      . = ALIGN(PAGE_SIZE);
++      }
++
+       _int_vec_base_lds = .;
+       .vector : {
+               *(.vector)

diff --git a/target/linux/generic/pending-6.0/333-arc-enable-unaligned-access-in-kernel-mode.patch b/target/linux/generic/pending-6.0/333-arc-enable-unaligned-access-in-kernel-mode.patch
new file mode 100644 (file)
index 0000000..1848a84
--- /dev/null
+++ b/target/linux/generic/pending-6.0/333-arc-enable-unaligned-access-in-kernel-mode.patch
@@ -0,0 +1,24 @@
+From: Alexey Brodkin <[email protected]>
+Subject: arc: enable unaligned access in kernel mode
+
+This enables misaligned access handling even in kernel mode.
+Some wireless drivers (ath9k-htc and mt7601u) use misaligned accesses
+here and there and to cope with that without fixing stuff in the drivers
+we're just gracefully handling it on ARC.
+
+Signed-off-by: Alexey Brodkin <[email protected]>
+---
+ arch/arc/kernel/unaligned.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arc/kernel/unaligned.c
++++ b/arch/arc/kernel/unaligned.c
+@@ -202,7 +202,7 @@ int misaligned_fixup(unsigned long addre
+       char buf[TASK_COMM_LEN];
+ 
+       /* handle user mode only and only if enabled by sysadmin */
+-      if (!user_mode(regs) || !unaligned_enabled)
++      if (!unaligned_enabled)
+               return 1;
+ 
+       if (no_unaligned_warning) {

diff --git a/target/linux/generic/pending-6.0/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch b/target/linux/generic/pending-6.0/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch
new file mode 100644 (file)
index 0000000..082b122
--- /dev/null
+++ b/target/linux/generic/pending-6.0/342-powerpc-Enable-kernel-XZ-compression-option-on-PPC_8.patch
@@ -0,0 +1,25 @@
+From 66770a004afe10df11d3902e16eaa0c2c39436bb Mon Sep 17 00:00:00 2001
+From: Pawel Dembicki <[email protected]>
+Date: Fri, 24 May 2019 17:56:19 +0200
+Subject: [PATCH] powerpc: Enable kernel XZ compression option on PPC_85xx
+
+Enable kernel XZ compression option on PPC_85xx. Tested with
+simpleImage on TP-Link TL-WDR4900 (Freescale P1014 processor).
+
+Suggested-by: Christian Lamparter <[email protected]>
+Signed-off-by: Pawel Dembicki <[email protected]>
+---
+ arch/powerpc/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/powerpc/Kconfig
++++ b/arch/powerpc/Kconfig
+@@ -221,7 +221,7 @@ config PPC
+       select HAVE_KERNEL_GZIP
+       select HAVE_KERNEL_LZMA                 if DEFAULT_UIMAGE
+       select HAVE_KERNEL_LZO                  if DEFAULT_UIMAGE
+-      select HAVE_KERNEL_XZ                   if PPC_BOOK3S || 44x
++      select HAVE_KERNEL_XZ                   if PPC_BOOK3S || 44x || PPC_85xx
+       select HAVE_KPROBES
+       select HAVE_KPROBES_ON_FTRACE
+       select HAVE_KRETPROBES

diff --git a/target/linux/generic/pending-6.0/400-mtd-mtdsplit-support.patch b/target/linux/generic/pending-6.0/400-mtd-mtdsplit-support.patch
new file mode 100644 (file)
index 0000000..8b34f4f
--- /dev/null
+++ b/target/linux/generic/pending-6.0/400-mtd-mtdsplit-support.patch
@@ -0,0 +1,327 @@
+From 39717277d5c87bdb183cf2f258957b44ba99b4df Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 11:47:35 +0200
+Subject: [PATCH] mtd: mtdsplit support
+
+---
+ drivers/mtd/Kconfig            |  19 ++++
+ drivers/mtd/Makefile           |   2 +
+ drivers/mtd/mtdpart.c          | 169 ++++++++++++++++++++++++++++-----
+ include/linux/mtd/mtd.h        |  25 +++++
+ include/linux/mtd/partitions.h |   7 ++
+ 5 files changed, 197 insertions(+), 25 deletions(-)
+
+--- a/drivers/mtd/Kconfig
++++ b/drivers/mtd/Kconfig
+@@ -12,6 +12,25 @@ menuconfig MTD
+ 
+ if MTD
+ 
++menu "OpenWrt specific MTD options"
++
++config MTD_ROOTFS_ROOT_DEV
++      bool "Automatically set 'rootfs' partition to be root filesystem"
++      default y
++
++config MTD_SPLIT_FIRMWARE
++      bool "Automatically split firmware partition for kernel+rootfs"
++      default y
++
++config MTD_SPLIT_FIRMWARE_NAME
++      string "Firmware partition name"
++      depends on MTD_SPLIT_FIRMWARE
++      default "firmware"
++
++source "drivers/mtd/mtdsplit/Kconfig"
++
++endmenu
++
+ config MTD_TESTS
+       tristate "MTD tests support (DANGEROUS)"
+       depends on m
+--- a/drivers/mtd/Makefile
++++ b/drivers/mtd/Makefile
+@@ -9,6 +9,8 @@ mtd-y                          := mtdcore.o mtdsuper.o mtdconc
+ 
+ obj-y                         += parsers/
+ 
++obj-$(CONFIG_MTD_SPLIT)               += mtdsplit/
++
+ # 'Users' - code which presents functionality to userspace.
+ obj-$(CONFIG_MTD_BLKDEVS)     += mtd_blkdevs.o
+ obj-$(CONFIG_MTD_BLOCK)               += mtdblock.o
+--- a/drivers/mtd/mtdpart.c
++++ b/drivers/mtd/mtdpart.c
+@@ -15,11 +15,13 @@
+ #include <linux/kmod.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
++#include <linux/magic.h>
+ #include <linux/err.h>
+ #include <linux/of.h>
+ #include <linux/of_platform.h>
+ 
+ #include "mtdcore.h"
++#include "mtdsplit/mtdsplit.h"
+ 
+ /*
+  * MTD methods which simply translate the effective address and pass through
+@@ -236,6 +238,146 @@ static int mtd_add_partition_attrs(struc
+       return ret;
+ }
+ 
++static DEFINE_SPINLOCK(part_parser_lock);
++static LIST_HEAD(part_parsers);
++
++static struct mtd_part_parser *mtd_part_parser_get(const char *name)
++{
++      struct mtd_part_parser *p, *ret = NULL;
++
++      spin_lock(&part_parser_lock);
++
++      list_for_each_entry(p, &part_parsers, list)
++              if (!strcmp(p->name, name) && try_module_get(p->owner)) {
++                      ret = p;
++                      break;
++              }
++
++      spin_unlock(&part_parser_lock);
++
++      return ret;
++}
++
++static inline void mtd_part_parser_put(const struct mtd_part_parser *p)
++{
++      module_put(p->owner);
++}
++
++static struct mtd_part_parser *
++get_partition_parser_by_type(enum mtd_parser_type type,
++                           struct mtd_part_parser *start)
++{
++      struct mtd_part_parser *p, *ret = NULL;
++
++      spin_lock(&part_parser_lock);
++
++      p = list_prepare_entry(start, &part_parsers, list);
++      if (start)
++              mtd_part_parser_put(start);
++
++      list_for_each_entry_continue(p, &part_parsers, list) {
++              if (p->type == type && try_module_get(p->owner)) {
++                      ret = p;
++                      break;
++              }
++      }
++
++      spin_unlock(&part_parser_lock);
++
++      return ret;
++}
++
++static int parse_mtd_partitions_by_type(struct mtd_info *master,
++                                      enum mtd_parser_type type,
++                                      const struct mtd_partition **pparts,
++                                      struct mtd_part_parser_data *data)
++{
++      struct mtd_part_parser *prev = NULL;
++      int ret = 0;
++
++      while (1) {
++              struct mtd_part_parser *parser;
++
++              parser = get_partition_parser_by_type(type, prev);
++              if (!parser)
++                      break;
++
++              ret = (*parser->parse_fn)(master, pparts, data);
++
++              if (ret > 0) {
++                      mtd_part_parser_put(parser);
++                      printk(KERN_NOTICE
++                             "%d %s partitions found on MTD device %s\n",
++                             ret, parser->name, master->name);
++                      break;
++              }
++
++              prev = parser;
++      }
++
++      return ret;
++}
++
++static int
++run_parsers_by_type(struct mtd_info *child, enum mtd_parser_type type)
++{
++      struct mtd_partition *parts;
++      int nr_parts;
++      int i;
++
++      nr_parts = parse_mtd_partitions_by_type(child, type, (const struct mtd_partition **)&parts,
++                                              NULL);
++      if (nr_parts <= 0)
++              return nr_parts;
++
++      if (WARN_ON(!parts))
++              return 0;
++
++      for (i = 0; i < nr_parts; i++) {
++              /* adjust partition offsets */
++              parts[i].offset += child->part.offset;
++
++              mtd_add_partition(child->parent,
++                                parts[i].name,
++                                parts[i].offset,
++                                parts[i].size);
++      }
++
++      kfree(parts);
++
++      return nr_parts;
++}
++
++#ifdef CONFIG_MTD_SPLIT_FIRMWARE_NAME
++#define SPLIT_FIRMWARE_NAME   CONFIG_MTD_SPLIT_FIRMWARE_NAME
++#else
++#define SPLIT_FIRMWARE_NAME   "unused"
++#endif
++
++static void split_firmware(struct mtd_info *master, struct mtd_info *part)
++{
++      run_parsers_by_type(part, MTD_PARSER_TYPE_FIRMWARE);
++}
++
++static void mtd_partition_split(struct mtd_info *master, struct mtd_info *part)
++{
++      static int rootfs_found = 0;
++
++      if (rootfs_found)
++              return;
++
++      if (!strcmp(part->name, "rootfs")) {
++              run_parsers_by_type(part, MTD_PARSER_TYPE_ROOTFS);
++
++              rootfs_found = 1;
++      }
++
++      if (IS_ENABLED(CONFIG_MTD_SPLIT_FIRMWARE) &&
++          !strcmp(part->name, SPLIT_FIRMWARE_NAME) &&
++          !of_find_property(mtd_get_of_node(part), "compatible", NULL))
++              split_firmware(master, part);
++}
++
+ int mtd_add_partition(struct mtd_info *parent, const char *name,
+                     long long offset, long long length)
+ {
+@@ -274,6 +416,7 @@ int mtd_add_partition(struct mtd_info *p
+       if (ret)
+               goto err_remove_part;
+ 
++      mtd_partition_split(parent, child);
+       mtd_add_partition_attrs(child);
+ 
+       return 0;
+@@ -422,6 +565,7 @@ int add_mtd_partitions(struct mtd_info *
+                       goto err_del_partitions;
+               }
+ 
++              mtd_partition_split(master, child);
+               mtd_add_partition_attrs(child);
+ 
+               /* Look for subpartitions */
+@@ -438,31 +582,6 @@ err_del_partitions:
+       return ret;
+ }
+ 
+-static DEFINE_SPINLOCK(part_parser_lock);
+-static LIST_HEAD(part_parsers);
+-
+-static struct mtd_part_parser *mtd_part_parser_get(const char *name)
+-{
+-      struct mtd_part_parser *p, *ret = NULL;
+-
+-      spin_lock(&part_parser_lock);
+-
+-      list_for_each_entry(p, &part_parsers, list)
+-              if (!strcmp(p->name, name) && try_module_get(p->owner)) {
+-                      ret = p;
+-                      break;
+-              }
+-
+-      spin_unlock(&part_parser_lock);
+-
+-      return ret;
+-}
+-
+-static inline void mtd_part_parser_put(const struct mtd_part_parser *p)
+-{
+-      module_put(p->owner);
+-}
+-
+ /*
+  * Many partition parsers just expected the core to kfree() all their data in
+  * one chunk. Do that by default.
+--- a/include/linux/mtd/mtd.h
++++ b/include/linux/mtd/mtd.h
+@@ -613,6 +613,24 @@ static inline void mtd_align_erase_req(s
+               req->len += mtd->erasesize - mod;
+ }
+ 
++static inline uint64_t mtd_roundup_to_eb(uint64_t sz, struct mtd_info *mtd)
++{
++      if (mtd_mod_by_eb(sz, mtd) == 0)
++              return sz;
++
++      /* Round up to next erase block */
++      return (mtd_div_by_eb(sz, mtd) + 1) * mtd->erasesize;
++}
++
++static inline uint64_t mtd_rounddown_to_eb(uint64_t sz, struct mtd_info *mtd)
++{
++      if (mtd_mod_by_eb(sz, mtd) == 0)
++              return sz;
++
++      /* Round down to the start of the current erase block */
++      return (mtd_div_by_eb(sz, mtd)) * mtd->erasesize;
++}
++
+ static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd)
+ {
+       if (mtd->writesize_shift)
+@@ -685,6 +703,13 @@ extern void __put_mtd_device(struct mtd_
+ extern struct mtd_info *get_mtd_device_nm(const char *name);
+ extern void put_mtd_device(struct mtd_info *mtd);
+ 
++static inline uint64_t mtdpart_get_offset(const struct mtd_info *mtd)
++{
++      if (!mtd_is_partition(mtd))
++              return 0;
++
++      return mtd->part.offset;
++}
+ 
+ struct mtd_notifier {
+       void (*add)(struct mtd_info *mtd);
+--- a/include/linux/mtd/partitions.h
++++ b/include/linux/mtd/partitions.h
+@@ -75,6 +75,12 @@ struct mtd_part_parser_data {
+  * Functions dealing with the various ways of partitioning the space
+  */
+ 
++enum mtd_parser_type {
++      MTD_PARSER_TYPE_DEVICE = 0,
++      MTD_PARSER_TYPE_ROOTFS,
++      MTD_PARSER_TYPE_FIRMWARE,
++};
++
+ struct mtd_part_parser {
+       struct list_head list;
+       struct module *owner;
+@@ -83,6 +89,7 @@ struct mtd_part_parser {
+       int (*parse_fn)(struct mtd_info *, const struct mtd_partition **,
+                       struct mtd_part_parser_data *);
+       void (*cleanup)(const struct mtd_partition *pparts, int nr_parts);
++      enum mtd_parser_type type;
+ };
+ 
+ /* Container for passing around a set of parsed partitions */

diff --git a/target/linux/generic/pending-6.0/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch b/target/linux/generic/pending-6.0/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch
new file mode 100644 (file)
index 0000000..ed9d1c9
--- /dev/null
+++ b/target/linux/generic/pending-6.0/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch
@@ -0,0 +1,245 @@
+From acacdac272927ae1d96e0bca51eb82899671eaea Mon Sep 17 00:00:00 2001
+From: John Thomson <[email protected]>
+Date: Fri, 25 Dec 2020 18:50:08 +1000
+Subject: [PATCH] mtd: spi-nor: write support for minor aligned partitions
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Do not prevent writing to mtd partitions where a partition boundary sits
+on a minor erasesize boundary.
+This addresses a FIXME that has been present since the start of the
+linux git history:
+/* Doesn't start on a boundary of major erase size */
+/* FIXME: Let it be writable if it is on a boundary of
+ * _minor_ erase size though */
+
+Allow a uniform erase region spi-nor device to be configured
+to use the non-uniform erase regions code path for an erase with:
+CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y
+
+On supporting hardware (SECT_4K: majority of current SPI-NOR device)
+provide the facility for an erase to use the least number
+of SPI-NOR operations, as well as access to 4K erase without
+requiring CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
+
+Introduce erasesize_minor to the mtd struct,
+the smallest erasesize supported by the device
+
+On existing devices, this is useful where write support is wanted
+for data on a 4K partition, such as some u-boot-env partitions,
+or RouterBoot soft_config, while still netting the performance
+benefits of using 64K sectors
+
+Performance:
+time mtd erase firmware
+OpenWrt 5.10 ramips MT7621 w25q128jv 0xfc0000 partition length
+
+Without this patch
+MTD_SPI_NOR_USE_4K_SECTORS=y   |n
+real    2m 11.66s              |0m 50.86s
+user    0m 0.00s               |0m 0.00s
+sys     1m 56.20s              |0m 50.80s
+
+With this patch
+MTD_SPI_NOR_USE_VARIABLE_ERASE=n|y             |4K_SECTORS=y
+real    0m 51.68s              |0m 50.85s      |2m 12.89s
+user    0m 0.00s               |0m 0.00s       |0m 0.01s
+sys     0m 46.94s              |0m 50.38s      |2m 12.46s
+
+Signed-off-by: John Thomson <[email protected]>
+Signed-off-by: Thibaut VARÈNE <[email protected]>
+
+---
+
+checkpatch does not like the printk(KERN_WARNING
+these should be changed separately beforehand?
+
+Changes v1 -> v2:
+Added mtdcore sysfs for erasesize_minor
+Removed finding minor erasesize for variable erase regions device,
+as untested and no responses regarding it.
+Moved IF_ENABLED for SPINOR variable erase to guard setting
+erasesize_minor in spi-nor/core.c
+Removed setting erasesize to minor where partition boundaries require
+minor erase to be writable
+Simplified minor boundary check by relying on minor being a factor of
+major
+
+Changes RFC -> v1:
+Fix uninitialized variable smatch warning
+Reported-by: kernel test robot <[email protected]>
+Reported-by: Dan Carpenter <[email protected]>
+---
+ drivers/mtd/mtdcore.c       | 10 ++++++++++
+ drivers/mtd/mtdpart.c       | 35 +++++++++++++++++++++++++----------
+ drivers/mtd/spi-nor/Kconfig | 10 ++++++++++
+ drivers/mtd/spi-nor/core.c  | 11 +++++++++--
+ include/linux/mtd/mtd.h     |  2 ++
+ 5 files changed, 56 insertions(+), 12 deletions(-)
+
+--- a/drivers/mtd/mtdcore.c
++++ b/drivers/mtd/mtdcore.c
+@@ -168,6 +168,15 @@ static ssize_t mtd_erasesize_show(struct
+ }
+ MTD_DEVICE_ATTR_RO(erasesize);
+ 
++static ssize_t mtd_erasesize_minor_show(struct device *dev,
++              struct device_attribute *attr, char *buf)
++{
++      struct mtd_info *mtd = dev_get_drvdata(dev);
++
++      return sysfs_emit(buf, "%lu\n", (unsigned long)mtd->erasesize_minor);
++}
++MTD_DEVICE_ATTR_RO(erasesize_minor);
++
+ static ssize_t mtd_writesize_show(struct device *dev,
+               struct device_attribute *attr, char *buf)
+ {
+@@ -313,6 +322,7 @@ static struct attribute *mtd_attrs[] = {
+       &dev_attr_flags.attr,
+       &dev_attr_size.attr,
+       &dev_attr_erasesize.attr,
++      &dev_attr_erasesize_minor.attr,
+       &dev_attr_writesize.attr,
+       &dev_attr_subpagesize.attr,
+       &dev_attr_oobsize.attr,
+--- a/drivers/mtd/mtdpart.c
++++ b/drivers/mtd/mtdpart.c
+@@ -41,6 +41,7 @@ static struct mtd_info *allocate_partiti
+       struct mtd_info *master = mtd_get_master(parent);
+       int wr_alignment = (parent->flags & MTD_NO_ERASE) ?
+                          master->writesize : master->erasesize;
++      int wr_alignment_minor = 0;
+       u64 parent_size = mtd_is_partition(parent) ?
+                         parent->part.size : parent->size;
+       struct mtd_info *child;
+@@ -165,6 +166,7 @@ static struct mtd_info *allocate_partiti
+       } else {
+               /* Single erase size */
+               child->erasesize = master->erasesize;
++              child->erasesize_minor = master->erasesize_minor;
+       }
+ 
+       /*
+@@ -172,26 +174,39 @@ static struct mtd_info *allocate_partiti
+        * exposes several regions with different erasesize. Adjust
+        * wr_alignment accordingly.
+        */
+-      if (!(child->flags & MTD_NO_ERASE))
++      if (!(child->flags & MTD_NO_ERASE)) {
+               wr_alignment = child->erasesize;
++              wr_alignment_minor = child->erasesize_minor;
++      }
+ 
+       tmp = mtd_get_master_ofs(child, 0);
+       remainder = do_div(tmp, wr_alignment);
+       if ((child->flags & MTD_WRITEABLE) && remainder) {
+-              /* Doesn't start on a boundary of major erase size */
+-              /* FIXME: Let it be writable if it is on a boundary of
+-               * _minor_ erase size though */
+-              child->flags &= ~MTD_WRITEABLE;
+-              printk(KERN_WARNING"mtd: partition \"%s\" doesn't start on an erase/write block boundary -- force read-only\n",
+-                      part->name);
++              if (wr_alignment_minor) {
++                      /* rely on minor being a factor of major erasesize */
++                      tmp = remainder;
++                      remainder = do_div(tmp, wr_alignment_minor);
++              }
++              if (remainder) {
++                      child->flags &= ~MTD_WRITEABLE;
++                      printk(KERN_WARNING"mtd: partition \"%s\" doesn't start on an erase/write block boundary -- force read-only\n",
++                              part->name);
++              }
+       }
+ 
+       tmp = mtd_get_master_ofs(child, 0) + child->part.size;
+       remainder = do_div(tmp, wr_alignment);
+       if ((child->flags & MTD_WRITEABLE) && remainder) {
+-              child->flags &= ~MTD_WRITEABLE;
+-              printk(KERN_WARNING"mtd: partition \"%s\" doesn't end on an erase/write block -- force read-only\n",
+-                      part->name);
++              if (wr_alignment_minor) {
++                      tmp = remainder;
++                      remainder = do_div(tmp, wr_alignment_minor);
++              }
++
++              if (remainder) {
++                      child->flags &= ~MTD_WRITEABLE;
++                      printk(KERN_WARNING"mtd: partition \"%s\" doesn't end on an erase/write block -- force read-only\n",
++                              part->name);
++              }
+       }
+ 
+       child->size = child->part.size;
+--- a/drivers/mtd/spi-nor/Kconfig
++++ b/drivers/mtd/spi-nor/Kconfig
+@@ -10,6 +10,16 @@ menuconfig MTD_SPI_NOR
+ 
+ if MTD_SPI_NOR
+ 
++config MTD_SPI_NOR_USE_VARIABLE_ERASE
++      bool "Disable uniform_erase to allow use of all hardware supported erasesizes"
++      depends on !MTD_SPI_NOR_USE_4K_SECTORS
++      default n
++      help
++        Allow mixed use of all hardware supported erasesizes,
++        by forcing spi_nor to use the multiple eraseregions code path.
++        For example: A 68K erase will use one 64K erase, and one 4K erase
++        on supporting hardware.
++
+ config MTD_SPI_NOR_USE_4K_SECTORS
+       bool "Use small 4096 B erase sectors"
+       default y
+--- a/drivers/mtd/spi-nor/core.c
++++ b/drivers/mtd/spi-nor/core.c
+@@ -1271,6 +1271,8 @@ static u8 spi_nor_convert_3to4_erase(u8
+ 
+ static bool spi_nor_has_uniform_erase(const struct spi_nor *nor)
+ {
++      if (IS_ENABLED(CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE))
++              return false;
+       return !!nor->params->erase_map.uniform_erase_type;
+ }
+ 
+@@ -2388,6 +2390,7 @@ static int spi_nor_select_erase(struct s
+ {
+       struct spi_nor_erase_map *map = &nor->params->erase_map;
+       const struct spi_nor_erase_type *erase = NULL;
++      const struct spi_nor_erase_type *erase_minor = NULL;
+       struct mtd_info *mtd = &nor->mtd;
+       u32 wanted_size = nor->info->sector_size;
+       int i;
+@@ -2420,8 +2423,9 @@ static int spi_nor_select_erase(struct s
+        */
+       for (i = SNOR_ERASE_TYPE_MAX - 1; i >= 0; i--) {
+               if (map->erase_type[i].size) {
+-                      erase = &map->erase_type[i];
+-                      break;
++                      if (!erase)
++                              erase = &map->erase_type[i];
++                      erase_minor = &map->erase_type[i];
+               }
+       }
+ 
+@@ -2429,6 +2433,9 @@ static int spi_nor_select_erase(struct s
+               return -EINVAL;
+ 
+       mtd->erasesize = erase->size;
++      if (IS_ENABLED(CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE) &&
++                      erase_minor && erase_minor->size < erase->size)
++              mtd->erasesize_minor = erase_minor->size;
+       return 0;
+ }
+ 
+--- a/include/linux/mtd/mtd.h
++++ b/include/linux/mtd/mtd.h
+@@ -243,6 +243,8 @@ struct mtd_info {
+        * information below if they desire
+        */
+       uint32_t erasesize;
++      /* "Minor" (smallest) erase size supported by the whole device */
++      uint32_t erasesize_minor;
+       /* Minimal writable flash unit size. In case of NOR flash it is 1 (even
+        * though individual bits can be cleared), in case of NAND flash it is
+        * one NAND page (or half, or one-fourths of it), in case of ECC-ed NOR

diff --git a/target/linux/generic/pending-6.0/420-mtd-redboot_space.patch b/target/linux/generic/pending-6.0/420-mtd-redboot_space.patch
new file mode 100644 (file)
index 0000000..fee1936
--- /dev/null
+++ b/target/linux/generic/pending-6.0/420-mtd-redboot_space.patch
@@ -0,0 +1,41 @@
+From: Felix Fietkau <[email protected]>
+Subject: add patch for including unpartitioned space in the rootfs partition for redboot devices (if applicable)
+
+[[email protected]: used by ixp and others]
+
+lede-commit: 394918851f84e4d00fa16eb900e7700e95091f00
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ drivers/mtd/redboot.c | 19 +++++++++++++------
+ 1 file changed, 13 insertions(+), 6 deletions(-)
+
+--- a/drivers/mtd/parsers/redboot.c
++++ b/drivers/mtd/parsers/redboot.c
+@@ -277,14 +277,21 @@ nogood:
+ #endif
+               names += strlen(names) + 1;
+ 
+-#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
+               if (fl->next && fl->img->flash_base + fl->img->size + master->erasesize <= fl->next->img->flash_base) {
+-                      i++;
+-                      parts[i].offset = parts[i - 1].size + parts[i - 1].offset;
+-                      parts[i].size = fl->next->img->flash_base - parts[i].offset;
+-                      parts[i].name = nullname;
+-              }
++                      if (!strcmp(parts[i].name, "rootfs")) {
++                              parts[i].size = fl->next->img->flash_base;
++                              parts[i].size &= ~(master->erasesize - 1);
++                              parts[i].size -= parts[i].offset;
++#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
++                              nrparts--;
++                      } else {
++                              i++;
++                              parts[i].offset = parts[i-1].size + parts[i-1].offset;
++                              parts[i].size = fl->next->img->flash_base - parts[i].offset;
++                              parts[i].name = nullname;
+ #endif
++                      }
++              }
+               tmp_fl = fl;
+               fl = fl->next;
+               kfree(tmp_fl);

diff --git a/target/linux/generic/pending-6.0/430-mtd-add-myloader-partition-parser.patch b/target/linux/generic/pending-6.0/430-mtd-add-myloader-partition-parser.patch
new file mode 100644 (file)
index 0000000..8a6e630
--- /dev/null
+++ b/target/linux/generic/pending-6.0/430-mtd-add-myloader-partition-parser.patch
@@ -0,0 +1,229 @@
+From: Florian Fainelli <[email protected]>
+Subject: Add myloader partition table parser
+
+[[email protected]: shoud be upstreamable]
+
+lede-commit: d8bf22859b51faa09d22c056fe221a45d2f7a3b8
+Signed-off-by: Florian Fainelli <[email protected]>
+[adjust for kernel 5.4, add myloader.c to patch]
+Signed-off-by: Adrian Schmutzler <[email protected]>
+
+--- a/drivers/mtd/parsers/Kconfig
++++ b/drivers/mtd/parsers/Kconfig
+@@ -57,6 +57,22 @@ config MTD_CMDLINE_PARTS
+ 
+         If unsure, say 'N'.
+ 
++config MTD_MYLOADER_PARTS
++      tristate "MyLoader partition parsing"
++      depends on ADM5120 || ATH25 || ATH79
++      help
++        MyLoader is a bootloader which allows the user to define partitions
++        in flash devices, by putting a table in the second erase block
++        on the device, similar to a partition table. This table gives the
++        offsets and lengths of the user defined partitions.
++
++        If you need code which can detect and parse these tables, and
++        register MTD 'partitions' corresponding to each image detected,
++        enable this option.
++
++        You will still need the parsing functions to be called by the driver
++        for your particular device. It won't happen automatically.
++
+ config MTD_OF_PARTS
+       tristate "OpenFirmware (device tree) partitioning parser"
+       default y
+--- a/drivers/mtd/parsers/Makefile
++++ b/drivers/mtd/parsers/Makefile
+@@ -3,6 +3,7 @@ obj-$(CONFIG_MTD_AR7_PARTS)            += ar7part.
+ obj-$(CONFIG_MTD_BCM47XX_PARTS)               += bcm47xxpart.o
+ obj-$(CONFIG_MTD_BCM63XX_PARTS)               += bcm63xxpart.o
+ obj-$(CONFIG_MTD_CMDLINE_PARTS)               += cmdlinepart.o
++obj-$(CONFIG_MTD_MYLOADER_PARTS)              += myloader.o
+ obj-$(CONFIG_MTD_OF_PARTS)            += ofpart.o
+ ofpart-y                              += ofpart_core.o
+ ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908) += ofpart_bcm4908.o
+--- /dev/null
++++ b/drivers/mtd/parsers/myloader.c
+@@ -0,0 +1,181 @@
++/*
++ *  Parse MyLoader-style flash partition tables and produce a Linux partition
++ *  array to match.
++ *
++ *  Copyright (C) 2007-2009 Gabor Juhos <[email protected]>
++ *
++ *  This file was based on drivers/mtd/redboot.c
++ *  Author: Red Hat, Inc. - David Woodhouse <[email protected]>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/version.h>
++#include <linux/slab.h>
++#include <linux/init.h>
++#include <linux/vmalloc.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/byteorder/generic.h>
++#include <linux/myloader.h>
++
++#define BLOCK_LEN_MIN         0x10000
++#define PART_NAME_LEN         32
++
++struct part_data {
++      struct mylo_partition_table     tab;
++      char names[MYLO_MAX_PARTITIONS][PART_NAME_LEN];
++};
++
++static int myloader_parse_partitions(struct mtd_info *master,
++                                   const struct mtd_partition **pparts,
++                                   struct mtd_part_parser_data *data)
++{
++      struct part_data *buf;
++      struct mylo_partition_table *tab;
++      struct mylo_partition *part;
++      struct mtd_partition *mtd_parts;
++      struct mtd_partition *mtd_part;
++      int num_parts;
++      int ret, i;
++      size_t retlen;
++      char *names;
++      unsigned long offset;
++      unsigned long blocklen;
++
++      buf = vmalloc(sizeof(*buf));
++      if (!buf) {
++              return -ENOMEM;
++              goto out;
++      }
++      tab = &buf->tab;
++
++      blocklen = master->erasesize;
++      if (blocklen < BLOCK_LEN_MIN)
++              blocklen = BLOCK_LEN_MIN;
++
++      offset = blocklen;
++
++      /* Find the partition table */
++      for (i = 0; i < 4; i++, offset += blocklen) {
++              printk(KERN_DEBUG "%s: searching for MyLoader partition table"
++                              " at offset 0x%lx\n", master->name, offset);
++
++              ret = mtd_read(master, offset, sizeof(*buf), &retlen,
++                             (void *)buf);
++              if (ret)
++                      goto out_free_buf;
++
++              if (retlen != sizeof(*buf)) {
++                      ret = -EIO;
++                      goto out_free_buf;
++              }
++
++              /* Check for Partition Table magic number */
++              if (tab->magic == le32_to_cpu(MYLO_MAGIC_PARTITIONS))
++                      break;
++
++      }
++
++      if (tab->magic != le32_to_cpu(MYLO_MAGIC_PARTITIONS)) {
++              printk(KERN_DEBUG "%s: no MyLoader partition table found\n",
++                      master->name);
++              ret = 0;
++              goto out_free_buf;
++      }
++
++      /* The MyLoader and the Partition Table is always present */
++      num_parts = 2;
++
++      /* Detect number of used partitions */
++      for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
++              part = &tab->partitions[i];
++
++              if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
++                      continue;
++
++              num_parts++;
++      }
++
++      mtd_parts = kzalloc((num_parts * sizeof(*mtd_part) +
++                              num_parts * PART_NAME_LEN), GFP_KERNEL);
++
++      if (!mtd_parts) {
++              ret = -ENOMEM;
++              goto out_free_buf;
++      }
++
++      mtd_part = mtd_parts;
++      names = (char *)&mtd_parts[num_parts];
++
++      strncpy(names, "myloader", PART_NAME_LEN);
++      mtd_part->name = names;
++      mtd_part->offset = 0;
++      mtd_part->size = offset;
++      mtd_part->mask_flags = MTD_WRITEABLE;
++      mtd_part++;
++      names += PART_NAME_LEN;
++
++      strncpy(names, "partition_table", PART_NAME_LEN);
++      mtd_part->name = names;
++      mtd_part->offset = offset;
++      mtd_part->size = blocklen;
++      mtd_part->mask_flags = MTD_WRITEABLE;
++      mtd_part++;
++      names += PART_NAME_LEN;
++
++      for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
++              part = &tab->partitions[i];
++
++              if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
++                      continue;
++
++              if ((buf->names[i][0]) && (buf->names[i][0] != '\xff'))
++                      strncpy(names, buf->names[i], PART_NAME_LEN);
++              else
++                      snprintf(names, PART_NAME_LEN, "partition%d", i);
++
++              mtd_part->offset = le32_to_cpu(part->addr);
++              mtd_part->size = le32_to_cpu(part->size);
++              mtd_part->name = names;
++              mtd_part++;
++              names += PART_NAME_LEN;
++      }
++
++      *pparts = mtd_parts;
++      ret = num_parts;
++
++ out_free_buf:
++      vfree(buf);
++ out:
++      return ret;
++}
++
++static struct mtd_part_parser myloader_mtd_parser = {
++      .owner          = THIS_MODULE,
++      .parse_fn       = myloader_parse_partitions,
++      .name           = "MyLoader",
++};
++
++static int __init myloader_mtd_parser_init(void)
++{
++      register_mtd_parser(&myloader_mtd_parser);
++
++      return 0;
++}
++
++static void __exit myloader_mtd_parser_exit(void)
++{
++      deregister_mtd_parser(&myloader_mtd_parser);
++}
++
++module_init(myloader_mtd_parser_init);
++module_exit(myloader_mtd_parser_exit);
++
++MODULE_AUTHOR("Gabor Juhos <[email protected]>");
++MODULE_DESCRIPTION("Parsing code for MyLoader partition tables");
++MODULE_LICENSE("GPL v2");

diff --git a/target/linux/generic/pending-6.0/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch b/target/linux/generic/pending-6.0/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch
new file mode 100644 (file)
index 0000000..bcea45d
--- /dev/null
+++ b/target/linux/generic/pending-6.0/431-mtd-bcm47xxpart-check-for-bad-blocks-when-calculatin.patch
@@ -0,0 +1,68 @@
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <[email protected]>
+Subject: [PATCH] mtd: bcm47xxpart: check for bad blocks when calculating offsets
+
+Signed-off-by: Rafał Miłecki <[email protected]>
+---
+
+--- a/drivers/mtd/parsers/parser_trx.c
++++ b/drivers/mtd/parsers/parser_trx.c
+@@ -25,6 +25,33 @@ struct trx_header {
+       uint32_t offset[3];
+ } __packed;
+ 
++/*
++ * Calculate real end offset (address) for a given amount of data. It checks
++ * all blocks skipping bad ones.
++ */
++static size_t parser_trx_real_offset(struct mtd_info *mtd, size_t bytes)
++{
++      size_t real_offset = 0;
++
++      if (mtd_block_isbad(mtd, real_offset))
++              pr_warn("Base offset shouldn't be at bad block");
++
++      while (bytes >= mtd->erasesize) {
++              bytes -= mtd->erasesize;
++              real_offset += mtd->erasesize;
++              while (mtd_block_isbad(mtd, real_offset)) {
++                      real_offset += mtd->erasesize;
++
++                      if (real_offset >= mtd->size)
++                              return real_offset - mtd->erasesize;
++              }
++      }
++
++      real_offset += bytes;
++
++      return real_offset;
++}
++
+ static const char *parser_trx_data_part_name(struct mtd_info *master,
+                                            size_t offset)
+ {
+@@ -86,21 +113,21 @@ static int parser_trx_parse(struct mtd_i
+       if (trx.offset[2]) {
+               part = &parts[curr_part++];
+               part->name = "loader";
+-              part->offset = trx.offset[i];
++              part->offset = parser_trx_real_offset(mtd, trx.offset[i]);
+               i++;
+       }
+ 
+       if (trx.offset[i]) {
+               part = &parts[curr_part++];
+               part->name = "linux";
+-              part->offset = trx.offset[i];
++              part->offset = parser_trx_real_offset(mtd, trx.offset[i]);
+               i++;
+       }
+ 
+       if (trx.offset[i]) {
+               part = &parts[curr_part++];
+-              part->name = parser_trx_data_part_name(mtd, trx.offset[i]);
+-              part->offset = trx.offset[i];
++              part->offset = parser_trx_real_offset(mtd, trx.offset[i]);
++              part->name = parser_trx_data_part_name(mtd, part->offset);
+               i++;
+       }
+ 

diff --git a/target/linux/generic/pending-6.0/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch b/target/linux/generic/pending-6.0/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch
new file mode 100644 (file)
index 0000000..852654d
--- /dev/null
+++ b/target/linux/generic/pending-6.0/432-mtd-bcm47xxpart-detect-T_Meter-partition.patch
@@ -0,0 +1,37 @@
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <[email protected]>
+Subject: mtd: bcm47xxpart: detect T_Meter partition
+
+It can be found on many Netgear devices. It consists of many 0x30 blocks
+starting with 4D 54.
+
+Signed-off-by: Rafał Miłecki <[email protected]>
+---
+ drivers/mtd/bcm47xxpart.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/mtd/parsers/bcm47xxpart.c
++++ b/drivers/mtd/parsers/bcm47xxpart.c
+@@ -35,6 +35,7 @@
+ #define NVRAM_HEADER                  0x48534C46      /* FLSH */
+ #define POT_MAGIC1                    0x54544f50      /* POTT */
+ #define POT_MAGIC2                    0x504f          /* OP */
++#define T_METER_MAGIC                 0x4D540000      /* MT */
+ #define ML_MAGIC1                     0x39685a42
+ #define ML_MAGIC2                     0x26594131
+ #define TRX_MAGIC                     0x30524448
+@@ -178,6 +179,15 @@ static int bcm47xxpart_parse(struct mtd_
+                                            MTD_WRITEABLE);
+                       continue;
+               }
++
++              /* T_Meter */
++              if ((le32_to_cpu(buf[0x000 / 4]) & 0xFFFF0000) == T_METER_MAGIC &&
++                  (le32_to_cpu(buf[0x030 / 4]) & 0xFFFF0000) == T_METER_MAGIC &&
++                  (le32_to_cpu(buf[0x060 / 4]) & 0xFFFF0000) == T_METER_MAGIC) {
++                      bcm47xxpart_add_part(&parts[curr_part++], "T_Meter", offset,
++                                           MTD_WRITEABLE);
++                      continue;
++              }
+ 
+               /* TRX */
+               if (buf[0x000 / 4] == TRX_MAGIC) {

diff --git a/target/linux/generic/pending-6.0/435-mtd-add-routerbootpart-parser-config.patch b/target/linux/generic/pending-6.0/435-mtd-add-routerbootpart-parser-config.patch
new file mode 100644 (file)
index 0000000..30f5334
--- /dev/null
+++ b/target/linux/generic/pending-6.0/435-mtd-add-routerbootpart-parser-config.patch
@@ -0,0 +1,38 @@
+From 4437e01fb6bca63fccdba5d6c44888b0935885c2 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= <[email protected]>
+Date: Tue, 24 Mar 2020 11:45:07 +0100
+Subject: [PATCH] generic: routerboot partition build bits (5.4)
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This patch adds routerbootpart kernel build bits
+
+Signed-off-by: Thibaut VARÈNE <[email protected]>
+---
+ drivers/mtd/parsers/Kconfig  | 9 +++++++++
+ drivers/mtd/parsers/Makefile | 1 +
+ 2 files changed, 10 insertions(+)
+
+--- a/drivers/mtd/parsers/Kconfig
++++ b/drivers/mtd/parsers/Kconfig
+@@ -211,3 +211,12 @@ config MTD_SERCOMM_PARTS
+         partition map. This partition table contains real partition
+         offsets, which may differ from device to device depending on the
+         number and location of bad blocks on NAND.
++
++config MTD_ROUTERBOOT_PARTS
++      tristate "RouterBoot flash partition parser"
++      depends on MTD && OF
++      help
++       MikroTik RouterBoot is implemented as a multi segment system on the
++       flash, some of which are fixed and some of which are located at
++       variable offsets. This parser handles both cases via properly
++       formatted DTS.
+--- a/drivers/mtd/parsers/Makefile
++++ b/drivers/mtd/parsers/Makefile
+@@ -15,3 +15,4 @@ obj-$(CONFIG_MTD_SERCOMM_PARTS)              += scpa
+ obj-$(CONFIG_MTD_SHARPSL_PARTS)               += sharpslpart.o
+ obj-$(CONFIG_MTD_REDBOOT_PARTS)               += redboot.o
+ obj-$(CONFIG_MTD_QCOMSMEM_PARTS)      += qcomsmempart.o
++obj-$(CONFIG_MTD_ROUTERBOOT_PARTS)            += routerbootpart.o

diff --git a/target/linux/generic/pending-6.0/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch b/target/linux/generic/pending-6.0/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch
new file mode 100644 (file)
index 0000000..0be74a5
--- /dev/null
+++ b/target/linux/generic/pending-6.0/460-mtd-cfi_cmdset_0002-no-erase_suspend.patch
@@ -0,0 +1,25 @@
+From: Felix Fietkau <[email protected]>
+Subject: kernel: disable cfi cmdset 0002 erase suspend
+
+on some platforms, erase suspend leads to data corruption and lockups when write
+ops collide with erase ops. this has been observed on the buffalo wzr-hp-g300nh.
+rather than play whack-a-mole with a hard to reproduce issue on a variety of devices,
+simply disable erase suspend, as it will usually not produce any useful gain on
+the small filesystems used on embedded hardware.
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ drivers/mtd/chips/cfi_cmdset_0002.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -907,7 +907,7 @@ static int get_chip(struct map_info *map
+               return 0;
+ 
+       case FL_ERASING:
+-              if (!cfip || !(cfip->EraseSuspend & (0x1|0x2)) ||
++              if (1 /* no suspend */ || !cfip || !(cfip->EraseSuspend & (0x1|0x2)) ||
+                   !(mode == FL_READY || mode == FL_POINT ||
+                   (mode == FL_WRITING && (cfip->EraseSuspend & 0x2))))
+                       goto sleep;

diff --git a/target/linux/generic/pending-6.0/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch b/target/linux/generic/pending-6.0/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch
new file mode 100644 (file)
index 0000000..ca56de8
--- /dev/null
+++ b/target/linux/generic/pending-6.0/461-mtd-cfi_cmdset_0002-add-buffer-write-cmd-timeout.patch
@@ -0,0 +1,17 @@
+From: George Kashperko <[email protected]>
+Subject: Issue map read after Write Buffer Load command to ensure chip is ready to receive data.
+
+Signed-off-by: George Kashperko <[email protected]>
+---
+ drivers/mtd/chips/cfi_cmdset_0002.c |    1 +
+ 1 file changed, 1 insertion(+)
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -2051,6 +2051,7 @@ static int __xipram do_write_buffer(stru
+ 
+       /* Write Buffer Load */
+       map_write(map, CMD(0x25), cmd_adr);
++      (void) map_read(map, cmd_adr);
+ 
+       chip->state = FL_WRITING_TO_BUFFER;
+ 

diff --git a/target/linux/generic/pending-6.0/465-m25p80-mx-disable-software-protection.patch b/target/linux/generic/pending-6.0/465-m25p80-mx-disable-software-protection.patch
new file mode 100644 (file)
index 0000000..f58d545
--- /dev/null
+++ b/target/linux/generic/pending-6.0/465-m25p80-mx-disable-software-protection.patch
@@ -0,0 +1,18 @@
+From: Felix Fietkau <[email protected]>
+Subject: Disable software protection bits for Macronix flashes.
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ drivers/mtd/spi-nor/spi-nor.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/mtd/spi-nor/macronix.c
++++ b/drivers/mtd/spi-nor/macronix.c
+@@ -93,6 +93,7 @@ static void macronix_default_init(struct
+ {
+       nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
+       nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode;
++      nor->flags |= SNOR_F_HAS_LOCK;
+ }
+ 
+ static const struct spi_nor_fixups macronix_fixups = {

diff --git a/target/linux/generic/pending-6.0/476-mtd-spi-nor-add-eon-en25q128.patch b/target/linux/generic/pending-6.0/476-mtd-spi-nor-add-eon-en25q128.patch
new file mode 100644 (file)
index 0000000..4caf97f
--- /dev/null
+++ b/target/linux/generic/pending-6.0/476-mtd-spi-nor-add-eon-en25q128.patch
@@ -0,0 +1,19 @@
+From: Piotr Dymacz <[email protected]>
+Subject: kernel/mtd: add support for EON EN25Q128
+
+Signed-off-by: Piotr Dymacz <[email protected]>
+---
+ drivers/mtd/spi-nor/spi-nor.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/mtd/spi-nor/eon.c
++++ b/drivers/mtd/spi-nor/eon.c
+@@ -15,6 +15,8 @@ static const struct flash_info eon_parts
+       { "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128) },
+       { "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128)
+               NO_SFDP_FLAGS(SECT_4K) },
++      { "en25q128",   INFO(0x1c3018, 0, 64 * 1024,  256)
++              NO_SFDP_FLAGS(SECT_4K) },
+       { "en25q80a",   INFO(0x1c3014, 0, 64 * 1024,   16)
+               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) },
+       { "en25qh16",   INFO(0x1c7015, 0, 64 * 1024,   32)

diff --git a/target/linux/generic/pending-6.0/479-mtd-spi-nor-add-xtx-xt25f128b.patch b/target/linux/generic/pending-6.0/479-mtd-spi-nor-add-xtx-xt25f128b.patch
new file mode 100644 (file)
index 0000000..4b1015b
--- /dev/null
+++ b/target/linux/generic/pending-6.0/479-mtd-spi-nor-add-xtx-xt25f128b.patch
@@ -0,0 +1,82 @@
+From patchwork Thu Feb  6 17:19:41 2020
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <[email protected]>
+X-Patchwork-Id: 1234465
+Date: Thu, 6 Feb 2020 19:19:41 +0200
+From: Daniel Golle <[email protected]>
+To: [email protected]
+Subject: [PATCH v2] mtd: spi-nor: Add support for xt25f128b chip
+Message-ID: <[email protected]>
+MIME-Version: 1.0
+Content-Disposition: inline
+List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-mtd>,
+ <mailto:[email protected]?subject=subscribe>
+Cc: Eitan Cohen <[email protected]>, Piotr Dymacz <[email protected]>,
+ Tudor Ambarus <[email protected]>
+Sender: "linux-mtd" <[email protected]>
+Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org
+
+Add XT25F128B made by XTX Technology (Shenzhen) Limited.
+This chip supports dual and quad read and uniform 4K-byte erase.
+Verified on Teltonika RUT955 which comes with XT25F128B in recent
+versions of the device.
+
+Signed-off-by: Daniel Golle <[email protected]>
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ drivers/mtd/spi-nor/spi-nor.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/mtd/spi-nor/Makefile
++++ b/drivers/mtd/spi-nor/Makefile
+@@ -17,7 +17,8 @@ spi-nor-objs                 += sst.o
+ spi-nor-objs                  += winbond.o
+ spi-nor-objs                  += xilinx.o
+ spi-nor-objs                  += xmc.o
++spi-nor-objs                  += xtx.o
+ spi-nor-$(CONFIG_DEBUG_FS)    += debugfs.o
+ obj-$(CONFIG_MTD_SPI_NOR)     += spi-nor.o
+ 
+ obj-$(CONFIG_MTD_SPI_NOR)     += controllers/
+--- /dev/null
++++ b/drivers/mtd/spi-nor/xtx.c
+@@ -0,0 +1,17 @@
++// SPDX-License-Identifier: GPL-2.0
++#include <linux/mtd/spi-nor.h>
++
++#include "core.h"
++
++static const struct flash_info xtx_parts[] = {
++      /* XTX Technology (Shenzhen) Limited */
++      { "xt25f128b", INFO(0x0B4018, 0, 64 * 1024, 256)
++              NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
++                            SPI_NOR_QUAD_READ) },
++};
++
++const struct spi_nor_manufacturer spi_nor_xtx = {
++      .name = "xtx",
++      .parts = xtx_parts,
++      .nparts = ARRAY_SIZE(xtx_parts),
++};
+--- a/drivers/mtd/spi-nor/core.c
++++ b/drivers/mtd/spi-nor/core.c
+@@ -1857,6 +1857,7 @@ static const struct spi_nor_manufacturer
+       &spi_nor_winbond,
+       &spi_nor_xilinx,
+       &spi_nor_xmc,
++      &spi_nor_xtx,
+ };
+ 
+ static const struct flash_info *
+--- a/drivers/mtd/spi-nor/core.h
++++ b/drivers/mtd/spi-nor/core.h
+@@ -489,6 +489,7 @@ extern const struct spi_nor_manufacturer
+ extern const struct spi_nor_manufacturer spi_nor_winbond;
+ extern const struct spi_nor_manufacturer spi_nor_xilinx;
+ extern const struct spi_nor_manufacturer spi_nor_xmc;
++extern const struct spi_nor_manufacturer spi_nor_xtx;
+ 
+ extern const struct attribute_group *spi_nor_sysfs_groups[];
+ 

diff --git a/target/linux/generic/pending-6.0/481-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch b/target/linux/generic/pending-6.0/481-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch
new file mode 100644 (file)
index 0000000..764dfd6
--- /dev/null
+++ b/target/linux/generic/pending-6.0/481-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch
@@ -0,0 +1,23 @@
+From d68b4aa22e8c625685bfad642dd7337948dc0ad1 Mon Sep 17 00:00:00 2001
+From: Koen Vandeputte <[email protected]>
+Date: Mon, 6 Jan 2020 13:07:56 +0100
+Subject: [PATCH] mtd: spi-nor: add support for Gigadevice GD25D05
+
+Signed-off-by: Koen Vandeputte <[email protected]>
+---
+ drivers/mtd/spi-nor/spi-nor.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/drivers/mtd/spi-nor/gigadevice.c
++++ b/drivers/mtd/spi-nor/gigadevice.c
+@@ -24,6 +24,10 @@ static struct spi_nor_fixups gd25q256_fi
+ };
+ 
+ static const struct flash_info gigadevice_nor_parts[] = {
++      { "gd25q05", INFO(0xc84010, 0, 64 * 1024,  1)
++              FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) 
++              NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
++                            SPI_NOR_QUAD_READ) },
+       { "gd25q16", INFO(0xc84015, 0, 64 * 1024,  32)
+               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |

diff --git a/target/linux/generic/pending-6.0/482-mtd-spi-nor-add-gd25q512.patch b/target/linux/generic/pending-6.0/482-mtd-spi-nor-add-gd25q512.patch
new file mode 100644 (file)
index 0000000..614263f
--- /dev/null
+++ b/target/linux/generic/pending-6.0/482-mtd-spi-nor-add-gd25q512.patch
@@ -0,0 +1,23 @@
+From f8943df3beb0d3f9754bb35320c3a378727175a8 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Thu, 14 Jul 2022 08:38:07 +0200
+Subject: [PATCH] spi-nor/gigadevic: add gd25q512
+
+---
+ drivers/mtd/spi-nor/gigadevice.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/mtd/spi-nor/gigadevice.c
++++ b/drivers/mtd/spi-nor/gigadevice.c
+@@ -53,6 +53,11 @@ static const struct flash_info gigadevic
+               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6)
+               FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
+               .fixups = &gd25q256_fixups },
++      { "gd25q512", INFO(0xc84020, 0, 64 * 1024, 1024)
++              FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
++              FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
++              NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
++                            SPI_NOR_QUAD_READ) },
+ };
+ 
+ const struct spi_nor_manufacturer spi_nor_gigadevice = {

diff --git a/target/linux/generic/pending-6.0/485-mtd-spi-nor-add-xmc-xm25qh128c.patch b/target/linux/generic/pending-6.0/485-mtd-spi-nor-add-xmc-xm25qh128c.patch
new file mode 100644 (file)
index 0000000..4020a42
--- /dev/null
+++ b/target/linux/generic/pending-6.0/485-mtd-spi-nor-add-xmc-xm25qh128c.patch
@@ -0,0 +1,25 @@
+From f6b33d850f7f12555df2fa0e3349b33427bf5890 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 12:19:01 +0200
+Subject: [PATCH] spi-nor/xmc.c: add xm25qh128c
+
+The XMC XM25QH128C is a 16MB SPI NOR chip. The patch is verified on
+Ruijie RG-EW3200GX PRO.
+Datasheet available at https://www.xmcwh.com/uploads/435/XM25QH128C.pdf
+
+---
+ drivers/mtd/spi-nor/xmc.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/mtd/spi-nor/xmc.c
++++ b/drivers/mtd/spi-nor/xmc.c
+@@ -14,6 +14,9 @@ static const struct flash_info xmc_parts
+       { "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256)
+               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
+                             SPI_NOR_QUAD_READ) },
++      { "XM25QH128C", INFO(0x204018, 0, 64 * 1024, 256)
++              NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
++                            SPI_NOR_QUAD_READ) },
+ };
+ 
+ const struct spi_nor_manufacturer spi_nor_xmc = {

diff --git a/target/linux/generic/pending-6.0/486-01-mtd-spinand-add-support-for-ESMT-F50x1G41LB.patch b/target/linux/generic/pending-6.0/486-01-mtd-spinand-add-support-for-ESMT-F50x1G41LB.patch
new file mode 100644 (file)
index 0000000..f829f1f
--- /dev/null
+++ b/target/linux/generic/pending-6.0/486-01-mtd-spinand-add-support-for-ESMT-F50x1G41LB.patch
@@ -0,0 +1,143 @@
+From a43b844cb40bf1b783055fdc81b7f991e21e7e76 Mon Sep 17 00:00:00 2001
+From: Chuanhong Guo <[email protected]>
+Date: Wed, 13 Apr 2022 11:58:17 +0800
+Subject: [PATCH] mtd: spinand: add support for ESMT F50x1G41LB
+
+This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
+It seems that ESMT likes to use random JEDEC ID from other vendors.
+Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
+Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
+JEDEC ID in variable name.
+
+Datasheets:
+https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
+https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf
+
+Signed-off-by: Chuanhong Guo <[email protected]>
+---
+ drivers/mtd/nand/spi/Makefile |  2 +-
+ drivers/mtd/nand/spi/core.c   |  1 +
+ drivers/mtd/nand/spi/esmt.c   | 89 +++++++++++++++++++++++++++++++++++
+ include/linux/mtd/spinand.h   |  1 +
+ 4 files changed, 92 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/mtd/nand/spi/esmt.c
+
+--- a/drivers/mtd/nand/spi/Makefile
++++ b/drivers/mtd/nand/spi/Makefile
+@@ -1,3 +1,3 @@
+ # SPDX-License-Identifier: GPL-2.0
+-spinand-objs := core.o ato.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
++spinand-objs := core.o esmt.o ato.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
+ obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
+--- a/drivers/mtd/nand/spi/core.c
++++ b/drivers/mtd/nand/spi/core.c
+@@ -896,6 +896,7 @@ static const struct nand_ops spinand_ops
+ };
+ 
+ static const struct spinand_manufacturer *spinand_manufacturers[] = {
++      &esmt_c8_spinand_manufacturer,
+       &ato_spinand_manufacturer,
+       &gigadevice_spinand_manufacturer,
+       &macronix_spinand_manufacturer,
+--- /dev/null
++++ b/drivers/mtd/nand/spi/esmt.c
+@@ -0,0 +1,89 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * Author:
++ *    Chuanhong Guo <[email protected]>
++ */
++
++#include <linux/device.h>
++#include <linux/kernel.h>
++#include <linux/mtd/spinand.h>
++
++/* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
++#define SPINAND_MFR_ESMT_C8                   0xc8
++
++static SPINAND_OP_VARIANTS(read_cache_variants,
++                         SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
++                         SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
++                         SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
++                         SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
++                         SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
++                         SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
++
++static SPINAND_OP_VARIANTS(write_cache_variants,
++                         SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
++                         SPINAND_PROG_LOAD(true, 0, NULL, 0));
++
++static SPINAND_OP_VARIANTS(update_cache_variants,
++                         SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
++                         SPINAND_PROG_LOAD(false, 0, NULL, 0));
++
++static int f50l1g41lb_ooblayout_ecc(struct mtd_info *mtd, int section,
++                                  struct mtd_oob_region *region)
++{
++      if (section > 3)
++              return -ERANGE;
++
++      region->offset = 16 * section + 8;
++      region->length = 8;
++
++      return 0;
++}
++
++static int f50l1g41lb_ooblayout_free(struct mtd_info *mtd, int section,
++                                   struct mtd_oob_region *region)
++{
++      if (section > 3)
++              return -ERANGE;
++
++      region->offset = 16 * section + 2;
++      region->length = 6;
++
++      return 0;
++}
++
++static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = {
++      .ecc = f50l1g41lb_ooblayout_ecc,
++      .free = f50l1g41lb_ooblayout_free,
++};
++
++static const struct spinand_info esmt_c8_spinand_table[] = {
++      SPINAND_INFO("F50L1G41LB",
++                   SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
++                   NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
++                   NAND_ECCREQ(1, 512),
++                   SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++                                            &write_cache_variants,
++                                            &update_cache_variants),
++                   0,
++                   SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
++      SPINAND_INFO("F50D1G41LB",
++                   SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11),
++                   NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
++                   NAND_ECCREQ(1, 512),
++                   SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++                                            &write_cache_variants,
++                                            &update_cache_variants),
++                   0,
++                   SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
++};
++
++static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
++};
++
++const struct spinand_manufacturer esmt_c8_spinand_manufacturer = {
++      .id = SPINAND_MFR_ESMT_C8,
++      .name = "ESMT",
++      .chips = esmt_c8_spinand_table,
++      .nchips = ARRAY_SIZE(esmt_c8_spinand_table),
++      .ops = &esmt_spinand_manuf_ops,
++};
+--- a/include/linux/mtd/spinand.h
++++ b/include/linux/mtd/spinand.h
+@@ -260,6 +260,7 @@ struct spinand_manufacturer {
+ };
+ 
+ /* SPI NAND manufacturers */
++extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
+ extern const struct spinand_manufacturer ato_spinand_manufacturer;
+ extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
+ extern const struct spinand_manufacturer macronix_spinand_manufacturer;

diff --git a/target/linux/generic/pending-6.0/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch b/target/linux/generic/pending-6.0/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch
new file mode 100644 (file)
index 0000000..b120548
--- /dev/null
+++ b/target/linux/generic/pending-6.0/490-ubi-auto-attach-mtd-device-named-ubi-or-data-on-boot.patch
@@ -0,0 +1,97 @@
+From: Daniel Golle <[email protected]>
+Subject: ubi: auto-attach mtd device named "ubi" or "data" on boot
+
+Signed-off-by: Daniel Golle <[email protected]>
+---
+ drivers/mtd/ubi/build.c | 36 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+
+--- a/drivers/mtd/ubi/build.c
++++ b/drivers/mtd/ubi/build.c
+@@ -1184,6 +1184,73 @@ static struct mtd_info * __init open_mtd
+       return mtd;
+ }
+ 
++/*
++ * This function tries attaching mtd partitions named either "ubi" or "data"
++ * during boot.
++ */
++static void __init ubi_auto_attach(void)
++{
++      int err;
++      struct mtd_info *mtd;
++      loff_t offset = 0;
++      size_t len;
++      char magic[4];
++
++      /* try attaching mtd device named "ubi" or "data" */
++      mtd = open_mtd_device("ubi");
++      if (IS_ERR(mtd))
++              mtd = open_mtd_device("data");
++
++      if (IS_ERR(mtd))
++              return;
++
++      /* get the first not bad block */
++      if (mtd_can_have_bb(mtd))
++              while (mtd_block_isbad(mtd, offset)) {
++                      offset += mtd->erasesize;
++
++                      if (offset > mtd->size) {
++                              pr_err("UBI error: Failed to find a non-bad "
++                                     "block on mtd%d\n", mtd->index);
++                              goto cleanup;
++                      }
++              }
++
++      /* check if the read from flash was successful */
++      err = mtd_read(mtd, offset, 4, &len, (void *) magic);
++      if ((err && !mtd_is_bitflip(err)) || len != 4) {
++              pr_err("UBI error: unable to read from mtd%d\n", mtd->index);
++              goto cleanup;
++      }
++
++      /* check for a valid ubi magic */
++      if (strncmp(magic, "UBI#", 4)) {
++              pr_err("UBI error: no valid UBI magic found inside mtd%d\n", mtd->index);
++              goto cleanup;
++      }
++
++      /* don't auto-add media types where UBI doesn't makes sense */
++      if (mtd->type != MTD_NANDFLASH &&
++          mtd->type != MTD_NORFLASH &&
++          mtd->type != MTD_DATAFLASH &&
++          mtd->type != MTD_MLCNANDFLASH)
++              goto cleanup;
++
++      mutex_lock(&ubi_devices_mutex);
++      pr_notice("UBI: auto-attach mtd%d\n", mtd->index);
++      err = ubi_attach_mtd_dev(mtd, UBI_DEV_NUM_AUTO, 0, 0);
++      mutex_unlock(&ubi_devices_mutex);
++      if (err < 0) {
++              pr_err("UBI error: cannot attach mtd%d\n", mtd->index);
++              goto cleanup;
++      }
++
++      return;
++
++cleanup:
++      put_mtd_device(mtd);
++}
++
+ static int __init ubi_init(void)
+ {
+       int err, i, k;
+@@ -1267,6 +1334,12 @@ static int __init ubi_init(void)
+               }
+       }
+ 
++      /* auto-attach mtd devices only if built-in to the kernel and no ubi.mtd
++       * parameter was given */
++      if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) &&
++          !ubi_is_module() && !mtd_devs)
++              ubi_auto_attach();
++
+       err = ubiblock_init();
+       if (err) {
+               pr_err("UBI error: block: cannot initialize, error %d\n", err);

diff --git a/target/linux/generic/pending-6.0/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-6.0/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
new file mode 100644 (file)
index 0000000..ae53770
--- /dev/null
+++ b/target/linux/generic/pending-6.0/491-ubi-auto-create-ubiblock-device-for-rootfs.patch
@@ -0,0 +1,69 @@
+From: Daniel Golle <[email protected]>
+Subject: ubi: auto-create ubiblock device for rootfs
+
+Signed-off-by: Daniel Golle <[email protected]>
+---
+ drivers/mtd/ubi/block.c | 42 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 42 insertions(+)
+
+--- a/drivers/mtd/ubi/block.c
++++ b/drivers/mtd/ubi/block.c
+@@ -642,6 +642,47 @@ static void __init ubiblock_create_from_
+       }
+ }
+ 
++#define UBIFS_NODE_MAGIC  0x06101831
++static inline int ubi_vol_is_ubifs(struct ubi_volume_desc *desc)
++{
++      int ret;
++      uint32_t magic_of, magic;
++      ret = ubi_read(desc, 0, (char *)&magic_of, 0, 4);
++      if (ret)
++              return 0;
++      magic = le32_to_cpu(magic_of);
++      return magic == UBIFS_NODE_MAGIC;
++}
++
++static void __init ubiblock_create_auto_rootfs(void)
++{
++      int ubi_num, ret, is_ubifs;
++      struct ubi_volume_desc *desc;
++      struct ubi_volume_info vi;
++
++      for (ubi_num = 0; ubi_num < UBI_MAX_DEVICES; ubi_num++) {
++              desc = ubi_open_volume_nm(ubi_num, "rootfs", UBI_READONLY);
++              if (IS_ERR(desc))
++                      desc = ubi_open_volume_nm(ubi_num, "fit", UBI_READONLY);;
++
++              if (IS_ERR(desc))
++                      continue;
++
++              ubi_get_volume_info(desc, &vi);
++              is_ubifs = ubi_vol_is_ubifs(desc);
++              ubi_close_volume(desc);
++              if (is_ubifs)
++                      break;
++
++              ret = ubiblock_create(&vi);
++              if (ret)
++                      pr_err("UBI error: block: can't add '%s' volume, err=%d\n",
++                              vi.name, ret);
++              /* always break if we get here */
++              break;
++      }
++}
++
+ static void ubiblock_remove_all(void)
+ {
+       struct ubiblock *next;
+@@ -674,6 +715,10 @@ int __init ubiblock_init(void)
+        */
+       ubiblock_create_from_param();
+ 
++      /* auto-attach "rootfs" volume if existing and non-ubifs */
++      if (IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV))
++              ubiblock_create_auto_rootfs();
++
+       /*
+        * Block devices are only created upon user requests, so we ignore
+        * existing volumes.

diff --git a/target/linux/generic/pending-6.0/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch b/target/linux/generic/pending-6.0/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch
new file mode 100644 (file)
index 0000000..cf41c8c
--- /dev/null
+++ b/target/linux/generic/pending-6.0/492-try-auto-mounting-ubi0-rootfs-in-init-do_mounts.c.patch
@@ -0,0 +1,53 @@
+From: Daniel Golle <[email protected]>
+Subject: try auto-mounting ubi0:rootfs in init/do_mounts.c
+
+Signed-off-by: Daniel Golle <[email protected]>
+---
+ init/do_mounts.c | 26 +++++++++++++++++++++++++-
+ 1 file changed, 25 insertions(+), 1 deletion(-)
+
+--- a/init/do_mounts.c
++++ b/init/do_mounts.c
+@@ -447,7 +447,30 @@ retry:
+ out:
+       put_page(page);
+ }
+- 
++
++#ifdef CONFIG_MTD_ROOTFS_ROOT_DEV
++static int __init mount_ubi_rootfs(void)
++{
++      int flags = MS_SILENT;
++      int err, tried = 0;
++
++      while (tried < 2) {
++              err = do_mount_root("ubi0:rootfs", "ubifs", flags, \
++                                      root_mount_data);
++              switch (err) {
++                      case -EACCES:
++                              flags |= MS_RDONLY;
++                              tried++;
++                              break;
++                      default:
++                              return err;
++              }
++      }
++
++      return -EINVAL;
++}
++#endif
++
+ #ifdef CONFIG_ROOT_NFS
+ 
+ #define NFSROOT_TIMEOUT_MIN   5
+@@ -580,6 +603,10 @@ void __init mount_root(void)
+               return;
+       }
+ #endif
++#ifdef CONFIG_MTD_ROOTFS_ROOT_DEV
++      if (!mount_ubi_rootfs())
++              return;
++#endif
+       if (ROOT_DEV == 0 && root_device_name && root_fs_names) {
+               if (mount_nodev_root() == 0)
+                       return;

diff --git a/target/linux/generic/pending-6.0/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch b/target/linux/generic/pending-6.0/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch
new file mode 100644 (file)
index 0000000..266a633
--- /dev/null
+++ b/target/linux/generic/pending-6.0/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch
@@ -0,0 +1,34 @@
+From: Daniel Golle <[email protected]>
+Subject: ubi: set ROOT_DEV to ubiblock "rootfs" if unset
+
+Signed-off-by: Daniel Golle <[email protected]>
+---
+ drivers/mtd/ubi/block.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/mtd/ubi/block.c
++++ b/drivers/mtd/ubi/block.c
+@@ -42,6 +42,7 @@
+ #include <linux/scatterlist.h>
+ #include <linux/idr.h>
+ #include <asm/div64.h>
++#include <linux/root_dev.h>
+ 
+ #include "ubi-media.h"
+ #include "ubi.h"
+@@ -451,6 +452,15 @@ int ubiblock_create(struct ubi_volume_in
+       dev_info(disk_to_dev(dev->gd), "created from ubi%d:%d(%s)",
+                dev->ubi_num, dev->vol_id, vi->name);
+       mutex_unlock(&devices_mutex);
++
++      if (!strcmp(vi->name, "rootfs") &&
++          IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) &&
++          ROOT_DEV == 0) {
++              pr_notice("ubiblock: device ubiblock%d_%d (%s) set to be root filesystem\n",
++                        dev->ubi_num, dev->vol_id, vi->name);
++              ROOT_DEV = MKDEV(gd->major, gd->first_minor);
++      }
++
+       return 0;
+ 
+ out_remove_minor:

diff --git a/target/linux/generic/pending-6.0/494-mtd-ubi-add-EOF-marker-support.patch b/target/linux/generic/pending-6.0/494-mtd-ubi-add-EOF-marker-support.patch
new file mode 100644 (file)
index 0000000..4134317
--- /dev/null
+++ b/target/linux/generic/pending-6.0/494-mtd-ubi-add-EOF-marker-support.patch
@@ -0,0 +1,60 @@
+From: Gabor Juhos <[email protected]>
+Subject: mtd: add EOF marker support to the UBI layer
+
+Signed-off-by: Gabor Juhos <[email protected]>
+---
+ drivers/mtd/ubi/attach.c | 25 ++++++++++++++++++++++---
+ drivers/mtd/ubi/ubi.h    |  1 +
+ 2 files changed, 23 insertions(+), 3 deletions(-)
+
+--- a/drivers/mtd/ubi/attach.c
++++ b/drivers/mtd/ubi/attach.c
+@@ -926,6 +926,13 @@ static bool vol_ignored(int vol_id)
+ #endif
+ }
+ 
++static bool ec_hdr_has_eof(struct ubi_ec_hdr *ech)
++{
++      return ech->padding1[0] == 'E' &&
++             ech->padding1[1] == 'O' &&
++             ech->padding1[2] == 'F';
++}
++
+ /**
+  * scan_peb - scan and process UBI headers of a PEB.
+  * @ubi: UBI device description object
+@@ -958,9 +965,21 @@ static int scan_peb(struct ubi_device *u
+               return 0;
+       }
+ 
+-      err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0);
+-      if (err < 0)
+-              return err;
++      if (!ai->eof_found) {
++              err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0);
++              if (err < 0)
++                      return err;
++
++              if (ec_hdr_has_eof(ech)) {
++                      pr_notice("UBI: EOF marker found, PEBs from %d will be erased\n",
++                              pnum);
++                      ai->eof_found = true;
++              }
++      }
++
++      if (ai->eof_found)
++              err = UBI_IO_FF_BITFLIPS;
++
+       switch (err) {
+       case 0:
+               break;
+--- a/drivers/mtd/ubi/ubi.h
++++ b/drivers/mtd/ubi/ubi.h
+@@ -778,6 +778,7 @@ struct ubi_attach_info {
+       int mean_ec;
+       uint64_t ec_sum;
+       int ec_count;
++      bool eof_found;
+       struct kmem_cache *aeb_slab_cache;
+       struct ubi_ec_hdr *ech;
+       struct ubi_vid_io_buf *vidb;

diff --git a/target/linux/generic/pending-6.0/495-mtd-core-add-get_mtd_device_by_node.patch b/target/linux/generic/pending-6.0/495-mtd-core-add-get_mtd_device_by_node.patch
new file mode 100644 (file)
index 0000000..431c807
--- /dev/null
+++ b/target/linux/generic/pending-6.0/495-mtd-core-add-get_mtd_device_by_node.patch
@@ -0,0 +1,75 @@
+From 1bd1b740f208d1cf4071932cc51860d37266c402 Mon Sep 17 00:00:00 2001
+From: Bernhard Frauendienst <[email protected]>
+Date: Sat, 1 Sep 2018 00:30:11 +0200
+Subject: [PATCH 495/497] mtd: core: add get_mtd_device_by_node
+
+Add function to retrieve a mtd device by its OF node. Since drivers can
+assign arbitrary names to mtd devices in the absence of a label
+property, there is no other reliable way to retrieve a mtd device for a
+given OF node.
+
+Signed-off-by: Bernhard Frauendienst <[email protected]>
+Reviewed-by: Miquel Raynal <[email protected]>
+---
+ drivers/mtd/mtdcore.c   | 38 ++++++++++++++++++++++++++++++++++++++
+ include/linux/mtd/mtd.h |  2 ++
+ 2 files changed, 40 insertions(+)
+
+--- a/drivers/mtd/mtdcore.c
++++ b/drivers/mtd/mtdcore.c
+@@ -1274,6 +1274,44 @@ out_unlock:
+ }
+ EXPORT_SYMBOL_GPL(get_mtd_device_nm);
+ 
++/**
++ *    get_mtd_device_by_node - obtain a validated handle for an MTD device
++ *    by of_node
++ *    @of_node: OF node of MTD device to open
++ *
++ *    This function returns MTD device description structure in case of
++ *    success and an error code in case of failure.
++ */
++struct mtd_info *get_mtd_device_by_node(const struct device_node *of_node)
++{
++      int err = -ENODEV;
++      struct mtd_info *mtd = NULL, *other;
++
++      mutex_lock(&mtd_table_mutex);
++
++      mtd_for_each_device(other) {
++              if (of_node == other->dev.of_node) {
++                      mtd = other;
++                      break;
++              }
++      }
++
++      if (!mtd)
++              goto out_unlock;
++
++      err = __get_mtd_device(mtd);
++      if (err)
++              goto out_unlock;
++
++      mutex_unlock(&mtd_table_mutex);
++      return mtd;
++
++out_unlock:
++      mutex_unlock(&mtd_table_mutex);
++      return ERR_PTR(err);
++}
++EXPORT_SYMBOL_GPL(get_mtd_device_by_node);
++
+ void put_mtd_device(struct mtd_info *mtd)
+ {
+       mutex_lock(&mtd_table_mutex);
+--- a/include/linux/mtd/mtd.h
++++ b/include/linux/mtd/mtd.h
+@@ -703,6 +703,8 @@ extern struct mtd_info *get_mtd_device(s
+ extern int __get_mtd_device(struct mtd_info *mtd);
+ extern void __put_mtd_device(struct mtd_info *mtd);
+ extern struct mtd_info *get_mtd_device_nm(const char *name);
++extern struct mtd_info *get_mtd_device_by_node(
++              const struct device_node *of_node);
+ extern void put_mtd_device(struct mtd_info *mtd);
+ 
+ static inline uint64_t mtdpart_get_offset(const struct mtd_info *mtd)

diff --git a/target/linux/generic/pending-6.0/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch b/target/linux/generic/pending-6.0/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch
new file mode 100644 (file)
index 0000000..01f3b9e
--- /dev/null
+++ b/target/linux/generic/pending-6.0/496-dt-bindings-add-bindings-for-mtd-concat-devices.patch
@@ -0,0 +1,52 @@
+From 5734c6669fba7ddb5ef491ccff7159d15dba0b59 Mon Sep 17 00:00:00 2001
+From: Bernhard Frauendienst <[email protected]>
+Date: Wed, 5 Sep 2018 01:32:51 +0200
+Subject: [PATCH 496/497] dt-bindings: add bindings for mtd-concat devices
+
+Document virtual mtd-concat device bindings.
+
+Signed-off-by: Bernhard Frauendienst <[email protected]>
+---
+ .../devicetree/bindings/mtd/mtd-concat.txt    | 36 +++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/mtd/mtd-concat.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/mtd/mtd-concat.txt
+@@ -0,0 +1,36 @@
++Virtual MTD concat device
++
++Requires properties:
++- devices: list of phandles to mtd nodes that should be concatenated
++
++Example:
++
++&spi {
++      flash0: flash@0 {
++              ...
++      };
++      flash1: flash@1 {
++              ...
++      };
++};
++
++flash {
++      compatible = "mtd-concat";
++
++      devices = <&flash0 &flash1>;
++
++      partitions {
++              compatible = "fixed-partitions";
++
++              partition@0 {
++                      label = "boot";
++                      reg = <0x0000000 0x0040000>;
++                      read-only;
++              };
++
++              partition@40000 {
++                      label = "firmware";
++                      reg = <0x0040000 0x1fc0000>;
++              };
++      }
++}

diff --git a/target/linux/generic/pending-6.0/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch b/target/linux/generic/pending-6.0/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch
new file mode 100644 (file)
index 0000000..3216801
--- /dev/null
+++ b/target/linux/generic/pending-6.0/497-mtd-mtdconcat-add-dt-driver-for-concat-devices.patch
@@ -0,0 +1,216 @@
+From e53f712d8eac71f54399b61038ccf87d2cee99d7 Mon Sep 17 00:00:00 2001
+From: Bernhard Frauendienst <[email protected]>
+Date: Sat, 25 Aug 2018 12:35:22 +0200
+Subject: [PATCH 497/497] mtd: mtdconcat: add dt driver for concat devices
+
+Some mtd drivers like physmap variants have support for concatenating
+multiple mtd devices, but there is no generic way to define such a
+concat device from within the device tree.
+
+This is useful for some SoC boards that use multiple flash chips as
+memory banks of a single mtd device, with partitions spanning chip
+borders.
+
+This commit adds a driver for creating virtual mtd-concat devices. They
+must have a compatible = "mtd-concat" line, and define a list of devices
+to concat in the 'devices' property, for example:
+
+flash {
+  compatible = "mtd-concat";
+
+  devices = <&flash0 &flash1>;
+
+  partitions {
+    ...
+  };
+};
+
+The driver is added to the very end of the mtd Makefile to increase the
+likelyhood of all child devices already being loaded at the time of
+probing, preventing unnecessary deferred probes.
+
+Signed-off-by: Bernhard Frauendienst <[email protected]>
+---
+ drivers/mtd/Kconfig                 |   2 +
+ drivers/mtd/Makefile                |   3 +
+ drivers/mtd/composite/Kconfig       |  12 +++
+ drivers/mtd/composite/Makefile      |   6 ++
+ drivers/mtd/composite/virt_concat.c | 128 ++++++++++++++++++++++++++++
+ 5 files changed, 151 insertions(+)
+ create mode 100644 drivers/mtd/composite/Kconfig
+ create mode 100644 drivers/mtd/composite/Makefile
+ create mode 100644 drivers/mtd/composite/virt_concat.c
+
+--- a/drivers/mtd/Kconfig
++++ b/drivers/mtd/Kconfig
+@@ -241,4 +241,6 @@ source "drivers/mtd/ubi/Kconfig"
+ 
+ source "drivers/mtd/hyperbus/Kconfig"
+ 
++source "drivers/mtd/composite/Kconfig"
++
+ endif # MTD
+--- a/drivers/mtd/Makefile
++++ b/drivers/mtd/Makefile
+@@ -33,3 +33,6 @@ obj-y                += chips/ lpddr/ maps/ devices/ n
+ obj-$(CONFIG_MTD_SPI_NOR)     += spi-nor/
+ obj-$(CONFIG_MTD_UBI)         += ubi/
+ obj-$(CONFIG_MTD_HYPERBUS)    += hyperbus/
++
++# Composite drivers must be loaded last
++obj-y                         += composite/
+--- /dev/null
++++ b/drivers/mtd/composite/Kconfig
+@@ -0,0 +1,12 @@
++menu "Composite MTD device drivers"
++      depends on MTD!=n
++
++config MTD_VIRT_CONCAT
++      tristate "Virtual concat MTD device"
++      help
++        This driver allows creation of a virtual MTD concat device, which
++        concatenates multiple underlying MTD devices to a single device.
++        This is required by some SoC boards where multiple memory banks are
++        used as one device with partitions spanning across device boundaries.
++
++endmenu
+--- /dev/null
++++ b/drivers/mtd/composite/Makefile
+@@ -0,0 +1,6 @@
++# SPDX-License-Identifier: GPL-2.0
++#
++# linux/drivers/mtd/composite/Makefile
++#
++
++obj-$(CONFIG_MTD_VIRT_CONCAT)   += virt_concat.o
+--- /dev/null
++++ b/drivers/mtd/composite/virt_concat.c
+@@ -0,0 +1,128 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * Virtual concat MTD device driver
++ *
++ * Copyright (C) 2018 Bernhard Frauendienst
++ * Author: Bernhard Frauendienst, [email protected]
++ */
++
++#include <linux/module.h>
++#include <linux/device.h>
++#include <linux/mtd/concat.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/slab.h>
++
++/*
++ * struct of_virt_concat - platform device driver data.
++ * @cmtd the final mtd_concat device
++ * @num_devices the number of devices in @devices
++ * @devices points to an array of devices already loaded
++ */
++struct of_virt_concat {
++      struct mtd_info *cmtd;
++      int num_devices;
++      struct mtd_info **devices;
++};
++
++static int virt_concat_remove(struct platform_device *pdev)
++{
++      struct of_virt_concat *info;
++      int i;
++
++      info = platform_get_drvdata(pdev);
++      if (!info)
++              return 0;
++
++      // unset data for when this is called after a probe error
++      platform_set_drvdata(pdev, NULL);
++
++      if (info->cmtd) {
++              mtd_device_unregister(info->cmtd);
++              mtd_concat_destroy(info->cmtd);
++      }
++
++      if (info->devices) {
++              for (i = 0; i < info->num_devices; i++)
++                      put_mtd_device(info->devices[i]);
++      }
++
++      return 0;
++}
++
++static int virt_concat_probe(struct platform_device *pdev)
++{
++      struct device_node *node = pdev->dev.of_node;
++      struct of_phandle_iterator it;
++      struct of_virt_concat *info;
++      struct mtd_info *mtd;
++      int err = 0, count;
++
++      count = of_count_phandle_with_args(node, "devices", NULL);
++      if (count <= 0)
++              return -EINVAL;
++
++      info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
++      if (!info)
++              return -ENOMEM;
++      info->devices = devm_kcalloc(&pdev->dev, count,
++                                   sizeof(*(info->devices)), GFP_KERNEL);
++      if (!info->devices) {
++              err = -ENOMEM;
++              goto err_remove;
++      }
++
++      platform_set_drvdata(pdev, info);
++
++      of_for_each_phandle(&it, err, node, "devices", NULL, 0) {
++              mtd = get_mtd_device_by_node(it.node);
++              if (IS_ERR(mtd)) {
++                      of_node_put(it.node);
++                      err = -EPROBE_DEFER;
++                      goto err_remove;
++              }
++
++              info->devices[info->num_devices++] = mtd;
++      }
++
++      info->cmtd = mtd_concat_create(info->devices, info->num_devices,
++                                     dev_name(&pdev->dev));
++      if (!info->cmtd) {
++              err = -ENXIO;
++              goto err_remove;
++      }
++
++      info->cmtd->dev.parent = &pdev->dev;
++      mtd_set_of_node(info->cmtd, node);
++      mtd_device_register(info->cmtd, NULL, 0);
++
++      return 0;
++
++err_remove:
++      virt_concat_remove(pdev);
++
++      return err;
++}
++
++static const struct of_device_id virt_concat_of_match[] = {
++      { .compatible = "mtd-concat", },
++      { /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(of, virt_concat_of_match);
++
++static struct platform_driver virt_concat_driver = {
++      .probe = virt_concat_probe,
++      .remove = virt_concat_remove,
++      .driver  = {
++              .name   = "virt-mtdconcat",
++              .of_match_table = virt_concat_of_match,
++      },
++};
++
++module_platform_driver(virt_concat_driver);
++
++MODULE_LICENSE("GPL v2");
++MODULE_AUTHOR("Bernhard Frauendienst <[email protected]>");
++MODULE_DESCRIPTION("Virtual concat MTD device driver");

diff --git a/target/linux/generic/pending-6.0/498-mtd-spi-nor-locking-support-for-MX25L6405D.patch b/target/linux/generic/pending-6.0/498-mtd-spi-nor-locking-support-for-MX25L6405D.patch
new file mode 100644 (file)
index 0000000..6c48067
--- /dev/null
+++ b/target/linux/generic/pending-6.0/498-mtd-spi-nor-locking-support-for-MX25L6405D.patch
@@ -0,0 +1,34 @@
+From 8bf2ce6ea4ee840b70f55a27f80e1cd308051b13 Mon Sep 17 00:00:00 2001
+From: Nick Hainke <[email protected]>
+Date: Mon, 27 Dec 2021 00:38:13 +0100
+Subject: [PATCH 1/2] mtd: spi-nor: locking support for MX25L6405D
+
+Macronix MX25L6405D supports locking with four block-protection bits.
+Currently, the driver only sets three bits.  If the bootloader does not
+sustain the flash chip in an unlocked state, the flash might be
+non-writeable. Add the corresponding flag to enable locking support with
+four bits in the status register.
+
+Tested on Nanostation M2 XM.
+
+Similar to commit 7ea40b54e83b ("mtd: spi-nor: enable locking support for
+MX25L12805D")
+
+Signed-off-by: David Bauer <[email protected]>
+Signed-off-by: Nick Hainke <[email protected]>
+---
+ drivers/mtd/spi-nor/macronix.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/mtd/spi-nor/macronix.c
++++ b/drivers/mtd/spi-nor/macronix.c
+@@ -41,7 +41,8 @@ static const struct flash_info macronix_
+       { "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64)
+               NO_SFDP_FLAGS(SECT_4K) },
+       { "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128)
+-              NO_SFDP_FLAGS(SECT_4K) },
++              FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP)
++              NO_SFDP_FLAGS(SECT_4K) },
+       { "mx25u2033e",  INFO(0xc22532, 0, 64 * 1024,   4)
+               NO_SFDP_FLAGS(SECT_4K) },
+       { "mx25u3235f",  INFO(0xc22536, 0, 64 * 1024,  64)

diff --git a/target/linux/generic/pending-6.0/499-mtd-spi-nor-disable-16-bit-sr-for-macronix.patch b/target/linux/generic/pending-6.0/499-mtd-spi-nor-disable-16-bit-sr-for-macronix.patch
new file mode 100644 (file)
index 0000000..ec14f63
--- /dev/null
+++ b/target/linux/generic/pending-6.0/499-mtd-spi-nor-disable-16-bit-sr-for-macronix.patch
@@ -0,0 +1,30 @@
+From 245224608b5368c10407da07557e546743d3c489 Mon Sep 17 00:00:00 2001
+From: Nick Hainke <[email protected]>
+Date: Mon, 27 Dec 2021 09:33:13 +0100
+Subject: [PATCH 2/2] mtd: spi-nor: disable 16-bit-sr for macronix
+
+Macronix flash chips seem to consist of only one status register.
+These chips will not work with the "16-bit Write Status (01h) Command".
+Disable SNOR_F_HAS_16BIT_SR for all Macronix chips.
+
+Tested with MX25L6405D.
+
+Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on
+lock()/unlock()")
+
+Signed-off-by: David Bauer <[email protected]>
+Signed-off-by: Nick Hainke <[email protected]>
+---
+ drivers/mtd/spi-nor/macronix.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/mtd/spi-nor/macronix.c
++++ b/drivers/mtd/spi-nor/macronix.c
+@@ -94,6 +94,7 @@ static void macronix_default_init(struct
+ {
+       nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
+       nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode;
++      nor->flags &= ~SNOR_F_HAS_16BIT_SR;
+       nor->flags |= SNOR_F_HAS_LOCK;
+ }
+ 

diff --git a/target/linux/generic/pending-6.0/500-fs_cdrom_dependencies.patch b/target/linux/generic/pending-6.0/500-fs_cdrom_dependencies.patch
new file mode 100644 (file)
index 0000000..2053c0f
--- /dev/null
+++ b/target/linux/generic/pending-6.0/500-fs_cdrom_dependencies.patch
@@ -0,0 +1,52 @@
+From af7b91bcecce0eae24e90acd35d96ecee73e1407 Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 12:21:15 +0200
+Subject: [PATCH] fs: add cdrom dependency
+
+---
+ fs/hfs/Kconfig     | 1 +
+ fs/hfsplus/Kconfig | 1 +
+ fs/isofs/Kconfig   | 1 +
+ fs/udf/Kconfig     | 1 +
+ 4 files changed, 4 insertions(+)
+
+--- a/fs/hfs/Kconfig
++++ b/fs/hfs/Kconfig
+@@ -2,6 +2,7 @@
+ config HFS_FS
+       tristate "Apple Macintosh file system support"
+       depends on BLOCK
++      select CDROM
+       select NLS
+       help
+         If you say Y here, you will be able to mount Macintosh-formatted
+--- a/fs/hfsplus/Kconfig
++++ b/fs/hfsplus/Kconfig
+@@ -2,6 +2,7 @@
+ config HFSPLUS_FS
+       tristate "Apple Extended HFS file system support"
+       depends on BLOCK
++      select CDROM
+       select NLS
+       select NLS_UTF8
+       help
+--- a/fs/isofs/Kconfig
++++ b/fs/isofs/Kconfig
+@@ -1,6 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+ config ISO9660_FS
+       tristate "ISO 9660 CDROM file system support"
++      select CDROM
+       help
+         This is the standard file system used on CD-ROMs.  It was previously
+         known as "High Sierra File System" and is called "hsfs" on other
+--- a/fs/udf/Kconfig
++++ b/fs/udf/Kconfig
+@@ -1,6 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0-only
+ config UDF_FS
+       tristate "UDF file system support"
++      select CDROM
+       select CRC_ITU_T
+       select NLS
+       help

diff --git a/target/linux/generic/pending-6.0/530-jffs2_make_lzma_available.patch b/target/linux/generic/pending-6.0/530-jffs2_make_lzma_available.patch
new file mode 100644 (file)
index 0000000..fd6ca78
--- /dev/null
+++ b/target/linux/generic/pending-6.0/530-jffs2_make_lzma_available.patch
@@ -0,0 +1,5180 @@
+From: Alexandros C. Couloumbis <[email protected]>
+Subject: fs: add jffs2/lzma support (not activated by default yet)
+
+lede-commit: c2c88d315fa0e881f8b19da07b62859b915b11b2
+Signed-off-by: Alexandros C. Couloumbis <[email protected]>
+---
+ fs/jffs2/Kconfig             |    9 +
+ fs/jffs2/Makefile            |    3 +
+ fs/jffs2/compr.c             |    6 +
+ fs/jffs2/compr.h             |   10 +-
+ fs/jffs2/compr_lzma.c        |  128 +++
+ fs/jffs2/super.c             |   33 +-
+ include/linux/lzma.h         |   62 ++
+ include/linux/lzma/LzFind.h  |  115 +++
+ include/linux/lzma/LzHash.h  |   54 +
+ include/linux/lzma/LzmaDec.h |  231 +++++
+ include/linux/lzma/LzmaEnc.h |   80 ++
+ include/linux/lzma/Types.h   |  226 +++++
+ include/uapi/linux/jffs2.h   |    1 +
+ lib/Kconfig                  |    6 +
+ lib/Makefile                 |   12 +
+ lib/lzma/LzFind.c            |  761 ++++++++++++++
+ lib/lzma/LzmaDec.c           |  999 +++++++++++++++++++
+ lib/lzma/LzmaEnc.c           | 2271 ++++++++++++++++++++++++++++++++++++++++++
+ lib/lzma/Makefile            |    7 +
+ 19 files changed, 5008 insertions(+), 6 deletions(-)
+ create mode 100644 fs/jffs2/compr_lzma.c
+ create mode 100644 include/linux/lzma.h
+ create mode 100644 include/linux/lzma/LzFind.h
+ create mode 100644 include/linux/lzma/LzHash.h
+ create mode 100644 include/linux/lzma/LzmaDec.h
+ create mode 100644 include/linux/lzma/LzmaEnc.h
+ create mode 100644 include/linux/lzma/Types.h
+ create mode 100644 lib/lzma/LzFind.c
+ create mode 100644 lib/lzma/LzmaDec.c
+ create mode 100644 lib/lzma/LzmaEnc.c
+ create mode 100644 lib/lzma/Makefile
+
+--- a/fs/jffs2/Kconfig
++++ b/fs/jffs2/Kconfig
+@@ -136,6 +136,15 @@ config JFFS2_LZO
+         This feature was added in July, 2007. Say 'N' if you need
+         compatibility with older bootloaders or kernels.
+ 
++config JFFS2_LZMA
++      bool "JFFS2 LZMA compression support" if JFFS2_COMPRESSION_OPTIONS
++      select LZMA_COMPRESS
++      select LZMA_DECOMPRESS
++      depends on JFFS2_FS
++      default n
++      help
++        JFFS2 wrapper to the LZMA C SDK
++
+ config JFFS2_RTIME
+       bool "JFFS2 RTIME compression support" if JFFS2_COMPRESSION_OPTIONS
+       depends on JFFS2_FS
+--- a/fs/jffs2/Makefile
++++ b/fs/jffs2/Makefile
+@@ -19,4 +19,7 @@ jffs2-$(CONFIG_JFFS2_RUBIN)  += compr_rub
+ jffs2-$(CONFIG_JFFS2_RTIME)   += compr_rtime.o
+ jffs2-$(CONFIG_JFFS2_ZLIB)    += compr_zlib.o
+ jffs2-$(CONFIG_JFFS2_LZO)     += compr_lzo.o
++jffs2-$(CONFIG_JFFS2_LZMA)    += compr_lzma.o
+ jffs2-$(CONFIG_JFFS2_SUMMARY)   += summary.o
++
++CFLAGS_compr_lzma.o += -Iinclude/linux -Ilib/lzma
+--- a/fs/jffs2/compr.c
++++ b/fs/jffs2/compr.c
+@@ -378,6 +378,9 @@ int __init jffs2_compressors_init(void)
+ #ifdef CONFIG_JFFS2_LZO
+       jffs2_lzo_init();
+ #endif
++#ifdef CONFIG_JFFS2_LZMA
++      jffs2_lzma_init();
++#endif
+ /* Setting default compression mode */
+ #ifdef CONFIG_JFFS2_CMODE_NONE
+       jffs2_compression_mode = JFFS2_COMPR_MODE_NONE;
+@@ -401,6 +404,9 @@ int __init jffs2_compressors_init(void)
+ int jffs2_compressors_exit(void)
+ {
+ /* Unregistering compressors */
++#ifdef CONFIG_JFFS2_LZMA
++      jffs2_lzma_exit();
++#endif
+ #ifdef CONFIG_JFFS2_LZO
+       jffs2_lzo_exit();
+ #endif
+--- a/fs/jffs2/compr.h
++++ b/fs/jffs2/compr.h
+@@ -29,9 +29,9 @@
+ #define JFFS2_DYNRUBIN_PRIORITY  20
+ #define JFFS2_LZARI_PRIORITY     30
+ #define JFFS2_RTIME_PRIORITY     50
+-#define JFFS2_ZLIB_PRIORITY      60
+-#define JFFS2_LZO_PRIORITY       80
+-
++#define JFFS2_LZMA_PRIORITY      70
++#define JFFS2_ZLIB_PRIORITY      80
++#define JFFS2_LZO_PRIORITY       90
+ 
+ #define JFFS2_RUBINMIPS_DISABLED /* RUBINs will be used only */
+ #define JFFS2_DYNRUBIN_DISABLED  /*      for decompression */
+@@ -101,5 +101,9 @@ void jffs2_zlib_exit(void);
+ int jffs2_lzo_init(void);
+ void jffs2_lzo_exit(void);
+ #endif
++#ifdef CONFIG_JFFS2_LZMA
++int jffs2_lzma_init(void);
++void jffs2_lzma_exit(void);
++#endif
+ 
+ #endif /* __JFFS2_COMPR_H__ */
+--- /dev/null
++++ b/fs/jffs2/compr_lzma.c
+@@ -0,0 +1,128 @@
++/*
++ * JFFS2 -- Journalling Flash File System, Version 2.
++ *
++ * For licensing information, see the file 'LICENCE' in this directory.
++ *
++ * JFFS2 wrapper to the LZMA C SDK
++ *
++ */
++
++#include <linux/lzma.h>
++#include "compr.h"
++
++#ifdef __KERNEL__
++      static DEFINE_MUTEX(deflate_mutex);
++#endif
++
++CLzmaEncHandle *p;
++Byte propsEncoded[LZMA_PROPS_SIZE];
++SizeT propsSize = sizeof(propsEncoded);
++
++STATIC void lzma_free_workspace(void)
++{
++      LzmaEnc_Destroy(p, &lzma_alloc, &lzma_alloc);
++}
++
++STATIC int INIT lzma_alloc_workspace(CLzmaEncProps *props)
++{
++      if ((p = (CLzmaEncHandle *)LzmaEnc_Create(&lzma_alloc)) == NULL)
++      {
++              PRINT_ERROR("Failed to allocate lzma deflate workspace\n");
++              return -ENOMEM;
++      }
++
++      if (LzmaEnc_SetProps(p, props) != SZ_OK)
++      {
++              lzma_free_workspace();
++              return -1;
++      }
++
++      if (LzmaEnc_WriteProperties(p, propsEncoded, &propsSize) != SZ_OK)
++      {
++              lzma_free_workspace();
++              return -1;
++      }
++
++      return 0;
++}
++
++STATIC int jffs2_lzma_compress(unsigned char *data_in, unsigned char *cpage_out,
++                            uint32_t *sourcelen, uint32_t *dstlen)
++{
++      SizeT compress_size = (SizeT)(*dstlen);
++      int ret;
++
++      #ifdef __KERNEL__
++              mutex_lock(&deflate_mutex);
++      #endif
++
++      ret = LzmaEnc_MemEncode(p, cpage_out, &compress_size, data_in, *sourcelen,
++              0, NULL, &lzma_alloc, &lzma_alloc);
++
++      #ifdef __KERNEL__
++              mutex_unlock(&deflate_mutex);
++      #endif
++
++      if (ret != SZ_OK)
++              return -1;
++
++      *dstlen = (uint32_t)compress_size;
++
++      return 0;
++}
++
++STATIC int jffs2_lzma_decompress(unsigned char *data_in, unsigned char *cpage_out,
++                               uint32_t srclen, uint32_t destlen)
++{
++      int ret;
++      SizeT dl = (SizeT)destlen;
++      SizeT sl = (SizeT)srclen;
++      ELzmaStatus status;
++
++      ret = LzmaDecode(cpage_out, &dl, data_in, &sl, propsEncoded,
++              propsSize, LZMA_FINISH_ANY, &status, &lzma_alloc);
++
++      if (ret != SZ_OK || status == LZMA_STATUS_NOT_FINISHED || dl != (SizeT)destlen)
++              return -1;
++
++      return 0;
++}
++
++static struct jffs2_compressor jffs2_lzma_comp = {
++      .priority = JFFS2_LZMA_PRIORITY,
++      .name = "lzma",
++      .compr = JFFS2_COMPR_LZMA,
++      .compress = &jffs2_lzma_compress,
++      .decompress = &jffs2_lzma_decompress,
++      .disabled = 0,
++};
++
++int INIT jffs2_lzma_init(void)
++{
++      int ret;
++      CLzmaEncProps props;
++      LzmaEncProps_Init(&props);
++
++      props.dictSize = LZMA_BEST_DICT(0x2000);
++      props.level = LZMA_BEST_LEVEL;
++      props.lc = LZMA_BEST_LC;
++      props.lp = LZMA_BEST_LP;
++      props.pb = LZMA_BEST_PB;
++      props.fb = LZMA_BEST_FB;
++
++      ret = lzma_alloc_workspace(&props);
++      if (ret < 0)
++              return ret;
++
++      ret = jffs2_register_compressor(&jffs2_lzma_comp);
++      if (ret)
++              lzma_free_workspace();
++
++      return ret;
++}
++
++void jffs2_lzma_exit(void)
++{
++      jffs2_unregister_compressor(&jffs2_lzma_comp);
++      lzma_free_workspace();
++}
+--- a/fs/jffs2/super.c
++++ b/fs/jffs2/super.c
+@@ -374,14 +374,41 @@ static int __init init_jffs2_fs(void)
+       BUILD_BUG_ON(sizeof(struct jffs2_raw_inode) != 68);
+       BUILD_BUG_ON(sizeof(struct jffs2_raw_summary) != 32);
+ 
+-      pr_info("version 2.2."
++      pr_info("version 2.2"
+ #ifdef CONFIG_JFFS2_FS_WRITEBUFFER
+              " (NAND)"
+ #endif
+ #ifdef CONFIG_JFFS2_SUMMARY
+-             " (SUMMARY) "
++             " (SUMMARY)"
+ #endif
+-             " © 2001-2006 Red Hat, Inc.\n");
++#ifdef CONFIG_JFFS2_ZLIB
++             " (ZLIB)"
++#endif
++#ifdef CONFIG_JFFS2_LZO
++             " (LZO)"
++#endif
++#ifdef CONFIG_JFFS2_LZMA
++             " (LZMA)"
++#endif
++#ifdef CONFIG_JFFS2_RTIME
++             " (RTIME)"
++#endif
++#ifdef CONFIG_JFFS2_RUBIN
++             " (RUBIN)"
++#endif
++#ifdef  CONFIG_JFFS2_CMODE_NONE
++             " (CMODE_NONE)"
++#endif
++#ifdef CONFIG_JFFS2_CMODE_PRIORITY
++             " (CMODE_PRIORITY)"
++#endif
++#ifdef CONFIG_JFFS2_CMODE_SIZE
++             " (CMODE_SIZE)"
++#endif
++#ifdef CONFIG_JFFS2_CMODE_FAVOURLZO
++             " (CMODE_FAVOURLZO)"
++#endif
++             " (c) 2001-2006 Red Hat, Inc.\n");
+ 
+       jffs2_inode_cachep = kmem_cache_create("jffs2_i",
+                                            sizeof(struct jffs2_inode_info),
+--- /dev/null
++++ b/include/linux/lzma.h
+@@ -0,0 +1,62 @@
++#ifndef __LZMA_H__
++#define __LZMA_H__
++
++#ifdef __KERNEL__
++      #include <linux/kernel.h>
++      #include <linux/sched.h>
++      #include <linux/slab.h>
++      #include <linux/vmalloc.h>
++      #include <linux/init.h>
++      #define LZMA_MALLOC vmalloc
++      #define LZMA_FREE vfree
++      #define PRINT_ERROR(msg) printk(KERN_WARNING #msg)
++      #define INIT __init
++      #define STATIC static
++#else
++      #include <stdint.h>
++      #include <stdlib.h>
++      #include <stdio.h>
++      #include <unistd.h>
++      #include <string.h>
++      #include <asm/types.h>
++      #include <errno.h>
++      #include <linux/jffs2.h>
++      #ifndef PAGE_SIZE
++              extern int page_size;
++              #define PAGE_SIZE page_size
++      #endif
++      #define LZMA_MALLOC malloc
++      #define LZMA_FREE free
++      #define PRINT_ERROR(msg) fprintf(stderr, msg)
++      #define INIT
++      #define STATIC
++#endif
++
++#include "lzma/LzmaDec.h"
++#include "lzma/LzmaEnc.h"
++
++#define LZMA_BEST_LEVEL (9)
++#define LZMA_BEST_LC    (0)
++#define LZMA_BEST_LP    (0)
++#define LZMA_BEST_PB    (0)
++#define LZMA_BEST_FB  (273)
++
++#define LZMA_BEST_DICT(n) (((int)((n) / 2)) * 2)
++
++static void *p_lzma_malloc(void *p, size_t size)
++{
++      if (size == 0)
++              return NULL;
++
++      return LZMA_MALLOC(size);
++}
++
++static void p_lzma_free(void *p, void *address)
++{
++      if (address != NULL)
++              LZMA_FREE(address);
++}
++
++static ISzAlloc lzma_alloc = {p_lzma_malloc, p_lzma_free};
++
++#endif
+--- /dev/null
++++ b/include/linux/lzma/LzFind.h
+@@ -0,0 +1,115 @@
++/* LzFind.h -- Match finder for LZ algorithms
++2009-04-22 : Igor Pavlov : Public domain */
++
++#ifndef __LZ_FIND_H
++#define __LZ_FIND_H
++
++#include "Types.h"
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++typedef UInt32 CLzRef;
++
++typedef struct _CMatchFinder
++{
++  Byte *buffer;
++  UInt32 pos;
++  UInt32 posLimit;
++  UInt32 streamPos;
++  UInt32 lenLimit;
++
++  UInt32 cyclicBufferPos;
++  UInt32 cyclicBufferSize; /* it must be = (historySize + 1) */
++
++  UInt32 matchMaxLen;
++  CLzRef *hash;
++  CLzRef *son;
++  UInt32 hashMask;
++  UInt32 cutValue;
++
++  Byte *bufferBase;
++  ISeqInStream *stream;
++  int streamEndWasReached;
++
++  UInt32 blockSize;
++  UInt32 keepSizeBefore;
++  UInt32 keepSizeAfter;
++
++  UInt32 numHashBytes;
++  int directInput;
++  size_t directInputRem;
++  int btMode;
++  int bigHash;
++  UInt32 historySize;
++  UInt32 fixedHashSize;
++  UInt32 hashSizeSum;
++  UInt32 numSons;
++  SRes result;
++  UInt32 crc[256];
++} CMatchFinder;
++
++#define Inline_MatchFinder_GetPointerToCurrentPos(p) ((p)->buffer)
++#define Inline_MatchFinder_GetIndexByte(p, index) ((p)->buffer[(Int32)(index)])
++
++#define Inline_MatchFinder_GetNumAvailableBytes(p) ((p)->streamPos - (p)->pos)
++
++int MatchFinder_NeedMove(CMatchFinder *p);
++Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p);
++void MatchFinder_MoveBlock(CMatchFinder *p);
++void MatchFinder_ReadIfRequired(CMatchFinder *p);
++
++void MatchFinder_Construct(CMatchFinder *p);
++
++/* Conditions:
++     historySize <= 3 GB
++     keepAddBufferBefore + matchMaxLen + keepAddBufferAfter < 511MB
++*/
++int MatchFinder_Create(CMatchFinder *p, UInt32 historySize,
++    UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
++    ISzAlloc *alloc);
++void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
++void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
++void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
++
++UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
++    UInt32 *distances, UInt32 maxLen);
++
++/*
++Conditions:
++  Mf_GetNumAvailableBytes_Func must be called before each Mf_GetMatchLen_Func.
++  Mf_GetPointerToCurrentPos_Func's result must be used only before any other function
++*/
++
++typedef void (*Mf_Init_Func)(void *object);
++typedef Byte (*Mf_GetIndexByte_Func)(void *object, Int32 index);
++typedef UInt32 (*Mf_GetNumAvailableBytes_Func)(void *object);
++typedef const Byte * (*Mf_GetPointerToCurrentPos_Func)(void *object);
++typedef UInt32 (*Mf_GetMatches_Func)(void *object, UInt32 *distances);
++typedef void (*Mf_Skip_Func)(void *object, UInt32);
++
++typedef struct _IMatchFinder
++{
++  Mf_Init_Func Init;
++  Mf_GetIndexByte_Func GetIndexByte;
++  Mf_GetNumAvailableBytes_Func GetNumAvailableBytes;
++  Mf_GetPointerToCurrentPos_Func GetPointerToCurrentPos;
++  Mf_GetMatches_Func GetMatches;
++  Mf_Skip_Func Skip;
++} IMatchFinder;
++
++void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
++
++void MatchFinder_Init(CMatchFinder *p);
++UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
++UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances);
++void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
++void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif
+--- /dev/null
++++ b/include/linux/lzma/LzHash.h
+@@ -0,0 +1,54 @@
++/* LzHash.h -- HASH functions for LZ algorithms
++2009-02-07 : Igor Pavlov : Public domain */
++
++#ifndef __LZ_HASH_H
++#define __LZ_HASH_H
++
++#define kHash2Size (1 << 10)
++#define kHash3Size (1 << 16)
++#define kHash4Size (1 << 20)
++
++#define kFix3HashSize (kHash2Size)
++#define kFix4HashSize (kHash2Size + kHash3Size)
++#define kFix5HashSize (kHash2Size + kHash3Size + kHash4Size)
++
++#define HASH2_CALC hashValue = cur[0] | ((UInt32)cur[1] << 8);
++
++#define HASH3_CALC { \
++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
++  hash2Value = temp & (kHash2Size - 1); \
++  hashValue = (temp ^ ((UInt32)cur[2] << 8)) & p->hashMask; }
++
++#define HASH4_CALC { \
++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
++  hash2Value = temp & (kHash2Size - 1); \
++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
++  hashValue = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & p->hashMask; }
++
++#define HASH5_CALC { \
++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
++  hash2Value = temp & (kHash2Size - 1); \
++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
++  hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)); \
++  hashValue = (hash4Value ^ (p->crc[cur[4]] << 3)) & p->hashMask; \
++  hash4Value &= (kHash4Size - 1); }
++
++/* #define HASH_ZIP_CALC hashValue = ((cur[0] | ((UInt32)cur[1] << 8)) ^ p->crc[cur[2]]) & 0xFFFF; */
++#define HASH_ZIP_CALC hashValue = ((cur[2] | ((UInt32)cur[0] << 8)) ^ p->crc[cur[1]]) & 0xFFFF;
++
++
++#define MT_HASH2_CALC \
++  hash2Value = (p->crc[cur[0]] ^ cur[1]) & (kHash2Size - 1);
++
++#define MT_HASH3_CALC { \
++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
++  hash2Value = temp & (kHash2Size - 1); \
++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); }
++
++#define MT_HASH4_CALC { \
++  UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
++  hash2Value = temp & (kHash2Size - 1); \
++  hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
++  hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & (kHash4Size - 1); }
++
++#endif
+--- /dev/null
++++ b/include/linux/lzma/LzmaDec.h
+@@ -0,0 +1,231 @@
++/* LzmaDec.h -- LZMA Decoder
++2009-02-07 : Igor Pavlov : Public domain */
++
++#ifndef __LZMA_DEC_H
++#define __LZMA_DEC_H
++
++#include "Types.h"
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/* #define _LZMA_PROB32 */
++/* _LZMA_PROB32 can increase the speed on some CPUs,
++   but memory usage for CLzmaDec::probs will be doubled in that case */
++
++#ifdef _LZMA_PROB32
++#define CLzmaProb UInt32
++#else
++#define CLzmaProb UInt16
++#endif
++
++
++/* ---------- LZMA Properties ---------- */
++
++#define LZMA_PROPS_SIZE 5
++
++typedef struct _CLzmaProps
++{
++  unsigned lc, lp, pb;
++  UInt32 dicSize;
++} CLzmaProps;
++
++/* LzmaProps_Decode - decodes properties
++Returns:
++  SZ_OK
++  SZ_ERROR_UNSUPPORTED - Unsupported properties
++*/
++
++SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
++
++
++/* ---------- LZMA Decoder state ---------- */
++
++/* LZMA_REQUIRED_INPUT_MAX = number of required input bytes for worst case.
++   Num bits = log2((2^11 / 31) ^ 22) + 26 < 134 + 26 = 160; */
++
++#define LZMA_REQUIRED_INPUT_MAX 20
++
++typedef struct
++{
++  CLzmaProps prop;
++  CLzmaProb *probs;
++  Byte *dic;
++  const Byte *buf;
++  UInt32 range, code;
++  SizeT dicPos;
++  SizeT dicBufSize;
++  UInt32 processedPos;
++  UInt32 checkDicSize;
++  unsigned state;
++  UInt32 reps[4];
++  unsigned remainLen;
++  int needFlush;
++  int needInitState;
++  UInt32 numProbs;
++  unsigned tempBufSize;
++  Byte tempBuf[LZMA_REQUIRED_INPUT_MAX];
++} CLzmaDec;
++
++#define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
++
++void LzmaDec_Init(CLzmaDec *p);
++
++/* There are two types of LZMA streams:
++     0) Stream with end mark. That end mark adds about 6 bytes to compressed size.
++     1) Stream without end mark. You must know exact uncompressed size to decompress such stream. */
++
++typedef enum
++{
++  LZMA_FINISH_ANY,   /* finish at any point */
++  LZMA_FINISH_END    /* block must be finished at the end */
++} ELzmaFinishMode;
++
++/* ELzmaFinishMode has meaning only if the decoding reaches output limit !!!
++
++   You must use LZMA_FINISH_END, when you know that current output buffer
++   covers last bytes of block. In other cases you must use LZMA_FINISH_ANY.
++
++   If LZMA decoder sees end marker before reaching output limit, it returns SZ_OK,
++   and output value of destLen will be less than output buffer size limit.
++   You can check status result also.
++
++   You can use multiple checks to test data integrity after full decompression:
++     1) Check Result and "status" variable.
++     2) Check that output(destLen) = uncompressedSize, if you know real uncompressedSize.
++     3) Check that output(srcLen) = compressedSize, if you know real compressedSize.
++        You must use correct finish mode in that case. */
++
++typedef enum
++{
++  LZMA_STATUS_NOT_SPECIFIED,               /* use main error code instead */
++  LZMA_STATUS_FINISHED_WITH_MARK,          /* stream was finished with end mark. */
++  LZMA_STATUS_NOT_FINISHED,                /* stream was not finished */
++  LZMA_STATUS_NEEDS_MORE_INPUT,            /* you must provide more input bytes */
++  LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK  /* there is probability that stream was finished without end mark */
++} ELzmaStatus;
++
++/* ELzmaStatus is used only as output value for function call */
++
++
++/* ---------- Interfaces ---------- */
++
++/* There are 3 levels of interfaces:
++     1) Dictionary Interface
++     2) Buffer Interface
++     3) One Call Interface
++   You can select any of these interfaces, but don't mix functions from different
++   groups for same object. */
++
++
++/* There are two variants to allocate state for Dictionary Interface:
++     1) LzmaDec_Allocate / LzmaDec_Free
++     2) LzmaDec_AllocateProbs / LzmaDec_FreeProbs
++   You can use variant 2, if you set dictionary buffer manually.
++   For Buffer Interface you must always use variant 1.
++
++LzmaDec_Allocate* can return:
++  SZ_OK
++  SZ_ERROR_MEM         - Memory allocation error
++  SZ_ERROR_UNSUPPORTED - Unsupported properties
++*/
++
++SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc);
++void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc);
++
++SRes LzmaDec_Allocate(CLzmaDec *state, const Byte *prop, unsigned propsSize, ISzAlloc *alloc);
++void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc);
++
++/* ---------- Dictionary Interface ---------- */
++
++/* You can use it, if you want to eliminate the overhead for data copying from
++   dictionary to some other external buffer.
++   You must work with CLzmaDec variables directly in this interface.
++
++   STEPS:
++     LzmaDec_Constr()
++     LzmaDec_Allocate()
++     for (each new stream)
++     {
++       LzmaDec_Init()
++       while (it needs more decompression)
++       {
++         LzmaDec_DecodeToDic()
++         use data from CLzmaDec::dic and update CLzmaDec::dicPos
++       }
++     }
++     LzmaDec_Free()
++*/
++
++/* LzmaDec_DecodeToDic
++
++   The decoding to internal dictionary buffer (CLzmaDec::dic).
++   You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!!
++
++finishMode:
++  It has meaning only if the decoding reaches output limit (dicLimit).
++  LZMA_FINISH_ANY - Decode just dicLimit bytes.
++  LZMA_FINISH_END - Stream must be finished after dicLimit.
++
++Returns:
++  SZ_OK
++    status:
++      LZMA_STATUS_FINISHED_WITH_MARK
++      LZMA_STATUS_NOT_FINISHED
++      LZMA_STATUS_NEEDS_MORE_INPUT
++      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
++  SZ_ERROR_DATA - Data error
++*/
++
++SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
++    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
++
++
++/* ---------- Buffer Interface ---------- */
++
++/* It's zlib-like interface.
++   See LzmaDec_DecodeToDic description for information about STEPS and return results,
++   but you must use LzmaDec_DecodeToBuf instead of LzmaDec_DecodeToDic and you don't need
++   to work with CLzmaDec variables manually.
++
++finishMode:
++  It has meaning only if the decoding reaches output limit (*destLen).
++  LZMA_FINISH_ANY - Decode just destLen bytes.
++  LZMA_FINISH_END - Stream must be finished after (*destLen).
++*/
++
++SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
++    const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
++
++
++/* ---------- One Call Interface ---------- */
++
++/* LzmaDecode
++
++finishMode:
++  It has meaning only if the decoding reaches output limit (*destLen).
++  LZMA_FINISH_ANY - Decode just destLen bytes.
++  LZMA_FINISH_END - Stream must be finished after (*destLen).
++
++Returns:
++  SZ_OK
++    status:
++      LZMA_STATUS_FINISHED_WITH_MARK
++      LZMA_STATUS_NOT_FINISHED
++      LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK
++  SZ_ERROR_DATA - Data error
++  SZ_ERROR_MEM  - Memory allocation error
++  SZ_ERROR_UNSUPPORTED - Unsupported properties
++  SZ_ERROR_INPUT_EOF - It needs more bytes in input buffer (src).
++*/
++
++SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
++    const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
++    ELzmaStatus *status, ISzAlloc *alloc);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif
+--- /dev/null
++++ b/include/linux/lzma/LzmaEnc.h
+@@ -0,0 +1,80 @@
++/*  LzmaEnc.h -- LZMA Encoder
++2009-02-07 : Igor Pavlov : Public domain */
++
++#ifndef __LZMA_ENC_H
++#define __LZMA_ENC_H
++
++#include "Types.h"
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++#define LZMA_PROPS_SIZE 5
++
++typedef struct _CLzmaEncProps
++{
++  int level;       /*  0 <= level <= 9 */
++  UInt32 dictSize; /* (1 << 12) <= dictSize <= (1 << 27) for 32-bit version
++                      (1 << 12) <= dictSize <= (1 << 30) for 64-bit version
++                       default = (1 << 24) */
++  int lc;          /* 0 <= lc <= 8, default = 3 */
++  int lp;          /* 0 <= lp <= 4, default = 0 */
++  int pb;          /* 0 <= pb <= 4, default = 2 */
++  int algo;        /* 0 - fast, 1 - normal, default = 1 */
++  int fb;          /* 5 <= fb <= 273, default = 32 */
++  int btMode;      /* 0 - hashChain Mode, 1 - binTree mode - normal, default = 1 */
++  int numHashBytes; /* 2, 3 or 4, default = 4 */
++  UInt32 mc;        /* 1 <= mc <= (1 << 30), default = 32 */
++  unsigned writeEndMark;  /* 0 - do not write EOPM, 1 - write EOPM, default = 0 */
++  int numThreads;  /* 1 or 2, default = 2 */
++} CLzmaEncProps;
++
++void LzmaEncProps_Init(CLzmaEncProps *p);
++void LzmaEncProps_Normalize(CLzmaEncProps *p);
++UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2);
++
++
++/* ---------- CLzmaEncHandle Interface ---------- */
++
++/* LzmaEnc_* functions can return the following exit codes:
++Returns:
++  SZ_OK           - OK
++  SZ_ERROR_MEM    - Memory allocation error
++  SZ_ERROR_PARAM  - Incorrect paramater in props
++  SZ_ERROR_WRITE  - Write callback error.
++  SZ_ERROR_PROGRESS - some break from progress callback
++  SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version)
++*/
++
++typedef void * CLzmaEncHandle;
++
++CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc);
++void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
++SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
++SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
++SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
++    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
++SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
++    int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
++
++/* ---------- One Call Interface ---------- */
++
++/* LzmaEncode
++Return code:
++  SZ_OK               - OK
++  SZ_ERROR_MEM        - Memory allocation error
++  SZ_ERROR_PARAM      - Incorrect paramater
++  SZ_ERROR_OUTPUT_EOF - output buffer overflow
++  SZ_ERROR_THREAD     - errors in multithreading functions (only for Mt version)
++*/
++
++SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
++    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
++    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif
+--- /dev/null
++++ b/include/linux/lzma/Types.h
+@@ -0,0 +1,226 @@
++/* Types.h -- Basic types
++2009-11-23 : Igor Pavlov : Public domain */
++
++#ifndef __7Z_TYPES_H
++#define __7Z_TYPES_H
++
++#include <stddef.h>
++
++#ifdef _WIN32
++#include <windows.h>
++#endif
++
++#ifndef EXTERN_C_BEGIN
++#ifdef __cplusplus
++#define EXTERN_C_BEGIN extern "C" {
++#define EXTERN_C_END }
++#else
++#define EXTERN_C_BEGIN
++#define EXTERN_C_END
++#endif
++#endif
++
++EXTERN_C_BEGIN
++
++#define SZ_OK 0
++
++#define SZ_ERROR_DATA 1
++#define SZ_ERROR_MEM 2
++#define SZ_ERROR_CRC 3
++#define SZ_ERROR_UNSUPPORTED 4
++#define SZ_ERROR_PARAM 5
++#define SZ_ERROR_INPUT_EOF 6
++#define SZ_ERROR_OUTPUT_EOF 7
++#define SZ_ERROR_READ 8
++#define SZ_ERROR_WRITE 9
++#define SZ_ERROR_PROGRESS 10
++#define SZ_ERROR_FAIL 11
++#define SZ_ERROR_THREAD 12
++
++#define SZ_ERROR_ARCHIVE 16
++#define SZ_ERROR_NO_ARCHIVE 17
++
++typedef int SRes;
++
++#ifdef _WIN32
++typedef DWORD WRes;
++#else
++typedef int WRes;
++#endif
++
++#ifndef RINOK
++#define RINOK(x) { int __result__ = (x); if (__result__ != 0) return __result__; }
++#endif
++
++typedef unsigned char Byte;
++typedef short Int16;
++typedef unsigned short UInt16;
++
++#ifdef _LZMA_UINT32_IS_ULONG
++typedef long Int32;
++typedef unsigned long UInt32;
++#else
++typedef int Int32;
++typedef unsigned int UInt32;
++#endif
++
++#ifdef _SZ_NO_INT_64
++
++/* define _SZ_NO_INT_64, if your compiler doesn't support 64-bit integers.
++   NOTES: Some code will work incorrectly in that case! */
++
++typedef long Int64;
++typedef unsigned long UInt64;
++
++#else
++
++#if defined(_MSC_VER) || defined(__BORLANDC__)
++typedef __int64 Int64;
++typedef unsigned __int64 UInt64;
++#else
++typedef long long int Int64;
++typedef unsigned long long int UInt64;
++#endif
++
++#endif
++
++#ifdef _LZMA_NO_SYSTEM_SIZE_T
++typedef UInt32 SizeT;
++#else
++typedef size_t SizeT;
++#endif
++
++typedef int Bool;
++#define True 1
++#define False 0
++
++
++#ifdef _WIN32
++#define MY_STD_CALL __stdcall
++#else
++#define MY_STD_CALL
++#endif
++
++#ifdef _MSC_VER
++
++#if _MSC_VER >= 1300
++#define MY_NO_INLINE __declspec(noinline)
++#else
++#define MY_NO_INLINE
++#endif
++
++#define MY_CDECL __cdecl
++#define MY_FAST_CALL __fastcall
++
++#else
++
++#define MY_CDECL
++#define MY_FAST_CALL
++
++#endif
++
++
++/* The following interfaces use first parameter as pointer to structure */
++
++typedef struct
++{
++  SRes (*Read)(void *p, void *buf, size_t *size);
++    /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
++       (output(*size) < input(*size)) is allowed */
++} ISeqInStream;
++
++/* it can return SZ_ERROR_INPUT_EOF */
++SRes SeqInStream_Read(ISeqInStream *stream, void *buf, size_t size);
++SRes SeqInStream_Read2(ISeqInStream *stream, void *buf, size_t size, SRes errorType);
++SRes SeqInStream_ReadByte(ISeqInStream *stream, Byte *buf);
++
++typedef struct
++{
++  size_t (*Write)(void *p, const void *buf, size_t size);
++    /* Returns: result - the number of actually written bytes.
++       (result < size) means error */
++} ISeqOutStream;
++
++typedef enum
++{
++  SZ_SEEK_SET = 0,
++  SZ_SEEK_CUR = 1,
++  SZ_SEEK_END = 2
++} ESzSeek;
++
++typedef struct
++{
++  SRes (*Read)(void *p, void *buf, size_t *size);  /* same as ISeqInStream::Read */
++  SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
++} ISeekInStream;
++
++typedef struct
++{
++  SRes (*Look)(void *p, void **buf, size_t *size);
++    /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
++       (output(*size) > input(*size)) is not allowed
++       (output(*size) < input(*size)) is allowed */
++  SRes (*Skip)(void *p, size_t offset);
++    /* offset must be <= output(*size) of Look */
++
++  SRes (*Read)(void *p, void *buf, size_t *size);
++    /* reads directly (without buffer). It's same as ISeqInStream::Read */
++  SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
++} ILookInStream;
++
++SRes LookInStream_LookRead(ILookInStream *stream, void *buf, size_t *size);
++SRes LookInStream_SeekTo(ILookInStream *stream, UInt64 offset);
++
++/* reads via ILookInStream::Read */
++SRes LookInStream_Read2(ILookInStream *stream, void *buf, size_t size, SRes errorType);
++SRes LookInStream_Read(ILookInStream *stream, void *buf, size_t size);
++
++#define LookToRead_BUF_SIZE (1 << 14)
++
++typedef struct
++{
++  ILookInStream s;
++  ISeekInStream *realStream;
++  size_t pos;
++  size_t size;
++  Byte buf[LookToRead_BUF_SIZE];
++} CLookToRead;
++
++void LookToRead_CreateVTable(CLookToRead *p, int lookahead);
++void LookToRead_Init(CLookToRead *p);
++
++typedef struct
++{
++  ISeqInStream s;
++  ILookInStream *realStream;
++} CSecToLook;
++
++void SecToLook_CreateVTable(CSecToLook *p);
++
++typedef struct
++{
++  ISeqInStream s;
++  ILookInStream *realStream;
++} CSecToRead;
++
++void SecToRead_CreateVTable(CSecToRead *p);
++
++typedef struct
++{
++  SRes (*Progress)(void *p, UInt64 inSize, UInt64 outSize);
++    /* Returns: result. (result != SZ_OK) means break.
++       Value (UInt64)(Int64)-1 for size means unknown value. */
++} ICompressProgress;
++
++typedef struct
++{
++  void *(*Alloc)(void *p, size_t size);
++  void (*Free)(void *p, void *address); /* address can be 0 */
++} ISzAlloc;
++
++#define IAlloc_Alloc(p, size) (p)->Alloc((p), size)
++#define IAlloc_Free(p, a) (p)->Free((p), a)
++
++EXTERN_C_END
++
++#endif
+--- a/include/uapi/linux/jffs2.h
++++ b/include/uapi/linux/jffs2.h
+@@ -46,6 +46,7 @@
+ #define JFFS2_COMPR_DYNRUBIN  0x05
+ #define JFFS2_COMPR_ZLIB      0x06
+ #define JFFS2_COMPR_LZO               0x07
++#define JFFS2_COMPR_LZMA      0x08
+ /* Compatibility flags. */
+ #define JFFS2_COMPAT_MASK 0xc000      /* What do to if an unknown nodetype is found */
+ #define JFFS2_NODE_ACCURATE 0x2000
+--- a/lib/Kconfig
++++ b/lib/Kconfig
+@@ -340,6 +340,12 @@ config ZSTD_DECOMPRESS
+ 
+ source "lib/xz/Kconfig"
+ 
++config LZMA_COMPRESS
++    tristate
++
++config LZMA_DECOMPRESS
++    tristate
++
+ #
+ # These all provide a common interface (hence the apparent duplication with
+ # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.)
+--- a/lib/Makefile
++++ b/lib/Makefile
+@@ -135,6 +135,16 @@ CFLAGS_kobject.o += -DDEBUG
+ CFLAGS_kobject_uevent.o += -DDEBUG
+ endif
+ 
++ifdef CONFIG_JFFS2_ZLIB
++  CONFIG_ZLIB_INFLATE:=y
++  CONFIG_ZLIB_DEFLATE:=y
++endif
++
++ifdef CONFIG_JFFS2_LZMA
++  CONFIG_LZMA_DECOMPRESS:=y
++  CONFIG_LZMA_COMPRESS:=y
++endif
++
+ obj-$(CONFIG_DEBUG_INFO_REDUCED) += debug_info.o
+ CFLAGS_debug_info.o += $(call cc-option, -femit-struct-debug-detailed=any)
+ 
+@@ -192,6 +202,8 @@ obj-$(CONFIG_ZSTD_COMPRESS) += zstd/
+ obj-$(CONFIG_ZSTD_DECOMPRESS) += zstd/
+ obj-$(CONFIG_XZ_DEC) += xz/
+ obj-$(CONFIG_RAID6_PQ) += raid6/
++obj-$(CONFIG_LZMA_COMPRESS) += lzma/
++obj-$(CONFIG_LZMA_DECOMPRESS) += lzma/
+ 
+ lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o
+ lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o
+--- /dev/null
++++ b/lib/lzma/LzFind.c
+@@ -0,0 +1,761 @@
++/* LzFind.c -- Match finder for LZ algorithms
++2009-04-22 : Igor Pavlov : Public domain */
++
++#include <string.h>
++
++#include "LzFind.h"
++#include "LzHash.h"
++
++#define kEmptyHashValue 0
++#define kMaxValForNormalize ((UInt32)0xFFFFFFFF)
++#define kNormalizeStepMin (1 << 10) /* it must be power of 2 */
++#define kNormalizeMask (~(kNormalizeStepMin - 1))
++#define kMaxHistorySize ((UInt32)3 << 30)
++
++#define kStartMaxLen 3
++
++static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
++{
++  if (!p->directInput)
++  {
++    alloc->Free(alloc, p->bufferBase);
++    p->bufferBase = 0;
++  }
++}
++
++/* keepSizeBefore + keepSizeAfter + keepSizeReserv must be < 4G) */
++
++static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
++{
++  UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
++  if (p->directInput)
++  {
++    p->blockSize = blockSize;
++    return 1;
++  }
++  if (p->bufferBase == 0 || p->blockSize != blockSize)
++  {
++    LzInWindow_Free(p, alloc);
++    p->blockSize = blockSize;
++    p->bufferBase = (Byte *)alloc->Alloc(alloc, (size_t)blockSize);
++  }
++  return (p->bufferBase != 0);
++}
++
++Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
++Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; }
++
++UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; }
++
++void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
++{
++  p->posLimit -= subValue;
++  p->pos -= subValue;
++  p->streamPos -= subValue;
++}
++
++static void MatchFinder_ReadBlock(CMatchFinder *p)
++{
++  if (p->streamEndWasReached || p->result != SZ_OK)
++    return;
++  if (p->directInput)
++  {
++    UInt32 curSize = 0xFFFFFFFF - p->streamPos;
++    if (curSize > p->directInputRem)
++      curSize = (UInt32)p->directInputRem;
++    p->directInputRem -= curSize;
++    p->streamPos += curSize;
++    if (p->directInputRem == 0)
++      p->streamEndWasReached = 1;
++    return;
++  }
++  for (;;)
++  {
++    Byte *dest = p->buffer + (p->streamPos - p->pos);
++    size_t size = (p->bufferBase + p->blockSize - dest);
++    if (size == 0)
++      return;
++    p->result = p->stream->Read(p->stream, dest, &size);
++    if (p->result != SZ_OK)
++      return;
++    if (size == 0)
++    {
++      p->streamEndWasReached = 1;
++      return;
++    }
++    p->streamPos += (UInt32)size;
++    if (p->streamPos - p->pos > p->keepSizeAfter)
++      return;
++  }
++}
++
++void MatchFinder_MoveBlock(CMatchFinder *p)
++{
++  memmove(p->bufferBase,
++    p->buffer - p->keepSizeBefore,
++    (size_t)(p->streamPos - p->pos + p->keepSizeBefore));
++  p->buffer = p->bufferBase + p->keepSizeBefore;
++}
++
++int MatchFinder_NeedMove(CMatchFinder *p)
++{
++  if (p->directInput)
++    return 0;
++  /* if (p->streamEndWasReached) return 0; */
++  return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
++}
++
++void MatchFinder_ReadIfRequired(CMatchFinder *p)
++{
++  if (p->streamEndWasReached)
++    return;
++  if (p->keepSizeAfter >= p->streamPos - p->pos)
++    MatchFinder_ReadBlock(p);
++}
++
++static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
++{
++  if (MatchFinder_NeedMove(p))
++    MatchFinder_MoveBlock(p);
++  MatchFinder_ReadBlock(p);
++}
++
++static void MatchFinder_SetDefaultSettings(CMatchFinder *p)
++{
++  p->cutValue = 32;
++  p->btMode = 1;
++  p->numHashBytes = 4;
++  p->bigHash = 0;
++}
++
++#define kCrcPoly 0xEDB88320
++
++void MatchFinder_Construct(CMatchFinder *p)
++{
++  UInt32 i;
++  p->bufferBase = 0;
++  p->directInput = 0;
++  p->hash = 0;
++  MatchFinder_SetDefaultSettings(p);
++
++  for (i = 0; i < 256; i++)
++  {
++    UInt32 r = i;
++    int j;
++    for (j = 0; j < 8; j++)
++      r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1));
++    p->crc[i] = r;
++  }
++}
++
++static void MatchFinder_FreeThisClassMemory(CMatchFinder *p, ISzAlloc *alloc)
++{
++  alloc->Free(alloc, p->hash);
++  p->hash = 0;
++}
++
++void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc)
++{
++  MatchFinder_FreeThisClassMemory(p, alloc);
++  LzInWindow_Free(p, alloc);
++}
++
++static CLzRef* AllocRefs(UInt32 num, ISzAlloc *alloc)
++{
++  size_t sizeInBytes = (size_t)num * sizeof(CLzRef);
++  if (sizeInBytes / sizeof(CLzRef) != num)
++    return 0;
++  return (CLzRef *)alloc->Alloc(alloc, sizeInBytes);
++}
++
++int MatchFinder_Create(CMatchFinder *p, UInt32 historySize,
++    UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
++    ISzAlloc *alloc)
++{
++  UInt32 sizeReserv;
++  if (historySize > kMaxHistorySize)
++  {
++    MatchFinder_Free(p, alloc);
++    return 0;
++  }
++  sizeReserv = historySize >> 1;
++  if (historySize > ((UInt32)2 << 30))
++    sizeReserv = historySize >> 2;
++  sizeReserv += (keepAddBufferBefore + matchMaxLen + keepAddBufferAfter) / 2 + (1 << 19);
++
++  p->keepSizeBefore = historySize + keepAddBufferBefore + 1;
++  p->keepSizeAfter = matchMaxLen + keepAddBufferAfter;
++  /* we need one additional byte, since we use MoveBlock after pos++ and before dictionary using */
++  if (LzInWindow_Create(p, sizeReserv, alloc))
++  {
++    UInt32 newCyclicBufferSize = historySize + 1;
++    UInt32 hs;
++    p->matchMaxLen = matchMaxLen;
++    {
++      p->fixedHashSize = 0;
++      if (p->numHashBytes == 2)
++        hs = (1 << 16) - 1;
++      else
++      {
++        hs = historySize - 1;
++        hs |= (hs >> 1);
++        hs |= (hs >> 2);
++        hs |= (hs >> 4);
++        hs |= (hs >> 8);
++        hs >>= 1;
++        hs |= 0xFFFF; /* don't change it! It's required for Deflate */
++        if (hs > (1 << 24))
++        {
++          if (p->numHashBytes == 3)
++            hs = (1 << 24) - 1;
++          else
++            hs >>= 1;
++        }
++      }
++      p->hashMask = hs;
++      hs++;
++      if (p->numHashBytes > 2) p->fixedHashSize += kHash2Size;
++      if (p->numHashBytes > 3) p->fixedHashSize += kHash3Size;
++      if (p->numHashBytes > 4) p->fixedHashSize += kHash4Size;
++      hs += p->fixedHashSize;
++    }
++
++    {
++      UInt32 prevSize = p->hashSizeSum + p->numSons;
++      UInt32 newSize;
++      p->historySize = historySize;
++      p->hashSizeSum = hs;
++      p->cyclicBufferSize = newCyclicBufferSize;
++      p->numSons = (p->btMode ? newCyclicBufferSize * 2 : newCyclicBufferSize);
++      newSize = p->hashSizeSum + p->numSons;
++      if (p->hash != 0 && prevSize == newSize)
++        return 1;
++      MatchFinder_FreeThisClassMemory(p, alloc);
++      p->hash = AllocRefs(newSize, alloc);
++      if (p->hash != 0)
++      {
++        p->son = p->hash + p->hashSizeSum;
++        return 1;
++      }
++    }
++  }
++  MatchFinder_Free(p, alloc);
++  return 0;
++}
++
++static void MatchFinder_SetLimits(CMatchFinder *p)
++{
++  UInt32 limit = kMaxValForNormalize - p->pos;
++  UInt32 limit2 = p->cyclicBufferSize - p->cyclicBufferPos;
++  if (limit2 < limit)
++    limit = limit2;
++  limit2 = p->streamPos - p->pos;
++  if (limit2 <= p->keepSizeAfter)
++  {
++    if (limit2 > 0)
++      limit2 = 1;
++  }
++  else
++    limit2 -= p->keepSizeAfter;
++  if (limit2 < limit)
++    limit = limit2;
++  {
++    UInt32 lenLimit = p->streamPos - p->pos;
++    if (lenLimit > p->matchMaxLen)
++      lenLimit = p->matchMaxLen;
++    p->lenLimit = lenLimit;
++  }
++  p->posLimit = p->pos + limit;
++}
++
++void MatchFinder_Init(CMatchFinder *p)
++{
++  UInt32 i;
++  for (i = 0; i < p->hashSizeSum; i++)
++    p->hash[i] = kEmptyHashValue;
++  p->cyclicBufferPos = 0;
++  p->buffer = p->bufferBase;
++  p->pos = p->streamPos = p->cyclicBufferSize;
++  p->result = SZ_OK;
++  p->streamEndWasReached = 0;
++  MatchFinder_ReadBlock(p);
++  MatchFinder_SetLimits(p);
++}
++
++static UInt32 MatchFinder_GetSubValue(CMatchFinder *p)
++{
++  return (p->pos - p->historySize - 1) & kNormalizeMask;
++}
++
++void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
++{
++  UInt32 i;
++  for (i = 0; i < numItems; i++)
++  {
++    UInt32 value = items[i];
++    if (value <= subValue)
++      value = kEmptyHashValue;
++    else
++      value -= subValue;
++    items[i] = value;
++  }
++}
++
++static void MatchFinder_Normalize(CMatchFinder *p)
++{
++  UInt32 subValue = MatchFinder_GetSubValue(p);
++  MatchFinder_Normalize3(subValue, p->hash, p->hashSizeSum + p->numSons);
++  MatchFinder_ReduceOffsets(p, subValue);
++}
++
++static void MatchFinder_CheckLimits(CMatchFinder *p)
++{
++  if (p->pos == kMaxValForNormalize)
++    MatchFinder_Normalize(p);
++  if (!p->streamEndWasReached && p->keepSizeAfter == p->streamPos - p->pos)
++    MatchFinder_CheckAndMoveAndRead(p);
++  if (p->cyclicBufferPos == p->cyclicBufferSize)
++    p->cyclicBufferPos = 0;
++  MatchFinder_SetLimits(p);
++}
++
++static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
++    UInt32 *distances, UInt32 maxLen)
++{
++  son[_cyclicBufferPos] = curMatch;
++  for (;;)
++  {
++    UInt32 delta = pos - curMatch;
++    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
++      return distances;
++    {
++      const Byte *pb = cur - delta;
++      curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
++      if (pb[maxLen] == cur[maxLen] && *pb == *cur)
++      {
++        UInt32 len = 0;
++        while (++len != lenLimit)
++          if (pb[len] != cur[len])
++            break;
++        if (maxLen < len)
++        {
++          *distances++ = maxLen = len;
++          *distances++ = delta - 1;
++          if (len == lenLimit)
++            return distances;
++        }
++      }
++    }
++  }
++}
++
++UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
++    UInt32 *distances, UInt32 maxLen)
++{
++  CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
++  CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
++  UInt32 len0 = 0, len1 = 0;
++  for (;;)
++  {
++    UInt32 delta = pos - curMatch;
++    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
++    {
++      *ptr0 = *ptr1 = kEmptyHashValue;
++      return distances;
++    }
++    {
++      CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
++      const Byte *pb = cur - delta;
++      UInt32 len = (len0 < len1 ? len0 : len1);
++      if (pb[len] == cur[len])
++      {
++        if (++len != lenLimit && pb[len] == cur[len])
++          while (++len != lenLimit)
++            if (pb[len] != cur[len])
++              break;
++        if (maxLen < len)
++        {
++          *distances++ = maxLen = len;
++          *distances++ = delta - 1;
++          if (len == lenLimit)
++          {
++            *ptr1 = pair[0];
++            *ptr0 = pair[1];
++            return distances;
++          }
++        }
++      }
++      if (pb[len] < cur[len])
++      {
++        *ptr1 = curMatch;
++        ptr1 = pair + 1;
++        curMatch = *ptr1;
++        len1 = len;
++      }
++      else
++      {
++        *ptr0 = curMatch;
++        ptr0 = pair;
++        curMatch = *ptr0;
++        len0 = len;
++      }
++    }
++  }
++}
++
++static void SkipMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
++    UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue)
++{
++  CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
++  CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
++  UInt32 len0 = 0, len1 = 0;
++  for (;;)
++  {
++    UInt32 delta = pos - curMatch;
++    if (cutValue-- == 0 || delta >= _cyclicBufferSize)
++    {
++      *ptr0 = *ptr1 = kEmptyHashValue;
++      return;
++    }
++    {
++      CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
++      const Byte *pb = cur - delta;
++      UInt32 len = (len0 < len1 ? len0 : len1);
++      if (pb[len] == cur[len])
++      {
++        while (++len != lenLimit)
++          if (pb[len] != cur[len])
++            break;
++        {
++          if (len == lenLimit)
++          {
++            *ptr1 = pair[0];
++            *ptr0 = pair[1];
++            return;
++          }
++        }
++      }
++      if (pb[len] < cur[len])
++      {
++        *ptr1 = curMatch;
++        ptr1 = pair + 1;
++        curMatch = *ptr1;
++        len1 = len;
++      }
++      else
++      {
++        *ptr0 = curMatch;
++        ptr0 = pair;
++        curMatch = *ptr0;
++        len0 = len;
++      }
++    }
++  }
++}
++
++#define MOVE_POS \
++  ++p->cyclicBufferPos; \
++  p->buffer++; \
++  if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
++
++#define MOVE_POS_RET MOVE_POS return offset;
++
++static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
++
++#define GET_MATCHES_HEADER2(minLen, ret_op) \
++  UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
++  lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
++  cur = p->buffer;
++
++#define GET_MATCHES_HEADER(minLen) GET_MATCHES_HEADER2(minLen, return 0)
++#define SKIP_HEADER(minLen)        GET_MATCHES_HEADER2(minLen, continue)
++
++#define MF_PARAMS(p) p->pos, p->buffer, p->son, p->cyclicBufferPos, p->cyclicBufferSize, p->cutValue
++
++#define GET_MATCHES_FOOTER(offset, maxLen) \
++  offset = (UInt32)(GetMatchesSpec1(lenLimit, curMatch, MF_PARAMS(p), \
++  distances + offset, maxLen) - distances); MOVE_POS_RET;
++
++#define SKIP_FOOTER \
++  SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
++
++static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++{
++  UInt32 offset;
++  GET_MATCHES_HEADER(2)
++  HASH2_CALC;
++  curMatch = p->hash[hashValue];
++  p->hash[hashValue] = p->pos;
++  offset = 0;
++  GET_MATCHES_FOOTER(offset, 1)
++}
++
++UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++{
++  UInt32 offset;
++  GET_MATCHES_HEADER(3)
++  HASH_ZIP_CALC;
++  curMatch = p->hash[hashValue];
++  p->hash[hashValue] = p->pos;
++  offset = 0;
++  GET_MATCHES_FOOTER(offset, 2)
++}
++
++static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++{
++  UInt32 hash2Value, delta2, maxLen, offset;
++  GET_MATCHES_HEADER(3)
++
++  HASH3_CALC;
++
++  delta2 = p->pos - p->hash[hash2Value];
++  curMatch = p->hash[kFix3HashSize + hashValue];
++
++  p->hash[hash2Value] =
++  p->hash[kFix3HashSize + hashValue] = p->pos;
++
++
++  maxLen = 2;
++  offset = 0;
++  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
++  {
++    for (; maxLen != lenLimit; maxLen++)
++      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
++        break;
++    distances[0] = maxLen;
++    distances[1] = delta2 - 1;
++    offset = 2;
++    if (maxLen == lenLimit)
++    {
++      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
++      MOVE_POS_RET;
++    }
++  }
++  GET_MATCHES_FOOTER(offset, maxLen)
++}
++
++static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++{
++  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
++  GET_MATCHES_HEADER(4)
++
++  HASH4_CALC;
++
++  delta2 = p->pos - p->hash[                hash2Value];
++  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
++  curMatch = p->hash[kFix4HashSize + hashValue];
++
++  p->hash[                hash2Value] =
++  p->hash[kFix3HashSize + hash3Value] =
++  p->hash[kFix4HashSize + hashValue] = p->pos;
++
++  maxLen = 1;
++  offset = 0;
++  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
++  {
++    distances[0] = maxLen = 2;
++    distances[1] = delta2 - 1;
++    offset = 2;
++  }
++  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
++  {
++    maxLen = 3;
++    distances[offset + 1] = delta3 - 1;
++    offset += 2;
++    delta2 = delta3;
++  }
++  if (offset != 0)
++  {
++    for (; maxLen != lenLimit; maxLen++)
++      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
++        break;
++    distances[offset - 2] = maxLen;
++    if (maxLen == lenLimit)
++    {
++      SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
++      MOVE_POS_RET;
++    }
++  }
++  if (maxLen < 3)
++    maxLen = 3;
++  GET_MATCHES_FOOTER(offset, maxLen)
++}
++
++static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++{
++  UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
++  GET_MATCHES_HEADER(4)
++
++  HASH4_CALC;
++
++  delta2 = p->pos - p->hash[                hash2Value];
++  delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
++  curMatch = p->hash[kFix4HashSize + hashValue];
++
++  p->hash[                hash2Value] =
++  p->hash[kFix3HashSize + hash3Value] =
++  p->hash[kFix4HashSize + hashValue] = p->pos;
++
++  maxLen = 1;
++  offset = 0;
++  if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
++  {
++    distances[0] = maxLen = 2;
++    distances[1] = delta2 - 1;
++    offset = 2;
++  }
++  if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
++  {
++    maxLen = 3;
++    distances[offset + 1] = delta3 - 1;
++    offset += 2;
++    delta2 = delta3;
++  }
++  if (offset != 0)
++  {
++    for (; maxLen != lenLimit; maxLen++)
++      if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
++        break;
++    distances[offset - 2] = maxLen;
++    if (maxLen == lenLimit)
++    {
++      p->son[p->cyclicBufferPos] = curMatch;
++      MOVE_POS_RET;
++    }
++  }
++  if (maxLen < 3)
++    maxLen = 3;
++  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
++    distances + offset, maxLen) - (distances));
++  MOVE_POS_RET
++}
++
++UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
++{
++  UInt32 offset;
++  GET_MATCHES_HEADER(3)
++  HASH_ZIP_CALC;
++  curMatch = p->hash[hashValue];
++  p->hash[hashValue] = p->pos;
++  offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
++    distances, 2) - (distances));
++  MOVE_POS_RET
++}
++
++static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++{
++  do
++  {
++    SKIP_HEADER(2)
++    HASH2_CALC;
++    curMatch = p->hash[hashValue];
++    p->hash[hashValue] = p->pos;
++    SKIP_FOOTER
++  }
++  while (--num != 0);
++}
++
++void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++{
++  do
++  {
++    SKIP_HEADER(3)
++    HASH_ZIP_CALC;
++    curMatch = p->hash[hashValue];
++    p->hash[hashValue] = p->pos;
++    SKIP_FOOTER
++  }
++  while (--num != 0);
++}
++
++static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++{
++  do
++  {
++    UInt32 hash2Value;
++    SKIP_HEADER(3)
++    HASH3_CALC;
++    curMatch = p->hash[kFix3HashSize + hashValue];
++    p->hash[hash2Value] =
++    p->hash[kFix3HashSize + hashValue] = p->pos;
++    SKIP_FOOTER
++  }
++  while (--num != 0);
++}
++
++static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++{
++  do
++  {
++    UInt32 hash2Value, hash3Value;
++    SKIP_HEADER(4)
++    HASH4_CALC;
++    curMatch = p->hash[kFix4HashSize + hashValue];
++    p->hash[                hash2Value] =
++    p->hash[kFix3HashSize + hash3Value] = p->pos;
++    p->hash[kFix4HashSize + hashValue] = p->pos;
++    SKIP_FOOTER
++  }
++  while (--num != 0);
++}
++
++static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++{
++  do
++  {
++    UInt32 hash2Value, hash3Value;
++    SKIP_HEADER(4)
++    HASH4_CALC;
++    curMatch = p->hash[kFix4HashSize + hashValue];
++    p->hash[                hash2Value] =
++    p->hash[kFix3HashSize + hash3Value] =
++    p->hash[kFix4HashSize + hashValue] = p->pos;
++    p->son[p->cyclicBufferPos] = curMatch;
++    MOVE_POS
++  }
++  while (--num != 0);
++}
++
++void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
++{
++  do
++  {
++    SKIP_HEADER(3)
++    HASH_ZIP_CALC;
++    curMatch = p->hash[hashValue];
++    p->hash[hashValue] = p->pos;
++    p->son[p->cyclicBufferPos] = curMatch;
++    MOVE_POS
++  }
++  while (--num != 0);
++}
++
++void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
++{
++  vTable->Init = (Mf_Init_Func)MatchFinder_Init;
++  vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
++  vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
++  vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
++  if (!p->btMode)
++  {
++    vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
++    vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
++  }
++  else if (p->numHashBytes == 2)
++  {
++    vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
++    vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
++  }
++  else if (p->numHashBytes == 3)
++  {
++    vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
++    vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
++  }
++  else
++  {
++    vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
++    vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
++  }
++}
+--- /dev/null
++++ b/lib/lzma/LzmaDec.c
+@@ -0,0 +1,999 @@
++/* LzmaDec.c -- LZMA Decoder
++2009-09-20 : Igor Pavlov : Public domain */
++
++#include "LzmaDec.h"
++
++#include <string.h>
++
++#define kNumTopBits 24
++#define kTopValue ((UInt32)1 << kNumTopBits)
++
++#define kNumBitModelTotalBits 11
++#define kBitModelTotal (1 << kNumBitModelTotalBits)
++#define kNumMoveBits 5
++
++#define RC_INIT_SIZE 5
++
++#define NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | (*buf++); }
++
++#define IF_BIT_0(p) ttt = *(p); NORMALIZE; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound)
++#define UPDATE_0(p) range = bound; *(p) = (CLzmaProb)(ttt + ((kBitModelTotal - ttt) >> kNumMoveBits));
++#define UPDATE_1(p) range -= bound; code -= bound; *(p) = (CLzmaProb)(ttt - (ttt >> kNumMoveBits));
++#define GET_BIT2(p, i, A0, A1) IF_BIT_0(p) \
++  { UPDATE_0(p); i = (i + i); A0; } else \
++  { UPDATE_1(p); i = (i + i) + 1; A1; }
++#define GET_BIT(p, i) GET_BIT2(p, i, ; , ;)
++
++#define TREE_GET_BIT(probs, i) { GET_BIT((probs + i), i); }
++#define TREE_DECODE(probs, limit, i) \
++  { i = 1; do { TREE_GET_BIT(probs, i); } while (i < limit); i -= limit; }
++
++/* #define _LZMA_SIZE_OPT */
++
++#ifdef _LZMA_SIZE_OPT
++#define TREE_6_DECODE(probs, i) TREE_DECODE(probs, (1 << 6), i)
++#else
++#define TREE_6_DECODE(probs, i) \
++  { i = 1; \
++  TREE_GET_BIT(probs, i); \
++  TREE_GET_BIT(probs, i); \
++  TREE_GET_BIT(probs, i); \
++  TREE_GET_BIT(probs, i); \
++  TREE_GET_BIT(probs, i); \
++  TREE_GET_BIT(probs, i); \
++  i -= 0x40; }
++#endif
++
++#define NORMALIZE_CHECK if (range < kTopValue) { if (buf >= bufLimit) return DUMMY_ERROR; range <<= 8; code = (code << 8) | (*buf++); }
++
++#define IF_BIT_0_CHECK(p) ttt = *(p); NORMALIZE_CHECK; bound = (range >> kNumBitModelTotalBits) * ttt; if (code < bound)
++#define UPDATE_0_CHECK range = bound;
++#define UPDATE_1_CHECK range -= bound; code -= bound;
++#define GET_BIT2_CHECK(p, i, A0, A1) IF_BIT_0_CHECK(p) \
++  { UPDATE_0_CHECK; i = (i + i); A0; } else \
++  { UPDATE_1_CHECK; i = (i + i) + 1; A1; }
++#define GET_BIT_CHECK(p, i) GET_BIT2_CHECK(p, i, ; , ;)
++#define TREE_DECODE_CHECK(probs, limit, i) \
++  { i = 1; do { GET_BIT_CHECK(probs + i, i) } while (i < limit); i -= limit; }
++
++
++#define kNumPosBitsMax 4
++#define kNumPosStatesMax (1 << kNumPosBitsMax)
++
++#define kLenNumLowBits 3
++#define kLenNumLowSymbols (1 << kLenNumLowBits)
++#define kLenNumMidBits 3
++#define kLenNumMidSymbols (1 << kLenNumMidBits)
++#define kLenNumHighBits 8
++#define kLenNumHighSymbols (1 << kLenNumHighBits)
++
++#define LenChoice 0
++#define LenChoice2 (LenChoice + 1)
++#define LenLow (LenChoice2 + 1)
++#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
++#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
++#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
++
++
++#define kNumStates 12
++#define kNumLitStates 7
++
++#define kStartPosModelIndex 4
++#define kEndPosModelIndex 14
++#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
++
++#define kNumPosSlotBits 6
++#define kNumLenToPosStates 4
++
++#define kNumAlignBits 4
++#define kAlignTableSize (1 << kNumAlignBits)
++
++#define kMatchMinLen 2
++#define kMatchSpecLenStart (kMatchMinLen + kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols)
++
++#define IsMatch 0
++#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
++#define IsRepG0 (IsRep + kNumStates)
++#define IsRepG1 (IsRepG0 + kNumStates)
++#define IsRepG2 (IsRepG1 + kNumStates)
++#define IsRep0Long (IsRepG2 + kNumStates)
++#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
++#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
++#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
++#define LenCoder (Align + kAlignTableSize)
++#define RepLenCoder (LenCoder + kNumLenProbs)
++#define Literal (RepLenCoder + kNumLenProbs)
++
++#define LZMA_BASE_SIZE 1846
++#define LZMA_LIT_SIZE 768
++
++#define LzmaProps_GetNumProbs(p) ((UInt32)LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((p)->lc + (p)->lp)))
++
++#if Literal != LZMA_BASE_SIZE
++StopCompilingDueBUG
++#endif
++
++#define LZMA_DIC_MIN (1 << 12)
++
++/* First LZMA-symbol is always decoded.
++And it decodes new LZMA-symbols while (buf < bufLimit), but "buf" is without last normalization
++Out:
++  Result:
++    SZ_OK - OK
++    SZ_ERROR_DATA - Error
++  p->remainLen:
++    < kMatchSpecLenStart : normal remain
++    = kMatchSpecLenStart : finished
++    = kMatchSpecLenStart + 1 : Flush marker
++    = kMatchSpecLenStart + 2 : State Init Marker
++*/
++
++static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte *bufLimit)
++{
++  CLzmaProb *probs = p->probs;
++
++  unsigned state = p->state;
++  UInt32 rep0 = p->reps[0], rep1 = p->reps[1], rep2 = p->reps[2], rep3 = p->reps[3];
++  unsigned pbMask = ((unsigned)1 << (p->prop.pb)) - 1;
++  unsigned lpMask = ((unsigned)1 << (p->prop.lp)) - 1;
++  unsigned lc = p->prop.lc;
++
++  Byte *dic = p->dic;
++  SizeT dicBufSize = p->dicBufSize;
++  SizeT dicPos = p->dicPos;
++
++  UInt32 processedPos = p->processedPos;
++  UInt32 checkDicSize = p->checkDicSize;
++  unsigned len = 0;
++
++  const Byte *buf = p->buf;
++  UInt32 range = p->range;
++  UInt32 code = p->code;
++
++  do
++  {
++    CLzmaProb *prob;
++    UInt32 bound;
++    unsigned ttt;
++    unsigned posState = processedPos & pbMask;
++
++    prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
++    IF_BIT_0(prob)
++    {
++      unsigned symbol;
++      UPDATE_0(prob);
++      prob = probs + Literal;
++      if (checkDicSize != 0 || processedPos != 0)
++        prob += (LZMA_LIT_SIZE * (((processedPos & lpMask) << lc) +
++        (dic[(dicPos == 0 ? dicBufSize : dicPos) - 1] >> (8 - lc))));
++
++      if (state < kNumLitStates)
++      {
++        state -= (state < 4) ? state : 3;
++        symbol = 1;
++        do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100);
++      }
++      else
++      {
++        unsigned matchByte = p->dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
++        unsigned offs = 0x100;
++        state -= (state < 10) ? 3 : 6;
++        symbol = 1;
++        do
++        {
++          unsigned bit;
++          CLzmaProb *probLit;
++          matchByte <<= 1;
++          bit = (matchByte & offs);
++          probLit = prob + offs + bit + symbol;
++          GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit)
++        }
++        while (symbol < 0x100);
++      }
++      dic[dicPos++] = (Byte)symbol;
++      processedPos++;
++      continue;
++    }
++    else
++    {
++      UPDATE_1(prob);
++      prob = probs + IsRep + state;
++      IF_BIT_0(prob)
++      {
++        UPDATE_0(prob);
++        state += kNumStates;
++        prob = probs + LenCoder;
++      }
++      else
++      {
++        UPDATE_1(prob);
++        if (checkDicSize == 0 && processedPos == 0)
++          return SZ_ERROR_DATA;
++        prob = probs + IsRepG0 + state;
++        IF_BIT_0(prob)
++        {
++          UPDATE_0(prob);
++          prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
++          IF_BIT_0(prob)
++          {
++            UPDATE_0(prob);
++            dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
++            dicPos++;
++            processedPos++;
++            state = state < kNumLitStates ? 9 : 11;
++            continue;
++          }
++          UPDATE_1(prob);
++        }
++        else
++        {
++          UInt32 distance;
++          UPDATE_1(prob);
++          prob = probs + IsRepG1 + state;
++          IF_BIT_0(prob)
++          {
++            UPDATE_0(prob);
++            distance = rep1;
++          }
++          else
++          {
++            UPDATE_1(prob);
++            prob = probs + IsRepG2 + state;
++            IF_BIT_0(prob)
++            {
++              UPDATE_0(prob);
++              distance = rep2;
++            }
++            else
++            {
++              UPDATE_1(prob);
++              distance = rep3;
++              rep3 = rep2;
++            }
++            rep2 = rep1;
++          }
++          rep1 = rep0;
++          rep0 = distance;
++        }
++        state = state < kNumLitStates ? 8 : 11;
++        prob = probs + RepLenCoder;
++      }
++      {
++        unsigned limit, offset;
++        CLzmaProb *probLen = prob + LenChoice;
++        IF_BIT_0(probLen)
++        {
++          UPDATE_0(probLen);
++          probLen = prob + LenLow + (posState << kLenNumLowBits);
++          offset = 0;
++          limit = (1 << kLenNumLowBits);
++        }
++        else
++        {
++          UPDATE_1(probLen);
++          probLen = prob + LenChoice2;
++          IF_BIT_0(probLen)
++          {
++            UPDATE_0(probLen);
++            probLen = prob + LenMid + (posState << kLenNumMidBits);
++            offset = kLenNumLowSymbols;
++            limit = (1 << kLenNumMidBits);
++          }
++          else
++          {
++            UPDATE_1(probLen);
++            probLen = prob + LenHigh;
++            offset = kLenNumLowSymbols + kLenNumMidSymbols;
++            limit = (1 << kLenNumHighBits);
++          }
++        }
++        TREE_DECODE(probLen, limit, len);
++        len += offset;
++      }
++
++      if (state >= kNumStates)
++      {
++        UInt32 distance;
++        prob = probs + PosSlot +
++            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << kNumPosSlotBits);
++        TREE_6_DECODE(prob, distance);
++        if (distance >= kStartPosModelIndex)
++        {
++          unsigned posSlot = (unsigned)distance;
++          int numDirectBits = (int)(((distance >> 1) - 1));
++          distance = (2 | (distance & 1));
++          if (posSlot < kEndPosModelIndex)
++          {
++            distance <<= numDirectBits;
++            prob = probs + SpecPos + distance - posSlot - 1;
++            {
++              UInt32 mask = 1;
++              unsigned i = 1;
++              do
++              {
++                GET_BIT2(prob + i, i, ; , distance |= mask);
++                mask <<= 1;
++              }
++              while (--numDirectBits != 0);
++            }
++          }
++          else
++          {
++            numDirectBits -= kNumAlignBits;
++            do
++            {
++              NORMALIZE
++              range >>= 1;
++
++              {
++                UInt32 t;
++                code -= range;
++                t = (0 - ((UInt32)code >> 31)); /* (UInt32)((Int32)code >> 31) */
++                distance = (distance << 1) + (t + 1);
++                code += range & t;
++              }
++              /*
++              distance <<= 1;
++              if (code >= range)
++              {
++                code -= range;
++                distance |= 1;
++              }
++              */
++            }
++            while (--numDirectBits != 0);
++            prob = probs + Align;
++            distance <<= kNumAlignBits;
++            {
++              unsigned i = 1;
++              GET_BIT2(prob + i, i, ; , distance |= 1);
++              GET_BIT2(prob + i, i, ; , distance |= 2);
++              GET_BIT2(prob + i, i, ; , distance |= 4);
++              GET_BIT2(prob + i, i, ; , distance |= 8);
++            }
++            if (distance == (UInt32)0xFFFFFFFF)
++            {
++              len += kMatchSpecLenStart;
++              state -= kNumStates;
++              break;
++            }
++          }
++        }
++        rep3 = rep2;
++        rep2 = rep1;
++        rep1 = rep0;
++        rep0 = distance + 1;
++        if (checkDicSize == 0)
++        {
++          if (distance >= processedPos)
++            return SZ_ERROR_DATA;
++        }
++        else if (distance >= checkDicSize)
++          return SZ_ERROR_DATA;
++        state = (state < kNumStates + kNumLitStates) ? kNumLitStates : kNumLitStates + 3;
++      }
++
++      len += kMatchMinLen;
++
++      if (limit == dicPos)
++        return SZ_ERROR_DATA;
++      {
++        SizeT rem = limit - dicPos;
++        unsigned curLen = ((rem < len) ? (unsigned)rem : len);
++        SizeT pos = (dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0);
++
++        processedPos += curLen;
++
++        len -= curLen;
++        if (pos + curLen <= dicBufSize)
++        {
++          Byte *dest = dic + dicPos;
++          ptrdiff_t src = (ptrdiff_t)pos - (ptrdiff_t)dicPos;
++          const Byte *lim = dest + curLen;
++          dicPos += curLen;
++          do
++            *(dest) = (Byte)*(dest + src);
++          while (++dest != lim);
++        }
++        else
++        {
++          do
++          {
++            dic[dicPos++] = dic[pos];
++            if (++pos == dicBufSize)
++              pos = 0;
++          }
++          while (--curLen != 0);
++        }
++      }
++    }
++  }
++  while (dicPos < limit && buf < bufLimit);
++  NORMALIZE;
++  p->buf = buf;
++  p->range = range;
++  p->code = code;
++  p->remainLen = len;
++  p->dicPos = dicPos;
++  p->processedPos = processedPos;
++  p->reps[0] = rep0;
++  p->reps[1] = rep1;
++  p->reps[2] = rep2;
++  p->reps[3] = rep3;
++  p->state = state;
++
++  return SZ_OK;
++}
++
++static void MY_FAST_CALL LzmaDec_WriteRem(CLzmaDec *p, SizeT limit)
++{
++  if (p->remainLen != 0 && p->remainLen < kMatchSpecLenStart)
++  {
++    Byte *dic = p->dic;
++    SizeT dicPos = p->dicPos;
++    SizeT dicBufSize = p->dicBufSize;
++    unsigned len = p->remainLen;
++    UInt32 rep0 = p->reps[0];
++    if (limit - dicPos < len)
++      len = (unsigned)(limit - dicPos);
++
++    if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= len)
++      p->checkDicSize = p->prop.dicSize;
++
++    p->processedPos += len;
++    p->remainLen -= len;
++    while (len-- != 0)
++    {
++      dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
++      dicPos++;
++    }
++    p->dicPos = dicPos;
++  }
++}
++
++static int MY_FAST_CALL LzmaDec_DecodeReal2(CLzmaDec *p, SizeT limit, const Byte *bufLimit)
++{
++  do
++  {
++    SizeT limit2 = limit;
++    if (p->checkDicSize == 0)
++    {
++      UInt32 rem = p->prop.dicSize - p->processedPos;
++      if (limit - p->dicPos > rem)
++        limit2 = p->dicPos + rem;
++    }
++    RINOK(LzmaDec_DecodeReal(p, limit2, bufLimit));
++    if (p->processedPos >= p->prop.dicSize)
++      p->checkDicSize = p->prop.dicSize;
++    LzmaDec_WriteRem(p, limit);
++  }
++  while (p->dicPos < limit && p->buf < bufLimit && p->remainLen < kMatchSpecLenStart);
++
++  if (p->remainLen > kMatchSpecLenStart)
++  {
++    p->remainLen = kMatchSpecLenStart;
++  }
++  return 0;
++}
++
++typedef enum
++{
++  DUMMY_ERROR, /* unexpected end of input stream */
++  DUMMY_LIT,
++  DUMMY_MATCH,
++  DUMMY_REP
++} ELzmaDummy;
++
++static ELzmaDummy LzmaDec_TryDummy(const CLzmaDec *p, const Byte *buf, SizeT inSize)
++{
++  UInt32 range = p->range;
++  UInt32 code = p->code;
++  const Byte *bufLimit = buf + inSize;
++  CLzmaProb *probs = p->probs;
++  unsigned state = p->state;
++  ELzmaDummy res;
++
++  {
++    CLzmaProb *prob;
++    UInt32 bound;
++    unsigned ttt;
++    unsigned posState = (p->processedPos) & ((1 << p->prop.pb) - 1);
++
++    prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
++    IF_BIT_0_CHECK(prob)
++    {
++      UPDATE_0_CHECK
++
++      /* if (bufLimit - buf >= 7) return DUMMY_LIT; */
++
++      prob = probs + Literal;
++      if (p->checkDicSize != 0 || p->processedPos != 0)
++        prob += (LZMA_LIT_SIZE *
++          ((((p->processedPos) & ((1 << (p->prop.lp)) - 1)) << p->prop.lc) +
++          (p->dic[(p->dicPos == 0 ? p->dicBufSize : p->dicPos) - 1] >> (8 - p->prop.lc))));
++
++      if (state < kNumLitStates)
++      {
++        unsigned symbol = 1;
++        do { GET_BIT_CHECK(prob + symbol, symbol) } while (symbol < 0x100);
++      }
++      else
++      {
++        unsigned matchByte = p->dic[p->dicPos - p->reps[0] +
++            ((p->dicPos < p->reps[0]) ? p->dicBufSize : 0)];
++        unsigned offs = 0x100;
++        unsigned symbol = 1;
++        do
++        {
++          unsigned bit;
++          CLzmaProb *probLit;
++          matchByte <<= 1;
++          bit = (matchByte & offs);
++          probLit = prob + offs + bit + symbol;
++          GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit)
++        }
++        while (symbol < 0x100);
++      }
++      res = DUMMY_LIT;
++    }
++    else
++    {
++      unsigned len;
++      UPDATE_1_CHECK;
++
++      prob = probs + IsRep + state;
++      IF_BIT_0_CHECK(prob)
++      {
++        UPDATE_0_CHECK;
++        state = 0;
++        prob = probs + LenCoder;
++        res = DUMMY_MATCH;
++      }
++      else
++      {
++        UPDATE_1_CHECK;
++        res = DUMMY_REP;
++        prob = probs + IsRepG0 + state;
++        IF_BIT_0_CHECK(prob)
++        {
++          UPDATE_0_CHECK;
++          prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
++          IF_BIT_0_CHECK(prob)
++          {
++            UPDATE_0_CHECK;
++            NORMALIZE_CHECK;
++            return DUMMY_REP;
++          }
++          else
++          {
++            UPDATE_1_CHECK;
++          }
++        }
++        else
++        {
++          UPDATE_1_CHECK;
++          prob = probs + IsRepG1 + state;
++          IF_BIT_0_CHECK(prob)
++          {
++            UPDATE_0_CHECK;
++          }
++          else
++          {
++            UPDATE_1_CHECK;
++            prob = probs + IsRepG2 + state;
++            IF_BIT_0_CHECK(prob)
++            {
++              UPDATE_0_CHECK;
++            }
++            else
++            {
++              UPDATE_1_CHECK;
++            }
++          }
++        }
++        state = kNumStates;
++        prob = probs + RepLenCoder;
++      }
++      {
++        unsigned limit, offset;
++        CLzmaProb *probLen = prob + LenChoice;
++        IF_BIT_0_CHECK(probLen)
++        {
++          UPDATE_0_CHECK;
++          probLen = prob + LenLow + (posState << kLenNumLowBits);
++          offset = 0;
++          limit = 1 << kLenNumLowBits;
++        }
++        else
++        {
++          UPDATE_1_CHECK;
++          probLen = prob + LenChoice2;
++          IF_BIT_0_CHECK(probLen)
++          {
++            UPDATE_0_CHECK;
++            probLen = prob + LenMid + (posState << kLenNumMidBits);
++            offset = kLenNumLowSymbols;
++            limit = 1 << kLenNumMidBits;
++          }
++          else
++          {
++            UPDATE_1_CHECK;
++            probLen = prob + LenHigh;
++            offset = kLenNumLowSymbols + kLenNumMidSymbols;
++            limit = 1 << kLenNumHighBits;
++          }
++        }
++        TREE_DECODE_CHECK(probLen, limit, len);
++        len += offset;
++      }
++
++      if (state < 4)
++      {
++        unsigned posSlot;
++        prob = probs + PosSlot +
++            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
++            kNumPosSlotBits);
++        TREE_DECODE_CHECK(prob, 1 << kNumPosSlotBits, posSlot);
++        if (posSlot >= kStartPosModelIndex)
++        {
++          int numDirectBits = ((posSlot >> 1) - 1);
++
++          /* if (bufLimit - buf >= 8) return DUMMY_MATCH; */
++
++          if (posSlot < kEndPosModelIndex)
++          {
++            prob = probs + SpecPos + ((2 | (posSlot & 1)) << numDirectBits) - posSlot - 1;
++          }
++          else
++          {
++            numDirectBits -= kNumAlignBits;
++            do
++            {
++              NORMALIZE_CHECK
++              range >>= 1;
++              code -= range & (((code - range) >> 31) - 1);
++              /* if (code >= range) code -= range; */
++            }
++            while (--numDirectBits != 0);
++            prob = probs + Align;
++            numDirectBits = kNumAlignBits;
++          }
++          {
++            unsigned i = 1;
++            do
++            {
++              GET_BIT_CHECK(prob + i, i);
++            }
++            while (--numDirectBits != 0);
++          }
++        }
++      }
++    }
++  }
++  NORMALIZE_CHECK;
++  return res;
++}
++
++
++static void LzmaDec_InitRc(CLzmaDec *p, const Byte *data)
++{
++  p->code = ((UInt32)data[1] << 24) | ((UInt32)data[2] << 16) | ((UInt32)data[3] << 8) | ((UInt32)data[4]);
++  p->range = 0xFFFFFFFF;
++  p->needFlush = 0;
++}
++
++void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
++{
++  p->needFlush = 1;
++  p->remainLen = 0;
++  p->tempBufSize = 0;
++
++  if (initDic)
++  {
++    p->processedPos = 0;
++    p->checkDicSize = 0;
++    p->needInitState = 1;
++  }
++  if (initState)
++    p->needInitState = 1;
++}
++
++void LzmaDec_Init(CLzmaDec *p)
++{
++  p->dicPos = 0;
++  LzmaDec_InitDicAndState(p, True, True);
++}
++
++static void LzmaDec_InitStateReal(CLzmaDec *p)
++{
++  UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (p->prop.lc + p->prop.lp));
++  UInt32 i;
++  CLzmaProb *probs = p->probs;
++  for (i = 0; i < numProbs; i++)
++    probs[i] = kBitModelTotal >> 1;
++  p->reps[0] = p->reps[1] = p->reps[2] = p->reps[3] = 1;
++  p->state = 0;
++  p->needInitState = 0;
++}
++
++SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
++    ELzmaFinishMode finishMode, ELzmaStatus *status)
++{
++  SizeT inSize = *srcLen;
++  (*srcLen) = 0;
++  LzmaDec_WriteRem(p, dicLimit);
++
++  *status = LZMA_STATUS_NOT_SPECIFIED;
++
++  while (p->remainLen != kMatchSpecLenStart)
++  {
++      int checkEndMarkNow;
++
++      if (p->needFlush != 0)
++      {
++        for (; inSize > 0 && p->tempBufSize < RC_INIT_SIZE; (*srcLen)++, inSize--)
++          p->tempBuf[p->tempBufSize++] = *src++;
++        if (p->tempBufSize < RC_INIT_SIZE)
++        {
++          *status = LZMA_STATUS_NEEDS_MORE_INPUT;
++          return SZ_OK;
++        }
++        if (p->tempBuf[0] != 0)
++          return SZ_ERROR_DATA;
++
++        LzmaDec_InitRc(p, p->tempBuf);
++        p->tempBufSize = 0;
++      }
++
++      checkEndMarkNow = 0;
++      if (p->dicPos >= dicLimit)
++      {
++        if (p->remainLen == 0 && p->code == 0)
++        {
++          *status = LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK;
++          return SZ_OK;
++        }
++        if (finishMode == LZMA_FINISH_ANY)
++        {
++          *status = LZMA_STATUS_NOT_FINISHED;
++          return SZ_OK;
++        }
++        if (p->remainLen != 0)
++        {
++          *status = LZMA_STATUS_NOT_FINISHED;
++          return SZ_ERROR_DATA;
++        }
++        checkEndMarkNow = 1;
++      }
++
++      if (p->needInitState)
++        LzmaDec_InitStateReal(p);
++
++      if (p->tempBufSize == 0)
++      {
++        SizeT processed;
++        const Byte *bufLimit;
++        if (inSize < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
++        {
++          int dummyRes = LzmaDec_TryDummy(p, src, inSize);
++          if (dummyRes == DUMMY_ERROR)
++          {
++            memcpy(p->tempBuf, src, inSize);
++            p->tempBufSize = (unsigned)inSize;
++            (*srcLen) += inSize;
++            *status = LZMA_STATUS_NEEDS_MORE_INPUT;
++            return SZ_OK;
++          }
++          if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
++          {
++            *status = LZMA_STATUS_NOT_FINISHED;
++            return SZ_ERROR_DATA;
++          }
++          bufLimit = src;
++        }
++        else
++          bufLimit = src + inSize - LZMA_REQUIRED_INPUT_MAX;
++        p->buf = src;
++        if (LzmaDec_DecodeReal2(p, dicLimit, bufLimit) != 0)
++          return SZ_ERROR_DATA;
++        processed = (SizeT)(p->buf - src);
++        (*srcLen) += processed;
++        src += processed;
++        inSize -= processed;
++      }
++      else
++      {
++        unsigned rem = p->tempBufSize, lookAhead = 0;
++        while (rem < LZMA_REQUIRED_INPUT_MAX && lookAhead < inSize)
++          p->tempBuf[rem++] = src[lookAhead++];
++        p->tempBufSize = rem;
++        if (rem < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
++        {
++          int dummyRes = LzmaDec_TryDummy(p, p->tempBuf, rem);
++          if (dummyRes == DUMMY_ERROR)
++          {
++            (*srcLen) += lookAhead;
++            *status = LZMA_STATUS_NEEDS_MORE_INPUT;
++            return SZ_OK;
++          }
++          if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
++          {
++            *status = LZMA_STATUS_NOT_FINISHED;
++            return SZ_ERROR_DATA;
++          }
++        }
++        p->buf = p->tempBuf;
++        if (LzmaDec_DecodeReal2(p, dicLimit, p->buf) != 0)
++          return SZ_ERROR_DATA;
++        lookAhead -= (rem - (unsigned)(p->buf - p->tempBuf));
++        (*srcLen) += lookAhead;
++        src += lookAhead;
++        inSize -= lookAhead;
++        p->tempBufSize = 0;
++      }
++  }
++  if (p->code == 0)
++    *status = LZMA_STATUS_FINISHED_WITH_MARK;
++  return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
++}
++
++SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
++{
++  SizeT outSize = *destLen;
++  SizeT inSize = *srcLen;
++  *srcLen = *destLen = 0;
++  for (;;)
++  {
++    SizeT inSizeCur = inSize, outSizeCur, dicPos;
++    ELzmaFinishMode curFinishMode;
++    SRes res;
++    if (p->dicPos == p->dicBufSize)
++      p->dicPos = 0;
++    dicPos = p->dicPos;
++    if (outSize > p->dicBufSize - dicPos)
++    {
++      outSizeCur = p->dicBufSize;
++      curFinishMode = LZMA_FINISH_ANY;
++    }
++    else
++    {
++      outSizeCur = dicPos + outSize;
++      curFinishMode = finishMode;
++    }
++
++    res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
++    src += inSizeCur;
++    inSize -= inSizeCur;
++    *srcLen += inSizeCur;
++    outSizeCur = p->dicPos - dicPos;
++    memcpy(dest, p->dic + dicPos, outSizeCur);
++    dest += outSizeCur;
++    outSize -= outSizeCur;
++    *destLen += outSizeCur;
++    if (res != 0)
++      return res;
++    if (outSizeCur == 0 || outSize == 0)
++      return SZ_OK;
++  }
++}
++
++void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
++{
++  alloc->Free(alloc, p->probs);
++  p->probs = 0;
++}
++
++static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
++{
++  alloc->Free(alloc, p->dic);
++  p->dic = 0;
++}
++
++void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
++{
++  LzmaDec_FreeProbs(p, alloc);
++  LzmaDec_FreeDict(p, alloc);
++}
++
++SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
++{
++  UInt32 dicSize;
++  Byte d;
++
++  if (size < LZMA_PROPS_SIZE)
++    return SZ_ERROR_UNSUPPORTED;
++  else
++    dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24);
++
++  if (dicSize < LZMA_DIC_MIN)
++    dicSize = LZMA_DIC_MIN;
++  p->dicSize = dicSize;
++
++  d = data[0];
++  if (d >= (9 * 5 * 5))
++    return SZ_ERROR_UNSUPPORTED;
++
++  p->lc = d % 9;
++  d /= 9;
++  p->pb = d / 5;
++  p->lp = d % 5;
++
++  return SZ_OK;
++}
++
++static SRes LzmaDec_AllocateProbs2(CLzmaDec *p, const CLzmaProps *propNew, ISzAlloc *alloc)
++{
++  UInt32 numProbs = LzmaProps_GetNumProbs(propNew);
++  if (p->probs == 0 || numProbs != p->numProbs)
++  {
++    LzmaDec_FreeProbs(p, alloc);
++    p->probs = (CLzmaProb *)alloc->Alloc(alloc, numProbs * sizeof(CLzmaProb));
++    p->numProbs = numProbs;
++    if (p->probs == 0)
++      return SZ_ERROR_MEM;
++  }
++  return SZ_OK;
++}
++
++SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
++{
++  CLzmaProps propNew;
++  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
++  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
++  p->prop = propNew;
++  return SZ_OK;
++}
++
++SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
++{
++  CLzmaProps propNew;
++  SizeT dicBufSize;
++  RINOK(LzmaProps_Decode(&propNew, props, propsSize));
++  RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
++  dicBufSize = propNew.dicSize;
++  if (p->dic == 0 || dicBufSize != p->dicBufSize)
++  {
++    LzmaDec_FreeDict(p, alloc);
++    p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
++    if (p->dic == 0)
++    {
++      LzmaDec_FreeProbs(p, alloc);
++      return SZ_ERROR_MEM;
++    }
++  }
++  p->dicBufSize = dicBufSize;
++  p->prop = propNew;
++  return SZ_OK;
++}
++
++SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
++    const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
++    ELzmaStatus *status, ISzAlloc *alloc)
++{
++  CLzmaDec p;
++  SRes res;
++  SizeT inSize = *srcLen;
++  SizeT outSize = *destLen;
++  *srcLen = *destLen = 0;
++  if (inSize < RC_INIT_SIZE)
++    return SZ_ERROR_INPUT_EOF;
++
++  LzmaDec_Construct(&p);
++  res = LzmaDec_AllocateProbs(&p, propData, propSize, alloc);
++  if (res != 0)
++    return res;
++  p.dic = dest;
++  p.dicBufSize = outSize;
++
++  LzmaDec_Init(&p);
++
++  *srcLen = inSize;
++  res = LzmaDec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status);
++
++  if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT)
++    res = SZ_ERROR_INPUT_EOF;
++
++  (*destLen) = p.dicPos;
++  LzmaDec_FreeProbs(&p, alloc);
++  return res;
++}
+--- /dev/null
++++ b/lib/lzma/LzmaEnc.c
+@@ -0,0 +1,2271 @@
++/* LzmaEnc.c -- LZMA Encoder
++2009-11-24 : Igor Pavlov : Public domain */
++
++#include <string.h>
++
++/* #define SHOW_STAT */
++/* #define SHOW_STAT2 */
++
++#if defined(SHOW_STAT) || defined(SHOW_STAT2)
++#include <stdio.h>
++#endif
++
++#include "LzmaEnc.h"
++
++/* disable MT */
++#define _7ZIP_ST
++
++#include "LzFind.h"
++#ifndef _7ZIP_ST
++#include "LzFindMt.h"
++#endif
++
++#ifdef SHOW_STAT
++static int ttt = 0;
++#endif
++
++#define kBlockSizeMax ((1 << LZMA_NUM_BLOCK_SIZE_BITS) - 1)
++
++#define kBlockSize (9 << 10)
++#define kUnpackBlockSize (1 << 18)
++#define kMatchArraySize (1 << 21)
++#define kMatchRecordMaxSize ((LZMA_MATCH_LEN_MAX * 2 + 3) * LZMA_MATCH_LEN_MAX)
++
++#define kNumMaxDirectBits (31)
++
++#define kNumTopBits 24
++#define kTopValue ((UInt32)1 << kNumTopBits)
++
++#define kNumBitModelTotalBits 11
++#define kBitModelTotal (1 << kNumBitModelTotalBits)
++#define kNumMoveBits 5
++#define kProbInitValue (kBitModelTotal >> 1)
++
++#define kNumMoveReducingBits 4
++#define kNumBitPriceShiftBits 4
++#define kBitPrice (1 << kNumBitPriceShiftBits)
++
++void LzmaEncProps_Init(CLzmaEncProps *p)
++{
++  p->level = 5;
++  p->dictSize = p->mc = 0;
++  p->lc = p->lp = p->pb = p->algo = p->fb = p->btMode = p->numHashBytes = p->numThreads = -1;
++  p->writeEndMark = 0;
++}
++
++void LzmaEncProps_Normalize(CLzmaEncProps *p)
++{
++  int level = p->level;
++  if (level < 0) level = 5;
++  p->level = level;
++  if (p->dictSize == 0) p->dictSize = (level <= 5 ? (1 << (level * 2 + 14)) : (level == 6 ? (1 << 25) : (1 << 26)));
++  if (p->lc < 0) p->lc = 3;
++  if (p->lp < 0) p->lp = 0;
++  if (p->pb < 0) p->pb = 2;
++  if (p->algo < 0) p->algo = (level < 5 ? 0 : 1);
++  if (p->fb < 0) p->fb = (level < 7 ? 32 : 64);
++  if (p->btMode < 0) p->btMode = (p->algo == 0 ? 0 : 1);
++  if (p->numHashBytes < 0) p->numHashBytes = 4;
++  if (p->mc == 0)  p->mc = (16 + (p->fb >> 1)) >> (p->btMode ? 0 : 1);
++  if (p->numThreads < 0)
++    p->numThreads =
++      #ifndef _7ZIP_ST
++      ((p->btMode && p->algo) ? 2 : 1);
++      #else
++      1;
++      #endif
++}
++
++UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
++{
++  CLzmaEncProps props = *props2;
++  LzmaEncProps_Normalize(&props);
++  return props.dictSize;
++}
++
++/* #define LZMA_LOG_BSR */
++/* Define it for Intel's CPU */
++
++
++#ifdef LZMA_LOG_BSR
++
++#define kDicLogSizeMaxCompress 30
++
++#define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); }
++
++UInt32 GetPosSlot1(UInt32 pos)
++{
++  UInt32 res;
++  BSR2_RET(pos, res);
++  return res;
++}
++#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); }
++#define GetPosSlot(pos, res) { if (pos < 2) res = pos; else BSR2_RET(pos, res); }
++
++#else
++
++#define kNumLogBits (9 + (int)sizeof(size_t) / 2)
++#define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7)
++
++void LzmaEnc_FastPosInit(Byte *g_FastPos)
++{
++  int c = 2, slotFast;
++  g_FastPos[0] = 0;
++  g_FastPos[1] = 1;
++
++  for (slotFast = 2; slotFast < kNumLogBits * 2; slotFast++)
++  {
++    UInt32 k = (1 << ((slotFast >> 1) - 1));
++    UInt32 j;
++    for (j = 0; j < k; j++, c++)
++      g_FastPos[c] = (Byte)slotFast;
++  }
++}
++
++#define BSR2_RET(pos, res) { UInt32 i = 6 + ((kNumLogBits - 1) & \
++  (0 - (((((UInt32)1 << (kNumLogBits + 6)) - 1) - pos) >> 31))); \
++  res = p->g_FastPos[pos >> i] + (i * 2); }
++/*
++#define BSR2_RET(pos, res) { res = (pos < (1 << (kNumLogBits + 6))) ? \
++  p->g_FastPos[pos >> 6] + 12 : \
++  p->g_FastPos[pos >> (6 + kNumLogBits - 1)] + (6 + (kNumLogBits - 1)) * 2; }
++*/
++
++#define GetPosSlot1(pos) p->g_FastPos[pos]
++#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); }
++#define GetPosSlot(pos, res) { if (pos < kNumFullDistances) res = p->g_FastPos[pos]; else BSR2_RET(pos, res); }
++
++#endif
++
++
++#define LZMA_NUM_REPS 4
++
++typedef unsigned CState;
++
++typedef struct
++{
++  UInt32 price;
++
++  CState state;
++  int prev1IsChar;
++  int prev2;
++
++  UInt32 posPrev2;
++  UInt32 backPrev2;
++
++  UInt32 posPrev;
++  UInt32 backPrev;
++  UInt32 backs[LZMA_NUM_REPS];
++} COptimal;
++
++#define kNumOpts (1 << 12)
++
++#define kNumLenToPosStates 4
++#define kNumPosSlotBits 6
++#define kDicLogSizeMin 0
++#define kDicLogSizeMax 32
++#define kDistTableSizeMax (kDicLogSizeMax * 2)
++
++
++#define kNumAlignBits 4
++#define kAlignTableSize (1 << kNumAlignBits)
++#define kAlignMask (kAlignTableSize - 1)
++
++#define kStartPosModelIndex 4
++#define kEndPosModelIndex 14
++#define kNumPosModels (kEndPosModelIndex - kStartPosModelIndex)
++
++#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
++
++#ifdef _LZMA_PROB32
++#define CLzmaProb UInt32
++#else
++#define CLzmaProb UInt16
++#endif
++
++#define LZMA_PB_MAX 4
++#define LZMA_LC_MAX 8
++#define LZMA_LP_MAX 4
++
++#define LZMA_NUM_PB_STATES_MAX (1 << LZMA_PB_MAX)
++
++
++#define kLenNumLowBits 3
++#define kLenNumLowSymbols (1 << kLenNumLowBits)
++#define kLenNumMidBits 3
++#define kLenNumMidSymbols (1 << kLenNumMidBits)
++#define kLenNumHighBits 8
++#define kLenNumHighSymbols (1 << kLenNumHighBits)
++
++#define kLenNumSymbolsTotal (kLenNumLowSymbols + kLenNumMidSymbols + kLenNumHighSymbols)
++
++#define LZMA_MATCH_LEN_MIN 2
++#define LZMA_MATCH_LEN_MAX (LZMA_MATCH_LEN_MIN + kLenNumSymbolsTotal - 1)
++
++#define kNumStates 12
++
++typedef struct
++{
++  CLzmaProb choice;
++  CLzmaProb choice2;
++  CLzmaProb low[LZMA_NUM_PB_STATES_MAX << kLenNumLowBits];
++  CLzmaProb mid[LZMA_NUM_PB_STATES_MAX << kLenNumMidBits];
++  CLzmaProb high[kLenNumHighSymbols];
++} CLenEnc;
++
++typedef struct
++{
++  CLenEnc p;
++  UInt32 prices[LZMA_NUM_PB_STATES_MAX][kLenNumSymbolsTotal];
++  UInt32 tableSize;
++  UInt32 counters[LZMA_NUM_PB_STATES_MAX];
++} CLenPriceEnc;
++
++typedef struct
++{
++  UInt32 range;
++  Byte cache;
++  UInt64 low;
++  UInt64 cacheSize;
++  Byte *buf;
++  Byte *bufLim;
++  Byte *bufBase;
++  ISeqOutStream *outStream;
++  UInt64 processed;
++  SRes res;
++} CRangeEnc;
++
++typedef struct
++{
++  CLzmaProb *litProbs;
++
++  CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
++  CLzmaProb isRep[kNumStates];
++  CLzmaProb isRepG0[kNumStates];
++  CLzmaProb isRepG1[kNumStates];
++  CLzmaProb isRepG2[kNumStates];
++  CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
++
++  CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
++  CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
++  CLzmaProb posAlignEncoder[1 << kNumAlignBits];
++
++  CLenPriceEnc lenEnc;
++  CLenPriceEnc repLenEnc;
++
++  UInt32 reps[LZMA_NUM_REPS];
++  UInt32 state;
++} CSaveState;
++
++typedef struct
++{
++  IMatchFinder matchFinder;
++  void *matchFinderObj;
++
++  #ifndef _7ZIP_ST
++  Bool mtMode;
++  CMatchFinderMt matchFinderMt;
++  #endif
++
++  CMatchFinder matchFinderBase;
++
++  #ifndef _7ZIP_ST
++  Byte pad[128];
++  #endif
++
++  UInt32 optimumEndIndex;
++  UInt32 optimumCurrentIndex;
++
++  UInt32 longestMatchLength;
++  UInt32 numPairs;
++  UInt32 numAvail;
++  COptimal opt[kNumOpts];
++
++  #ifndef LZMA_LOG_BSR
++  Byte g_FastPos[1 << kNumLogBits];
++  #endif
++
++  UInt32 ProbPrices[kBitModelTotal >> kNumMoveReducingBits];
++  UInt32 matches[LZMA_MATCH_LEN_MAX * 2 + 2 + 1];
++  UInt32 numFastBytes;
++  UInt32 additionalOffset;
++  UInt32 reps[LZMA_NUM_REPS];
++  UInt32 state;
++
++  UInt32 posSlotPrices[kNumLenToPosStates][kDistTableSizeMax];
++  UInt32 distancesPrices[kNumLenToPosStates][kNumFullDistances];
++  UInt32 alignPrices[kAlignTableSize];
++  UInt32 alignPriceCount;
++
++  UInt32 distTableSize;
++
++  unsigned lc, lp, pb;
++  unsigned lpMask, pbMask;
++
++  CLzmaProb *litProbs;
++
++  CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
++  CLzmaProb isRep[kNumStates];
++  CLzmaProb isRepG0[kNumStates];
++  CLzmaProb isRepG1[kNumStates];
++  CLzmaProb isRepG2[kNumStates];
++  CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
++
++  CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
++  CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
++  CLzmaProb posAlignEncoder[1 << kNumAlignBits];
++
++  CLenPriceEnc lenEnc;
++  CLenPriceEnc repLenEnc;
++
++  unsigned lclp;
++
++  Bool fastMode;
++
++  CRangeEnc rc;
++
++  Bool writeEndMark;
++  UInt64 nowPos64;
++  UInt32 matchPriceCount;
++  Bool finished;
++  Bool multiThread;
++
++  SRes result;
++  UInt32 dictSize;
++  UInt32 matchFinderCycles;
++
++  int needInit;
++
++  CSaveState saveState;
++} CLzmaEnc;
++
++void LzmaEnc_SaveState(CLzmaEncHandle pp)
++{
++  CLzmaEnc *p = (CLzmaEnc *)pp;
++  CSaveState *dest = &p->saveState;
++  int i;
++  dest->lenEnc = p->lenEnc;
++  dest->repLenEnc = p->repLenEnc;
++  dest->state = p->state;
++
++  for (i = 0; i < kNumStates; i++)
++  {
++    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
++    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
++  }
++  for (i = 0; i < kNumLenToPosStates; i++)
++    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
++  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
++  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
++  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
++  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
++  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
++  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
++  memcpy(dest->reps, p->reps, sizeof(p->reps));
++  memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
++}
++
++void LzmaEnc_RestoreState(CLzmaEncHandle pp)
++{
++  CLzmaEnc *dest = (CLzmaEnc *)pp;
++  const CSaveState *p = &dest->saveState;
++  int i;
++  dest->lenEnc = p->lenEnc;
++  dest->repLenEnc = p->repLenEnc;
++  dest->state = p->state;
++
++  for (i = 0; i < kNumStates; i++)
++  {
++    memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
++    memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
++  }
++  for (i = 0; i < kNumLenToPosStates; i++)
++    memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
++  memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
++  memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
++  memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
++  memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
++  memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
++  memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
++  memcpy(dest->reps, p->reps, sizeof(p->reps));
++  memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
++}
++
++SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
++{
++  CLzmaEnc *p = (CLzmaEnc *)pp;
++  CLzmaEncProps props = *props2;
++  LzmaEncProps_Normalize(&props);
++
++  if (props.lc > LZMA_LC_MAX || props.lp > LZMA_LP_MAX || props.pb > LZMA_PB_MAX ||
++      props.dictSize > (1 << kDicLogSizeMaxCompress) || props.dictSize > (1 << 30))
++    return SZ_ERROR_PARAM;
++  p->dictSize = props.dictSize;
++  p->matchFinderCycles = props.mc;
++  {
++    unsigned fb = props.fb;
++    if (fb < 5)
++      fb = 5;
++    if (fb > LZMA_MATCH_LEN_MAX)
++      fb = LZMA_MATCH_LEN_MAX;
++    p->numFastBytes = fb;
++  }
++  p->lc = props.lc;
++  p->lp = props.lp;
++  p->pb = props.pb;
++  p->fastMode = (props.algo == 0);
++  p->matchFinderBase.btMode = props.btMode;
++  {
++    UInt32 numHashBytes = 4;
++    if (props.btMode)
++    {
++      if (props.numHashBytes < 2)
++        numHashBytes = 2;
++      else if (props.numHashBytes < 4)
++        numHashBytes = props.numHashBytes;
++    }
++    p->matchFinderBase.numHashBytes = numHashBytes;
++  }
++
++  p->matchFinderBase.cutValue = props.mc;
++
++  p->writeEndMark = props.writeEndMark;
++
++  #ifndef _7ZIP_ST
++  /*
++  if (newMultiThread != _multiThread)
++  {
++    ReleaseMatchFinder();
++    _multiThread = newMultiThread;
++  }
++  */
++  p->multiThread = (props.numThreads > 1);
++  #endif
++
++  return SZ_OK;
++}
++
++static const int kLiteralNextStates[kNumStates] = {0, 0, 0, 0, 1, 2, 3, 4,  5,  6,   4, 5};
++static const int kMatchNextStates[kNumStates]   = {7, 7, 7, 7, 7, 7, 7, 10, 10, 10, 10, 10};
++static const int kRepNextStates[kNumStates]     = {8, 8, 8, 8, 8, 8, 8, 11, 11, 11, 11, 11};
++static const int kShortRepNextStates[kNumStates]= {9, 9, 9, 9, 9, 9, 9, 11, 11, 11, 11, 11};
++
++#define IsCharState(s) ((s) < 7)
++
++#define GetLenToPosState(len) (((len) < kNumLenToPosStates + 1) ? (len) - 2 : kNumLenToPosStates - 1)
++
++#define kInfinityPrice (1 << 30)
++
++static void RangeEnc_Construct(CRangeEnc *p)
++{
++  p->outStream = 0;
++  p->bufBase = 0;
++}
++
++#define RangeEnc_GetProcessed(p) ((p)->processed + ((p)->buf - (p)->bufBase) + (p)->cacheSize)
++
++#define RC_BUF_SIZE (1 << 16)
++static int RangeEnc_Alloc(CRangeEnc *p, ISzAlloc *alloc)
++{
++  if (p->bufBase == 0)
++  {
++    p->bufBase = (Byte *)alloc->Alloc(alloc, RC_BUF_SIZE);
++    if (p->bufBase == 0)
++      return 0;
++    p->bufLim = p->bufBase + RC_BUF_SIZE;
++  }
++  return 1;
++}
++
++static void RangeEnc_Free(CRangeEnc *p, ISzAlloc *alloc)
++{
++  alloc->Free(alloc, p->bufBase);
++  p->bufBase = 0;
++}
++
++static void RangeEnc_Init(CRangeEnc *p)
++{
++  /* Stream.Init(); */
++  p->low = 0;
++  p->range = 0xFFFFFFFF;
++  p->cacheSize = 1;
++  p->cache = 0;
++
++  p->buf = p->bufBase;
++
++  p->processed = 0;
++  p->res = SZ_OK;
++}
++
++static void RangeEnc_FlushStream(CRangeEnc *p)
++{
++  size_t num;
++  if (p->res != SZ_OK)
++    return;
++  num = p->buf - p->bufBase;
++  if (num != p->outStream->Write(p->outStream, p->bufBase, num))
++    p->res = SZ_ERROR_WRITE;
++  p->processed += num;
++  p->buf = p->bufBase;
++}
++
++static void MY_FAST_CALL RangeEnc_ShiftLow(CRangeEnc *p)
++{
++  if ((UInt32)p->low < (UInt32)0xFF000000 || (int)(p->low >> 32) != 0)
++  {
++    Byte temp = p->cache;
++    do
++    {
++      Byte *buf = p->buf;
++      *buf++ = (Byte)(temp + (Byte)(p->low >> 32));
++      p->buf = buf;
++      if (buf == p->bufLim)
++        RangeEnc_FlushStream(p);
++      temp = 0xFF;
++    }
++    while (--p->cacheSize != 0);
++    p->cache = (Byte)((UInt32)p->low >> 24);
++  }
++  p->cacheSize++;
++  p->low = (UInt32)p->low << 8;
++}
++
++static void RangeEnc_FlushData(CRangeEnc *p)
++{
++  int i;
++  for (i = 0; i < 5; i++)
++    RangeEnc_ShiftLow(p);
++}
++
++static void RangeEnc_EncodeDirectBits(CRangeEnc *p, UInt32 value, int numBits)
++{
++  do
++  {
++    p->range >>= 1;
++    p->low += p->range & (0 - ((value >> --numBits) & 1));
++    if (p->range < kTopValue)
++    {
++      p->range <<= 8;
++      RangeEnc_ShiftLow(p);
++    }
++  }
++  while (numBits != 0);
++}
++
++static void RangeEnc_EncodeBit(CRangeEnc *p, CLzmaProb *prob, UInt32 symbol)
++{
++  UInt32 ttt = *prob;
++  UInt32 newBound = (p->range >> kNumBitModelTotalBits) * ttt;
++  if (symbol == 0)
++  {
++    p->range = newBound;
++    ttt += (kBitModelTotal - ttt) >> kNumMoveBits;
++  }
++  else
++  {
++    p->low += newBound;
++    p->range -= newBound;
++    ttt -= ttt >> kNumMoveBits;
++  }
++  *prob = (CLzmaProb)ttt;
++  if (p->range < kTopValue)
++  {
++    p->range <<= 8;
++    RangeEnc_ShiftLow(p);
++  }
++}
++
++static void LitEnc_Encode(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol)
++{
++  symbol |= 0x100;
++  do
++  {
++    RangeEnc_EncodeBit(p, probs + (symbol >> 8), (symbol >> 7) & 1);
++    symbol <<= 1;
++  }
++  while (symbol < 0x10000);
++}
++
++static void LitEnc_EncodeMatched(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol, UInt32 matchByte)
++{
++  UInt32 offs = 0x100;
++  symbol |= 0x100;
++  do
++  {
++    matchByte <<= 1;
++    RangeEnc_EncodeBit(p, probs + (offs + (matchByte & offs) + (symbol >> 8)), (symbol >> 7) & 1);
++    symbol <<= 1;
++    offs &= ~(matchByte ^ symbol);
++  }
++  while (symbol < 0x10000);
++}
++
++void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
++{
++  UInt32 i;
++  for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
++  {
++    const int kCyclesBits = kNumBitPriceShiftBits;
++    UInt32 w = i;
++    UInt32 bitCount = 0;
++    int j;
++    for (j = 0; j < kCyclesBits; j++)
++    {
++      w = w * w;
++      bitCount <<= 1;
++      while (w >= ((UInt32)1 << 16))
++      {
++        w >>= 1;
++        bitCount++;
++      }
++    }
++    ProbPrices[i >> kNumMoveReducingBits] = ((kNumBitModelTotalBits << kCyclesBits) - 15 - bitCount);
++  }
++}
++
++
++#define GET_PRICE(prob, symbol) \
++  p->ProbPrices[((prob) ^ (((-(int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
++
++#define GET_PRICEa(prob, symbol) \
++  ProbPrices[((prob) ^ ((-((int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
++
++#define GET_PRICE_0(prob) p->ProbPrices[(prob) >> kNumMoveReducingBits]
++#define GET_PRICE_1(prob) p->ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits]
++
++#define GET_PRICE_0a(prob) ProbPrices[(prob) >> kNumMoveReducingBits]
++#define GET_PRICE_1a(prob) ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits]
++
++static UInt32 LitEnc_GetPrice(const CLzmaProb *probs, UInt32 symbol, UInt32 *ProbPrices)
++{
++  UInt32 price = 0;
++  symbol |= 0x100;
++  do
++  {
++    price += GET_PRICEa(probs[symbol >> 8], (symbol >> 7) & 1);
++    symbol <<= 1;
++  }
++  while (symbol < 0x10000);
++  return price;
++}
++
++static UInt32 LitEnc_GetPriceMatched(const CLzmaProb *probs, UInt32 symbol, UInt32 matchByte, UInt32 *ProbPrices)
++{
++  UInt32 price = 0;
++  UInt32 offs = 0x100;
++  symbol |= 0x100;
++  do
++  {
++    matchByte <<= 1;
++    price += GET_PRICEa(probs[offs + (matchByte & offs) + (symbol >> 8)], (symbol >> 7) & 1);
++    symbol <<= 1;
++    offs &= ~(matchByte ^ symbol);
++  }
++  while (symbol < 0x10000);
++  return price;
++}
++
++
++static void RcTree_Encode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol)
++{
++  UInt32 m = 1;
++  int i;
++  for (i = numBitLevels; i != 0;)
++  {
++    UInt32 bit;
++    i--;
++    bit = (symbol >> i) & 1;
++    RangeEnc_EncodeBit(rc, probs + m, bit);
++    m = (m << 1) | bit;
++  }
++}
++
++static void RcTree_ReverseEncode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol)
++{
++  UInt32 m = 1;
++  int i;
++  for (i = 0; i < numBitLevels; i++)
++  {
++    UInt32 bit = symbol & 1;
++    RangeEnc_EncodeBit(rc, probs + m, bit);
++    m = (m << 1) | bit;
++    symbol >>= 1;
++  }
++}
++
++static UInt32 RcTree_GetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices)
++{
++  UInt32 price = 0;
++  symbol |= (1 << numBitLevels);
++  while (symbol != 1)
++  {
++    price += GET_PRICEa(probs[symbol >> 1], symbol & 1);
++    symbol >>= 1;
++  }
++  return price;
++}
++
++static UInt32 RcTree_ReverseGetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices)
++{
++  UInt32 price = 0;
++  UInt32 m = 1;
++  int i;
++  for (i = numBitLevels; i != 0; i--)
++  {
++    UInt32 bit = symbol & 1;
++    symbol >>= 1;
++    price += GET_PRICEa(probs[m], bit);
++    m = (m << 1) | bit;
++  }
++  return price;
++}
++
++
++static void LenEnc_Init(CLenEnc *p)
++{
++  unsigned i;
++  p->choice = p->choice2 = kProbInitValue;
++  for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumLowBits); i++)
++    p->low[i] = kProbInitValue;
++  for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumMidBits); i++)
++    p->mid[i] = kProbInitValue;
++  for (i = 0; i < kLenNumHighSymbols; i++)
++    p->high[i] = kProbInitValue;
++}
++
++static void LenEnc_Encode(CLenEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState)
++{
++  if (symbol < kLenNumLowSymbols)
++  {
++    RangeEnc_EncodeBit(rc, &p->choice, 0);
++    RcTree_Encode(rc, p->low + (posState << kLenNumLowBits), kLenNumLowBits, symbol);
++  }
++  else
++  {
++    RangeEnc_EncodeBit(rc, &p->choice, 1);
++    if (symbol < kLenNumLowSymbols + kLenNumMidSymbols)
++    {
++      RangeEnc_EncodeBit(rc, &p->choice2, 0);
++      RcTree_Encode(rc, p->mid + (posState << kLenNumMidBits), kLenNumMidBits, symbol - kLenNumLowSymbols);
++    }
++    else
++    {
++      RangeEnc_EncodeBit(rc, &p->choice2, 1);
++      RcTree_Encode(rc, p->high, kLenNumHighBits, symbol - kLenNumLowSymbols - kLenNumMidSymbols);
++    }
++  }
++}
++
++static void LenEnc_SetPrices(CLenEnc *p, UInt32 posState, UInt32 numSymbols, UInt32 *prices, UInt32 *ProbPrices)
++{
++  UInt32 a0 = GET_PRICE_0a(p->choice);
++  UInt32 a1 = GET_PRICE_1a(p->choice);
++  UInt32 b0 = a1 + GET_PRICE_0a(p->choice2);
++  UInt32 b1 = a1 + GET_PRICE_1a(p->choice2);
++  UInt32 i = 0;
++  for (i = 0; i < kLenNumLowSymbols; i++)
++  {
++    if (i >= numSymbols)
++      return;
++    prices[i] = a0 + RcTree_GetPrice(p->low + (posState << kLenNumLowBits), kLenNumLowBits, i, ProbPrices);
++  }
++  for (; i < kLenNumLowSymbols + kLenNumMidSymbols; i++)
++  {
++    if (i >= numSymbols)
++      return;
++    prices[i] = b0 + RcTree_GetPrice(p->mid + (posState << kLenNumMidBits), kLenNumMidBits, i - kLenNumLowSymbols, ProbPrices);
++  }
++  for (; i < numSymbols; i++)
++    prices[i] = b1 + RcTree_GetPrice(p->high, kLenNumHighBits, i - kLenNumLowSymbols - kLenNumMidSymbols, ProbPrices);
++}
++
++static void MY_FAST_CALL LenPriceEnc_UpdateTable(CLenPriceEnc *p, UInt32 posState, UInt32 *ProbPrices)
++{
++  LenEnc_SetPrices(&p->p, posState, p->tableSize, p->prices[posState], ProbPrices);
++  p->counters[posState] = p->tableSize;
++}
++
++static void LenPriceEnc_UpdateTables(CLenPriceEnc *p, UInt32 numPosStates, UInt32 *ProbPrices)
++{
++  UInt32 posState;
++  for (posState = 0; posState < numPosStates; posState++)
++    LenPriceEnc_UpdateTable(p, posState, ProbPrices);
++}
++
++static void LenEnc_Encode2(CLenPriceEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState, Bool updatePrice, UInt32 *ProbPrices)
++{
++  LenEnc_Encode(&p->p, rc, symbol, posState);
++  if (updatePrice)
++    if (--p->counters[posState] == 0)
++      LenPriceEnc_UpdateTable(p, posState, ProbPrices);
++}
++
++
++
++
++static void MovePos(CLzmaEnc *p, UInt32 num)
++{
++  #ifdef SHOW_STAT
++  ttt += num;
++  printf("\n MovePos %d", num);
++  #endif
++  if (num != 0)
++  {
++    p->additionalOffset += num;
++    p->matchFinder.Skip(p->matchFinderObj, num);
++  }
++}
++
++static UInt32 ReadMatchDistances(CLzmaEnc *p, UInt32 *numDistancePairsRes)
++{
++  UInt32 lenRes = 0, numPairs;
++  p->numAvail = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
++  numPairs = p->matchFinder.GetMatches(p->matchFinderObj, p->matches);
++  #ifdef SHOW_STAT
++  printf("\n i = %d numPairs = %d    ", ttt, numPairs / 2);
++  ttt++;
++  {
++    UInt32 i;
++    for (i = 0; i < numPairs; i += 2)
++      printf("%2d %6d   | ", p->matches[i], p->matches[i + 1]);
++  }
++  #endif
++  if (numPairs > 0)
++  {
++    lenRes = p->matches[numPairs - 2];
++    if (lenRes == p->numFastBytes)
++    {
++      const Byte *pby = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
++      UInt32 distance = p->matches[numPairs - 1] + 1;
++      UInt32 numAvail = p->numAvail;
++      if (numAvail > LZMA_MATCH_LEN_MAX)
++        numAvail = LZMA_MATCH_LEN_MAX;
++      {
++        const Byte *pby2 = pby - distance;
++        for (; lenRes < numAvail && pby[lenRes] == pby2[lenRes]; lenRes++);
++      }
++    }
++  }
++  p->additionalOffset++;
++  *numDistancePairsRes = numPairs;
++  return lenRes;
++}
++
++
++#define MakeAsChar(p) (p)->backPrev = (UInt32)(-1); (p)->prev1IsChar = False;
++#define MakeAsShortRep(p) (p)->backPrev = 0; (p)->prev1IsChar = False;
++#define IsShortRep(p) ((p)->backPrev == 0)
++
++static UInt32 GetRepLen1Price(CLzmaEnc *p, UInt32 state, UInt32 posState)
++{
++  return
++    GET_PRICE_0(p->isRepG0[state]) +
++    GET_PRICE_0(p->isRep0Long[state][posState]);
++}
++
++static UInt32 GetPureRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 state, UInt32 posState)
++{
++  UInt32 price;
++  if (repIndex == 0)
++  {
++    price = GET_PRICE_0(p->isRepG0[state]);
++    price += GET_PRICE_1(p->isRep0Long[state][posState]);
++  }
++  else
++  {
++    price = GET_PRICE_1(p->isRepG0[state]);
++    if (repIndex == 1)
++      price += GET_PRICE_0(p->isRepG1[state]);
++    else
++    {
++      price += GET_PRICE_1(p->isRepG1[state]);
++      price += GET_PRICE(p->isRepG2[state], repIndex - 2);
++    }
++  }
++  return price;
++}
++
++static UInt32 GetRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 len, UInt32 state, UInt32 posState)
++{
++  return p->repLenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN] +
++    GetPureRepPrice(p, repIndex, state, posState);
++}
++
++static UInt32 Backward(CLzmaEnc *p, UInt32 *backRes, UInt32 cur)
++{
++  UInt32 posMem = p->opt[cur].posPrev;
++  UInt32 backMem = p->opt[cur].backPrev;
++  p->optimumEndIndex = cur;
++  do
++  {
++    if (p->opt[cur].prev1IsChar)
++    {
++      MakeAsChar(&p->opt[posMem])
++      p->opt[posMem].posPrev = posMem - 1;
++      if (p->opt[cur].prev2)
++      {
++        p->opt[posMem - 1].prev1IsChar = False;
++        p->opt[posMem - 1].posPrev = p->opt[cur].posPrev2;
++        p->opt[posMem - 1].backPrev = p->opt[cur].backPrev2;
++      }
++    }
++    {
++      UInt32 posPrev = posMem;
++      UInt32 backCur = backMem;
++
++      backMem = p->opt[posPrev].backPrev;
++      posMem = p->opt[posPrev].posPrev;
++
++      p->opt[posPrev].backPrev = backCur;
++      p->opt[posPrev].posPrev = cur;
++      cur = posPrev;
++    }
++  }
++  while (cur != 0);
++  *backRes = p->opt[0].backPrev;
++  p->optimumCurrentIndex  = p->opt[0].posPrev;
++  return p->optimumCurrentIndex;
++}
++
++#define LIT_PROBS(pos, prevByte) (p->litProbs + ((((pos) & p->lpMask) << p->lc) + ((prevByte) >> (8 - p->lc))) * 0x300)
++
++static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes)
++{
++  UInt32 numAvail, mainLen, numPairs, repMaxIndex, i, posState, lenEnd, len, cur;
++  UInt32 matchPrice, repMatchPrice, normalMatchPrice;
++  UInt32 reps[LZMA_NUM_REPS], repLens[LZMA_NUM_REPS];
++  UInt32 *matches;
++  const Byte *data;
++  Byte curByte, matchByte;
++  if (p->optimumEndIndex != p->optimumCurrentIndex)
++  {
++    const COptimal *opt = &p->opt[p->optimumCurrentIndex];
++    UInt32 lenRes = opt->posPrev - p->optimumCurrentIndex;
++    *backRes = opt->backPrev;
++    p->optimumCurrentIndex = opt->posPrev;
++    return lenRes;
++  }
++  p->optimumCurrentIndex = p->optimumEndIndex = 0;
++
++  if (p->additionalOffset == 0)
++    mainLen = ReadMatchDistances(p, &numPairs);
++  else
++  {
++    mainLen = p->longestMatchLength;
++    numPairs = p->numPairs;
++  }
++
++  numAvail = p->numAvail;
++  if (numAvail < 2)
++  {
++    *backRes = (UInt32)(-1);
++    return 1;
++  }
++  if (numAvail > LZMA_MATCH_LEN_MAX)
++    numAvail = LZMA_MATCH_LEN_MAX;
++
++  data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
++  repMaxIndex = 0;
++  for (i = 0; i < LZMA_NUM_REPS; i++)
++  {
++    UInt32 lenTest;
++    const Byte *data2;
++    reps[i] = p->reps[i];
++    data2 = data - (reps[i] + 1);
++    if (data[0] != data2[0] || data[1] != data2[1])
++    {
++      repLens[i] = 0;
++      continue;
++    }
++    for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
++    repLens[i] = lenTest;
++    if (lenTest > repLens[repMaxIndex])
++      repMaxIndex = i;
++  }
++  if (repLens[repMaxIndex] >= p->numFastBytes)
++  {
++    UInt32 lenRes;
++    *backRes = repMaxIndex;
++    lenRes = repLens[repMaxIndex];
++    MovePos(p, lenRes - 1);
++    return lenRes;
++  }
++
++  matches = p->matches;
++  if (mainLen >= p->numFastBytes)
++  {
++    *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
++    MovePos(p, mainLen - 1);
++    return mainLen;
++  }
++  curByte = *data;
++  matchByte = *(data - (reps[0] + 1));
++
++  if (mainLen < 2 && curByte != matchByte && repLens[repMaxIndex] < 2)
++  {
++    *backRes = (UInt32)-1;
++    return 1;
++  }
++
++  p->opt[0].state = (CState)p->state;
++
++  posState = (position & p->pbMask);
++
++  {
++    const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
++    p->opt[1].price = GET_PRICE_0(p->isMatch[p->state][posState]) +
++        (!IsCharState(p->state) ?
++          LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
++          LitEnc_GetPrice(probs, curByte, p->ProbPrices));
++  }
++
++  MakeAsChar(&p->opt[1]);
++
++  matchPrice = GET_PRICE_1(p->isMatch[p->state][posState]);
++  repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[p->state]);
++
++  if (matchByte == curByte)
++  {
++    UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, p->state, posState);
++    if (shortRepPrice < p->opt[1].price)
++    {
++      p->opt[1].price = shortRepPrice;
++      MakeAsShortRep(&p->opt[1]);
++    }
++  }
++  lenEnd = ((mainLen >= repLens[repMaxIndex]) ? mainLen : repLens[repMaxIndex]);
++
++  if (lenEnd < 2)
++  {
++    *backRes = p->opt[1].backPrev;
++    return 1;
++  }
++
++  p->opt[1].posPrev = 0;
++  for (i = 0; i < LZMA_NUM_REPS; i++)
++    p->opt[0].backs[i] = reps[i];
++
++  len = lenEnd;
++  do
++    p->opt[len--].price = kInfinityPrice;
++  while (len >= 2);
++
++  for (i = 0; i < LZMA_NUM_REPS; i++)
++  {
++    UInt32 repLen = repLens[i];
++    UInt32 price;
++    if (repLen < 2)
++      continue;
++    price = repMatchPrice + GetPureRepPrice(p, i, p->state, posState);
++    do
++    {
++      UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][repLen - 2];
++      COptimal *opt = &p->opt[repLen];
++      if (curAndLenPrice < opt->price)
++      {
++        opt->price = curAndLenPrice;
++        opt->posPrev = 0;
++        opt->backPrev = i;
++        opt->prev1IsChar = False;
++      }
++    }
++    while (--repLen >= 2);
++  }
++
++  normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[p->state]);
++
++  len = ((repLens[0] >= 2) ? repLens[0] + 1 : 2);
++  if (len <= mainLen)
++  {
++    UInt32 offs = 0;
++    while (len > matches[offs])
++      offs += 2;
++    for (; ; len++)
++    {
++      COptimal *opt;
++      UInt32 distance = matches[offs + 1];
++
++      UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN];
++      UInt32 lenToPosState = GetLenToPosState(len);
++      if (distance < kNumFullDistances)
++        curAndLenPrice += p->distancesPrices[lenToPosState][distance];
++      else
++      {
++        UInt32 slot;
++        GetPosSlot2(distance, slot);
++        curAndLenPrice += p->alignPrices[distance & kAlignMask] + p->posSlotPrices[lenToPosState][slot];
++      }
++      opt = &p->opt[len];
++      if (curAndLenPrice < opt->price)
++      {
++        opt->price = curAndLenPrice;
++        opt->posPrev = 0;
++        opt->backPrev = distance + LZMA_NUM_REPS;
++        opt->prev1IsChar = False;
++      }
++      if (len == matches[offs])
++      {
++        offs += 2;
++        if (offs == numPairs)
++          break;
++      }
++    }
++  }
++
++  cur = 0;
++
++    #ifdef SHOW_STAT2
++    if (position >= 0)
++    {
++      unsigned i;
++      printf("\n pos = %4X", position);
++      for (i = cur; i <= lenEnd; i++)
++      printf("\nprice[%4X] = %d", position - cur + i, p->opt[i].price);
++    }
++    #endif
++
++  for (;;)
++  {
++    UInt32 numAvailFull, newLen, numPairs, posPrev, state, posState, startLen;
++    UInt32 curPrice, curAnd1Price, matchPrice, repMatchPrice;
++    Bool nextIsChar;
++    Byte curByte, matchByte;
++    const Byte *data;
++    COptimal *curOpt;
++    COptimal *nextOpt;
++
++    cur++;
++    if (cur == lenEnd)
++      return Backward(p, backRes, cur);
++
++    newLen = ReadMatchDistances(p, &numPairs);
++    if (newLen >= p->numFastBytes)
++    {
++      p->numPairs = numPairs;
++      p->longestMatchLength = newLen;
++      return Backward(p, backRes, cur);
++    }
++    position++;
++    curOpt = &p->opt[cur];
++    posPrev = curOpt->posPrev;
++    if (curOpt->prev1IsChar)
++    {
++      posPrev--;
++      if (curOpt->prev2)
++      {
++        state = p->opt[curOpt->posPrev2].state;
++        if (curOpt->backPrev2 < LZMA_NUM_REPS)
++          state = kRepNextStates[state];
++        else
++          state = kMatchNextStates[state];
++      }
++      else
++        state = p->opt[posPrev].state;
++      state = kLiteralNextStates[state];
++    }
++    else
++      state = p->opt[posPrev].state;
++    if (posPrev == cur - 1)
++    {
++      if (IsShortRep(curOpt))
++        state = kShortRepNextStates[state];
++      else
++        state = kLiteralNextStates[state];
++    }
++    else
++    {
++      UInt32 pos;
++      const COptimal *prevOpt;
++      if (curOpt->prev1IsChar && curOpt->prev2)
++      {
++        posPrev = curOpt->posPrev2;
++        pos = curOpt->backPrev2;
++        state = kRepNextStates[state];
++      }
++      else
++      {
++        pos = curOpt->backPrev;
++        if (pos < LZMA_NUM_REPS)
++          state = kRepNextStates[state];
++        else
++          state = kMatchNextStates[state];
++      }
++      prevOpt = &p->opt[posPrev];
++      if (pos < LZMA_NUM_REPS)
++      {
++        UInt32 i;
++        reps[0] = prevOpt->backs[pos];
++        for (i = 1; i <= pos; i++)
++          reps[i] = prevOpt->backs[i - 1];
++        for (; i < LZMA_NUM_REPS; i++)
++          reps[i] = prevOpt->backs[i];
++      }
++      else
++      {
++        UInt32 i;
++        reps[0] = (pos - LZMA_NUM_REPS);
++        for (i = 1; i < LZMA_NUM_REPS; i++)
++          reps[i] = prevOpt->backs[i - 1];
++      }
++    }
++    curOpt->state = (CState)state;
++
++    curOpt->backs[0] = reps[0];
++    curOpt->backs[1] = reps[1];
++    curOpt->backs[2] = reps[2];
++    curOpt->backs[3] = reps[3];
++
++    curPrice = curOpt->price;
++    nextIsChar = False;
++    data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
++    curByte = *data;
++    matchByte = *(data - (reps[0] + 1));
++
++    posState = (position & p->pbMask);
++
++    curAnd1Price = curPrice + GET_PRICE_0(p->isMatch[state][posState]);
++    {
++      const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
++      curAnd1Price +=
++        (!IsCharState(state) ?
++          LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
++          LitEnc_GetPrice(probs, curByte, p->ProbPrices));
++    }
++
++    nextOpt = &p->opt[cur + 1];
++
++    if (curAnd1Price < nextOpt->price)
++    {
++      nextOpt->price = curAnd1Price;
++      nextOpt->posPrev = cur;
++      MakeAsChar(nextOpt);
++      nextIsChar = True;
++    }
++
++    matchPrice = curPrice + GET_PRICE_1(p->isMatch[state][posState]);
++    repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[state]);
++
++    if (matchByte == curByte && !(nextOpt->posPrev < cur && nextOpt->backPrev == 0))
++    {
++      UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, state, posState);
++      if (shortRepPrice <= nextOpt->price)
++      {
++        nextOpt->price = shortRepPrice;
++        nextOpt->posPrev = cur;
++        MakeAsShortRep(nextOpt);
++        nextIsChar = True;
++      }
++    }
++    numAvailFull = p->numAvail;
++    {
++      UInt32 temp = kNumOpts - 1 - cur;
++      if (temp < numAvailFull)
++        numAvailFull = temp;
++    }
++
++    if (numAvailFull < 2)
++      continue;
++    numAvail = (numAvailFull <= p->numFastBytes ? numAvailFull : p->numFastBytes);
++
++    if (!nextIsChar && matchByte != curByte) /* speed optimization */
++    {
++      /* try Literal + rep0 */
++      UInt32 temp;
++      UInt32 lenTest2;
++      const Byte *data2 = data - (reps[0] + 1);
++      UInt32 limit = p->numFastBytes + 1;
++      if (limit > numAvailFull)
++        limit = numAvailFull;
++
++      for (temp = 1; temp < limit && data[temp] == data2[temp]; temp++);
++      lenTest2 = temp - 1;
++      if (lenTest2 >= 2)
++      {
++        UInt32 state2 = kLiteralNextStates[state];
++        UInt32 posStateNext = (position + 1) & p->pbMask;
++        UInt32 nextRepMatchPrice = curAnd1Price +
++            GET_PRICE_1(p->isMatch[state2][posStateNext]) +
++            GET_PRICE_1(p->isRep[state2]);
++        /* for (; lenTest2 >= 2; lenTest2--) */
++        {
++          UInt32 curAndLenPrice;
++          COptimal *opt;
++          UInt32 offset = cur + 1 + lenTest2;
++          while (lenEnd < offset)
++            p->opt[++lenEnd].price = kInfinityPrice;
++          curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
++          opt = &p->opt[offset];
++          if (curAndLenPrice < opt->price)
++          {
++            opt->price = curAndLenPrice;
++            opt->posPrev = cur + 1;
++            opt->backPrev = 0;
++            opt->prev1IsChar = True;
++            opt->prev2 = False;
++          }
++        }
++      }
++    }
++
++    startLen = 2; /* speed optimization */
++    {
++    UInt32 repIndex;
++    for (repIndex = 0; repIndex < LZMA_NUM_REPS; repIndex++)
++    {
++      UInt32 lenTest;
++      UInt32 lenTestTemp;
++      UInt32 price;
++      const Byte *data2 = data - (reps[repIndex] + 1);
++      if (data[0] != data2[0] || data[1] != data2[1])
++        continue;
++      for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
++      while (lenEnd < cur + lenTest)
++        p->opt[++lenEnd].price = kInfinityPrice;
++      lenTestTemp = lenTest;
++      price = repMatchPrice + GetPureRepPrice(p, repIndex, state, posState);
++      do
++      {
++        UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][lenTest - 2];
++        COptimal *opt = &p->opt[cur + lenTest];
++        if (curAndLenPrice < opt->price)
++        {
++          opt->price = curAndLenPrice;
++          opt->posPrev = cur;
++          opt->backPrev = repIndex;
++          opt->prev1IsChar = False;
++        }
++      }
++      while (--lenTest >= 2);
++      lenTest = lenTestTemp;
++
++      if (repIndex == 0)
++        startLen = lenTest + 1;
++
++      /* if (_maxMode) */
++        {
++          UInt32 lenTest2 = lenTest + 1;
++          UInt32 limit = lenTest2 + p->numFastBytes;
++          UInt32 nextRepMatchPrice;
++          if (limit > numAvailFull)
++            limit = numAvailFull;
++          for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
++          lenTest2 -= lenTest + 1;
++          if (lenTest2 >= 2)
++          {
++            UInt32 state2 = kRepNextStates[state];
++            UInt32 posStateNext = (position + lenTest) & p->pbMask;
++            UInt32 curAndLenCharPrice =
++                price + p->repLenEnc.prices[posState][lenTest - 2] +
++                GET_PRICE_0(p->isMatch[state2][posStateNext]) +
++                LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
++                    data[lenTest], data2[lenTest], p->ProbPrices);
++            state2 = kLiteralNextStates[state2];
++            posStateNext = (position + lenTest + 1) & p->pbMask;
++            nextRepMatchPrice = curAndLenCharPrice +
++                GET_PRICE_1(p->isMatch[state2][posStateNext]) +
++                GET_PRICE_1(p->isRep[state2]);
++
++            /* for (; lenTest2 >= 2; lenTest2--) */
++            {
++              UInt32 curAndLenPrice;
++              COptimal *opt;
++              UInt32 offset = cur + lenTest + 1 + lenTest2;
++              while (lenEnd < offset)
++                p->opt[++lenEnd].price = kInfinityPrice;
++              curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
++              opt = &p->opt[offset];
++              if (curAndLenPrice < opt->price)
++              {
++                opt->price = curAndLenPrice;
++                opt->posPrev = cur + lenTest + 1;
++                opt->backPrev = 0;
++                opt->prev1IsChar = True;
++                opt->prev2 = True;
++                opt->posPrev2 = cur;
++                opt->backPrev2 = repIndex;
++              }
++            }
++          }
++        }
++    }
++    }
++    /* for (UInt32 lenTest = 2; lenTest <= newLen; lenTest++) */
++    if (newLen > numAvail)
++    {
++      newLen = numAvail;
++      for (numPairs = 0; newLen > matches[numPairs]; numPairs += 2);
++      matches[numPairs] = newLen;
++      numPairs += 2;
++    }
++    if (newLen >= startLen)
++    {
++      UInt32 normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[state]);
++      UInt32 offs, curBack, posSlot;
++      UInt32 lenTest;
++      while (lenEnd < cur + newLen)
++        p->opt[++lenEnd].price = kInfinityPrice;
++
++      offs = 0;
++      while (startLen > matches[offs])
++        offs += 2;
++      curBack = matches[offs + 1];
++      GetPosSlot2(curBack, posSlot);
++      for (lenTest = /*2*/ startLen; ; lenTest++)
++      {
++        UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][lenTest - LZMA_MATCH_LEN_MIN];
++        UInt32 lenToPosState = GetLenToPosState(lenTest);
++        COptimal *opt;
++        if (curBack < kNumFullDistances)
++          curAndLenPrice += p->distancesPrices[lenToPosState][curBack];
++        else
++          curAndLenPrice += p->posSlotPrices[lenToPosState][posSlot] + p->alignPrices[curBack & kAlignMask];
++
++        opt = &p->opt[cur + lenTest];
++        if (curAndLenPrice < opt->price)
++        {
++          opt->price = curAndLenPrice;
++          opt->posPrev = cur;
++          opt->backPrev = curBack + LZMA_NUM_REPS;
++          opt->prev1IsChar = False;
++        }
++
++        if (/*_maxMode && */lenTest == matches[offs])
++        {
++          /* Try Match + Literal + Rep0 */
++          const Byte *data2 = data - (curBack + 1);
++          UInt32 lenTest2 = lenTest + 1;
++          UInt32 limit = lenTest2 + p->numFastBytes;
++          UInt32 nextRepMatchPrice;
++          if (limit > numAvailFull)
++            limit = numAvailFull;
++          for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
++          lenTest2 -= lenTest + 1;
++          if (lenTest2 >= 2)
++          {
++            UInt32 state2 = kMatchNextStates[state];
++            UInt32 posStateNext = (position + lenTest) & p->pbMask;
++            UInt32 curAndLenCharPrice = curAndLenPrice +
++                GET_PRICE_0(p->isMatch[state2][posStateNext]) +
++                LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
++                    data[lenTest], data2[lenTest], p->ProbPrices);
++            state2 = kLiteralNextStates[state2];
++            posStateNext = (posStateNext + 1) & p->pbMask;
++            nextRepMatchPrice = curAndLenCharPrice +
++                GET_PRICE_1(p->isMatch[state2][posStateNext]) +
++                GET_PRICE_1(p->isRep[state2]);
++
++            /* for (; lenTest2 >= 2; lenTest2--) */
++            {
++              UInt32 offset = cur + lenTest + 1 + lenTest2;
++              UInt32 curAndLenPrice;
++              COptimal *opt;
++              while (lenEnd < offset)
++                p->opt[++lenEnd].price = kInfinityPrice;
++              curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
++              opt = &p->opt[offset];
++              if (curAndLenPrice < opt->price)
++              {
++                opt->price = curAndLenPrice;
++                opt->posPrev = cur + lenTest + 1;
++                opt->backPrev = 0;
++                opt->prev1IsChar = True;
++                opt->prev2 = True;
++                opt->posPrev2 = cur;
++                opt->backPrev2 = curBack + LZMA_NUM_REPS;
++              }
++            }
++          }
++          offs += 2;
++          if (offs == numPairs)
++            break;
++          curBack = matches[offs + 1];
++          if (curBack >= kNumFullDistances)
++            GetPosSlot2(curBack, posSlot);
++        }
++      }
++    }
++  }
++}
++
++#define ChangePair(smallDist, bigDist) (((bigDist) >> 7) > (smallDist))
++
++static UInt32 GetOptimumFast(CLzmaEnc *p, UInt32 *backRes)
++{
++  UInt32 numAvail, mainLen, mainDist, numPairs, repIndex, repLen, i;
++  const Byte *data;
++  const UInt32 *matches;
++
++  if (p->additionalOffset == 0)
++    mainLen = ReadMatchDistances(p, &numPairs);
++  else
++  {
++    mainLen = p->longestMatchLength;
++    numPairs = p->numPairs;
++  }
++
++  numAvail = p->numAvail;
++  *backRes = (UInt32)-1;
++  if (numAvail < 2)
++    return 1;
++  if (numAvail > LZMA_MATCH_LEN_MAX)
++    numAvail = LZMA_MATCH_LEN_MAX;
++  data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
++
++  repLen = repIndex = 0;
++  for (i = 0; i < LZMA_NUM_REPS; i++)
++  {
++    UInt32 len;
++    const Byte *data2 = data - (p->reps[i] + 1);
++    if (data[0] != data2[0] || data[1] != data2[1])
++      continue;
++    for (len = 2; len < numAvail && data[len] == data2[len]; len++);
++    if (len >= p->numFastBytes)
++    {
++      *backRes = i;
++      MovePos(p, len - 1);
++      return len;
++    }
++    if (len > repLen)
++    {
++      repIndex = i;
++      repLen = len;
++    }
++  }
++
++  matches = p->matches;
++  if (mainLen >= p->numFastBytes)
++  {
++    *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
++    MovePos(p, mainLen - 1);
++    return mainLen;
++  }
++
++  mainDist = 0; /* for GCC */
++  if (mainLen >= 2)
++  {
++    mainDist = matches[numPairs - 1];
++    while (numPairs > 2 && mainLen == matches[numPairs - 4] + 1)
++    {
++      if (!ChangePair(matches[numPairs - 3], mainDist))
++        break;
++      numPairs -= 2;
++      mainLen = matches[numPairs - 2];
++      mainDist = matches[numPairs - 1];
++    }
++    if (mainLen == 2 && mainDist >= 0x80)
++      mainLen = 1;
++  }
++
++  if (repLen >= 2 && (
++        (repLen + 1 >= mainLen) ||
++        (repLen + 2 >= mainLen && mainDist >= (1 << 9)) ||
++        (repLen + 3 >= mainLen && mainDist >= (1 << 15))))
++  {
++    *backRes = repIndex;
++    MovePos(p, repLen - 1);
++    return repLen;
++  }
++
++  if (mainLen < 2 || numAvail <= 2)
++    return 1;
++
++  p->longestMatchLength = ReadMatchDistances(p, &p->numPairs);
++  if (p->longestMatchLength >= 2)
++  {
++    UInt32 newDistance = matches[p->numPairs - 1];
++    if ((p->longestMatchLength >= mainLen && newDistance < mainDist) ||
++        (p->longestMatchLength == mainLen + 1 && !ChangePair(mainDist, newDistance)) ||
++        (p->longestMatchLength > mainLen + 1) ||
++        (p->longestMatchLength + 1 >= mainLen && mainLen >= 3 && ChangePair(newDistance, mainDist)))
++      return 1;
++  }
++
++  data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
++  for (i = 0; i < LZMA_NUM_REPS; i++)
++  {
++    UInt32 len, limit;
++    const Byte *data2 = data - (p->reps[i] + 1);
++    if (data[0] != data2[0] || data[1] != data2[1])
++      continue;
++    limit = mainLen - 1;
++    for (len = 2; len < limit && data[len] == data2[len]; len++);
++    if (len >= limit)
++      return 1;
++  }
++  *backRes = mainDist + LZMA_NUM_REPS;
++  MovePos(p, mainLen - 2);
++  return mainLen;
++}
++
++static void WriteEndMarker(CLzmaEnc *p, UInt32 posState)
++{
++  UInt32 len;
++  RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
++  RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
++  p->state = kMatchNextStates[p->state];
++  len = LZMA_MATCH_LEN_MIN;
++  LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
++  RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, (1 << kNumPosSlotBits) - 1);
++  RangeEnc_EncodeDirectBits(&p->rc, (((UInt32)1 << 30) - 1) >> kNumAlignBits, 30 - kNumAlignBits);
++  RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, kAlignMask);
++}
++
++static SRes CheckErrors(CLzmaEnc *p)
++{
++  if (p->result != SZ_OK)
++    return p->result;
++  if (p->rc.res != SZ_OK)
++    p->result = SZ_ERROR_WRITE;
++  if (p->matchFinderBase.result != SZ_OK)
++    p->result = SZ_ERROR_READ;
++  if (p->result != SZ_OK)
++    p->finished = True;
++  return p->result;
++}
++
++static SRes Flush(CLzmaEnc *p, UInt32 nowPos)
++{
++  /* ReleaseMFStream(); */
++  p->finished = True;
++  if (p->writeEndMark)
++    WriteEndMarker(p, nowPos & p->pbMask);
++  RangeEnc_FlushData(&p->rc);
++  RangeEnc_FlushStream(&p->rc);
++  return CheckErrors(p);
++}
++
++static void FillAlignPrices(CLzmaEnc *p)
++{
++  UInt32 i;
++  for (i = 0; i < kAlignTableSize; i++)
++    p->alignPrices[i] = RcTree_ReverseGetPrice(p->posAlignEncoder, kNumAlignBits, i, p->ProbPrices);
++  p->alignPriceCount = 0;
++}
++
++static void FillDistancesPrices(CLzmaEnc *p)
++{
++  UInt32 tempPrices[kNumFullDistances];
++  UInt32 i, lenToPosState;
++  for (i = kStartPosModelIndex; i < kNumFullDistances; i++)
++  {
++    UInt32 posSlot = GetPosSlot1(i);
++    UInt32 footerBits = ((posSlot >> 1) - 1);
++    UInt32 base = ((2 | (posSlot & 1)) << footerBits);
++    tempPrices[i] = RcTree_ReverseGetPrice(p->posEncoders + base - posSlot - 1, footerBits, i - base, p->ProbPrices);
++  }
++
++  for (lenToPosState = 0; lenToPosState < kNumLenToPosStates; lenToPosState++)
++  {
++    UInt32 posSlot;
++    const CLzmaProb *encoder = p->posSlotEncoder[lenToPosState];
++    UInt32 *posSlotPrices = p->posSlotPrices[lenToPosState];
++    for (posSlot = 0; posSlot < p->distTableSize; posSlot++)
++      posSlotPrices[posSlot] = RcTree_GetPrice(encoder, kNumPosSlotBits, posSlot, p->ProbPrices);
++    for (posSlot = kEndPosModelIndex; posSlot < p->distTableSize; posSlot++)
++      posSlotPrices[posSlot] += ((((posSlot >> 1) - 1) - kNumAlignBits) << kNumBitPriceShiftBits);
++
++    {
++      UInt32 *distancesPrices = p->distancesPrices[lenToPosState];
++      UInt32 i;
++      for (i = 0; i < kStartPosModelIndex; i++)
++        distancesPrices[i] = posSlotPrices[i];
++      for (; i < kNumFullDistances; i++)
++        distancesPrices[i] = posSlotPrices[GetPosSlot1(i)] + tempPrices[i];
++    }
++  }
++  p->matchPriceCount = 0;
++}
++
++void LzmaEnc_Construct(CLzmaEnc *p)
++{
++  RangeEnc_Construct(&p->rc);
++  MatchFinder_Construct(&p->matchFinderBase);
++  #ifndef _7ZIP_ST
++  MatchFinderMt_Construct(&p->matchFinderMt);
++  p->matchFinderMt.MatchFinder = &p->matchFinderBase;
++  #endif
++
++  {
++    CLzmaEncProps props;
++    LzmaEncProps_Init(&props);
++    LzmaEnc_SetProps(p, &props);
++  }
++
++  #ifndef LZMA_LOG_BSR
++  LzmaEnc_FastPosInit(p->g_FastPos);
++  #endif
++
++  LzmaEnc_InitPriceTables(p->ProbPrices);
++  p->litProbs = 0;
++  p->saveState.litProbs = 0;
++}
++
++CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc)
++{
++  void *p;
++  p = alloc->Alloc(alloc, sizeof(CLzmaEnc));
++  if (p != 0)
++    LzmaEnc_Construct((CLzmaEnc *)p);
++  return p;
++}
++
++void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
++{
++  alloc->Free(alloc, p->litProbs);
++  alloc->Free(alloc, p->saveState.litProbs);
++  p->litProbs = 0;
++  p->saveState.litProbs = 0;
++}
++
++void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  #ifndef _7ZIP_ST
++  MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
++  #endif
++  MatchFinder_Free(&p->matchFinderBase, allocBig);
++  LzmaEnc_FreeLits(p, alloc);
++  RangeEnc_Free(&p->rc, alloc);
++}
++
++void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  LzmaEnc_Destruct((CLzmaEnc *)p, alloc, allocBig);
++  alloc->Free(alloc, p);
++}
++
++static SRes LzmaEnc_CodeOneBlock(CLzmaEnc *p, Bool useLimits, UInt32 maxPackSize, UInt32 maxUnpackSize)
++{
++  UInt32 nowPos32, startPos32;
++  if (p->needInit)
++  {
++    p->matchFinder.Init(p->matchFinderObj);
++    p->needInit = 0;
++  }
++
++  if (p->finished)
++    return p->result;
++  RINOK(CheckErrors(p));
++
++  nowPos32 = (UInt32)p->nowPos64;
++  startPos32 = nowPos32;
++
++  if (p->nowPos64 == 0)
++  {
++    UInt32 numPairs;
++    Byte curByte;
++    if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
++      return Flush(p, nowPos32);
++    ReadMatchDistances(p, &numPairs);
++    RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][0], 0);
++    p->state = kLiteralNextStates[p->state];
++    curByte = p->matchFinder.GetIndexByte(p->matchFinderObj, 0 - p->additionalOffset);
++    LitEnc_Encode(&p->rc, p->litProbs, curByte);
++    p->additionalOffset--;
++    nowPos32++;
++  }
++
++  if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) != 0)
++  for (;;)
++  {
++    UInt32 pos, len, posState;
++
++    if (p->fastMode)
++      len = GetOptimumFast(p, &pos);
++    else
++      len = GetOptimum(p, nowPos32, &pos);
++
++    #ifdef SHOW_STAT2
++    printf("\n pos = %4X,   len = %d   pos = %d", nowPos32, len, pos);
++    #endif
++
++    posState = nowPos32 & p->pbMask;
++    if (len == 1 && pos == (UInt32)-1)
++    {
++      Byte curByte;
++      CLzmaProb *probs;
++      const Byte *data;
++
++      RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 0);
++      data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
++      curByte = *data;
++      probs = LIT_PROBS(nowPos32, *(data - 1));
++      if (IsCharState(p->state))
++        LitEnc_Encode(&p->rc, probs, curByte);
++      else
++        LitEnc_EncodeMatched(&p->rc, probs, curByte, *(data - p->reps[0] - 1));
++      p->state = kLiteralNextStates[p->state];
++    }
++    else
++    {
++      RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
++      if (pos < LZMA_NUM_REPS)
++      {
++        RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 1);
++        if (pos == 0)
++        {
++          RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 0);
++          RangeEnc_EncodeBit(&p->rc, &p->isRep0Long[p->state][posState], ((len == 1) ? 0 : 1));
++        }
++        else
++        {
++          UInt32 distance = p->reps[pos];
++          RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 1);
++          if (pos == 1)
++            RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 0);
++          else
++          {
++            RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 1);
++            RangeEnc_EncodeBit(&p->rc, &p->isRepG2[p->state], pos - 2);
++            if (pos == 3)
++              p->reps[3] = p->reps[2];
++            p->reps[2] = p->reps[1];
++          }
++          p->reps[1] = p->reps[0];
++          p->reps[0] = distance;
++        }
++        if (len == 1)
++          p->state = kShortRepNextStates[p->state];
++        else
++        {
++          LenEnc_Encode2(&p->repLenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
++          p->state = kRepNextStates[p->state];
++        }
++      }
++      else
++      {
++        UInt32 posSlot;
++        RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
++        p->state = kMatchNextStates[p->state];
++        LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
++        pos -= LZMA_NUM_REPS;
++        GetPosSlot(pos, posSlot);
++        RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, posSlot);
++
++        if (posSlot >= kStartPosModelIndex)
++        {
++          UInt32 footerBits = ((posSlot >> 1) - 1);
++          UInt32 base = ((2 | (posSlot & 1)) << footerBits);
++          UInt32 posReduced = pos - base;
++
++          if (posSlot < kEndPosModelIndex)
++            RcTree_ReverseEncode(&p->rc, p->posEncoders + base - posSlot - 1, footerBits, posReduced);
++          else
++          {
++            RangeEnc_EncodeDirectBits(&p->rc, posReduced >> kNumAlignBits, footerBits - kNumAlignBits);
++            RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, posReduced & kAlignMask);
++            p->alignPriceCount++;
++          }
++        }
++        p->reps[3] = p->reps[2];
++        p->reps[2] = p->reps[1];
++        p->reps[1] = p->reps[0];
++        p->reps[0] = pos;
++        p->matchPriceCount++;
++      }
++    }
++    p->additionalOffset -= len;
++    nowPos32 += len;
++    if (p->additionalOffset == 0)
++    {
++      UInt32 processed;
++      if (!p->fastMode)
++      {
++        if (p->matchPriceCount >= (1 << 7))
++          FillDistancesPrices(p);
++        if (p->alignPriceCount >= kAlignTableSize)
++          FillAlignPrices(p);
++      }
++      if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
++        break;
++      processed = nowPos32 - startPos32;
++      if (useLimits)
++      {
++        if (processed + kNumOpts + 300 >= maxUnpackSize ||
++            RangeEnc_GetProcessed(&p->rc) + kNumOpts * 2 >= maxPackSize)
++          break;
++      }
++      else if (processed >= (1 << 15))
++      {
++        p->nowPos64 += nowPos32 - startPos32;
++        return CheckErrors(p);
++      }
++    }
++  }
++  p->nowPos64 += nowPos32 - startPos32;
++  return Flush(p, nowPos32);
++}
++
++#define kBigHashDicLimit ((UInt32)1 << 24)
++
++static SRes LzmaEnc_Alloc(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  UInt32 beforeSize = kNumOpts;
++  Bool btMode;
++  if (!RangeEnc_Alloc(&p->rc, alloc))
++    return SZ_ERROR_MEM;
++  btMode = (p->matchFinderBase.btMode != 0);
++  #ifndef _7ZIP_ST
++  p->mtMode = (p->multiThread && !p->fastMode && btMode);
++  #endif
++
++  {
++    unsigned lclp = p->lc + p->lp;
++    if (p->litProbs == 0 || p->saveState.litProbs == 0 || p->lclp != lclp)
++    {
++      LzmaEnc_FreeLits(p, alloc);
++      p->litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
++      p->saveState.litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
++      if (p->litProbs == 0 || p->saveState.litProbs == 0)
++      {
++        LzmaEnc_FreeLits(p, alloc);
++        return SZ_ERROR_MEM;
++      }
++      p->lclp = lclp;
++    }
++  }
++
++  p->matchFinderBase.bigHash = (p->dictSize > kBigHashDicLimit);
++
++  if (beforeSize + p->dictSize < keepWindowSize)
++    beforeSize = keepWindowSize - p->dictSize;
++
++  #ifndef _7ZIP_ST
++  if (p->mtMode)
++  {
++    RINOK(MatchFinderMt_Create(&p->matchFinderMt, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig));
++    p->matchFinderObj = &p->matchFinderMt;
++    MatchFinderMt_CreateVTable(&p->matchFinderMt, &p->matchFinder);
++  }
++  else
++  #endif
++  {
++    if (!MatchFinder_Create(&p->matchFinderBase, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig))
++      return SZ_ERROR_MEM;
++    p->matchFinderObj = &p->matchFinderBase;
++    MatchFinder_CreateVTable(&p->matchFinderBase, &p->matchFinder);
++  }
++  return SZ_OK;
++}
++
++void LzmaEnc_Init(CLzmaEnc *p)
++{
++  UInt32 i;
++  p->state = 0;
++  for (i = 0 ; i < LZMA_NUM_REPS; i++)
++    p->reps[i] = 0;
++
++  RangeEnc_Init(&p->rc);
++
++
++  for (i = 0; i < kNumStates; i++)
++  {
++    UInt32 j;
++    for (j = 0; j < LZMA_NUM_PB_STATES_MAX; j++)
++    {
++      p->isMatch[i][j] = kProbInitValue;
++      p->isRep0Long[i][j] = kProbInitValue;
++    }
++    p->isRep[i] = kProbInitValue;
++    p->isRepG0[i] = kProbInitValue;
++    p->isRepG1[i] = kProbInitValue;
++    p->isRepG2[i] = kProbInitValue;
++  }
++
++  {
++    UInt32 num = 0x300 << (p->lp + p->lc);
++    for (i = 0; i < num; i++)
++      p->litProbs[i] = kProbInitValue;
++  }
++
++  {
++    for (i = 0; i < kNumLenToPosStates; i++)
++    {
++      CLzmaProb *probs = p->posSlotEncoder[i];
++      UInt32 j;
++      for (j = 0; j < (1 << kNumPosSlotBits); j++)
++        probs[j] = kProbInitValue;
++    }
++  }
++  {
++    for (i = 0; i < kNumFullDistances - kEndPosModelIndex; i++)
++      p->posEncoders[i] = kProbInitValue;
++  }
++
++  LenEnc_Init(&p->lenEnc.p);
++  LenEnc_Init(&p->repLenEnc.p);
++
++  for (i = 0; i < (1 << kNumAlignBits); i++)
++    p->posAlignEncoder[i] = kProbInitValue;
++
++  p->optimumEndIndex = 0;
++  p->optimumCurrentIndex = 0;
++  p->additionalOffset = 0;
++
++  p->pbMask = (1 << p->pb) - 1;
++  p->lpMask = (1 << p->lp) - 1;
++}
++
++void LzmaEnc_InitPrices(CLzmaEnc *p)
++{
++  if (!p->fastMode)
++  {
++    FillDistancesPrices(p);
++    FillAlignPrices(p);
++  }
++
++  p->lenEnc.tableSize =
++  p->repLenEnc.tableSize =
++      p->numFastBytes + 1 - LZMA_MATCH_LEN_MIN;
++  LenPriceEnc_UpdateTables(&p->lenEnc, 1 << p->pb, p->ProbPrices);
++  LenPriceEnc_UpdateTables(&p->repLenEnc, 1 << p->pb, p->ProbPrices);
++}
++
++static SRes LzmaEnc_AllocAndInit(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  UInt32 i;
++  for (i = 0; i < (UInt32)kDicLogSizeMaxCompress; i++)
++    if (p->dictSize <= ((UInt32)1 << i))
++      break;
++  p->distTableSize = i * 2;
++
++  p->finished = False;
++  p->result = SZ_OK;
++  RINOK(LzmaEnc_Alloc(p, keepWindowSize, alloc, allocBig));
++  LzmaEnc_Init(p);
++  LzmaEnc_InitPrices(p);
++  p->nowPos64 = 0;
++  return SZ_OK;
++}
++
++static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
++    ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  CLzmaEnc *p = (CLzmaEnc *)pp;
++  p->matchFinderBase.stream = inStream;
++  p->needInit = 1;
++  p->rc.outStream = outStream;
++  return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
++}
++
++SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
++    ISeqInStream *inStream, UInt32 keepWindowSize,
++    ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  CLzmaEnc *p = (CLzmaEnc *)pp;
++  p->matchFinderBase.stream = inStream;
++  p->needInit = 1;
++  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
++}
++
++static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
++{
++  p->matchFinderBase.directInput = 1;
++  p->matchFinderBase.bufferBase = (Byte *)src;
++  p->matchFinderBase.directInputRem = srcLen;
++}
++
++SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
++    UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  CLzmaEnc *p = (CLzmaEnc *)pp;
++  LzmaEnc_SetInputBuf(p, src, srcLen);
++  p->needInit = 1;
++
++  return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
++}
++
++void LzmaEnc_Finish(CLzmaEncHandle pp)
++{
++  #ifndef _7ZIP_ST
++  CLzmaEnc *p = (CLzmaEnc *)pp;
++  if (p->mtMode)
++    MatchFinderMt_ReleaseStream(&p->matchFinderMt);
++  #else
++  pp = pp;
++  #endif
++}
++
++typedef struct
++{
++  ISeqOutStream funcTable;
++  Byte *data;
++  SizeT rem;
++  Bool overflow;
++} CSeqOutStreamBuf;
++
++static size_t MyWrite(void *pp, const void *data, size_t size)
++{
++  CSeqOutStreamBuf *p = (CSeqOutStreamBuf *)pp;
++  if (p->rem < size)
++  {
++    size = p->rem;
++    p->overflow = True;
++  }
++  memcpy(p->data, data, size);
++  p->rem -= size;
++  p->data += size;
++  return size;
++}
++
++
++UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
++{
++  const CLzmaEnc *p = (CLzmaEnc *)pp;
++  return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
++}
++
++const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
++{
++  const CLzmaEnc *p = (CLzmaEnc *)pp;
++  return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
++}
++
++SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
++    Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
++{
++  CLzmaEnc *p = (CLzmaEnc *)pp;
++  UInt64 nowPos64;
++  SRes res;
++  CSeqOutStreamBuf outStream;
++
++  outStream.funcTable.Write = MyWrite;
++  outStream.data = dest;
++  outStream.rem = *destLen;
++  outStream.overflow = False;
++
++  p->writeEndMark = False;
++  p->finished = False;
++  p->result = SZ_OK;
++
++  if (reInit)
++    LzmaEnc_Init(p);
++  LzmaEnc_InitPrices(p);
++  nowPos64 = p->nowPos64;
++  RangeEnc_Init(&p->rc);
++  p->rc.outStream = &outStream.funcTable;
++
++  res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
++
++  *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
++  *destLen -= outStream.rem;
++  if (outStream.overflow)
++    return SZ_ERROR_OUTPUT_EOF;
++
++  return res;
++}
++
++static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
++{
++  SRes res = SZ_OK;
++
++  #ifndef _7ZIP_ST
++  Byte allocaDummy[0x300];
++  int i = 0;
++  for (i = 0; i < 16; i++)
++    allocaDummy[i] = (Byte)i;
++  #endif
++
++  for (;;)
++  {
++    res = LzmaEnc_CodeOneBlock(p, False, 0, 0);
++    if (res != SZ_OK || p->finished != 0)
++      break;
++    if (progress != 0)
++    {
++      res = progress->Progress(progress, p->nowPos64, RangeEnc_GetProcessed(&p->rc));
++      if (res != SZ_OK)
++      {
++        res = SZ_ERROR_PROGRESS;
++        break;
++      }
++    }
++  }
++  LzmaEnc_Finish(p);
++  return res;
++}
++
++SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
++    ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
++  return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
++}
++
++SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
++{
++  CLzmaEnc *p = (CLzmaEnc *)pp;
++  int i;
++  UInt32 dictSize = p->dictSize;
++  if (*size < LZMA_PROPS_SIZE)
++    return SZ_ERROR_PARAM;
++  *size = LZMA_PROPS_SIZE;
++  props[0] = (Byte)((p->pb * 5 + p->lp) * 9 + p->lc);
++
++  for (i = 11; i <= 30; i++)
++  {
++    if (dictSize <= ((UInt32)2 << i))
++    {
++      dictSize = (2 << i);
++      break;
++    }
++    if (dictSize <= ((UInt32)3 << i))
++    {
++      dictSize = (3 << i);
++      break;
++    }
++  }
++
++  for (i = 0; i < 4; i++)
++    props[1 + i] = (Byte)(dictSize >> (8 * i));
++  return SZ_OK;
++}
++
++SRes LzmaEnc_MemEncode(CLzmaEncHandle pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
++    int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  SRes res;
++  CLzmaEnc *p = (CLzmaEnc *)pp;
++
++  CSeqOutStreamBuf outStream;
++
++  LzmaEnc_SetInputBuf(p, src, srcLen);
++
++  outStream.funcTable.Write = MyWrite;
++  outStream.data = dest;
++  outStream.rem = *destLen;
++  outStream.overflow = False;
++
++  p->writeEndMark = writeEndMark;
++
++  p->rc.outStream = &outStream.funcTable;
++  res = LzmaEnc_MemPrepare(pp, src, srcLen, 0, alloc, allocBig);
++  if (res == SZ_OK)
++    res = LzmaEnc_Encode2(p, progress);
++
++  *destLen -= outStream.rem;
++  if (outStream.overflow)
++    return SZ_ERROR_OUTPUT_EOF;
++  return res;
++}
++
++SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
++    const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
++    ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
++{
++  CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
++  SRes res;
++  if (p == 0)
++    return SZ_ERROR_MEM;
++
++  res = LzmaEnc_SetProps(p, props);
++  if (res == SZ_OK)
++  {
++    res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
++    if (res == SZ_OK)
++      res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
++          writeEndMark, progress, alloc, allocBig);
++  }
++
++  LzmaEnc_Destroy(p, alloc, allocBig);
++  return res;
++}
+--- /dev/null
++++ b/lib/lzma/Makefile
+@@ -0,0 +1,7 @@
++lzma_compress-objs := LzFind.o LzmaEnc.o
++lzma_decompress-objs := LzmaDec.o
++
++obj-$(CONFIG_LZMA_COMPRESS) += lzma_compress.o
++obj-$(CONFIG_LZMA_DECOMPRESS) += lzma_decompress.o
++
++EXTRA_CFLAGS += -Iinclude/linux -Iinclude/linux/lzma -include types.h

diff --git a/target/linux/generic/pending-6.0/532-jffs2_eofdetect.patch b/target/linux/generic/pending-6.0/532-jffs2_eofdetect.patch
new file mode 100644 (file)
index 0000000..744fbd0
--- /dev/null
+++ b/target/linux/generic/pending-6.0/532-jffs2_eofdetect.patch
@@ -0,0 +1,65 @@
+From: Felix Fietkau <[email protected]>
+Subject: fs: jffs2: EOF marker
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ fs/jffs2/build.c | 10 ++++++++++
+ fs/jffs2/scan.c  | 21 +++++++++++++++++++--
+ 2 files changed, 29 insertions(+), 2 deletions(-)
+
+--- a/fs/jffs2/build.c
++++ b/fs/jffs2/build.c
+@@ -117,6 +117,16 @@ static int jffs2_build_filesystem(struct
+       dbg_fsbuild("scanned flash completely\n");
+       jffs2_dbg_dump_block_lists_nolock(c);
+ 
++      if (c->flags & (1 << 7)) {
++              printk("%s(): unlocking the mtd device... ", __func__);
++              mtd_unlock(c->mtd, 0, c->mtd->size);
++              printk("done.\n");
++
++              printk("%s(): erasing all blocks after the end marker... ", __func__);
++              jffs2_erase_pending_blocks(c, -1);
++              printk("done.\n");
++      }
++
+       dbg_fsbuild("pass 1 starting\n");
+       c->flags |= JFFS2_SB_FLAG_BUILDING;
+       /* Now scan the directory tree, increasing nlink according to every dirent found. */
+--- a/fs/jffs2/scan.c
++++ b/fs/jffs2/scan.c
+@@ -148,8 +148,14 @@ int jffs2_scan_medium(struct jffs2_sb_in
+               /* reset summary info for next eraseblock scan */
+               jffs2_sum_reset_collected(s);
+ 
+-              ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
+-                                              buf_size, s);
++              if (c->flags & (1 << 7)) {
++                      if (mtd_block_isbad(c->mtd, jeb->offset))
++                              ret = BLK_STATE_BADBLOCK;
++                      else
++                              ret = BLK_STATE_ALLFF;
++              } else
++                      ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
++                                                      buf_size, s);
+ 
+               if (ret < 0)
+                       goto out;
+@@ -567,6 +573,17 @@ full_scan:
+                       return err;
+       }
+ 
++      if ((buf[0] == 0xde) &&
++              (buf[1] == 0xad) &&
++              (buf[2] == 0xc0) &&
++              (buf[3] == 0xde)) {
++              /* end of filesystem. erase everything after this point */
++              printk("%s(): End of filesystem marker found at 0x%x\n", __func__, jeb->offset);
++              c->flags |= (1 << 7);
++
++              return BLK_STATE_ALLFF;
++      }
++
+       /* We temporarily use 'ofs' as a pointer into the buffer/jeb */
+       ofs = 0;
+       max_ofs = EMPTY_SCAN_SIZE(c->sector_size);

diff --git a/target/linux/generic/pending-6.0/600-netfilter_conntrack_flush.patch b/target/linux/generic/pending-6.0/600-netfilter_conntrack_flush.patch
new file mode 100644 (file)
index 0000000..d8531ed
--- /dev/null
+++ b/target/linux/generic/pending-6.0/600-netfilter_conntrack_flush.patch
@@ -0,0 +1,90 @@
+From: Felix Fietkau <[email protected]>
+Subject: netfilter: add support for flushing conntrack via /proc
+
+lede-commit 8193bbe59a74d34d6a26d4a8cb857b1952905314
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ net/netfilter/nf_conntrack_standalone.c | 59 ++++++++++++++++++++++++++++++++-
+ 1 file changed, 58 insertions(+), 1 deletion(-)
+
+--- a/net/netfilter/nf_conntrack_standalone.c
++++ b/net/netfilter/nf_conntrack_standalone.c
+@@ -9,6 +9,7 @@
+ #include <linux/percpu.h>
+ #include <linux/netdevice.h>
+ #include <linux/security.h>
++#include <linux/inet.h>
+ #include <net/net_namespace.h>
+ #ifdef CONFIG_SYSCTL
+ #include <linux/sysctl.h>
+@@ -462,6 +463,58 @@ static int ct_cpu_seq_show(struct seq_fi
+       return 0;
+ }
+ 
++struct kill_request {
++      u16 family;
++      union nf_inet_addr addr;
++};
++
++static int kill_matching(struct nf_conn *i, void *data)
++{
++      struct kill_request *kr = data;
++      struct nf_conntrack_tuple *t1 = &i->tuplehash[IP_CT_DIR_ORIGINAL].tuple;
++      struct nf_conntrack_tuple *t2 = &i->tuplehash[IP_CT_DIR_REPLY].tuple;
++
++      if (!kr->family)
++              return 1;
++
++      if (t1->src.l3num != kr->family)
++              return 0;
++
++      return (nf_inet_addr_cmp(&kr->addr, &t1->src.u3) ||
++              nf_inet_addr_cmp(&kr->addr, &t1->dst.u3) ||
++              nf_inet_addr_cmp(&kr->addr, &t2->src.u3) ||
++              nf_inet_addr_cmp(&kr->addr, &t2->dst.u3));
++}
++
++static int ct_file_write(struct file *file, char *buf, size_t count)
++{
++      struct seq_file *seq = file->private_data;
++      struct nf_ct_iter_data iter_data;
++      struct kill_request kr = { };
++
++      if (count == 0)
++              return 0;
++
++      if (count >= INET6_ADDRSTRLEN)
++              count = INET6_ADDRSTRLEN - 1;
++
++      if (strnchr(buf, count, ':')) {
++              kr.family = AF_INET6;
++              if (!in6_pton(buf, count, (void *)&kr.addr, '\n', NULL))
++                      return -EINVAL;
++      } else if (strnchr(buf, count, '.')) {
++              kr.family = AF_INET;
++              if (!in4_pton(buf, count, (void *)&kr.addr, '\n', NULL))
++                      return -EINVAL;
++      }
++
++      iter_data.net = seq_file_net(seq);
++      iter_data.data = &kr;
++      nf_ct_iterate_cleanup_net(kill_matching, &iter_data);
++
++      return 0;
++}
++
+ static const struct seq_operations ct_cpu_seq_ops = {
+       .start  = ct_cpu_seq_start,
+       .next   = ct_cpu_seq_next,
+@@ -475,8 +526,9 @@ static int nf_conntrack_standalone_init_
+       kuid_t root_uid;
+       kgid_t root_gid;
+ 
+-      pde = proc_create_net("nf_conntrack", 0440, net->proc_net, &ct_seq_ops,
+-                      sizeof(struct ct_iter_state));
++      pde = proc_create_net_data_write("nf_conntrack", 0440, net->proc_net,
++                                       &ct_seq_ops, &ct_file_write,
++                                       sizeof(struct ct_iter_state), NULL);
+       if (!pde)
+               goto out_nf_conntrack;
+ 

diff --git a/target/linux/generic/pending-6.0/610-netfilter_match_bypass_default_checks.patch b/target/linux/generic/pending-6.0/610-netfilter_match_bypass_default_checks.patch
new file mode 100644 (file)
index 0000000..4577031
--- /dev/null
+++ b/target/linux/generic/pending-6.0/610-netfilter_match_bypass_default_checks.patch
@@ -0,0 +1,110 @@
+From: Felix Fietkau <[email protected]>
+Subject: kernel: add a new version of my netfilter speedup patches for linux 2.6.39 and 3.0
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/uapi/linux/netfilter_ipv4/ip_tables.h |  1 +
+ net/ipv4/netfilter/ip_tables.c                | 37 +++++++++++++++++++++++++++
+ 2 files changed, 38 insertions(+)
+
+--- a/include/uapi/linux/netfilter_ipv4/ip_tables.h
++++ b/include/uapi/linux/netfilter_ipv4/ip_tables.h
+@@ -89,6 +89,7 @@ struct ipt_ip {
+ #define IPT_F_FRAG            0x01    /* Set if rule is a fragment rule */
+ #define IPT_F_GOTO            0x02    /* Set if jump is a goto */
+ #define IPT_F_MASK            0x03    /* All possible flag bits mask. */
++#define IPT_F_NO_DEF_MATCH    0x80    /* Internal: no default match rules present */
+ 
+ /* Values for "inv" field in struct ipt_ip. */
+ #define IPT_INV_VIA_IN                0x01    /* Invert the sense of IN IFACE. */
+--- a/net/ipv4/netfilter/ip_tables.c
++++ b/net/ipv4/netfilter/ip_tables.c
+@@ -50,6 +50,9 @@ ip_packet_match(const struct iphdr *ip,
+ {
+       unsigned long ret;
+ 
++      if (ipinfo->flags & IPT_F_NO_DEF_MATCH)
++              return true;
++
+       if (NF_INVF(ipinfo, IPT_INV_SRCIP,
+                   (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) ||
+           NF_INVF(ipinfo, IPT_INV_DSTIP,
+@@ -80,6 +83,29 @@ ip_packet_match(const struct iphdr *ip,
+       return true;
+ }
+ 
++static void
++ip_checkdefault(struct ipt_ip *ip)
++{
++      static const char iface_mask[IFNAMSIZ] = {};
++
++      if (ip->invflags || ip->flags & IPT_F_FRAG)
++              return;
++
++      if (memcmp(ip->iniface_mask, iface_mask, IFNAMSIZ) != 0)
++              return;
++
++      if (memcmp(ip->outiface_mask, iface_mask, IFNAMSIZ) != 0)
++              return;
++
++      if (ip->smsk.s_addr || ip->dmsk.s_addr)
++              return;
++
++      if (ip->proto)
++              return;
++
++      ip->flags |= IPT_F_NO_DEF_MATCH;
++}
++
+ static bool
+ ip_checkentry(const struct ipt_ip *ip)
+ {
+@@ -524,6 +550,8 @@ find_check_entry(struct ipt_entry *e, st
+       struct xt_mtchk_param mtpar;
+       struct xt_entry_match *ematch;
+ 
++      ip_checkdefault(&e->ip);
++
+       if (!xt_percpu_counter_alloc(alloc_state, &e->counters))
+               return -ENOMEM;
+ 
+@@ -818,6 +846,7 @@ copy_entries_to_user(unsigned int total_
+       const struct xt_table_info *private = table->private;
+       int ret = 0;
+       const void *loc_cpu_entry;
++      u8 flags;
+ 
+       counters = alloc_counters(table);
+       if (IS_ERR(counters))
+@@ -845,6 +874,14 @@ copy_entries_to_user(unsigned int total_
+                       goto free_counters;
+               }
+ 
++              flags = e->ip.flags & IPT_F_MASK;
++              if (copy_to_user(userptr + off
++                               + offsetof(struct ipt_entry, ip.flags),
++                               &flags, sizeof(flags)) != 0) {
++                      ret = -EFAULT;
++                      goto free_counters;
++              }
++
+               for (i = sizeof(struct ipt_entry);
+                    i < e->target_offset;
+                    i += m->u.match_size) {
+@@ -1223,12 +1260,15 @@ compat_copy_entry_to_user(struct ipt_ent
+       compat_uint_t origsize;
+       const struct xt_entry_match *ematch;
+       int ret = 0;
++      u8 flags = e->ip.flags & IPT_F_MASK;
+ 
+       origsize = *size;
+       ce = *dstptr;
+       if (copy_to_user(ce, e, sizeof(struct ipt_entry)) != 0 ||
+           copy_to_user(&ce->counters, &counters[i],
+-          sizeof(counters[i])) != 0)
++          sizeof(counters[i])) != 0 ||
++          copy_to_user(&ce->ip.flags, &flags,
++          sizeof(flags)) != 0)
+               return -EFAULT;
+ 
+       *dstptr += sizeof(struct compat_ipt_entry);

diff --git a/target/linux/generic/pending-6.0/611-netfilter_match_bypass_default_table.patch b/target/linux/generic/pending-6.0/611-netfilter_match_bypass_default_table.patch
new file mode 100644 (file)
index 0000000..baf738a
--- /dev/null
+++ b/target/linux/generic/pending-6.0/611-netfilter_match_bypass_default_table.patch
@@ -0,0 +1,106 @@
+From: Felix Fietkau <[email protected]>
+Subject: netfilter: match bypass default table
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ net/ipv4/netfilter/ip_tables.c | 79 +++++++++++++++++++++++++++++++-----------
+ 1 file changed, 58 insertions(+), 21 deletions(-)
+
+--- a/net/ipv4/netfilter/ip_tables.c
++++ b/net/ipv4/netfilter/ip_tables.c
+@@ -246,6 +246,33 @@ struct ipt_entry *ipt_next_entry(const s
+       return (void *)entry + entry->next_offset;
+ }
+ 
++static bool
++ipt_handle_default_rule(struct ipt_entry *e, unsigned int *verdict)
++{
++      struct xt_entry_target *t;
++      struct xt_standard_target *st;
++
++      if (e->target_offset != sizeof(struct ipt_entry))
++              return false;
++
++      if (!(e->ip.flags & IPT_F_NO_DEF_MATCH))
++              return false;
++
++      t = ipt_get_target(e);
++      if (t->u.kernel.target->target)
++              return false;
++
++      st = (struct xt_standard_target *) t;
++      if (st->verdict == XT_RETURN)
++              return false;
++
++      if (st->verdict >= 0)
++              return false;
++
++      *verdict = (unsigned)(-st->verdict) - 1;
++      return true;
++}
++
+ /* Returns one of the generic firewall policies, like NF_ACCEPT. */
+ unsigned int
+ ipt_do_table(struct sk_buff *skb,
+@@ -266,27 +293,28 @@ ipt_do_table(struct sk_buff *skb,
+       unsigned int addend;
+ 
+       /* Initialization */
++      WARN_ON(!(table->valid_hooks & (1 << hook)));
++      local_bh_disable();
++      private = READ_ONCE(table->private); /* Address dependency. */
++      cpu        = smp_processor_id();
++      table_base = private->entries;
++
++      e = get_entry(table_base, private->hook_entry[hook]);
++      if (ipt_handle_default_rule(e, &verdict)) {
++              struct xt_counters *counter;
++
++              counter = xt_get_this_cpu_counter(&e->counters);
++              ADD_COUNTER(*counter, skb->len, 1);
++              local_bh_enable();
++              return verdict;
++      }
++
+       stackidx = 0;
+       ip = ip_hdr(skb);
+       indev = state->in ? state->in->name : nulldevname;
+       outdev = state->out ? state->out->name : nulldevname;
+-      /* We handle fragments by dealing with the first fragment as
+-       * if it was a normal packet.  All other fragments are treated
+-       * normally, except that they will NEVER match rules that ask
+-       * things we don't know, ie. tcp syn flag or ports).  If the
+-       * rule is also a fragment-specific rule, non-fragments won't
+-       * match it. */
+-      acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET;
+-      acpar.thoff   = ip_hdrlen(skb);
+-      acpar.hotdrop = false;
+-      acpar.state   = state;
+ 
+-      WARN_ON(!(table->valid_hooks & (1 << hook)));
+-      local_bh_disable();
+       addend = xt_write_recseq_begin();
+-      private = READ_ONCE(table->private); /* Address dependency. */
+-      cpu        = smp_processor_id();
+-      table_base = private->entries;
+       jumpstack  = (struct ipt_entry **)private->jumpstack[cpu];
+ 
+       /* Switch to alternate jumpstack if we're being invoked via TEE.
+@@ -299,7 +327,16 @@ ipt_do_table(struct sk_buff *skb,
+       if (static_key_false(&xt_tee_enabled))
+               jumpstack += private->stacksize * __this_cpu_read(nf_skb_duplicated);
+ 
+-      e = get_entry(table_base, private->hook_entry[hook]);
++      /* We handle fragments by dealing with the first fragment as
++       * if it was a normal packet.  All other fragments are treated
++       * normally, except that they will NEVER match rules that ask
++       * things we don't know, ie. tcp syn flag or ports).  If the
++       * rule is also a fragment-specific rule, non-fragments won't
++       * match it. */
++      acpar.fragoff = ntohs(ip->frag_off) & IP_OFFSET;
++      acpar.thoff   = ip_hdrlen(skb);
++      acpar.hotdrop = false;
++      acpar.state   = state;
+ 
+       do {
+               const struct xt_entry_target *t;

diff --git a/target/linux/generic/pending-6.0/612-netfilter_match_reduce_memory_access.patch b/target/linux/generic/pending-6.0/612-netfilter_match_reduce_memory_access.patch
new file mode 100644 (file)
index 0000000..79da677
--- /dev/null
+++ b/target/linux/generic/pending-6.0/612-netfilter_match_reduce_memory_access.patch
@@ -0,0 +1,22 @@
+From: Felix Fietkau <[email protected]>
+Subject: netfilter: reduce match memory access
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ net/ipv4/netfilter/ip_tables.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/net/ipv4/netfilter/ip_tables.c
++++ b/net/ipv4/netfilter/ip_tables.c
+@@ -53,9 +53,9 @@ ip_packet_match(const struct iphdr *ip,
+       if (ipinfo->flags & IPT_F_NO_DEF_MATCH)
+               return true;
+ 
+-      if (NF_INVF(ipinfo, IPT_INV_SRCIP,
++      if (NF_INVF(ipinfo, IPT_INV_SRCIP, ipinfo->smsk.s_addr &&
+                   (ip->saddr & ipinfo->smsk.s_addr) != ipinfo->src.s_addr) ||
+-          NF_INVF(ipinfo, IPT_INV_DSTIP,
++          NF_INVF(ipinfo, IPT_INV_DSTIP, ipinfo->dmsk.s_addr &&
+                   (ip->daddr & ipinfo->dmsk.s_addr) != ipinfo->dst.s_addr))
+               return false;
+ 

diff --git a/target/linux/generic/pending-6.0/613-netfilter_optional_tcp_window_check.patch b/target/linux/generic/pending-6.0/613-netfilter_optional_tcp_window_check.patch
new file mode 100644 (file)
index 0000000..fd9e63a
--- /dev/null
+++ b/target/linux/generic/pending-6.0/613-netfilter_optional_tcp_window_check.patch
@@ -0,0 +1,83 @@
+From: Felix Fietkau <[email protected]>
+Subject: netfilter: optional tcp window check
+
+Signed-off-by: Felix Fietkau <[email protected]>
+Signed-off-by: Christian 'Ansuel' Marangi <[email protected]>
+---
+ net/netfilter/nf_conntrack_proto_tcp.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/net/netfilter/nf_conntrack_proto_tcp.c
++++ b/net/netfilter/nf_conntrack_proto_tcp.c
+@@ -465,6 +465,9 @@ static bool tcp_in_window(struct nf_conn
+       s32 receiver_offset;
+       bool res, in_recv_win;
+ 
++      if (tn->tcp_no_window_check)
++              return true;
++
+       /*
+        * Get the required data from the packet.
+        */
+@@ -1160,7 +1163,7 @@ int nf_conntrack_tcp_packet(struct nf_co
+                IP_CT_TCP_FLAG_DATA_UNACKNOWLEDGED &&
+                timeouts[new_state] > timeouts[TCP_CONNTRACK_UNACK])
+               timeout = timeouts[TCP_CONNTRACK_UNACK];
+-      else if (ct->proto.tcp.last_win == 0 &&
++      else if (!tn->tcp_no_window_check && ct->proto.tcp.last_win == 0 &&
+                timeouts[new_state] > timeouts[TCP_CONNTRACK_RETRANS])
+               timeout = timeouts[TCP_CONNTRACK_RETRANS];
+       else
+@@ -1476,6 +1479,9 @@ void nf_conntrack_tcp_init_net(struct ne
+        */
+       tn->tcp_be_liberal = 0;
+ 
++      /* Skip Windows Check */
++      tn->tcp_no_window_check = 0;
++
+       /* If it's non-zero, we turn off RST sequence number check */
+       tn->tcp_ignore_invalid_rst = 0;
+ 
+--- a/net/netfilter/nf_conntrack_standalone.c
++++ b/net/netfilter/nf_conntrack_standalone.c
+@@ -633,6 +633,7 @@ enum nf_ct_sysctl_index {
+ #endif
+       NF_SYSCTL_CT_PROTO_TCP_LOOSE,
+       NF_SYSCTL_CT_PROTO_TCP_LIBERAL,
++      NF_SYSCTL_CT_PROTO_TCP_NO_WINDOW_CHECK,
+       NF_SYSCTL_CT_PROTO_TCP_IGNORE_INVALID_RST,
+       NF_SYSCTL_CT_PROTO_TCP_MAX_RETRANS,
+       NF_SYSCTL_CT_PROTO_TIMEOUT_UDP,
+@@ -849,6 +850,14 @@ static struct ctl_table nf_ct_sysctl_tab
+               .extra1         = SYSCTL_ZERO,
+               .extra2         = SYSCTL_ONE,
+       },
++      [NF_SYSCTL_CT_PROTO_TCP_NO_WINDOW_CHECK] = {
++              .procname       = "nf_conntrack_tcp_no_window_check",
++              .maxlen         = sizeof(u8),
++              .mode           = 0644,
++              .proc_handler   = proc_dou8vec_minmax,
++              .extra1         = SYSCTL_ZERO,
++              .extra2         = SYSCTL_ONE,
++      },
+       [NF_SYSCTL_CT_PROTO_TCP_IGNORE_INVALID_RST] = {
+               .procname       = "nf_conntrack_tcp_ignore_invalid_rst",
+               .maxlen         = sizeof(u8),
+@@ -1065,6 +1074,7 @@ static void nf_conntrack_standalone_init
+ 
+       XASSIGN(LOOSE, &tn->tcp_loose);
+       XASSIGN(LIBERAL, &tn->tcp_be_liberal);
++      XASSIGN(NO_WINDOW_CHECK, &tn->tcp_no_window_check);
+       XASSIGN(MAX_RETRANS, &tn->tcp_max_retrans);
+       XASSIGN(IGNORE_INVALID_RST, &tn->tcp_ignore_invalid_rst);
+ #undef XASSIGN
+--- a/include/net/netns/conntrack.h
++++ b/include/net/netns/conntrack.h
+@@ -26,6 +26,7 @@ struct nf_tcp_net {
+       unsigned int timeouts[TCP_CONNTRACK_TIMEOUT_MAX];
+       u8 tcp_loose;
+       u8 tcp_be_liberal;
++      u8 tcp_no_window_check;
+       u8 tcp_max_retrans;
+       u8 tcp_ignore_invalid_rst;
+ #if IS_ENABLED(CONFIG_NF_FLOW_TABLE)

diff --git a/target/linux/generic/pending-6.0/620-net_sched-codel-do-not-defer-queue-length-update.patch b/target/linux/generic/pending-6.0/620-net_sched-codel-do-not-defer-queue-length-update.patch
new file mode 100644 (file)
index 0000000..4b4825a
--- /dev/null
+++ b/target/linux/generic/pending-6.0/620-net_sched-codel-do-not-defer-queue-length-update.patch
@@ -0,0 +1,86 @@
+From: Konstantin Khlebnikov <[email protected]>
+Date: Mon, 21 Aug 2017 11:14:14 +0300
+Subject: [PATCH] net_sched/codel: do not defer queue length update
+
+When codel wants to drop last packet in ->dequeue() it cannot call
+qdisc_tree_reduce_backlog() right away - it will notify parent qdisc
+about zero qlen and HTB/HFSC will deactivate class. The same class will
+be deactivated second time by caller of ->dequeue(). Currently codel and
+fq_codel defer update. This triggers warning in HFSC when it's qlen != 0
+but there is no active classes.
+
+This patch update parent queue length immediately: just temporary increase
+qlen around qdisc_tree_reduce_backlog() to prevent first class deactivation
+if we have skb to return.
+
+This might open another problem in HFSC - now operation peek could fail and
+deactivate parent class.
+
+Signed-off-by: Konstantin Khlebnikov <[email protected]>
+Link: https://bugzilla.kernel.org/show_bug.cgi?id=109581
+---
+
+--- a/net/sched/sch_codel.c
++++ b/net/sched/sch_codel.c
+@@ -95,11 +95,17 @@ static struct sk_buff *codel_qdisc_deque
+                           &q->stats, qdisc_pkt_len, codel_get_enqueue_time,
+                           drop_func, dequeue_func);
+ 
+-      /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0,
+-       * or HTB crashes. Defer it for next round.
++      /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate
++       * parent class, dequeue in parent qdisc will do the same if we
++       * return skb. Temporary increment qlen if we have skb.
+        */
+-      if (q->stats.drop_count && sch->q.qlen) {
+-              qdisc_tree_reduce_backlog(sch, q->stats.drop_count, q->stats.drop_len);
++      if (q->stats.drop_count) {
++              if (skb)
++                      sch->q.qlen++;
++              qdisc_tree_reduce_backlog(sch, q->stats.drop_count,
++                                        q->stats.drop_len);
++              if (skb)
++                      sch->q.qlen--;
+               q->stats.drop_count = 0;
+               q->stats.drop_len = 0;
+       }
+--- a/net/sched/sch_fq_codel.c
++++ b/net/sched/sch_fq_codel.c
+@@ -304,6 +304,21 @@ begin:
+                           &flow->cvars, &q->cstats, qdisc_pkt_len,
+                           codel_get_enqueue_time, drop_func, dequeue_func);
+ 
++      /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate
++       * parent class, dequeue in parent qdisc will do the same if we
++       * return skb. Temporary increment qlen if we have skb.
++       */
++      if (q->cstats.drop_count) {
++              if (skb)
++                      sch->q.qlen++;
++              qdisc_tree_reduce_backlog(sch, q->cstats.drop_count,
++                                        q->cstats.drop_len);
++              if (skb)
++                      sch->q.qlen--;
++              q->cstats.drop_count = 0;
++              q->cstats.drop_len = 0;
++      }
++
+       if (!skb) {
+               /* force a pass through old_flows to prevent starvation */
+               if ((head == &q->new_flows) && !list_empty(&q->old_flows))
+@@ -314,15 +329,6 @@ begin:
+       }
+       qdisc_bstats_update(sch, skb);
+       flow->deficit -= qdisc_pkt_len(skb);
+-      /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0,
+-       * or HTB crashes. Defer it for next round.
+-       */
+-      if (q->cstats.drop_count && sch->q.qlen) {
+-              qdisc_tree_reduce_backlog(sch, q->cstats.drop_count,
+-                                        q->cstats.drop_len);
+-              q->cstats.drop_count = 0;
+-              q->cstats.drop_len = 0;
+-      }
+       return skb;
+ }
+ 

diff --git a/target/linux/generic/pending-6.0/630-packet_socket_type.patch b/target/linux/generic/pending-6.0/630-packet_socket_type.patch
new file mode 100644 (file)
index 0000000..c61935f
--- /dev/null
+++ b/target/linux/generic/pending-6.0/630-packet_socket_type.patch
@@ -0,0 +1,138 @@
+From: Felix Fietkau <[email protected]>
+Subject: net: add an optimization for dealing with raw sockets
+
+lede-commit: 4898039703d7315f0f3431c860123338ec3be0f6
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/uapi/linux/if_packet.h |  3 +++
+ net/packet/af_packet.c         | 34 +++++++++++++++++++++++++++-------
+ net/packet/internal.h          |  1 +
+ 3 files changed, 31 insertions(+), 7 deletions(-)
+
+--- a/include/uapi/linux/if_packet.h
++++ b/include/uapi/linux/if_packet.h
+@@ -33,6 +33,8 @@ struct sockaddr_ll {
+ #define PACKET_KERNEL         7               /* To kernel space      */
+ /* Unused, PACKET_FASTROUTE and PACKET_LOOPBACK are invisible to user space */
+ #define PACKET_FASTROUTE      6               /* Fastrouted frame     */
++#define PACKET_MASK_ANY               0xffffffff      /* mask for packet type bits */
++
+ 
+ /* Packet socket options */
+ 
+@@ -59,6 +61,7 @@ struct sockaddr_ll {
+ #define PACKET_ROLLOVER_STATS         21
+ #define PACKET_FANOUT_DATA            22
+ #define PACKET_IGNORE_OUTGOING                23
++#define PACKET_RECV_TYPE              24
+ 
+ #define PACKET_FANOUT_HASH            0
+ #define PACKET_FANOUT_LB              1
+--- a/net/packet/af_packet.c
++++ b/net/packet/af_packet.c
+@@ -1825,6 +1825,7 @@ static int packet_rcv_spkt(struct sk_buf
+ {
+       struct sock *sk;
+       struct sockaddr_pkt *spkt;
++      struct packet_sock *po;
+ 
+       /*
+        *      When we registered the protocol we saved the socket in the data
+@@ -1832,6 +1833,7 @@ static int packet_rcv_spkt(struct sk_buf
+        */
+ 
+       sk = pt->af_packet_priv;
++      po = pkt_sk(sk);
+ 
+       /*
+        *      Yank back the headers [hope the device set this
+@@ -1844,7 +1846,7 @@ static int packet_rcv_spkt(struct sk_buf
+        *      so that this procedure is noop.
+        */
+ 
+-      if (skb->pkt_type == PACKET_LOOPBACK)
++      if (!(po->pkt_type & (1 << skb->pkt_type)))
+               goto out;
+ 
+       if (!net_eq(dev_net(dev), sock_net(sk)))
+@@ -2082,12 +2084,12 @@ static int packet_rcv(struct sk_buff *sk
+       unsigned int snaplen, res;
+       bool is_drop_n_account = false;
+ 
+-      if (skb->pkt_type == PACKET_LOOPBACK)
+-              goto drop;
+-
+       sk = pt->af_packet_priv;
+       po = pkt_sk(sk);
+ 
++      if (!(po->pkt_type & (1 << skb->pkt_type)))
++              goto drop;
++
+       if (!net_eq(dev_net(dev), sock_net(sk)))
+               goto drop;
+ 
+@@ -2213,12 +2215,12 @@ static int tpacket_rcv(struct sk_buff *s
+       BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
+       BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
+ 
+-      if (skb->pkt_type == PACKET_LOOPBACK)
+-              goto drop;
+-
+       sk = pt->af_packet_priv;
+       po = pkt_sk(sk);
+ 
++      if (!(po->pkt_type & (1 << skb->pkt_type)))
++              goto drop;
++
+       if (!net_eq(dev_net(dev), sock_net(sk)))
+               goto drop;
+ 
+@@ -3330,6 +3332,7 @@ static int packet_create(struct net *net
+       mutex_init(&po->pg_vec_lock);
+       po->rollover = NULL;
+       po->prot_hook.func = packet_rcv;
++      po->pkt_type = PACKET_MASK_ANY & ~(1 << PACKET_LOOPBACK);
+ 
+       if (sock->type == SOCK_PACKET)
+               po->prot_hook.func = packet_rcv_spkt;
+@@ -3971,6 +3974,16 @@ packet_setsockopt(struct socket *sock, i
+               po->xmit = val ? packet_direct_xmit : dev_queue_xmit;
+               return 0;
+       }
++      case PACKET_RECV_TYPE:
++      {
++              unsigned int val;
++              if (optlen != sizeof(val))
++                      return -EINVAL;
++              if (copy_from_sockptr(&val, optval, sizeof(val)))
++                      return -EFAULT;
++              po->pkt_type = val & ~BIT(PACKET_LOOPBACK);
++              return 0;
++      }
+       default:
+               return -ENOPROTOOPT;
+       }
+@@ -4027,6 +4040,13 @@ static int packet_getsockopt(struct sock
+       case PACKET_VNET_HDR:
+               val = po->has_vnet_hdr;
+               break;
++      case PACKET_RECV_TYPE:
++              if (len > sizeof(unsigned int))
++                      len = sizeof(unsigned int);
++              val = po->pkt_type;
++
++              data = &val;
++              break;
+       case PACKET_VERSION:
+               val = po->tp_version;
+               break;
+--- a/net/packet/internal.h
++++ b/net/packet/internal.h
+@@ -137,6 +137,7 @@ struct packet_sock {
+       int                     (*xmit)(struct sk_buff *skb);
+       struct packet_type      prot_hook ____cacheline_aligned_in_smp;
+       atomic_t                tp_drops ____cacheline_aligned_in_smp;
++      unsigned int            pkt_type;
+ };
+ 
+ static inline struct packet_sock *pkt_sk(struct sock *sk)

diff --git a/target/linux/generic/pending-6.0/655-increase_skb_pad.patch b/target/linux/generic/pending-6.0/655-increase_skb_pad.patch
new file mode 100644 (file)
index 0000000..f89ee0b
--- /dev/null
+++ b/target/linux/generic/pending-6.0/655-increase_skb_pad.patch
@@ -0,0 +1,20 @@
+From: Felix Fietkau <[email protected]>
+Subject: kernel: add a few patches for avoiding unnecessary skb reallocations - significantly improves ethernet<->wireless performance
+
+lede-commit: 6f89cffc9add6939d44a6b54cf9a5e77849aa7fd
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/linux/skbuff.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/linux/skbuff.h
++++ b/include/linux/skbuff.h
+@@ -2782,7 +2782,7 @@ static inline int pskb_network_may_pull(
+  * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8)
+  */
+ #ifndef NET_SKB_PAD
+-#define NET_SKB_PAD   max(32, L1_CACHE_BYTES)
++#define NET_SKB_PAD   max(64, L1_CACHE_BYTES)
+ #endif
+ 
+ int ___pskb_trim(struct sk_buff *skb, unsigned int len);

diff --git a/target/linux/generic/pending-6.0/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch b/target/linux/generic/pending-6.0/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch
new file mode 100644 (file)
index 0000000..09efa1e
--- /dev/null
+++ b/target/linux/generic/pending-6.0/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch
@@ -0,0 +1,511 @@
+From: Steven Barth <[email protected]>
+Subject: Add support for MAP-E FMRs (mesh mode)
+
+MAP-E FMRs (draft-ietf-softwire-map-10) are rules for IPv4-communication
+between MAP CEs (mesh mode) without the need to forward such data to a
+border relay. This is similar to how 6rd works but for IPv4 over IPv6.
+
+Signed-off-by: Steven Barth <[email protected]>
+---
+ include/net/ip6_tunnel.h       |  13 ++
+ include/uapi/linux/if_tunnel.h |  13 ++
+ net/ipv6/ip6_tunnel.c          | 276 +++++++++++++++++++++++++++++++++++++++--
+ 3 files changed, 291 insertions(+), 11 deletions(-)
+
+--- a/include/net/ip6_tunnel.h
++++ b/include/net/ip6_tunnel.h
+@@ -18,6 +18,18 @@
+ /* determine capability on a per-packet basis */
+ #define IP6_TNL_F_CAP_PER_PACKET 0x40000
+ 
++/* IPv6 tunnel FMR */
++struct __ip6_tnl_fmr {
++      struct __ip6_tnl_fmr *next; /* next fmr in list */
++      struct in6_addr ip6_prefix;
++      struct in_addr ip4_prefix;
++
++      __u8 ip6_prefix_len;
++      __u8 ip4_prefix_len;
++      __u8 ea_len;
++      __u8 offset;
++};
++
+ struct __ip6_tnl_parm {
+       char name[IFNAMSIZ];    /* name of tunnel device */
+       int link;               /* ifindex of underlying L2 interface */
+@@ -29,6 +41,7 @@ struct __ip6_tnl_parm {
+       __u32 flags;            /* tunnel flags */
+       struct in6_addr laddr;  /* local tunnel end-point address */
+       struct in6_addr raddr;  /* remote tunnel end-point address */
++      struct __ip6_tnl_fmr *fmrs;     /* FMRs */
+ 
+       __be16                  i_flags;
+       __be16                  o_flags;
+--- a/include/uapi/linux/if_tunnel.h
++++ b/include/uapi/linux/if_tunnel.h
+@@ -77,10 +77,23 @@ enum {
+       IFLA_IPTUN_ENCAP_DPORT,
+       IFLA_IPTUN_COLLECT_METADATA,
+       IFLA_IPTUN_FWMARK,
++      IFLA_IPTUN_FMRS,
+       __IFLA_IPTUN_MAX,
+ };
+ #define IFLA_IPTUN_MAX        (__IFLA_IPTUN_MAX - 1)
+ 
++enum {
++      IFLA_IPTUN_FMR_UNSPEC,
++      IFLA_IPTUN_FMR_IP6_PREFIX,
++      IFLA_IPTUN_FMR_IP4_PREFIX,
++      IFLA_IPTUN_FMR_IP6_PREFIX_LEN,
++      IFLA_IPTUN_FMR_IP4_PREFIX_LEN,
++      IFLA_IPTUN_FMR_EA_LEN,
++      IFLA_IPTUN_FMR_OFFSET,
++      __IFLA_IPTUN_FMR_MAX,
++};
++#define IFLA_IPTUN_FMR_MAX (__IFLA_IPTUN_FMR_MAX - 1)
++
+ enum tunnel_encap_types {
+       TUNNEL_ENCAP_NONE,
+       TUNNEL_ENCAP_FOU,
+--- a/net/ipv6/ip6_tunnel.c
++++ b/net/ipv6/ip6_tunnel.c
+@@ -11,6 +11,9 @@
+  *      linux/net/ipv6/sit.c and linux/net/ipv4/ipip.c
+  *
+  *      RFC 2473
++ *
++ *      Changes:
++ *      Steven Barth <[email protected]>:           MAP-E FMR support
+  */
+ 
+ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+@@ -67,9 +70,9 @@ static bool log_ecn_error = true;
+ module_param(log_ecn_error, bool, 0644);
+ MODULE_PARM_DESC(log_ecn_error, "Log packets received with corrupted ECN");
+ 
+-static u32 HASH(const struct in6_addr *addr1, const struct in6_addr *addr2)
++static u32 HASH(const struct in6_addr *addr)
+ {
+-      u32 hash = ipv6_addr_hash(addr1) ^ ipv6_addr_hash(addr2);
++      u32 hash = ipv6_addr_hash(addr);
+ 
+       return hash_32(hash, IP6_TUNNEL_HASH_SIZE_SHIFT);
+ }
+@@ -114,17 +117,33 @@ static struct ip6_tnl *
+ ip6_tnl_lookup(struct net *net, int link,
+              const struct in6_addr *remote, const struct in6_addr *local)
+ {
+-      unsigned int hash = HASH(remote, local);
++      unsigned int hash = HASH(local);
+       struct ip6_tnl *t, *cand = NULL;
+       struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id);
+       struct in6_addr any;
+ 
+       for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) {
+               if (!ipv6_addr_equal(local, &t->parms.laddr) ||
+-                  !ipv6_addr_equal(remote, &t->parms.raddr) ||
+                   !(t->dev->flags & IFF_UP))
+                       continue;
+ 
++              if (!ipv6_addr_equal(remote, &t->parms.raddr)) {
++                      struct __ip6_tnl_fmr *fmr;
++                      bool found = false;
++
++                      for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) {
++                              if (!ipv6_prefix_equal(remote, &fmr->ip6_prefix,
++                                                     fmr->ip6_prefix_len))
++                                      continue;
++
++                              found = true;
++                              break;
++                      }
++
++                      if (!found)
++                              continue;
++              }
++
+               if (link == t->parms.link)
+                       return t;
+               else
+@@ -132,7 +151,7 @@ ip6_tnl_lookup(struct net *net, int link
+       }
+ 
+       memset(&any, 0, sizeof(any));
+-      hash = HASH(&any, local);
++      hash = HASH(local);
+       for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) {
+               if (!ipv6_addr_equal(local, &t->parms.laddr) ||
+                   !ipv6_addr_any(&t->parms.raddr) ||
+@@ -145,7 +164,7 @@ ip6_tnl_lookup(struct net *net, int link
+                       cand = t;
+       }
+ 
+-      hash = HASH(remote, &any);
++      hash = HASH(&any);
+       for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) {
+               if (!ipv6_addr_equal(remote, &t->parms.raddr) ||
+                   !ipv6_addr_any(&t->parms.laddr) ||
+@@ -194,7 +213,7 @@ ip6_tnl_bucket(struct ip6_tnl_net *ip6n,
+ 
+       if (!ipv6_addr_any(remote) || !ipv6_addr_any(local)) {
+               prio = 1;
+-              h = HASH(remote, local);
++              h = HASH(local);
+       }
+       return &ip6n->tnls[prio][h];
+ }
+@@ -378,6 +397,12 @@ ip6_tnl_dev_uninit(struct net_device *de
+       struct net *net = t->net;
+       struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id);
+ 
++      while (t->parms.fmrs) {
++              struct __ip6_tnl_fmr *next = t->parms.fmrs->next;
++              kfree(t->parms.fmrs);
++              t->parms.fmrs = next;
++      }
++
+       if (dev == ip6n->fb_tnl_dev)
+               RCU_INIT_POINTER(ip6n->tnls_wc[0], NULL);
+       else
+@@ -790,6 +815,107 @@ int ip6_tnl_rcv_ctl(struct ip6_tnl *t,
+ }
+ EXPORT_SYMBOL_GPL(ip6_tnl_rcv_ctl);
+ 
++/**
++ * ip4ip6_fmr_calc - calculate target / source IPv6-address based on FMR
++ *   @dest: destination IPv6 address buffer
++ *   @skb: received socket buffer
++ *   @fmr: MAP FMR
++ *   @xmit: Calculate for xmit or rcv
++ **/
++static void ip4ip6_fmr_calc(struct in6_addr *dest,
++              const struct iphdr *iph, const uint8_t *end,
++              const struct __ip6_tnl_fmr *fmr, bool xmit)
++{
++      int psidlen = fmr->ea_len - (32 - fmr->ip4_prefix_len);
++      u8 *portp = NULL;
++      bool use_dest_addr;
++      const struct iphdr *dsth = iph;
++
++      if ((u8*)dsth >= end)
++              return;
++
++      /* find significant IP header */
++      if (iph->protocol == IPPROTO_ICMP) {
++              struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4);
++              if (ih && ((u8*)&ih[1]) <= end && (
++                      ih->type == ICMP_DEST_UNREACH ||
++                      ih->type == ICMP_SOURCE_QUENCH ||
++                      ih->type == ICMP_TIME_EXCEEDED ||
++                      ih->type == ICMP_PARAMETERPROB ||
++                      ih->type == ICMP_REDIRECT))
++                              dsth = (const struct iphdr*)&ih[1];
++      }
++
++      /* in xmit-path use dest port by default and source port only if
++              this is an ICMP reply to something else; vice versa in rcv-path */
++      use_dest_addr = (xmit && dsth == iph) || (!xmit && dsth != iph);
++
++      /* get dst port */
++      if (((u8*)&dsth[1]) <= end && (
++              dsth->protocol == IPPROTO_UDP ||
++              dsth->protocol == IPPROTO_TCP ||
++              dsth->protocol == IPPROTO_SCTP ||
++              dsth->protocol == IPPROTO_DCCP)) {
++                      /* for UDP, TCP, SCTP and DCCP source and dest port
++                      follow IPv4 header directly */
++                      portp = ((u8*)dsth) + dsth->ihl * 4;
++
++                      if (use_dest_addr)
++                              portp += sizeof(u16);
++      } else if (iph->protocol == IPPROTO_ICMP) {
++              struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4);
++
++              /* use icmp identifier as port */
++              if (((u8*)&ih) <= end && (
++                  (use_dest_addr && (
++                  ih->type == ICMP_ECHOREPLY ||
++                      ih->type == ICMP_TIMESTAMPREPLY ||
++                      ih->type == ICMP_INFO_REPLY ||
++                      ih->type == ICMP_ADDRESSREPLY)) ||
++                      (!use_dest_addr && (
++                      ih->type == ICMP_ECHO ||
++                      ih->type == ICMP_TIMESTAMP ||
++                      ih->type == ICMP_INFO_REQUEST ||
++                      ih->type == ICMP_ADDRESS)
++                      )))
++                              portp = (u8*)&ih->un.echo.id;
++      }
++
++      if ((portp && &portp[2] <= end) || psidlen == 0) {
++              int frombyte = fmr->ip6_prefix_len / 8;
++              int fromrem = fmr->ip6_prefix_len % 8;
++              int bytes = sizeof(struct in6_addr) - frombyte;
++              const u32 *addr = (use_dest_addr) ? &iph->daddr : &iph->saddr;
++              u64 eabits = ((u64)ntohl(*addr)) << (32 + fmr->ip4_prefix_len);
++              u64 t = 0;
++
++              /* extract PSID from port and add it to eabits */
++              u16 psidbits = 0;
++              if (psidlen > 0) {
++                      psidbits = ((u16)portp[0]) << 8 | ((u16)portp[1]);
++                      psidbits >>= 16 - psidlen - fmr->offset;
++                      psidbits = (u16)(psidbits << (16 - psidlen));
++                      eabits |= ((u64)psidbits) << (48 - (fmr->ea_len - psidlen));
++              }
++
++              /* rewrite destination address */
++              *dest = fmr->ip6_prefix;
++              memcpy(&dest->s6_addr[10], addr, sizeof(*addr));
++              dest->s6_addr16[7] = htons(psidbits >> (16 - psidlen));
++
++              if (bytes > sizeof(u64))
++                      bytes = sizeof(u64);
++
++              /* insert eabits */
++              memcpy(&t, &dest->s6_addr[frombyte], bytes);
++              t = be64_to_cpu(t) & ~(((((u64)1) << fmr->ea_len) - 1)
++                      << (64 - fmr->ea_len - fromrem));
++              t = cpu_to_be64(t | (eabits >> fromrem));
++              memcpy(&dest->s6_addr[frombyte], &t, bytes);
++      }
++}
++
++
+ static int __ip6_tnl_rcv(struct ip6_tnl *tunnel, struct sk_buff *skb,
+                        const struct tnl_ptk_info *tpi,
+                        struct metadata_dst *tun_dst,
+@@ -843,6 +969,27 @@ static int __ip6_tnl_rcv(struct ip6_tnl
+       skb_reset_network_header(skb);
+       memset(skb->cb, 0, sizeof(struct inet6_skb_parm));
+ 
++      if (tpi->proto == htons(ETH_P_IP) && tunnel->parms.fmrs &&
++              !ipv6_addr_equal(&ipv6h->saddr, &tunnel->parms.raddr)) {
++                      /* Packet didn't come from BR, so lookup FMR */
++                      struct __ip6_tnl_fmr *fmr;
++                      struct in6_addr expected = tunnel->parms.raddr;
++                      for (fmr = tunnel->parms.fmrs; fmr; fmr = fmr->next)
++                              if (ipv6_prefix_equal(&ipv6h->saddr,
++                                      &fmr->ip6_prefix, fmr->ip6_prefix_len))
++                                              break;
++
++                      /* Check that IPv6 matches IPv4 source to prevent spoofing */
++                      if (fmr)
++                              ip4ip6_fmr_calc(&expected, ip_hdr(skb),
++                                              skb_tail_pointer(skb), fmr, false);
++
++                      if (!ipv6_addr_equal(&ipv6h->saddr, &expected)) {
++                              rcu_read_unlock();
++                              goto drop;
++                      }
++      }
++
+       __skb_tunnel_rx(skb, tunnel->dev, tunnel->net);
+ 
+       err = dscp_ecn_decapsulate(tunnel, ipv6h, skb);
+@@ -994,6 +1141,7 @@ static void init_tel_txopt(struct ipv6_t
+       opt->ops.opt_nflen = 8;
+ }
+ 
++
+ /**
+  * ip6_tnl_addr_conflict - compare packet addresses to tunnel's own
+  *   @t: the outgoing tunnel device
+@@ -1274,6 +1422,7 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str
+               u8 protocol)
+ {
+       struct ip6_tnl *t = netdev_priv(dev);
++      struct __ip6_tnl_fmr *fmr;
+       struct ipv6hdr *ipv6h;
+       const struct iphdr  *iph;
+       int encap_limit = -1;
+@@ -1373,6 +1522,18 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str
+       fl6.flowi6_uid = sock_net_uid(dev_net(dev), NULL);
+       dsfield = INET_ECN_encapsulate(dsfield, orig_dsfield);
+ 
++      /* try to find matching FMR */
++      for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) {
++              unsigned mshift = 32 - fmr->ip4_prefix_len;
++              if (ntohl(fmr->ip4_prefix.s_addr) >> mshift ==
++                              ntohl(ip_hdr(skb)->daddr) >> mshift)
++                      break;
++      }
++
++      /* change dstaddr according to FMR */
++      if (fmr)
++              ip4ip6_fmr_calc(&fl6.daddr, ip_hdr(skb), skb_tail_pointer(skb), fmr, true);
++
+       if (iptunnel_handle_offloads(skb, SKB_GSO_IPXIP6))
+               return -1;
+ 
+@@ -1525,6 +1686,14 @@ ip6_tnl_change(struct ip6_tnl *t, const
+       t->parms.link = p->link;
+       t->parms.proto = p->proto;
+       t->parms.fwmark = p->fwmark;
++
++      while (t->parms.fmrs) {
++              struct __ip6_tnl_fmr *next = t->parms.fmrs->next;
++              kfree(t->parms.fmrs);
++              t->parms.fmrs = next;
++      }
++      t->parms.fmrs = p->fmrs;
++
+       dst_cache_reset(&t->dst_cache);
+       ip6_tnl_link_config(t);
+       return 0;
+@@ -1563,6 +1732,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_
+       p->flowinfo = u->flowinfo;
+       p->link = u->link;
+       p->proto = u->proto;
++      p->fmrs = NULL;
+       memcpy(p->name, u->name, sizeof(u->name));
+ }
+ 
+@@ -1949,6 +2119,15 @@ static int ip6_tnl_validate(struct nlatt
+       return 0;
+ }
+ 
++static const struct nla_policy ip6_tnl_fmr_policy[IFLA_IPTUN_FMR_MAX + 1] = {
++      [IFLA_IPTUN_FMR_IP6_PREFIX] = { .len = sizeof(struct in6_addr) },
++      [IFLA_IPTUN_FMR_IP4_PREFIX] = { .len = sizeof(struct in_addr) },
++      [IFLA_IPTUN_FMR_IP6_PREFIX_LEN] = { .type = NLA_U8 },
++      [IFLA_IPTUN_FMR_IP4_PREFIX_LEN] = { .type = NLA_U8 },
++      [IFLA_IPTUN_FMR_EA_LEN] = { .type = NLA_U8 },
++      [IFLA_IPTUN_FMR_OFFSET] = { .type = NLA_U8 }
++};
++
+ static void ip6_tnl_netlink_parms(struct nlattr *data[],
+                                 struct __ip6_tnl_parm *parms)
+ {
+@@ -1986,6 +2165,46 @@ static void ip6_tnl_netlink_parms(struct
+ 
+       if (data[IFLA_IPTUN_FWMARK])
+               parms->fwmark = nla_get_u32(data[IFLA_IPTUN_FWMARK]);
++
++      if (data[IFLA_IPTUN_FMRS]) {
++              unsigned rem;
++              struct nlattr *fmr;
++              nla_for_each_nested(fmr, data[IFLA_IPTUN_FMRS], rem) {
++                      struct nlattr *fmrd[IFLA_IPTUN_FMR_MAX + 1], *c;
++                      struct __ip6_tnl_fmr *nfmr;
++
++                      nla_parse_nested(fmrd, IFLA_IPTUN_FMR_MAX,
++                              fmr, ip6_tnl_fmr_policy, NULL);
++
++                      if (!(nfmr = kzalloc(sizeof(*nfmr), GFP_KERNEL)))
++                              continue;
++
++                      nfmr->offset = 6;
++
++                      if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX]))
++                              nla_memcpy(&nfmr->ip6_prefix, fmrd[IFLA_IPTUN_FMR_IP6_PREFIX],
++                                      sizeof(nfmr->ip6_prefix));
++
++                      if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX]))
++                              nla_memcpy(&nfmr->ip4_prefix, fmrd[IFLA_IPTUN_FMR_IP4_PREFIX],
++                                      sizeof(nfmr->ip4_prefix));
++
++                      if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX_LEN]))
++                              nfmr->ip6_prefix_len = nla_get_u8(c);
++
++                      if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX_LEN]))
++                              nfmr->ip4_prefix_len = nla_get_u8(c);
++
++                      if ((c = fmrd[IFLA_IPTUN_FMR_EA_LEN]))
++                              nfmr->ea_len = nla_get_u8(c);
++
++                      if ((c = fmrd[IFLA_IPTUN_FMR_OFFSET]))
++                              nfmr->offset = nla_get_u8(c);
++
++                      nfmr->next = parms->fmrs;
++                      parms->fmrs = nfmr;
++              }
++      }
+ }
+ 
+ static bool ip6_tnl_netlink_encap_parms(struct nlattr *data[],
+@@ -2101,6 +2320,12 @@ static void ip6_tnl_dellink(struct net_d
+ 
+ static size_t ip6_tnl_get_size(const struct net_device *dev)
+ {
++      const struct ip6_tnl *t = netdev_priv(dev);
++      struct __ip6_tnl_fmr *c;
++      int fmrs = 0;
++      for (c = t->parms.fmrs; c; c = c->next)
++              ++fmrs;
++
+       return
+               /* IFLA_IPTUN_LINK */
+               nla_total_size(4) +
+@@ -2130,6 +2355,24 @@ static size_t ip6_tnl_get_size(const str
+               nla_total_size(0) +
+               /* IFLA_IPTUN_FWMARK */
+               nla_total_size(4) +
++              /* IFLA_IPTUN_FMRS */
++              nla_total_size(0) +
++              (
++                      /* nest */
++                      nla_total_size(0) +
++                      /* IFLA_IPTUN_FMR_IP6_PREFIX */
++                      nla_total_size(sizeof(struct in6_addr)) +
++                      /* IFLA_IPTUN_FMR_IP4_PREFIX */
++                      nla_total_size(sizeof(struct in_addr)) +
++                      /* IFLA_IPTUN_FMR_EA_LEN */
++                      nla_total_size(1) +
++                      /* IFLA_IPTUN_FMR_IP6_PREFIX_LEN */
++                      nla_total_size(1) +
++                      /* IFLA_IPTUN_FMR_IP4_PREFIX_LEN */
++                      nla_total_size(1) +
++                      /* IFLA_IPTUN_FMR_OFFSET */
++                      nla_total_size(1)
++              ) * fmrs +
+               0;
+ }
+ 
+@@ -2137,6 +2380,9 @@ static int ip6_tnl_fill_info(struct sk_b
+ {
+       struct ip6_tnl *tunnel = netdev_priv(dev);
+       struct __ip6_tnl_parm *parm = &tunnel->parms;
++      struct __ip6_tnl_fmr *c;
++      int fmrcnt = 0;
++      struct nlattr *fmrs;
+ 
+       if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) ||
+           nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) ||
+@@ -2146,9 +2392,27 @@ static int ip6_tnl_fill_info(struct sk_b
+           nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) ||
+           nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) ||
+           nla_put_u8(skb, IFLA_IPTUN_PROTO, parm->proto) ||
+-          nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark))
++          nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark) ||
++          !(fmrs = nla_nest_start(skb, IFLA_IPTUN_FMRS)))
+               goto nla_put_failure;
+ 
++      for (c = parm->fmrs; c; c = c->next) {
++              struct nlattr *fmr = nla_nest_start(skb, ++fmrcnt);
++              if (!fmr ||
++                      nla_put(skb, IFLA_IPTUN_FMR_IP6_PREFIX,
++                              sizeof(c->ip6_prefix), &c->ip6_prefix) ||
++                      nla_put(skb, IFLA_IPTUN_FMR_IP4_PREFIX,
++                              sizeof(c->ip4_prefix), &c->ip4_prefix) ||
++                      nla_put_u8(skb, IFLA_IPTUN_FMR_IP6_PREFIX_LEN, c->ip6_prefix_len) ||
++                      nla_put_u8(skb, IFLA_IPTUN_FMR_IP4_PREFIX_LEN, c->ip4_prefix_len) ||
++                      nla_put_u8(skb, IFLA_IPTUN_FMR_EA_LEN, c->ea_len) ||
++                      nla_put_u8(skb, IFLA_IPTUN_FMR_OFFSET, c->offset))
++                              goto nla_put_failure;
++
++              nla_nest_end(skb, fmr);
++      }
++      nla_nest_end(skb, fmrs);
++
+       if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) ||
+           nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) ||
+           nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) ||
+@@ -2188,6 +2452,7 @@ static const struct nla_policy ip6_tnl_p
+       [IFLA_IPTUN_ENCAP_DPORT]        = { .type = NLA_U16 },
+       [IFLA_IPTUN_COLLECT_METADATA]   = { .type = NLA_FLAG },
+       [IFLA_IPTUN_FWMARK]             = { .type = NLA_U32 },
++      [IFLA_IPTUN_FMRS]               = { .type = NLA_NESTED },
+ };
+ 
+ static struct rtnl_link_ops ip6_link_ops __read_mostly = {

diff --git a/target/linux/generic/pending-6.0/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-6.0/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
new file mode 100644 (file)
index 0000000..ac43962
--- /dev/null
+++ b/target/linux/generic/pending-6.0/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
@@ -0,0 +1,263 @@
+From: Jonas Gorski <[email protected]>
+Subject: ipv6: allow rejecting with "source address failed policy"
+
+RFC6204 L-14 requires rejecting traffic from invalid addresses with
+ICMPv6 Destination Unreachable, Code 5 (Source address failed ingress/
+egress policy) on the LAN side, so add an appropriate rule for that.
+
+Signed-off-by: Jonas Gorski <[email protected]>
+---
+ include/net/netns/ipv6.h       |  1 +
+ include/uapi/linux/fib_rules.h |  4 +++
+ include/uapi/linux/rtnetlink.h |  1 +
+ net/ipv4/fib_semantics.c       |  4 +++
+ net/ipv4/fib_trie.c            |  1 +
+ net/ipv4/ipmr.c                |  1 +
+ net/ipv6/fib6_rules.c          |  4 +++
+ net/ipv6/ip6mr.c               |  2 ++
+ net/ipv6/route.c               | 58 +++++++++++++++++++++++++++++++++++++++++-
+ 9 files changed, 75 insertions(+), 1 deletion(-)
+
+--- a/include/net/netns/ipv6.h
++++ b/include/net/netns/ipv6.h
+@@ -85,6 +85,7 @@ struct netns_ipv6 {
+       unsigned int            fib6_routes_require_src;
+ #endif
+       struct rt6_info         *ip6_prohibit_entry;
++      struct rt6_info         *ip6_policy_failed_entry;
+       struct rt6_info         *ip6_blk_hole_entry;
+       struct fib6_table       *fib6_local_tbl;
+       struct fib_rules_ops    *fib6_rules_ops;
+--- a/include/uapi/linux/fib_rules.h
++++ b/include/uapi/linux/fib_rules.h
+@@ -82,6 +82,10 @@ enum {
+       FR_ACT_BLACKHOLE,       /* Drop without notification */
+       FR_ACT_UNREACHABLE,     /* Drop with ENETUNREACH */
+       FR_ACT_PROHIBIT,        /* Drop with EACCES */
++      FR_ACT_RES9,
++      FR_ACT_RES10,
++      FR_ACT_RES11,
++      FR_ACT_POLICY_FAILED,   /* Drop with EACCES */
+       __FR_ACT_MAX,
+ };
+ 
+--- a/include/uapi/linux/rtnetlink.h
++++ b/include/uapi/linux/rtnetlink.h
+@@ -256,6 +256,7 @@ enum {
+       RTN_THROW,              /* Not in this table            */
+       RTN_NAT,                /* Translate this address       */
+       RTN_XRESOLVE,           /* Use external resolver        */
++      RTN_POLICY_FAILED,      /* Failed ingress/egress policy */
+       __RTN_MAX
+ };
+ 
+--- a/net/ipv4/fib_semantics.c
++++ b/net/ipv4/fib_semantics.c
+@@ -142,6 +142,10 @@ const struct fib_prop fib_props[RTN_MAX
+               .error  = -EINVAL,
+               .scope  = RT_SCOPE_NOWHERE,
+       },
++      [RTN_POLICY_FAILED] = {
++              .error  = -EACCES,
++              .scope  = RT_SCOPE_UNIVERSE,
++      },
+ };
+ 
+ static void rt_fibinfo_free(struct rtable __rcu **rtp)
+--- a/net/ipv4/fib_trie.c
++++ b/net/ipv4/fib_trie.c
+@@ -2770,6 +2770,7 @@ static const char *const rtn_type_names[
+       [RTN_THROW] = "THROW",
+       [RTN_NAT] = "NAT",
+       [RTN_XRESOLVE] = "XRESOLVE",
++      [RTN_POLICY_FAILED] = "POLICY_FAILED",
+ };
+ 
+ static inline const char *rtn_type(char *buf, size_t len, unsigned int t)
+--- a/net/ipv4/ipmr.c
++++ b/net/ipv4/ipmr.c
+@@ -175,6 +175,7 @@ static int ipmr_rule_action(struct fib_r
+       case FR_ACT_UNREACHABLE:
+               return -ENETUNREACH;
+       case FR_ACT_PROHIBIT:
++      case FR_ACT_POLICY_FAILED:
+               return -EACCES;
+       case FR_ACT_BLACKHOLE:
+       default:
+--- a/net/ipv6/fib6_rules.c
++++ b/net/ipv6/fib6_rules.c
+@@ -220,6 +220,10 @@ static int __fib6_rule_action(struct fib
+               err = -EACCES;
+               rt = net->ipv6.ip6_prohibit_entry;
+               goto discard_pkt;
++      case FR_ACT_POLICY_FAILED:
++              err = -EACCES;
++              rt = net->ipv6.ip6_policy_failed_entry;
++              goto discard_pkt;
+       }
+ 
+       tb_id = fib_rule_get_table(rule, arg);
+--- a/net/ipv6/ip6mr.c
++++ b/net/ipv6/ip6mr.c
+@@ -163,6 +163,8 @@ static int ip6mr_rule_action(struct fib_
+               return -ENETUNREACH;
+       case FR_ACT_PROHIBIT:
+               return -EACCES;
++      case FR_ACT_POLICY_FAILED:
++              return -EACCES;
+       case FR_ACT_BLACKHOLE:
+       default:
+               return -EINVAL;
+--- a/net/ipv6/route.c
++++ b/net/ipv6/route.c
+@@ -97,6 +97,8 @@ static int           ip6_pkt_discard(struct sk_bu
+ static int            ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb);
+ static int            ip6_pkt_prohibit(struct sk_buff *skb);
+ static int            ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb);
++static int            ip6_pkt_policy_failed(struct sk_buff *skb);
++static int            ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb);
+ static void           ip6_link_failure(struct sk_buff *skb);
+ static void           ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk,
+                                          struct sk_buff *skb, u32 mtu,
+@@ -312,6 +314,18 @@ static const struct rt6_info ip6_prohibi
+       .rt6i_flags     = (RTF_REJECT | RTF_NONEXTHOP),
+ };
+ 
++static const struct rt6_info ip6_policy_failed_entry_template = {
++      .dst = {
++              .__refcnt       = ATOMIC_INIT(1),
++              .__use          = 1,
++              .obsolete       = DST_OBSOLETE_FORCE_CHK,
++              .error          = -EACCES,
++              .input          = ip6_pkt_policy_failed,
++              .output         = ip6_pkt_policy_failed_out,
++      },
++      .rt6i_flags     = (RTF_REJECT | RTF_NONEXTHOP),
++};
++
+ static const struct rt6_info ip6_blk_hole_entry_template = {
+       .dst = {
+               .__refcnt       = ATOMIC_INIT(1),
+@@ -1033,6 +1047,7 @@ static const int fib6_prop[RTN_MAX + 1]
+       [RTN_BLACKHOLE] = -EINVAL,
+       [RTN_UNREACHABLE] = -EHOSTUNREACH,
+       [RTN_PROHIBIT]  = -EACCES,
++      [RTN_POLICY_FAILED] = -EACCES,
+       [RTN_THROW]     = -EAGAIN,
+       [RTN_NAT]       = -EINVAL,
+       [RTN_XRESOLVE]  = -EINVAL,
+@@ -1068,6 +1083,10 @@ static void ip6_rt_init_dst_reject(struc
+               rt->dst.output = ip6_pkt_prohibit_out;
+               rt->dst.input = ip6_pkt_prohibit;
+               break;
++      case RTN_POLICY_FAILED:
++              rt->dst.output = ip6_pkt_policy_failed_out;
++              rt->dst.input = ip6_pkt_policy_failed;
++              break;
+       case RTN_THROW:
+       case RTN_UNREACHABLE:
+       default:
+@@ -4560,6 +4579,17 @@ static int ip6_pkt_prohibit_out(struct n
+       return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
+ }
+ 
++static int ip6_pkt_policy_failed(struct sk_buff *skb)
++{
++      return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_INNOROUTES);
++}
++
++static int ip6_pkt_policy_failed_out(struct net *net, struct sock *sk, struct sk_buff *skb)
++{
++      skb->dev = skb_dst(skb)->dev;
++      return ip6_pkt_drop(skb, ICMPV6_POLICY_FAIL, IPSTATS_MIB_OUTNOROUTES);
++}
++
+ /*
+  *    Allocate a dst for local (unicast / anycast) address.
+  */
+@@ -5047,7 +5077,8 @@ static int rtm_to_fib6_config(struct sk_
+       if (rtm->rtm_type == RTN_UNREACHABLE ||
+           rtm->rtm_type == RTN_BLACKHOLE ||
+           rtm->rtm_type == RTN_PROHIBIT ||
+-          rtm->rtm_type == RTN_THROW)
++          rtm->rtm_type == RTN_THROW ||
++          rtm->rtm_type == RTN_POLICY_FAILED)
+               cfg->fc_flags |= RTF_REJECT;
+ 
+       if (rtm->rtm_type == RTN_LOCAL)
+@@ -6300,6 +6331,8 @@ static int ip6_route_dev_notify(struct n
+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
+               net->ipv6.ip6_prohibit_entry->dst.dev = dev;
+               net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
++              net->ipv6.ip6_policy_failed_entry->dst.dev = dev;
++              net->ipv6.ip6_policy_failed_entry->rt6i_idev = in6_dev_get(dev);
+               net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
+               net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
+ #endif
+@@ -6311,6 +6344,7 @@ static int ip6_route_dev_notify(struct n
+               in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
+               in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
++              in6_dev_put_clear(&net->ipv6.ip6_policy_failed_entry->rt6i_idev);
+               in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
+ #endif
+       }
+@@ -6502,6 +6536,8 @@ static int __net_init ip6_route_net_init
+ 
+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
+       net->ipv6.fib6_has_custom_rules = false;
++
++
+       net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
+                                              sizeof(*net->ipv6.ip6_prohibit_entry),
+                                              GFP_KERNEL);
+@@ -6512,11 +6548,21 @@ static int __net_init ip6_route_net_init
+                        ip6_template_metrics, true);
+       INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
+ 
++      net->ipv6.ip6_policy_failed_entry =
++                              kmemdup(&ip6_policy_failed_entry_template,
++                              sizeof(*net->ipv6.ip6_policy_failed_entry), GFP_KERNEL);
++      if (!net->ipv6.ip6_policy_failed_entry)
++              goto out_ip6_prohibit_entry;
++      net->ipv6.ip6_policy_failed_entry->dst.ops = &net->ipv6.ip6_dst_ops;
++      dst_init_metrics(&net->ipv6.ip6_policy_failed_entry->dst,
++                       ip6_template_metrics, true);
++      INIT_LIST_HEAD(&net->ipv6.ip6_policy_failed_entry->rt6i_uncached);
++
+       net->ipv6.ip6_blk_hole_entry = kmemdup(&ip6_blk_hole_entry_template,
+                                              sizeof(*net->ipv6.ip6_blk_hole_entry),
+                                              GFP_KERNEL);
+       if (!net->ipv6.ip6_blk_hole_entry)
+-              goto out_ip6_prohibit_entry;
++              goto out_ip6_policy_failed_entry;
+       net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
+       dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
+                        ip6_template_metrics, true);
+@@ -6543,6 +6589,8 @@ out:
+       return ret;
+ 
+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
++out_ip6_policy_failed_entry:
++      kfree(net->ipv6.ip6_policy_failed_entry);
+ out_ip6_prohibit_entry:
+       kfree(net->ipv6.ip6_prohibit_entry);
+ out_ip6_null_entry:
+@@ -6562,6 +6610,7 @@ static void __net_exit ip6_route_net_exi
+       kfree(net->ipv6.ip6_null_entry);
+ #ifdef CONFIG_IPV6_MULTIPLE_TABLES
+       kfree(net->ipv6.ip6_prohibit_entry);
++      kfree(net->ipv6.ip6_policy_failed_entry);
+       kfree(net->ipv6.ip6_blk_hole_entry);
+ #endif
+       dst_entries_destroy(&net->ipv6.ip6_dst_ops);
+@@ -6639,6 +6688,9 @@ void __init ip6_route_init_special_entri
+       init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
+       init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
+       init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
++      init_net.ipv6.ip6_policy_failed_entry->dst.dev = init_net.loopback_dev;
++      init_net.ipv6.ip6_policy_failed_entry->rt6i_idev =
++              in6_dev_get(init_net.loopback_dev);
+   #endif
+ }
+ 

diff --git a/target/linux/generic/pending-6.0/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch b/target/linux/generic/pending-6.0/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch
new file mode 100644 (file)
index 0000000..bea43b2
--- /dev/null
+++ b/target/linux/generic/pending-6.0/671-net-provide-defines-for-_POLICY_FAILED-until-all-cod.patch
@@ -0,0 +1,50 @@
+From: Jonas Gorski <[email protected]>
+Subject: net: provide defines for _POLICY_FAILED until all code is updated
+
+Upstream introduced ICMPV6_POLICY_FAIL for code 5 of destination
+unreachable, conflicting with our name.
+
+Add appropriate defines to allow our code to build with the new
+name until we have updated our local patches for older kernels
+and userspace packages.
+
+Signed-off-by: Jonas Gorski <[email protected]>
+---
+ include/uapi/linux/fib_rules.h | 2 ++
+ include/uapi/linux/icmpv6.h    | 2 ++
+ include/uapi/linux/rtnetlink.h | 2 ++
+ 3 files changed, 6 insertions(+)
+
+--- a/include/uapi/linux/fib_rules.h
++++ b/include/uapi/linux/fib_rules.h
+@@ -89,6 +89,8 @@ enum {
+       __FR_ACT_MAX,
+ };
+ 
++#define FR_ACT_FAILED_POLICY FR_ACT_POLICY_FAILED
++
+ #define FR_ACT_MAX (__FR_ACT_MAX - 1)
+ 
+ #endif
+--- a/include/uapi/linux/icmpv6.h
++++ b/include/uapi/linux/icmpv6.h
+@@ -126,6 +126,8 @@ struct icmp6hdr {
+ #define ICMPV6_POLICY_FAIL            5
+ #define ICMPV6_REJECT_ROUTE           6
+ 
++#define ICMPV6_FAILED_POLICY          ICMPV6_POLICY_FAIL
++
+ /*
+  *    Codes for Time Exceeded
+  */
+--- a/include/uapi/linux/rtnetlink.h
++++ b/include/uapi/linux/rtnetlink.h
+@@ -260,6 +260,8 @@ enum {
+       __RTN_MAX
+ };
+ 
++#define RTN_FAILED_POLICY RTN_POLICY_FAILED
++
+ #define RTN_MAX (__RTN_MAX - 1)
+ 
+ 

diff --git a/target/linux/generic/pending-6.0/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-6.0/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
new file mode 100644 (file)
index 0000000..e61f59f
--- /dev/null
+++ b/target/linux/generic/pending-6.0/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
@@ -0,0 +1,151 @@
+From: Felix Fietkau <[email protected]>
+Subject: net: replace GRO optimization patch with a new one that supports VLANs/bridges with different MAC addresses
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ include/linux/netdevice.h |  2 ++
+ include/linux/skbuff.h    |  3 ++-
+ net/core/dev.c            | 48 +++++++++++++++++++++++++++++++++++++++++++++++
+ net/ethernet/eth.c        | 18 +++++++++++++++++-
+ 4 files changed, 69 insertions(+), 2 deletions(-)
+
+--- a/include/linux/netdevice.h
++++ b/include/linux/netdevice.h
+@@ -2075,6 +2075,8 @@ struct net_device {
+       struct netdev_hw_addr_list      mc;
+       struct netdev_hw_addr_list      dev_addrs;
+ 
++      unsigned char           local_addr_mask[MAX_ADDR_LEN];
++
+ #ifdef CONFIG_SYSFS
+       struct kset             *queues_kset;
+ #endif
+--- a/include/linux/skbuff.h
++++ b/include/linux/skbuff.h
+@@ -890,6 +890,7 @@ struct sk_buff {
+ #ifdef CONFIG_IPV6_NDISC_NODETYPE
+       __u8                    ndisc_nodetype:2;
+ #endif
++      __u8                    gro_skip:1;
+ 
+       __u8                    ipvs_property:1;
+       __u8                    inner_protocol_type:1;
+--- a/net/core/gro.c
++++ b/net/core/gro.c
+@@ -6062,6 +6062,9 @@ static enum gro_result dev_gro_receive(s
+       int same_flow;
+       int grow;
+ 
++      if (skb->gro_skip)
++              goto normal;
++
+       if (netif_elide_gro(skb->dev))
+               goto normal;
+ 
+--- a/net/core/dev.c
++++ b/net/core/dev.c
+@@ -8076,6 +8079,48 @@ static void __netdev_adjacent_dev_unlink
+                                          &upper_dev->adj_list.lower);
+ }
+ 
++static void __netdev_addr_mask(unsigned char *mask, const unsigned char *addr,
++                             struct net_device *dev)
++{
++      int i;
++
++      for (i = 0; i < dev->addr_len; i++)
++              mask[i] |= addr[i] ^ dev->dev_addr[i];
++}
++
++static void __netdev_upper_mask(unsigned char *mask, struct net_device *dev,
++                              struct net_device *lower)
++{
++      struct net_device *cur;
++      struct list_head *iter;
++
++      netdev_for_each_upper_dev_rcu(dev, cur, iter) {
++              __netdev_addr_mask(mask, cur->dev_addr, lower);
++              __netdev_upper_mask(mask, cur, lower);
++      }
++}
++
++static void __netdev_update_addr_mask(struct net_device *dev)
++{
++      unsigned char mask[MAX_ADDR_LEN];
++      struct net_device *cur;
++      struct list_head *iter;
++
++      memset(mask, 0, sizeof(mask));
++      __netdev_upper_mask(mask, dev, dev);
++      memcpy(dev->local_addr_mask, mask, dev->addr_len);
++
++      netdev_for_each_lower_dev(dev, cur, iter)
++              __netdev_update_addr_mask(cur);
++}
++
++static void netdev_update_addr_mask(struct net_device *dev)
++{
++      rcu_read_lock();
++      __netdev_update_addr_mask(dev);
++      rcu_read_unlock();
++}
++
+ static int __netdev_upper_dev_link(struct net_device *dev,
+                                  struct net_device *upper_dev, bool master,
+                                  void *upper_priv, void *upper_info,
+@@ -8127,6 +8172,7 @@ static int __netdev_upper_dev_link(struc
+       if (ret)
+               return ret;
+ 
++      netdev_update_addr_mask(dev);
+       ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
+                                           &changeupper_info.info);
+       ret = notifier_to_errno(ret);
+@@ -8223,6 +8269,7 @@ static void __netdev_upper_dev_unlink(st
+ 
+       __netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
+ 
++      netdev_update_addr_mask(dev);
+       call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
+                                     &changeupper_info.info);
+ 
+@@ -9042,6 +9089,7 @@ int dev_set_mac_address(struct net_devic
+       if (err)
+               return err;
+       dev->addr_assign_type = NET_ADDR_SET;
++      netdev_update_addr_mask(dev);
+       call_netdevice_notifiers(NETDEV_CHANGEADDR, dev);
+       add_device_randomness(dev->dev_addr, dev->addr_len);
+       return 0;
+--- a/net/ethernet/eth.c
++++ b/net/ethernet/eth.c
+@@ -142,6 +142,18 @@ u32 eth_get_headlen(const struct net_dev
+ }
+ EXPORT_SYMBOL(eth_get_headlen);
+ 
++static inline bool
++eth_check_local_mask(const void *addr1, const void *addr2, const void *mask)
++{
++      const u16 *a1 = addr1;
++      const u16 *a2 = addr2;
++      const u16 *m = mask;
++
++      return (((a1[0] ^ a2[0]) & ~m[0]) |
++              ((a1[1] ^ a2[1]) & ~m[1]) |
++              ((a1[2] ^ a2[2]) & ~m[2]));
++}
++
+ /**
+  * eth_type_trans - determine the packet's protocol ID.
+  * @skb: received socket data
+@@ -173,6 +185,10 @@ __be16 eth_type_trans(struct sk_buff *sk
+               } else {
+                       skb->pkt_type = PACKET_OTHERHOST;
+               }
++
++              if (eth_check_local_mask(eth->h_dest, dev->dev_addr,
++                                       dev->local_addr_mask))
++                      skb->gro_skip = 1;
+       }
+ 
+       /*

diff --git a/target/linux/generic/pending-6.0/682-of_net-add-mac-address-increment-support.patch b/target/linux/generic/pending-6.0/682-of_net-add-mac-address-increment-support.patch
new file mode 100644 (file)
index 0000000..fe6fadd
--- /dev/null
+++ b/target/linux/generic/pending-6.0/682-of_net-add-mac-address-increment-support.patch
@@ -0,0 +1,89 @@
+From 844c273286f328acf0dab5fbd5d864366b4904dc Mon Sep 17 00:00:00 2001
+From: Ansuel Smith <[email protected]>
+Date: Tue, 30 Mar 2021 18:21:14 +0200
+Subject: [PATCH] of_net: add mac-address-increment support
+
+Lots of embedded devices use the mac-address of other interface
+extracted from nvmem cells and increments it by one or two. Add two
+bindings to integrate this and directly use the right mac-address for
+the interface. Some example are some routers that use the gmac
+mac-address stored in the art partition and increments it by one for the
+wifi. mac-address-increment-byte bindings is used to tell what byte of
+the mac-address has to be increased (if not defined the last byte is
+increased) and mac-address-increment tells how much the byte decided
+early has to be increased.
+
+Signed-off-by: Ansuel Smith <[email protected]>
+---
+ net/core/of_net.c | 43 +++++++++++++++++++++++++++++++++++++++----
+ 1 file changed, 39 insertions(+), 4 deletions(-)
+
+--- a/net/core/of_net.c
++++ b/net/core/of_net.c
+@@ -119,27 +119,62 @@ static int of_get_mac_addr_nvmem(struct
+  * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
+  * but is all zeros.
+  *
++ * DT can tell the system to increment the mac-address after is extracted by
++ * using:
++ * - mac-address-increment-byte to decide what byte to increase
++ *   (if not defined is increased the last byte)
++ * - mac-address-increment to decide how much to increase. The value WILL
++ *   overflow to other bytes if the increment is over 255 or the total
++ *   increment will exceed 255 of the current byte.
++ *   (example 00:01:02:03:04:ff + 1 == 00:01:02:03:05:00)
++ *   (example 00:01:02:03:04:fe + 5 == 00:01:02:03:05:03)
++ *
+  * Return: 0 on success and errno in case of error.
+ */
+ int of_get_mac_address(struct device_node *np, u8 *addr)
+ {
++      u32 inc_idx, mac_inc, mac_val;
+       int ret;
+ 
++      /* Check first if the increment byte is present and valid.
++       * If not set assume to increment the last byte if found.
++       */
++      if (of_property_read_u32(np, "mac-address-increment-byte", &inc_idx))
++              inc_idx = 5;
++      if (inc_idx < 3 || inc_idx > 5)
++              return -EINVAL;
++
+       if (!np)
+               return -ENODEV;
+ 
+       ret = of_get_mac_addr(np, "mac-address", addr);
+       if (!ret)
+-              return 0;
++              goto found;
+ 
+       ret = of_get_mac_addr(np, "local-mac-address", addr);
+       if (!ret)
+-              return 0;
++              goto found;
+ 
+       ret = of_get_mac_addr(np, "address", addr);
+       if (!ret)
+-              return 0;
++              goto found;
++
++      ret = of_get_mac_addr_nvmem(np, addr);
++      if (ret)
++              return ret;
++
++found:
++      if (!of_property_read_u32(np, "mac-address-increment", &mac_inc)) {
++              /* Convert to a contiguous value */
++              mac_val = (addr[3] << 16) + (addr[4] << 8) + addr[5];
++              mac_val += mac_inc << 8 * (5-inc_idx);
++
++              /* Apply the incremented value handling overflow case */
++              addr[3] = (mac_val >> 16) & 0xff;
++              addr[4] = (mac_val >> 8) & 0xff;
++              addr[5] = (mac_val >> 0) & 0xff;
++      }
+ 
+-      return of_get_mac_addr_nvmem(np, addr);
++      return ret;
+ }
+ EXPORT_SYMBOL(of_get_mac_address);

diff --git a/target/linux/generic/pending-6.0/683-of_net-add-mac-address-to-of-tree.patch b/target/linux/generic/pending-6.0/683-of_net-add-mac-address-to-of-tree.patch
new file mode 100644 (file)
index 0000000..f7ef06a
--- /dev/null
+++ b/target/linux/generic/pending-6.0/683-of_net-add-mac-address-to-of-tree.patch
@@ -0,0 +1,55 @@
+From 8585756342caa6d27008d1ad0c18023e4211a40a Mon Sep 17 00:00:00 2001
+From: OpenWrt community <[email protected]>
+Date: Wed, 13 Jul 2022 12:22:48 +0200
+Subject: [PATCH] of/of_net: write back netdev MAC-address to device-tree
+
+The label-mac logic relies on the mac-address property of a netdev
+devices of-node. However, the mac address can also be stored as a
+different property or read from e.g. an mtd device.
+
+Create this node when reading a mac-address from OF if it does not
+already exist and copy the mac-address used for the device to this
+property. This way, the MAC address can be accessed using procfs.
+
+---
+ net/core/of_net.c | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+--- a/net/core/of_net.c
++++ b/net/core/of_net.c
+@@ -95,6 +95,27 @@ static int of_get_mac_addr_nvmem(struct
+       return 0;
+ }
+ 
++static int of_add_mac_address(struct device_node *np, u8* addr)
++{
++      struct property *prop;
++
++      prop = kzalloc(sizeof(*prop), GFP_KERNEL);
++      if (!prop)
++              return -ENOMEM;
++
++      prop->name = "mac-address";
++      prop->length = ETH_ALEN;
++      prop->value = kmemdup(addr, ETH_ALEN, GFP_KERNEL);
++      if (!prop->value || of_update_property(np, prop))
++              goto free;
++
++      return 0;
++free:
++      kfree(prop->value);
++      kfree(prop);
++      return -ENOMEM;
++}
++
+ /**
+  * of_get_mac_address()
+  * @np:               Caller's Device Node
+@@ -175,6 +196,7 @@ found:
+               addr[5] = (mac_val >> 0) & 0xff;
+       }
+ 
++      of_add_mac_address(np, addr);
+       return ret;
+ }
+ EXPORT_SYMBOL(of_get_mac_address);

diff --git a/target/linux/generic/pending-6.0/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch b/target/linux/generic/pending-6.0/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch
new file mode 100644 (file)
index 0000000..4b5c474
--- /dev/null
+++ b/target/linux/generic/pending-6.0/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch
@@ -0,0 +1,41 @@
+From: Felix Fietkau <[email protected]>
+Date: Mon, 21 Mar 2022 20:39:59 +0100
+Subject: [PATCH] net: ethernet: mtk_eth_soc: enable threaded NAPI
+
+This can improve performance under load by ensuring that NAPI processing is
+not pinned on CPU 0.
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -2443,8 +2443,8 @@ static irqreturn_t mtk_handle_irq_rx(int
+ 
+       eth->rx_events++;
+       if (likely(napi_schedule_prep(&eth->rx_napi))) {
+-              __napi_schedule(&eth->rx_napi);
+               mtk_rx_irq_disable(eth, eth->soc->txrx.rx_irq_done_mask);
++              __napi_schedule(&eth->rx_napi);
+       }
+ 
+       return IRQ_HANDLED;
+@@ -2456,8 +2456,8 @@ static irqreturn_t mtk_handle_irq_tx(int
+ 
+       eth->tx_events++;
+       if (likely(napi_schedule_prep(&eth->tx_napi))) {
+-              __napi_schedule(&eth->tx_napi);
+               mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
++              __napi_schedule(&eth->tx_napi);
+       }
+ 
+       return IRQ_HANDLED;
+@@ -3623,6 +3623,8 @@ static int mtk_probe(struct platform_dev
+        * for NAPI to work
+        */
+       init_dummy_netdev(&eth->dummy_dev);
++      eth->dummy_dev.threaded = 1;
++      strcpy(eth->dummy_dev.name, "mtk_eth");
+       netif_napi_add(&eth->dummy_dev, &eth->tx_napi, mtk_napi_tx,
+                      MTK_NAPI_WEIGHT);
+       netif_napi_add(&eth->dummy_dev, &eth->rx_napi, mtk_napi_rx,

diff --git a/target/linux/generic/pending-6.0/703-phy-add-detach-callback-to-struct-phy_driver.patch b/target/linux/generic/pending-6.0/703-phy-add-detach-callback-to-struct-phy_driver.patch
new file mode 100644 (file)
index 0000000..21c322b
--- /dev/null
+++ b/target/linux/generic/pending-6.0/703-phy-add-detach-callback-to-struct-phy_driver.patch
@@ -0,0 +1,38 @@
+From: Gabor Juhos <[email protected]>
+Subject: generic: add detach callback to struct phy_driver
+
+lede-commit: fe61fc2d7d0b3fb348b502f68f98243b3ddf5867
+
+Signed-off-by: Gabor Juhos <[email protected]>
+---
+ drivers/net/phy/phy_device.c | 3 +++
+ include/linux/phy.h          | 6 ++++++
+ 2 files changed, 9 insertions(+)
+
+--- a/drivers/net/phy/phy_device.c
++++ b/drivers/net/phy/phy_device.c
+@@ -1738,6 +1738,9 @@ void phy_detach(struct phy_device *phyde
+       struct module *ndev_owner = NULL;
+       struct mii_bus *bus;
+ 
++      if (phydev->drv && phydev->drv->detach)
++              phydev->drv->detach(phydev);
++
+       if (phydev->sysfs_links) {
+               if (dev)
+                       sysfs_remove_link(&dev->dev.kobj, "phydev");
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -789,6 +789,12 @@ struct phy_driver {
+       /** @handle_interrupt: Override default interrupt handling */
+       irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
+ 
++      /*
++       * Called before an ethernet device is detached
++       * from the PHY.
++       */
++      void (*detach)(struct phy_device *phydev);
++
+       /** @remove: Clears up any memory if needed */
+       void (*remove)(struct phy_device *phydev);
+ 

diff --git a/target/linux/generic/pending-6.0/705-net-dsa-tag_mtk-add-padding-for-tx-packets.patch b/target/linux/generic/pending-6.0/705-net-dsa-tag_mtk-add-padding-for-tx-packets.patch
new file mode 100644 (file)
index 0000000..e27ac35
--- /dev/null
+++ b/target/linux/generic/pending-6.0/705-net-dsa-tag_mtk-add-padding-for-tx-packets.patch
@@ -0,0 +1,29 @@
+From: Felix Fietkau <[email protected]>
+Date: Fri, 6 May 2022 21:38:42 +0200
+Subject: [PATCH] net: dsa: tag_mtk: add padding for tx packets
+
+Padding for transmitted packets needs to account for the special tag.
+With not enough padding, garbage bytes are inserted by the switch at the
+end of small packets.
+
+Fixes: 5cd8985a1909 ("net-next: dsa: add Mediatek tag RX/TX handler")
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+
+--- a/net/dsa/tag_mtk.c
++++ b/net/dsa/tag_mtk.c
+@@ -25,6 +25,14 @@ static struct sk_buff *mtk_tag_xmit(stru
+       u8 xmit_tpid;
+       u8 *mtk_tag;
+ 
++      /* The Ethernet switch we are interfaced with needs packets to be at
++       * least 64 bytes (including FCS) otherwise their padding might be
++       * corrupted. With tags enabled, we need to make sure that packets are
++       * at least 68 bytes (including FCS and tag).
++       */
++      if (__skb_put_padto(skb, ETH_ZLEN + MTK_HDR_LEN, false))
++              return NULL;
++
+       /* Build the special tag after the MAC Source Address. If VLAN header
+        * is present, it's required that VLAN header and special tag is
+        * being combined. Only in this way we can allow the switch can parse

diff --git a/target/linux/generic/pending-6.0/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch b/target/linux/generic/pending-6.0/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch
new file mode 100644 (file)
index 0000000..3aa8806
--- /dev/null
+++ b/target/linux/generic/pending-6.0/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch
@@ -0,0 +1,174 @@
+From: Felix Fietkau <[email protected]>
+Date: Fri, 27 Aug 2021 12:22:32 +0200
+Subject: [PATCH] bridge: add knob for filtering rx/tx BPDU packets on a port
+
+Some devices (e.g. wireless APs) can't have devices behind them be part of
+a bridge topology with redundant links, due to address limitations.
+Additionally, broadcast traffic on these devices is somewhat expensive, due to
+the low data rate and wakeups of clients in powersave mode.
+This knob can be used to ensure that BPDU packets are never sent or forwarded
+to/from these devices
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+
+--- a/include/linux/if_bridge.h
++++ b/include/linux/if_bridge.h
+@@ -58,6 +58,7 @@ struct br_ip_list {
+ #define BR_MRP_LOST_IN_CONT   BIT(19)
+ #define BR_TX_FWD_OFFLOAD     BIT(20)
+ #define BR_PORT_LOCKED                BIT(21)
++#define BR_BPDU_FILTER                BIT(22)
+ 
+ #define BR_DEFAULT_AGEING_TIME        (300 * HZ)
+ 
+--- a/net/bridge/br_forward.c
++++ b/net/bridge/br_forward.c
+@@ -199,6 +199,7 @@ out:
+ void br_flood(struct net_bridge *br, struct sk_buff *skb,
+             enum br_pkt_type pkt_type, bool local_rcv, bool local_orig)
+ {
++      const unsigned char *dest = eth_hdr(skb)->h_dest;
+       struct net_bridge_port *prev = NULL;
+       struct net_bridge_port *p;
+ 
+@@ -214,6 +215,10 @@ void br_flood(struct net_bridge *br, str
+               case BR_PKT_MULTICAST:
+                       if (!(p->flags & BR_MCAST_FLOOD) && skb->dev != br->dev)
+                               continue;
++                      if ((p->flags & BR_BPDU_FILTER) &&
++                          unlikely(is_link_local_ether_addr(dest) &&
++                                   dest[5] == 0))
++                              continue;
+                       break;
+               case BR_PKT_BROADCAST:
+                       if (!(p->flags & BR_BCAST_FLOOD) && skb->dev != br->dev)
+--- a/net/bridge/br_input.c
++++ b/net/bridge/br_input.c
+@@ -326,6 +326,8 @@ static rx_handler_result_t br_handle_fra
+               fwd_mask |= p->group_fwd_mask;
+               switch (dest[5]) {
+               case 0x00:      /* Bridge Group Address */
++                      if (p->flags & BR_BPDU_FILTER)
++                              goto drop;
+                       /* If STP is turned off,
+                          then must forward to keep loop detection */
+                       if (p->br->stp_enabled == BR_NO_STP ||
+--- a/net/bridge/br_sysfs_if.c
++++ b/net/bridge/br_sysfs_if.c
+@@ -240,6 +240,7 @@ BRPORT_ATTR_FLAG(multicast_flood, BR_MCA
+ BRPORT_ATTR_FLAG(broadcast_flood, BR_BCAST_FLOOD);
+ BRPORT_ATTR_FLAG(neigh_suppress, BR_NEIGH_SUPPRESS);
+ BRPORT_ATTR_FLAG(isolated, BR_ISOLATED);
++BRPORT_ATTR_FLAG(bpdu_filter, BR_BPDU_FILTER);
+ 
+ #ifdef CONFIG_BRIDGE_IGMP_SNOOPING
+ static ssize_t show_multicast_router(struct net_bridge_port *p, char *buf)
+@@ -292,6 +293,7 @@ static const struct brport_attribute *br
+       &brport_attr_group_fwd_mask,
+       &brport_attr_neigh_suppress,
+       &brport_attr_isolated,
++      &brport_attr_bpdu_filter,
+       &brport_attr_backup_port,
+       NULL
+ };
+--- a/net/bridge/br_stp_bpdu.c
++++ b/net/bridge/br_stp_bpdu.c
+@@ -80,7 +80,8 @@ void br_send_config_bpdu(struct net_brid
+ {
+       unsigned char buf[35];
+ 
+-      if (p->br->stp_enabled != BR_KERNEL_STP)
++      if (p->br->stp_enabled != BR_KERNEL_STP ||
++          (p->flags & BR_BPDU_FILTER))
+               return;
+ 
+       buf[0] = 0;
+@@ -127,7 +128,8 @@ void br_send_tcn_bpdu(struct net_bridge_
+ {
+       unsigned char buf[4];
+ 
+-      if (p->br->stp_enabled != BR_KERNEL_STP)
++      if (p->br->stp_enabled != BR_KERNEL_STP ||
++          (p->flags & BR_BPDU_FILTER))
+               return;
+ 
+       buf[0] = 0;
+@@ -172,6 +174,9 @@ void br_stp_rcv(const struct stp_proto *
+       if (!(br->dev->flags & IFF_UP))
+               goto out;
+ 
++      if (p->flags & BR_BPDU_FILTER)
++              goto out;
++
+       if (p->state == BR_STATE_DISABLED)
+               goto out;
+ 
+--- a/include/uapi/linux/if_link.h
++++ b/include/uapi/linux/if_link.h
+@@ -536,6 +536,7 @@ enum {
+       IFLA_BRPORT_MCAST_EHT_HOSTS_LIMIT,
+       IFLA_BRPORT_MCAST_EHT_HOSTS_CNT,
+       IFLA_BRPORT_LOCKED,
++      IFLA_BRPORT_BPDU_FILTER,
+       __IFLA_BRPORT_MAX
+ };
+ #define IFLA_BRPORT_MAX (__IFLA_BRPORT_MAX - 1)
+--- a/net/bridge/br_netlink.c
++++ b/net/bridge/br_netlink.c
+@@ -184,6 +184,7 @@ static inline size_t br_port_info_size(v
+               + nla_total_size(1)     /* IFLA_BRPORT_NEIGH_SUPPRESS */
+               + nla_total_size(1)     /* IFLA_BRPORT_ISOLATED */
+               + nla_total_size(1)     /* IFLA_BRPORT_LOCKED */
++              + nla_total_size(1)     /* IFLA_BRPORT_BPDU_FILTER */
+               + nla_total_size(sizeof(struct ifla_bridge_id)) /* IFLA_BRPORT_ROOT_ID */
+               + nla_total_size(sizeof(struct ifla_bridge_id)) /* IFLA_BRPORT_BRIDGE_ID */
+               + nla_total_size(sizeof(u16))   /* IFLA_BRPORT_DESIGNATED_PORT */
+@@ -269,7 +270,8 @@ static int br_port_fill_attrs(struct sk_
+           nla_put_u8(skb, IFLA_BRPORT_MRP_IN_OPEN,
+                      !!(p->flags & BR_MRP_LOST_IN_CONT)) ||
+           nla_put_u8(skb, IFLA_BRPORT_ISOLATED, !!(p->flags & BR_ISOLATED)) ||
+-          nla_put_u8(skb, IFLA_BRPORT_LOCKED, !!(p->flags & BR_PORT_LOCKED)))
++          nla_put_u8(skb, IFLA_BRPORT_LOCKED, !!(p->flags & BR_PORT_LOCKED)) ||
++          nla_put_u8(skb, IFLA_BRPORT_BPDU_FILTER, !!(p->flags & BR_BPDU_FILTER)))
+               return -EMSGSIZE;
+ 
+       timerval = br_timer_value(&p->message_age_timer);
+@@ -829,6 +831,7 @@ static const struct nla_policy br_port_p
+       [IFLA_BRPORT_ISOLATED]  = { .type = NLA_U8 },
+       [IFLA_BRPORT_BACKUP_PORT] = { .type = NLA_U32 },
+       [IFLA_BRPORT_MCAST_EHT_HOSTS_LIMIT] = { .type = NLA_U32 },
++      [IFLA_BRPORT_BPDU_FILTER] = { .type = NLA_U8 },
+ };
+ 
+ /* Change the state of the port and notify spanning tree */
+@@ -893,6 +896,7 @@ static int br_setport(struct net_bridge_
+       br_set_port_flag(p, tb, IFLA_BRPORT_NEIGH_SUPPRESS, BR_NEIGH_SUPPRESS);
+       br_set_port_flag(p, tb, IFLA_BRPORT_ISOLATED, BR_ISOLATED);
+       br_set_port_flag(p, tb, IFLA_BRPORT_LOCKED, BR_PORT_LOCKED);
++      br_set_port_flag(p, tb, IFLA_BRPORT_BPDU_FILTER, BR_BPDU_FILTER);
+ 
+       changed_mask = old_flags ^ p->flags;
+ 
+--- a/net/core/rtnetlink.c
++++ b/net/core/rtnetlink.c
+@@ -55,7 +55,7 @@
+ #include "dev.h"
+ 
+ #define RTNL_MAX_TYPE         50
+-#define RTNL_SLAVE_MAX_TYPE   40
++#define RTNL_SLAVE_MAX_TYPE   41
+ 
+ struct rtnl_link {
+       rtnl_doit_func          doit;
+@@ -4700,7 +4700,9 @@ int ndo_dflt_bridge_getlink(struct sk_bu
+           brport_nla_put_flag(skb, flags, mask,
+                               IFLA_BRPORT_MCAST_FLOOD, BR_MCAST_FLOOD) ||
+           brport_nla_put_flag(skb, flags, mask,
+-                              IFLA_BRPORT_BCAST_FLOOD, BR_BCAST_FLOOD)) {
++                              IFLA_BRPORT_BCAST_FLOOD, BR_BCAST_FLOOD) ||
++          brport_nla_put_flag(skb, flags, mask,
++                              IFLA_BRPORT_BPDU_FILTER, BR_BPDU_FILTER)) {
+               nla_nest_cancel(skb, protinfo);
+               goto nla_put_failure;
+       }

diff --git a/target/linux/generic/pending-6.0/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-6.0/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
new file mode 100644 (file)
index 0000000..662b956
--- /dev/null
+++ b/target/linux/generic/pending-6.0/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
@@ -0,0 +1,27 @@
+From:   Tobias Waldekranz <[email protected]>
+Subject: [RFC net-next 7/7] net: dsa: mv88e6xxx: Request assisted learning on CPU port
+Date:   Sat, 16 Jan 2021 02:25:15 +0100
+Archived-At: <https://lore.kernel.org/netdev/[email protected]/>
+
+While the hardware is capable of performing learning on the CPU port,
+it requires alot of additions to the bridge's forwarding path in order
+to handle multi-destination traffic correctly.
+
+Until that is in place, opt for the next best thing and let DSA sync
+the relevant addresses down to the hardware FDB.
+
+Signed-off-by: Tobias Waldekranz <[email protected]>
+---
+ drivers/net/dsa/mv88e6xxx/chip.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/dsa/mv88e6xxx/chip.c
++++ b/drivers/net/dsa/mv88e6xxx/chip.c
+@@ -6320,6 +6320,7 @@ static int mv88e6xxx_register_switch(str
+       ds->ops = &mv88e6xxx_switch_ops;
+       ds->ageing_time_min = chip->info->age_time_coeff;
+       ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
++      ds->assisted_learning_on_cpu_port = true;
+ 
+       /* Some chips support up to 32, but that requires enabling the
+        * 5-bit port mode, which we do not support. 640k^W16 ought to

diff --git a/target/linux/generic/pending-6.0/780-ARM-kirkwood-add-missing-linux-if_ether.h-for-ETH_AL.patch b/target/linux/generic/pending-6.0/780-ARM-kirkwood-add-missing-linux-if_ether.h-for-ETH_AL.patch
new file mode 100644 (file)
index 0000000..fcf7892
--- /dev/null
+++ b/target/linux/generic/pending-6.0/780-ARM-kirkwood-add-missing-linux-if_ether.h-for-ETH_AL.patch
@@ -0,0 +1,61 @@
+From patchwork Thu Aug  5 22:23:30 2021
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+X-Patchwork-Submitter: Daniel Golle <[email protected]>
+X-Patchwork-Id: 12422209
+Date: Thu, 5 Aug 2021 23:23:30 +0100
+From: Daniel Golle <[email protected]>
+To: [email protected], [email protected],
+ [email protected]
+Cc: "David S. Miller" <[email protected]>, Andrew Lunn <[email protected]>,
+ Michael Walle <[email protected]>
+Subject: [PATCH] ARM: kirkwood: add missing <linux/if_ether.h> for ETH_ALEN
+Message-ID: <[email protected]>
+MIME-Version: 1.0
+Content-Disposition: inline
+X-BeenThere: [email protected]
+X-Mailman-Version: 2.1.34
+Precedence: list
+List-Id: <linux-arm-kernel.lists.infradead.org>
+List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/>
+Sender: "linux-arm-kernel" <[email protected]>
+
+After commit 83216e3988cd1 ("of: net: pass the dst buffer to
+of_get_mac_address()") build fails for kirkwood as ETH_ALEN is not
+defined.
+
+arch/arm/mach-mvebu/kirkwood.c: In function 'kirkwood_dt_eth_fixup':
+arch/arm/mach-mvebu/kirkwood.c:87:13: error: 'ETH_ALEN' undeclared (first use in this function); did you mean 'ESTALE'?
+   u8 tmpmac[ETH_ALEN];
+             ^~~~~~~~
+             ESTALE
+arch/arm/mach-mvebu/kirkwood.c:87:13: note: each undeclared identifier is reported only once for each function it appears in
+arch/arm/mach-mvebu/kirkwood.c:87:6: warning: unused variable 'tmpmac' [-Wunused-variable]
+   u8 tmpmac[ETH_ALEN];
+      ^~~~~~
+make[5]: *** [scripts/Makefile.build:262: arch/arm/mach-mvebu/kirkwood.o] Error 1
+make[5]: *** Waiting for unfinished jobs....
+
+Add missing #include <linux/if_ether.h> to fix this.
+
+Cc: David S. Miller <[email protected]>
+Cc: Andrew Lunn <[email protected]>
+Cc: Michael Walle <[email protected]>
+Reported-by: https://buildbot.openwrt.org/master/images/#/builders/56/builds/220/steps/44/logs/stdio
+Fixes: 83216e3988cd1 ("of: net: pass the dst buffer to of_get_mac_address()")
+Signed-off-by: Daniel Golle <[email protected]>
+---
+ arch/arm/mach-mvebu/kirkwood.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/mach-mvebu/kirkwood.c
++++ b/arch/arm/mach-mvebu/kirkwood.c
+@@ -14,6 +14,7 @@
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+ #include <linux/mbus.h>
++#include <linux/if_ether.h>
+ #include <linux/of.h>
+ #include <linux/of_address.h>
+ #include <linux/of_net.h>

diff --git a/target/linux/generic/pending-6.0/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch b/target/linux/generic/pending-6.0/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch
new file mode 100644 (file)
index 0000000..478a2cb
--- /dev/null
+++ b/target/linux/generic/pending-6.0/800-bcma-get-SoC-device-struct-copy-its-DMA-params-to-th.patch
@@ -0,0 +1,73 @@
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <[email protected]>
+Subject: [PATCH] bcma: get SoC device struct & copy its DMA params to the
+ subdevices
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+For bus devices to be fully usable it's required to set their DMA
+parameters.
+
+For years it has been missing and remained unnoticed because of
+mips_dma_alloc_coherent() silently handling the empty coherent_dma_mask.
+Kernel 4.19 came with a lot of DMA changes and caused a regression on
+the bcm47xx. Starting with the commit f8c55dc6e828 ("MIPS: use generic
+dma noncoherent ops for simple noncoherent platforms") DMA coherent
+allocations just fail. Example:
+[    1.114914] bgmac_bcma bcma0:2: Allocation of TX ring 0x200 failed
+[    1.121215] bgmac_bcma bcma0:2: Unable to alloc memory for DMA
+[    1.127626] bgmac_bcma: probe of bcma0:2 failed with error -12
+[    1.133838] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded
+
+This change fixes above regression in addition to the MIPS bcm47xx
+commit 321c46b91550 ("MIPS: BCM47XX: Setup struct device for the SoC").
+
+It also fixes another *old* GPIO regression caused by a parent pointing
+to the NULL:
+[    0.157054] missing gpiochip .dev parent pointer
+[    0.157287] bcma: bus0: Error registering GPIO driver: -22
+introduced by the commit 74f4e0cc6108 ("bcma: switch GPIO portions to
+use GPIOLIB_IRQCHIP").
+
+Fixes: f8c55dc6e828 ("MIPS: use generic dma noncoherent ops for simple noncoherent platforms")
+Fixes: 74f4e0cc6108 ("bcma: switch GPIO portions to use GPIOLIB_IRQCHIP")
+Cc: [email protected]
+Cc: Christoph Hellwig <[email protected]>
+Cc: Linus Walleij <[email protected]>
+Signed-off-by: Rafał Miłecki <[email protected]>
+---
+
+--- a/drivers/bcma/host_soc.c
++++ b/drivers/bcma/host_soc.c
+@@ -191,6 +191,8 @@ int __init bcma_host_soc_init(struct bcm
+       struct bcma_bus *bus = &soc->bus;
+       int err;
+ 
++      bus->dev = soc->dev;
++
+       /* Scan bus and initialize it */
+       err = bcma_bus_early_register(bus);
+       if (err)
+--- a/drivers/bcma/main.c
++++ b/drivers/bcma/main.c
+@@ -236,13 +236,17 @@ EXPORT_SYMBOL(bcma_core_irq);
+ 
+ void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core)
+ {
+-      device_initialize(&core->dev);
++      struct device *dev = &core->dev;
++
++      device_initialize(dev);
+       core->dev.release = bcma_release_core_dev;
+       core->dev.bus = &bcma_bus_type;
+-      dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index);
++      dev_set_name(dev, "bcma%d:%d", bus->num, core->core_index);
+       core->dev.parent = bus->dev;
+-      if (bus->dev)
++      if (bus->dev) {
+               bcma_of_fill_device(bus->dev, core);
++              dma_coerce_mask_and_coherent(dev, bus->dev->coherent_dma_mask);
++      }
+ 
+       switch (bus->hosttype) {
+       case BCMA_HOSTTYPE_PCI:

diff --git a/target/linux/generic/pending-6.0/801-gpio-gpio-cascade-add-generic-GPIO-cascade.patch b/target/linux/generic/pending-6.0/801-gpio-gpio-cascade-add-generic-GPIO-cascade.patch
new file mode 100644 (file)
index 0000000..c1e14b9
--- /dev/null
+++ b/target/linux/generic/pending-6.0/801-gpio-gpio-cascade-add-generic-GPIO-cascade.patch
@@ -0,0 +1,222 @@
+From fc23ea48ba52c24f201fe5ca0132ee1a3de5a70a Mon Sep 17 00:00:00 2001
+From: Mauri Sandberg <[email protected]>
+Date: Thu, 25 Mar 2021 11:48:05 +0200
+Subject: [PATCH 2/2] gpio: gpio-cascade: add generic GPIO cascade
+
+Adds support for building cascades of GPIO lines. That is, it allows
+setups when there is one upstream line and multiple cascaded lines, out
+of which one can be chosen at a time. The status of the upstream line
+can be conveyed to the selected cascaded line or, vice versa, the status
+of the cascaded line can be conveyed to the upstream line.
+
+A multiplexer is being used to select, which cascaded GPIO line is being
+used at any given time.
+
+At the moment only input direction is supported. In future it should be
+possible to add support for output direction, too.
+
+Signed-off-by: Mauri Sandberg <[email protected]>
+Reviewed-by: Linus Walleij <[email protected]>
+Reviewed-by: Andy Shevchenko <[email protected]>
+---
+v7 -> v8:
+ - rearrange members in struct gpio_cascade
+ - cosmetic changes in file header and in one function declaration
+ - added Reviewed-by tags by Linus and Andy
+v6 -> v7:
+ - In Kconfig add info about module name
+ - adhere to new convention that allows lines longer than 80 chars
+ - use dev_probe_err with upstream gpio line too
+ - refactor for cleaner exit of probe function.
+v5 -> v6:
+ - In Kconfig, remove dependency to OF_GPIO and select only MULTIPLEXER
+ - refactor code preferring one-liners
+ - clean up prints, removing them from success-path.
+ - don't explicitly set gpio_chip.of_node as it's done in the GPIO library
+ - use devm_gpiochip_add_data instead of gpiochip_add
+v4 -> v5:
+ - renamed gpio-mux-input -> gpio-cascade. refactored code accordingly
+   here and there and changed to use new bindings and compatible string
+   - ambigious and vague 'pin' was rename to 'upstream_line'
+ - dropped Tested-by and Reviewed-by due to changes in bindings
+ - dropped Reported-by suggested by an automatic bot as it was not really
+   appropriate to begin with
+ - functionally it's the same as v4
+v3 -> v4:
+ - Changed author email
+ - Included Tested-by and Reviewed-by from Drew
+v2 -> v3:
+ - use managed device resources
+ - update Kconfig description
+v1 -> v2:
+ - removed .owner from platform_driver as per test bot's instruction
+ - added MODULE_AUTHOR, MODULE_DESCRIPTION, MODULE_LICENSE
+ - added gpio_mux_input_get_direction as it's recommended for all chips
+ - removed because this is input only chip: gpio_mux_input_set_value
+ - removed because they are not needed for input/output only chips:
+     gpio_mux_input_direction_input
+     gpio_mux_input_direction_output
+ - fixed typo in an error message
+ - added info message about successful registration
+ - removed can_sleep flag as this does not sleep while getting GPIO value
+   like I2C or SPI do
+ - Updated description in Kconfig
+---
+ drivers/gpio/Kconfig        |  15 +++++
+ drivers/gpio/Makefile       |   1 +
+ drivers/gpio/gpio-cascade.c | 117 ++++++++++++++++++++++++++++++++++++
+ 3 files changed, 133 insertions(+)
+ create mode 100644 drivers/gpio/gpio-cascade.c
+
+--- a/drivers/gpio/Kconfig
++++ b/drivers/gpio/Kconfig
+@@ -1683,4 +1683,19 @@ config GPIO_VIRTIO
+ 
+ endmenu
+ 
++comment "Other GPIO expanders"
++
++config GPIO_CASCADE
++      tristate "General GPIO cascade"
++      select MULTIPLEXER
++      help
++        Say yes here to enable support for generic GPIO cascade.
++
++        This allows building one-to-many cascades of GPIO lines using
++        different types of multiplexers readily available. At the
++        moment only input lines are supported.
++
++        To build the driver as a module choose 'm' and the resulting module
++        will be called 'gpio-cascade'.
++
+ endif
+--- a/drivers/gpio/Makefile
++++ b/drivers/gpio/Makefile
+@@ -45,6 +45,7 @@ obj-$(CONFIG_GPIO_BD9571MWV)         += gpio-bd
+ obj-$(CONFIG_GPIO_BRCMSTB)            += gpio-brcmstb.o
+ obj-$(CONFIG_GPIO_BT8XX)              += gpio-bt8xx.o
+ obj-$(CONFIG_GPIO_CADENCE)            += gpio-cadence.o
++obj-$(CONFIG_GPIO_CASCADE)            += gpio-cascade.o
+ obj-$(CONFIG_GPIO_CLPS711X)           += gpio-clps711x.o
+ obj-$(CONFIG_GPIO_SNPS_CREG)          += gpio-creg-snps.o
+ obj-$(CONFIG_GPIO_CRYSTAL_COVE)               += gpio-crystalcove.o
+--- /dev/null
++++ b/drivers/gpio/gpio-cascade.c
+@@ -0,0 +1,117 @@
++// SPDX-License-Identifier: GPL-2.0-only
++/*
++ *  A generic GPIO cascade driver
++ *
++ *  Copyright (C) 2021 Mauri Sandberg <[email protected]>
++ *
++ * This allows building cascades of GPIO lines in a manner illustrated
++ * below:
++ *
++ *                 /|---- Cascaded GPIO line 0
++ *  Upstream      | |---- Cascaded GPIO line 1
++ *  GPIO line ----+ | .
++ *                | | .
++ *                 \|---- Cascaded GPIO line n
++ *
++ * A multiplexer is being used to select, which cascaded line is being
++ * addressed at any given time.
++ *
++ * At the moment only input mode is supported due to lack of means for
++ * testing output functionality. At least theoretically output should be
++ * possible with open drain constructions.
++ */
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++#include <linux/mux/consumer.h>
++
++#include <linux/gpio/consumer.h>
++#include <linux/gpio/driver.h>
++
++struct gpio_cascade {
++      struct gpio_chip        gpio_chip;
++      struct device           *parent;
++      struct mux_control      *mux_control;
++      struct gpio_desc        *upstream_line;
++};
++
++static struct gpio_cascade *chip_to_cascade(struct gpio_chip *gc)
++{
++      return container_of(gc, struct gpio_cascade, gpio_chip);
++}
++
++static int gpio_cascade_get_direction(struct gpio_chip *gc, unsigned int offset)
++{
++      return GPIO_LINE_DIRECTION_IN;
++}
++
++static int gpio_cascade_get_value(struct gpio_chip *gc, unsigned int offset)
++{
++      struct gpio_cascade *cas = chip_to_cascade(gc);
++      int ret;
++
++      ret = mux_control_select(cas->mux_control, offset);
++      if (ret)
++              return ret;
++
++      ret = gpiod_get_value(cas->upstream_line);
++      mux_control_deselect(cas->mux_control);
++      return ret;
++}
++
++static int gpio_cascade_probe(struct platform_device *pdev)
++{
++      struct device *dev = &pdev->dev;
++      struct gpio_cascade *cas;
++      struct mux_control *mc;
++      struct gpio_desc *upstream;
++      struct gpio_chip *gc;
++
++      cas = devm_kzalloc(dev, sizeof(*cas), GFP_KERNEL);
++      if (!cas)
++              return -ENOMEM;
++
++      mc = devm_mux_control_get(dev, NULL);
++      if (IS_ERR(mc))
++              return dev_err_probe(dev, PTR_ERR(mc), "unable to get mux-control\n");
++
++      cas->mux_control = mc;
++      upstream = devm_gpiod_get(dev, "upstream",  GPIOD_IN);
++      if (IS_ERR(upstream))
++              return dev_err_probe(dev, PTR_ERR(upstream), "unable to claim upstream GPIO line\n");
++
++      cas->upstream_line = upstream;
++      cas->parent = dev;
++
++      gc = &cas->gpio_chip;
++      gc->get = gpio_cascade_get_value;
++      gc->get_direction = gpio_cascade_get_direction;
++      gc->base = -1;
++      gc->ngpio = mux_control_states(mc);
++      gc->label = dev_name(cas->parent);
++      gc->parent = cas->parent;
++      gc->owner = THIS_MODULE;
++
++      platform_set_drvdata(pdev, cas);
++      return devm_gpiochip_add_data(dev, &cas->gpio_chip, NULL);
++}
++
++static const struct of_device_id gpio_cascade_id[] = {
++      { .compatible = "gpio-cascade" },
++      { /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(of, gpio_cascade_id);
++
++static struct platform_driver gpio_cascade_driver = {
++      .driver = {
++              .name           = "gpio-cascade",
++              .of_match_table = gpio_cascade_id,
++      },
++      .probe  = gpio_cascade_probe,
++};
++module_platform_driver(gpio_cascade_driver);
++
++MODULE_AUTHOR("Mauri Sandberg <[email protected]>");
++MODULE_DESCRIPTION("Generic GPIO cascade");
++MODULE_LICENSE("GPL");

diff --git a/target/linux/generic/pending-6.0/810-pci_disable_common_quirks.patch b/target/linux/generic/pending-6.0/810-pci_disable_common_quirks.patch
new file mode 100644 (file)
index 0000000..7edbd94
--- /dev/null
+++ b/target/linux/generic/pending-6.0/810-pci_disable_common_quirks.patch
@@ -0,0 +1,62 @@
+From: Gabor Juhos <[email protected]>
+Subject: debloat: add kernel config option to disabling common PCI quirks
+
+Signed-off-by: Gabor Juhos <[email protected]>
+---
+ drivers/pci/Kconfig  | 6 ++++++
+ drivers/pci/quirks.c | 6 ++++++
+ 2 files changed, 12 insertions(+)
+
+--- a/drivers/pci/Kconfig
++++ b/drivers/pci/Kconfig
+@@ -118,6 +118,13 @@ config XEN_PCIDEV_FRONTEND
+         The PCI device frontend driver allows the kernel to import arbitrary
+         PCI devices from a PCI backend to support PCI driver domains.
+ 
++config PCI_DISABLE_COMMON_QUIRKS
++      bool "PCI disable common quirks"
++      depends on PCI
++      help
++        If you don't know what to do here, say N.
++
++
+ config PCI_ATS
+       bool
+ 
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -206,6 +206,7 @@ static void quirk_mmio_always_on(struct
+ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
+                               PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
+ 
++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
+ /*
+  * The Mellanox Tavor device gives false positive parity errors.  Disable
+  * parity error reporting.
+@@ -3363,6 +3364,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
+ 
++#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
++
+ /*
+  * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
+  * To work around this, query the size it should be configured to by the
+@@ -3388,6 +3391,8 @@ static void quirk_intel_ntb(struct pci_d
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
+ 
++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
++
+ /*
+  * Some BIOS implementations leave the Intel GPU interrupts enabled, even
+  * though no one is handling them (e.g., if the i915 driver is never
+@@ -3426,6 +3431,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
+ 
++#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
++
+ /*
+  * PCI devices which are on Intel chips can skip the 10ms delay
+  * before entering D3 mode.

diff --git a/target/linux/generic/pending-6.0/811-pci_disable_usb_common_quirks.patch b/target/linux/generic/pending-6.0/811-pci_disable_usb_common_quirks.patch
new file mode 100644 (file)
index 0000000..67406ba
--- /dev/null
+++ b/target/linux/generic/pending-6.0/811-pci_disable_usb_common_quirks.patch
@@ -0,0 +1,115 @@
+From: Felix Fietkau <[email protected]>
+Subject: debloat: disable common USB quirks
+
+Signed-off-by: Felix Fietkau <[email protected]>
+---
+ drivers/usb/host/pci-quirks.c | 16 ++++++++++++++++
+ drivers/usb/host/pci-quirks.h | 18 +++++++++++++++++-
+ include/linux/usb/hcd.h       |  7 +++++++
+ 3 files changed, 40 insertions(+), 1 deletion(-)
+
+--- a/drivers/usb/host/pci-quirks.c
++++ b/drivers/usb/host/pci-quirks.c
+@@ -128,6 +128,8 @@ struct amd_chipset_type {
+       u8 rev;
+ };
+ 
++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
++
+ static struct amd_chipset_info {
+       struct pci_dev  *nb_dev;
+       struct pci_dev  *smbus_dev;
+@@ -633,6 +635,10 @@ bool usb_amd_pt_check_port(struct device
+ }
+ EXPORT_SYMBOL_GPL(usb_amd_pt_check_port);
+ 
++#endif /* CONFIG_PCI_DISABLE_COMMON_QUIRKS */
++
++#if IS_ENABLED(CONFIG_USB_UHCI_HCD)
++
+ /*
+  * Make sure the controller is completely inactive, unable to
+  * generate interrupts or do DMA.
+@@ -712,8 +718,17 @@ reset_needed:
+       uhci_reset_hc(pdev, base);
+       return 1;
+ }
++#else
++int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base)
++{
++      return 0;
++}
++
++#endif
+ EXPORT_SYMBOL_GPL(uhci_check_and_reset_hc);
+ 
++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
++
+ static inline int io_type_enabled(struct pci_dev *pdev, unsigned int mask)
+ {
+       u16 cmd;
+@@ -1285,3 +1300,4 @@ static void quirk_usb_early_handoff(stru
+ }
+ DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
+                       PCI_CLASS_SERIAL_USB, 8, quirk_usb_early_handoff);
++#endif
+--- a/drivers/usb/host/pci-quirks.h
++++ b/drivers/usb/host/pci-quirks.h
+@@ -5,6 +5,9 @@
+ #ifdef CONFIG_USB_PCI
+ void uhci_reset_hc(struct pci_dev *pdev, unsigned long base);
+ int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base);
++#endif  /* CONFIG_USB_PCI */
++
++#if defined(CONFIG_USB_PCI) && !defined(CONFIG_PCI_DISABLE_COMMON_QUIRKS)
+ int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev);
+ bool usb_amd_hang_symptom_quirk(void);
+ bool usb_amd_prefetch_quirk(void);
+@@ -19,6 +22,18 @@ void sb800_prefetch(struct device *dev,
+ bool usb_amd_pt_check_port(struct device *device, int port);
+ #else
+ struct pci_dev;
++static inline int usb_amd_quirk_pll_check(void)
++{
++      return 0;
++}
++static inline bool usb_amd_hang_symptom_quirk(void)
++{
++      return false;
++}
++static inline bool usb_amd_prefetch_quirk(void)
++{
++      return false;
++}
+ static inline void usb_amd_quirk_pll_disable(void) {}
+ static inline void usb_amd_quirk_pll_enable(void) {}
+ static inline void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev) {}
+@@ -29,6 +44,11 @@ static inline bool usb_amd_pt_check_port
+ {
+       return false;
+ }
++static inline void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev) {}
++static inline bool usb_xhci_needs_pci_reset(struct pci_dev *pdev)
++{
++      return false;
++}
+ #endif  /* CONFIG_USB_PCI */
+ 
+ #endif  /*  __LINUX_USB_PCI_QUIRKS_H  */
+--- a/include/linux/usb/hcd.h
++++ b/include/linux/usb/hcd.h
+@@ -497,7 +497,14 @@ extern int usb_hcd_pci_probe(struct pci_
+ extern void usb_hcd_pci_remove(struct pci_dev *dev);
+ extern void usb_hcd_pci_shutdown(struct pci_dev *dev);
+ 
++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
+ extern int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev);
++#else
++static inline int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *dev)
++{
++      return 0;
++}
++#endif
+ 
+ #ifdef CONFIG_PM
+ extern const struct dev_pm_ops usb_hcd_pci_pm_ops;

diff --git a/target/linux/generic/pending-6.0/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch b/target/linux/generic/pending-6.0/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch
new file mode 100644 (file)
index 0000000..33eb34c
--- /dev/null
+++ b/target/linux/generic/pending-6.0/820-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch
@@ -0,0 +1,26 @@
+From d9c8bc8c1408f3e8529db6e4e04017b4c579c342 Mon Sep 17 00:00:00 2001
+From: Pawel Dembicki <[email protected]>
+Date: Sun, 18 Feb 2018 17:08:04 +0100
+Subject: [PATCH] w1: gpio: fix problem with platfom data in w1-gpio
+
+In devices, where fdt is used, is impossible to apply platform data
+without proper fdt node.
+
+This patch allow to use platform data in devices with fdt.
+
+Signed-off-by: Pawel Dembicki <[email protected]>
+---
+ drivers/w1/masters/w1-gpio.c | 7 +++----
+ 1 file changed, 3 insertions(+), 4 deletions(-)
+
+--- a/drivers/w1/masters/w1-gpio.c
++++ b/drivers/w1/masters/w1-gpio.c
+@@ -76,7 +76,7 @@ static int w1_gpio_probe(struct platform
+       enum gpiod_flags gflags = GPIOD_OUT_LOW_OPEN_DRAIN;
+       int err;
+ 
+-      if (of_have_populated_dt()) {
++      if (of_have_populated_dt() && !dev_get_platdata(&pdev->dev)) {
+               pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+               if (!pdata)
+                       return -ENOMEM;

diff --git a/target/linux/generic/pending-6.0/834-ledtrig-libata.patch b/target/linux/generic/pending-6.0/834-ledtrig-libata.patch
new file mode 100644 (file)
index 0000000..3977b57
--- /dev/null
+++ b/target/linux/generic/pending-6.0/834-ledtrig-libata.patch
@@ -0,0 +1,149 @@
+From: Daniel Golle <[email protected]>
+Subject: libata: add ledtrig support
+
+This adds a LED trigger for each ATA port indicating disk activity.
+
+As this is needed only on specific platforms (NAS SoCs and such),
+these platforms should define ARCH_WANTS_LIBATA_LEDS if there
+are boards with LED(s) intended to indicate ATA disk activity and
+need the OS to take care of that.
+In that way, if not selected, LED trigger support not will be
+included in libata-core and both, codepaths and structures remain
+untouched.
+
+Signed-off-by: Daniel Golle <[email protected]>
+---
+ drivers/ata/Kconfig       | 16 ++++++++++++++++
+ drivers/ata/libata-core.c | 41 +++++++++++++++++++++++++++++++++++++++++
+ include/linux/libata.h    |  9 +++++++++
+ 3 files changed, 66 insertions(+)
+
+--- a/drivers/ata/Kconfig
++++ b/drivers/ata/Kconfig
+@@ -67,6 +67,22 @@ config ATA_FORCE
+ 
+         If unsure, say Y.
+ 
++config ARCH_WANT_LIBATA_LEDS
++      bool
++
++config ATA_LEDS
++      bool "support ATA port LED triggers"
++      depends on ARCH_WANT_LIBATA_LEDS
++      select NEW_LEDS
++      select LEDS_CLASS
++      select LEDS_TRIGGERS
++      default y
++      help
++        This option adds a LED trigger for each registered ATA port.
++        It is used to drive disk activity leds connected via GPIO.
++
++        If unsure, say N.
++
+ config ATA_ACPI
+       bool "ATA ACPI Support"
+       depends on ACPI
+--- a/drivers/ata/libata-core.c
++++ b/drivers/ata/libata-core.c
+@@ -656,6 +656,19 @@ u64 ata_tf_read_block(const struct ata_t
+       return block;
+ }
+ 
++#ifdef CONFIG_ATA_LEDS
++#define LIBATA_BLINK_DELAY 20 /* ms */
++static inline void ata_led_act(struct ata_port *ap)
++{
++      unsigned long led_delay = LIBATA_BLINK_DELAY;
++
++      if (unlikely(!ap->ledtrig))
++              return;
++
++      led_trigger_blink_oneshot(ap->ledtrig, &led_delay, &led_delay, 0);
++}
++#endif
++
+ /**
+  *    ata_build_rw_tf - Build ATA taskfile for given read/write request
+  *    @tf: Target ATA taskfile
+@@ -4576,6 +4589,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
+               if (tag < 0)
+                       return NULL;
+       }
++#ifdef CONFIG_ATA_LEDS
++      ata_led_act(ap);
++#endif
+ 
+       qc = __ata_qc_from_tag(ap, tag);
+       qc->tag = qc->hw_tag = tag;
+@@ -5354,6 +5370,9 @@ struct ata_port *ata_port_alloc(struct a
+       ap->stats.unhandled_irq = 1;
+       ap->stats.idle_irq = 1;
+ #endif
++#ifdef CONFIG_ATA_LEDS
++      ap->ledtrig = kzalloc(sizeof(struct led_trigger), GFP_KERNEL);
++#endif
+       ata_sff_port_init(ap);
+ 
+       return ap;
+@@ -5389,6 +5408,12 @@ static void ata_host_release(struct kref
+ 
+               kfree(ap->pmp_link);
+               kfree(ap->slave_link);
++#ifdef CONFIG_ATA_LEDS
++              if (ap->ledtrig) {
++                      led_trigger_unregister(ap->ledtrig);
++                      kfree(ap->ledtrig);
++              };
++#endif
+               kfree(ap);
+               host->ports[i] = NULL;
+       }
+@@ -5795,7 +5820,23 @@ int ata_host_register(struct ata_host *h
+               host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
+               host->ports[i]->local_port_no = i + 1;
+       }
++#ifdef CONFIG_ATA_LEDS
++      for (i = 0; i < host->n_ports; i++) {
++              if (unlikely(!host->ports[i]->ledtrig))
++                      continue;
+ 
++              snprintf(host->ports[i]->ledtrig_name,
++                      sizeof(host->ports[i]->ledtrig_name), "ata%u",
++                      host->ports[i]->print_id);
++
++              host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name;
++
++              if (led_trigger_register(host->ports[i]->ledtrig)) {
++                      kfree(host->ports[i]->ledtrig);
++                      host->ports[i]->ledtrig = NULL;
++              }
++      }
++#endif
+       /* Create associated sysfs transport objects  */
+       for (i = 0; i < host->n_ports; i++) {
+               rc = ata_tport_add(host->dev,host->ports[i]);
+--- a/include/linux/libata.h
++++ b/include/linux/libata.h
+@@ -23,6 +23,9 @@
+ #include <linux/cdrom.h>
+ #include <linux/sched.h>
+ #include <linux/async.h>
++#ifdef CONFIG_ATA_LEDS
++#include <linux/leds.h>
++#endif
+ 
+ /*
+  * Define if arch has non-standard setup.  This is a _PCI_ standard
+@@ -888,6 +891,12 @@ struct ata_port {
+ #ifdef CONFIG_ATA_ACPI
+       struct ata_acpi_gtm     __acpi_init_gtm; /* use ata_acpi_init_gtm() */
+ #endif
++
++#ifdef CONFIG_ATA_LEDS
++      struct led_trigger      *ledtrig;
++      char                    ledtrig_name[8];
++#endif
++
+       /* owned by EH */
+       u8                      sector_buf[ATA_SECT_SIZE] ____cacheline_aligned;
+ };

diff --git a/target/linux/generic/pending-6.0/840-hwrng-bcm2835-set-quality-to-1000.patch b/target/linux/generic/pending-6.0/840-hwrng-bcm2835-set-quality-to-1000.patch
new file mode 100644 (file)
index 0000000..5ca8933
--- /dev/null
+++ b/target/linux/generic/pending-6.0/840-hwrng-bcm2835-set-quality-to-1000.patch
@@ -0,0 +1,26 @@
+From d6988cf1d16faac56899918bb2b1be8d85155e3f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <[email protected]>
+Date: Sat, 20 Feb 2021 18:36:38 +0100
+Subject: [PATCH] hwrng: bcm2835: set quality to 1000
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This allows devices without a high precission timer to reduce boot from >100s
+to <30s.
+
+Signed-off-by: Álvaro Fernández Rojas <[email protected]>
+---
+ drivers/char/hw_random/bcm2835-rng.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/char/hw_random/bcm2835-rng.c
++++ b/drivers/char/hw_random/bcm2835-rng.c
+@@ -170,6 +170,7 @@ static int bcm2835_rng_probe(struct plat
+       priv->rng.init = bcm2835_rng_init;
+       priv->rng.read = bcm2835_rng_read;
+       priv->rng.cleanup = bcm2835_rng_cleanup;
++      priv->rng.quality = 1000;
+ 
+       if (dev_of_node(dev)) {
+               rng_id = of_match_node(bcm2835_rng_of_match, dev->of_node);

diff --git a/target/linux/generic/pending-6.0/850-0023-PCI-aardvark-Make-main-irq_chip-structure-a-static-d.patch b/target/linux/generic/pending-6.0/850-0023-PCI-aardvark-Make-main-irq_chip-structure-a-static-d.patch
new file mode 100644 (file)
index 0000000..de28ebe
--- /dev/null
+++ b/target/linux/generic/pending-6.0/850-0023-PCI-aardvark-Make-main-irq_chip-structure-a-static-d.patch
@@ -0,0 +1,102 @@
+From 663b9f99bb35dbc0c7b685f71ee3668a60d31320 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <[email protected]>
+Date: Mon, 10 Jan 2022 02:02:00 +0100
+Subject: [PATCH] PCI: aardvark: Make main irq_chip structure a static driver
+ structure
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Marc Zyngier says [1] that we should use struct irq_chip as a global
+static struct in the driver. Even though the structure currently
+contains a dynamic member (parent_device), Marc says [2] that he plans
+to kill it and make the structure completely static.
+
+We have already converted others irq_chip structures in this driver in
+this way, but we omitted this one because the .name member is
+dynamically created from device's name, and the name is displayed in
+sysfs, so changing it would break sysfs ABI.
+
+The rationale for changing the name (to "advk-INT") in spite of sysfs
+ABI, and thus allowing to convert to a static structure, is that after
+the other changes we made in this series, the IRQ chip is basically
+something different: it no logner generates ERR and PME interrupts (they
+are generated by emulated bridge's rp_irq_chip).
+
+[1] https://lore.kernel.org/linux-pci/[email protected]/
+[2] https://lore.kernel.org/linux-pci/[email protected]/
+
+Signed-off-by: Marek Behún <[email protected]>
+---
+ drivers/pci/controller/pci-aardvark.c | 25 +++++++------------------
+ 1 file changed, 7 insertions(+), 18 deletions(-)
+
+--- a/drivers/pci/controller/pci-aardvark.c
++++ b/drivers/pci/controller/pci-aardvark.c
+@@ -274,7 +274,6 @@ struct advk_pcie {
+       u8 wins_count;
+       struct irq_domain *rp_irq_domain;
+       struct irq_domain *irq_domain;
+-      struct irq_chip irq_chip;
+       raw_spinlock_t irq_lock;
+       struct irq_domain *msi_domain;
+       struct irq_domain *msi_inner_domain;
+@@ -1330,14 +1329,19 @@ static void advk_pcie_irq_unmask(struct
+       raw_spin_unlock_irqrestore(&pcie->irq_lock, flags);
+ }
+ 
++static struct irq_chip advk_irq_chip = {
++      .name           = "advk-INT",
++      .irq_mask       = advk_pcie_irq_mask,
++      .irq_unmask     = advk_pcie_irq_unmask,
++};
++
+ static int advk_pcie_irq_map(struct irq_domain *h,
+                            unsigned int virq, irq_hw_number_t hwirq)
+ {
+       struct advk_pcie *pcie = h->host_data;
+ 
+       irq_set_status_flags(virq, IRQ_LEVEL);
+-      irq_set_chip_and_handler(virq, &pcie->irq_chip,
+-                               handle_level_irq);
++      irq_set_chip_and_handler(virq, &advk_irq_chip, handle_level_irq);
+       irq_set_chip_data(virq, pcie);
+ 
+       return 0;
+@@ -1396,7 +1400,6 @@ static int advk_pcie_init_irq_domain(str
+       struct device *dev = &pcie->pdev->dev;
+       struct device_node *node = dev->of_node;
+       struct device_node *pcie_intc_node;
+-      struct irq_chip *irq_chip;
+       int ret = 0;
+ 
+       raw_spin_lock_init(&pcie->irq_lock);
+@@ -1407,28 +1410,14 @@ static int advk_pcie_init_irq_domain(str
+               return -ENODEV;
+       }
+ 
+-      irq_chip = &pcie->irq_chip;
+-
+-      irq_chip->name = devm_kasprintf(dev, GFP_KERNEL, "%s-irq",
+-                                      dev_name(dev));
+-      if (!irq_chip->name) {
+-              ret = -ENOMEM;
+-              goto out_put_node;
+-      }
+-
+-      irq_chip->irq_mask = advk_pcie_irq_mask;
+-      irq_chip->irq_unmask = advk_pcie_irq_unmask;
+-
+       pcie->irq_domain =
+               irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX,
+                                     &advk_pcie_irq_domain_ops, pcie);
+       if (!pcie->irq_domain) {
+               dev_err(dev, "Failed to get a INTx IRQ domain\n");
+               ret = -ENOMEM;
+-              goto out_put_node;
+       }
+ 
+-out_put_node:
+       of_node_put(pcie_intc_node);
+       return ret;
+ }

diff --git a/target/linux/generic/pending-6.0/920-mangle_bootargs.patch b/target/linux/generic/pending-6.0/920-mangle_bootargs.patch
new file mode 100644 (file)
index 0000000..dbcd6a5
--- /dev/null
+++ b/target/linux/generic/pending-6.0/920-mangle_bootargs.patch
@@ -0,0 +1,71 @@
+From: Imre Kaloz <[email protected]>
+Subject: init: add CONFIG_MANGLE_BOOTARGS and disable it by default
+
+Enabling this option renames the bootloader supplied root=
+and rootfstype= variables, which might have to be know but
+would break the automatisms OpenWrt uses.
+
+Signed-off-by: Imre Kaloz <[email protected]>
+---
+ init/Kconfig |  9 +++++++++
+ init/main.c  | 24 ++++++++++++++++++++++++
+ 2 files changed, 33 insertions(+)
+
+--- a/init/Kconfig
++++ b/init/Kconfig
+@@ -1810,6 +1810,15 @@ config EMBEDDED
+         an embedded system so certain expert options are available
+         for configuration.
+ 
++config MANGLE_BOOTARGS
++      bool "Rename offending bootargs"
++      depends on EXPERT
++      help
++        Sometimes the bootloader passed bogus root= and rootfstype=
++        parameters to the kernel, and while you want to ignore them,
++        you need to know the values f.e. to support dual firmware
++        layouts on the flash.
++
+ config HAVE_PERF_EVENTS
+       bool
+       help
+--- a/init/main.c
++++ b/init/main.c
+@@ -615,6 +615,29 @@ static inline void setup_nr_cpu_ids(void
+ static inline void smp_prepare_cpus(unsigned int maxcpus) { }
+ #endif
+ 
++#ifdef CONFIG_MANGLE_BOOTARGS
++static void __init mangle_bootargs(char *command_line)
++{
++      char *rootdev;
++      char *rootfs;
++
++      rootdev = strstr(command_line, "root=/dev/mtdblock");
++
++      if (rootdev)
++              strncpy(rootdev, "mangled_rootblock=", 18);
++
++      rootfs = strstr(command_line, "rootfstype");
++
++      if (rootfs)
++              strncpy(rootfs, "mangled_fs", 10);
++
++}
++#else
++static void __init mangle_bootargs(char *command_line)
++{
++}
++#endif
++
+ /*
+  * We need to store the untouched command line for future reference.
+  * We also need to store the touched command line since the parameter
+@@ -955,6 +978,7 @@ asmlinkage __visible void __init __no_sa
+       pr_notice("%s", linux_banner);
+       early_security_init();
+       setup_arch(&command_line);
++      mangle_bootargs(command_line);
+       setup_boot_config();
+       setup_command_line(command_line);
+       setup_nr_cpu_ids();

diff --git a/target/linux/generic/pending-6.0/930-qcom-qmi-helpers.patch b/target/linux/generic/pending-6.0/930-qcom-qmi-helpers.patch
new file mode 100644 (file)
index 0000000..2f42774
--- /dev/null
+++ b/target/linux/generic/pending-6.0/930-qcom-qmi-helpers.patch
@@ -0,0 +1,11 @@
+--- a/drivers/soc/qcom/Kconfig
++++ b/drivers/soc/qcom/Kconfig
+@@ -92,7 +92,7 @@ config QCOM_PDR_HELPERS
+       select QCOM_QMI_HELPERS
+ 
+ config QCOM_QMI_HELPERS
+-      tristate
++      tristate "Qualcomm QMI Helpers"
+       depends on NET
+ 
+ config QCOM_RMTFS_MEM

diff --git a/target/linux/generic/pending-6.0/999-OPP-Provide-old-opp-to-config_clks-on-_set_opp.patch b/target/linux/generic/pending-6.0/999-OPP-Provide-old-opp-to-config_clks-on-_set_opp.patch
new file mode 100644 (file)
index 0000000..477b10c
--- /dev/null
+++ b/target/linux/generic/pending-6.0/999-OPP-Provide-old-opp-to-config_clks-on-_set_opp.patch
@@ -0,0 +1,117 @@
+From fd59b838dd90452f61a17dc9e5ff175205003068 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 15 Sep 2022 18:49:43 +0200
+Subject: [PATCH] OPP: Provide old opp to config_clks on _set_opp
+
+With the target opp, also pass the old opp to config_clks function.
+This can be useful when a driver needs to take decision on what fequency
+to set based on what is the current frequency without using a
+clk_get_freq call.
+Update the only user of custom config_clks (tegra30 devfreq driver) to
+this new implementation.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/devfreq/tegra30-devfreq.c |  5 +++--
+ drivers/opp/core.c                | 11 ++++++-----
+ include/linux/pm_opp.h            | 11 ++++++-----
+ 3 files changed, 15 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/devfreq/tegra30-devfreq.c b/drivers/devfreq/tegra30-devfreq.c
+index 503376b894b6..92cdb6bf9a89 100644
+--- a/drivers/devfreq/tegra30-devfreq.c
++++ b/drivers/devfreq/tegra30-devfreq.c
+@@ -823,8 +823,9 @@ static int devm_tegra_devfreq_init_hw(struct device *dev,
+ 
+ static int tegra_devfreq_config_clks_nop(struct device *dev,
+                                        struct opp_table *opp_table,
+-                                       struct dev_pm_opp *opp, void *data,
+-                                       bool scaling_down)
++                                       struct dev_pm_opp *old_opp,
++                                       struct dev_pm_opp *opp,
++                                       void *data, bool scaling_down)
+ {
+       /* We want to skip clk configuration via dev_pm_opp_set_opp() */
+       return 0;
+diff --git a/drivers/opp/core.c b/drivers/opp/core.c
+index e87567dbe99f..2f44ceaf8d3c 100644
+--- a/drivers/opp/core.c
++++ b/drivers/opp/core.c
+@@ -816,7 +816,8 @@ static int _set_opp_voltage(struct device *dev, struct regulator *reg,
+ 
+ static int
+ _opp_config_clk_single(struct device *dev, struct opp_table *opp_table,
+-                     struct dev_pm_opp *opp, void *data, bool scaling_down)
++                     struct dev_pm_opp *old_opp, struct dev_pm_opp *opp,
++                     void *data, bool scaling_down)
+ {
+       unsigned long *target = data;
+       unsigned long freq;
+@@ -848,8 +849,8 @@ _opp_config_clk_single(struct device *dev, struct opp_table *opp_table,
+  * the order in which they are present in the array while scaling up.
+  */
+ int dev_pm_opp_config_clks_simple(struct device *dev,
+-              struct opp_table *opp_table, struct dev_pm_opp *opp, void *data,
+-              bool scaling_down)
++              struct opp_table *opp_table, struct dev_pm_opp *old_opp,
++              struct dev_pm_opp *opp, void *data, bool scaling_down)
+ {
+       int ret, i;
+ 
+@@ -1121,7 +1122,7 @@ static int _set_opp(struct device *dev, struct opp_table *opp_table,
+       }
+ 
+       if (opp_table->config_clks) {
+-              ret = opp_table->config_clks(dev, opp_table, opp, clk_data, scaling_down);
++              ret = opp_table->config_clks(dev, opp_table, old_opp, opp, clk_data, scaling_down);
+               if (ret)
+                       return ret;
+       }
+@@ -1196,7 +1197,7 @@ int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq)
+                * equivalent to a clk_set_rate()
+                */
+               if (!_get_opp_count(opp_table)) {
+-                      ret = opp_table->config_clks(dev, opp_table, NULL,
++                      ret = opp_table->config_clks(dev, opp_table, NULL, NULL,
+                                                    &target_freq, false);
+                       goto put_opp_table;
+               }
+diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
+index dc1fb5890792..6c24a4f9fc49 100644
+--- a/include/linux/pm_opp.h
++++ b/include/linux/pm_opp.h
+@@ -61,7 +61,8 @@ typedef int (*config_regulators_t)(struct device *dev,
+                       struct dev_pm_opp *old_opp, struct dev_pm_opp *new_opp,
+                       struct regulator **regulators, unsigned int count);
+ 
+-typedef int (*config_clks_t)(struct device *dev, struct opp_table *opp_table,
++typedef int (*config_clks_t)(struct device *dev,
++                      struct opp_table *opp_table, struct dev_pm_opp *old_opp, 
+                       struct dev_pm_opp *opp, void *data, bool scaling_down);
+ 
+ /**
+@@ -160,8 +161,8 @@ int dev_pm_opp_set_config(struct device *dev, struct dev_pm_opp_config *config);
+ int devm_pm_opp_set_config(struct device *dev, struct dev_pm_opp_config *config);
+ void dev_pm_opp_clear_config(int token);
+ int dev_pm_opp_config_clks_simple(struct device *dev,
+-              struct opp_table *opp_table, struct dev_pm_opp *opp, void *data,
+-              bool scaling_down);
++              struct opp_table *opp_table, struct dev_pm_opp *old_opp,
++              struct dev_pm_opp *opp, void *data, bool scaling_down);
+ 
+ struct dev_pm_opp *dev_pm_opp_xlate_required_opp(struct opp_table *src_table, struct opp_table *dst_table, struct dev_pm_opp *src_opp);
+ int dev_pm_opp_xlate_performance_state(struct opp_table *src_table, struct opp_table *dst_table, unsigned int pstate);
+@@ -346,8 +347,8 @@ static inline int devm_pm_opp_set_config(struct device *dev, struct dev_pm_opp_c
+ static inline void dev_pm_opp_clear_config(int token) {}
+ 
+ static inline int dev_pm_opp_config_clks_simple(struct device *dev,
+-              struct opp_table *opp_table, struct dev_pm_opp *opp, void *data,
+-              bool scaling_down)
++              struct opp_table *opp_table, struct dev_pm_opp *old_opp,
++              struct dev_pm_opp *opp, void *data, bool scaling_down)
+ {
+       return -EOPNOTSUPP;
+ }
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/Makefile b/target/linux/ipq806x/Makefile
index 665a830e348f4026e9aa4804f19f14d5d553d3a0..d42f8c4116aefcf97756321a601ad3b84937f386 100644 (file)
--- a/target/linux/ipq806x/Makefile
+++ b/target/linux/ipq806x/Makefile
@@ -10,8 +10,8 @@ CPU_TYPE:=cortex-a15
 CPU_SUBTYPE:=neon-vfpv4
 SUBTARGETS:=generic
 
-KERNEL_PATCHVER:=5.10
-KERNEL_TESTING_PATCHVER:=5.15
+KERNEL_PATCHVER:=5.15
+KERNEL_TESTING_PATCHVER:=6.0
 
 KERNELNAME:=zImage Image dtbs
 

diff --git a/target/linux/ipq806x/config-6.0 b/target/linux/ipq806x/config-6.0
new file mode 100644 (file)
index 0000000..4978901
--- /dev/null
+++ b/target/linux/ipq806x/config-6.0
@@ -0,0 +1,638 @@
+# CONFIG_ADIN1100_PHY is not set
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_AMT is not set
+# CONFIG_ANDROID_BINDER_IPC is not set
+# CONFIG_ANON_VMA_NAME is not set
+# CONFIG_APQ_GCC_8084 is not set
+# CONFIG_APQ_MMCC_8084 is not set
+CONFIG_ARCH_32BIT_OFF_T=y
+# CONFIG_ARCH_AIROHA is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+# CONFIG_ARCH_HPE is not set
+# CONFIG_ARCH_IPQ40XX is not set
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+# CONFIG_ARCH_MDM9615 is not set
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+# CONFIG_ARCH_MSM8909 is not set
+# CONFIG_ARCH_MSM8916 is not set
+CONFIG_ARCH_MSM8960=y
+CONFIG_ARCH_MSM8974=y
+CONFIG_ARCH_MSM8X60=y
+CONFIG_ARCH_MULTIPLATFORM=y
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
+CONFIG_ARCH_NR_GPIO=0
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
+CONFIG_ARCH_QCOM=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+# CONFIG_ARCH_SUNPLUS is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARM=y
+CONFIG_ARM_AMBA=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
+# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE is not set
+CONFIG_ARM_CPUIDLE=y
+CONFIG_ARM_CPU_SUSPEND=y
+# CONFIG_ARM_CPU_TOPOLOGY is not set
+# CONFIG_ARM_ERRATA_764319 is not set
+CONFIG_ARM_GIC=y
+CONFIG_ARM_HAS_GROUP_RELOCS=y
+CONFIG_ARM_HAS_SG_CHAIN=y
+CONFIG_ARM_IPQ806X_FAB_DEVFREQ=y
+CONFIG_ARM_KRAIT_CACHE_DEVFREQ=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_ARM_MODULE_PLTS=y
+CONFIG_ARM_PATCH_IDIV=y
+CONFIG_ARM_PATCH_PHYS_VIRT=y
+# CONFIG_ARM_QCOM_CPUFREQ_HW is not set
+CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y
+CONFIG_ARM_QCOM_SPM_CPUIDLE=y
+# CONFIG_ARM_SMMU is not set
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_UNWIND=y
+CONFIG_ARM_VIRT_EXT=y
+CONFIG_AT803X_PHY=y
+# CONFIG_BACKTRACE_VERBOSE is not set
+# CONFIG_BATTERY_SAMSUNG_SDI is not set
+# CONFIG_BATTERY_UG3105 is not set
+CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_UBLK is not set
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BLOCK_LEGACY_AUTOLOAD=y
+CONFIG_BOUNCE=y
+# CONFIG_CACHE_L2X0 is not set
+CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
+# CONFIG_CHARGER_MAX77976 is not set
+CONFIG_CLKSRC_QCOM=y
+# CONFIG_CLK_ICST is not set
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_COMMON_CLK=y
+CONFIG_COMMON_CLK_QCOM=y
+# CONFIG_COMMON_CLK_RS9_PCIE is not set
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_CONTEXT_TRACKING=y
+CONFIG_CONTEXT_TRACKING_IDLE=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_CPUFREQ_DT_PLATDEV=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+CONFIG_CPU_FREQ_GOV_ATTR_SET=y
+CONFIG_CPU_FREQ_GOV_COMMON=y
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_PM=y
+CONFIG_CPU_RMAP=y
+CONFIG_CPU_SPECTRE=y
+CONFIG_CPU_THERMAL=y
+CONFIG_CPU_THUMB_CAPABLE=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_V7=y
+CONFIG_CRC16=y
+# CONFIG_CRC32_SARWATE is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC64_ROCKSOFT is not set
+CONFIG_CRC8=y
+# CONFIG_CRYPTO_ARIA is not set
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_DEV_QCOM_RNG=y
+CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_DRBG_HMAC=y
+CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_HASH_INFO=y
+# CONFIG_CRYPTO_HCTR2 is not set
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_JITTERENTROPY=y
+CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+CONFIG_CRYPTO_LIB_SHA1=y
+CONFIG_CRYPTO_LIB_SHA256=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_SM3_GENERIC is not set
+# CONFIG_CRYPTO_SM4_GENERIC is not set
+CONFIG_CRYPTO_ZSTD=y
+CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_NONE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_LL_INCLUDE="debug/msm.S"
+# CONFIG_DEBUG_NET is not set
+CONFIG_DEBUG_QCOM_UARTDM=y
+CONFIG_DEBUG_UART_PHYS=0x16340000
+CONFIG_DEBUG_UART_VIRT=0xfa71e000
+# CONFIG_DEBUG_UNCOMPRESS is not set
+CONFIG_DEVFREQ_GOV_PASSIVE=y
+# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
+# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
+# CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND is not set
+# CONFIG_DEVFREQ_GOV_USERSPACE is not set
+# CONFIG_DEVFREQ_THERMAL is not set
+# CONFIG_DM9051 is not set
+CONFIG_DMADEVICES=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_OF=y
+CONFIG_DMA_OPS=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+# CONFIG_DP83TD510_PHY is not set
+# CONFIG_DRM_DEBUG_MODESET_LOCK is not set
+CONFIG_DTC=y
+CONFIG_DT_IDLE_STATES=y
+# CONFIG_DWMAC_GENERIC is not set
+CONFIG_DWMAC_IPQ806X=y
+# CONFIG_DWMAC_QCOM_ETHQOS is not set
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_EDAC_ATOMIC_SCRUB=y
+CONFIG_EDAC_SUPPORT=y
+CONFIG_EXCLUSIVE_SYSTEM_RAM=y
+CONFIG_FIXED_PHY=y
+CONFIG_FIX_EARLYCON_MEM=y
+# CONFIG_FUN_ETH is not set
+CONFIG_FWNODE_MDIO=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_FW_LOADER_SYSFS=y
+# CONFIG_FW_UPLOAD is not set
+CONFIG_GCC12_NO_ARRAY_BOUNDS=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_CPU_VULNERABILITIES=y
+CONFIG_GENERIC_EARLY_IOREMAP=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
+CONFIG_GENERIC_MSI_IRQ=y
+CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PINCONF=y
+CONFIG_GENERIC_PINCTRL_GROUPS=y
+CONFIG_GENERIC_PINMUX_FUNCTIONS=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_VDSO_32=y
+CONFIG_GPIOLIB_IRQCHIP=y
+CONFIG_GPIO_CDEV=y
+# CONFIG_GPIO_SIM is not set
+CONFIG_GRO_CELLS=y
+CONFIG_HARDEN_BRANCH_PREDICTOR=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAVE_SMP=y
+CONFIG_HIGHMEM=y
+CONFIG_HIGHPTE=y
+# CONFIG_HTE is not set
+CONFIG_HWMON=y
+CONFIG_HWSPINLOCK=y
+CONFIG_HWSPINLOCK_QCOM=y
+CONFIG_HW_RANDOM=y
+CONFIG_HZ_FIXED=0
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+# CONFIG_I2C_QCOM_CCI is not set
+CONFIG_I2C_QUP=y
+CONFIG_INITRAMFS_PRESERVE_MTIME=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_IOMMU_DEBUGFS is not set
+# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
+# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
+CONFIG_IOMMU_SUPPORT=y
+# CONFIG_IP5XXX_POWER is not set
+# CONFIG_IPQ_APSS_PLL is not set
+# CONFIG_IPQ_GCC_4019 is not set
+# CONFIG_IPQ_GCC_6018 is not set
+CONFIG_IPQ_GCC_806X=y
+# CONFIG_IPQ_GCC_8074 is not set
+# CONFIG_IPQ_LCC_806X is not set
+CONFIG_IRQCHIP=y
+CONFIG_IRQSTACKS=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_KMAP_LOCAL=y
+CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
+CONFIG_KPSS_XCC=y
+CONFIG_KRAITCC=y
+CONFIG_KRAIT_CLOCKS=y
+CONFIG_KRAIT_L2_ACCESSORS=y
+# CONFIG_LAN966X_SWITCH is not set
+CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_DEVRES=y
+CONFIG_MDIO_GPIO=y
+CONFIG_MDIO_IPQ8064=y
+# CONFIG_MDM_GCC_9615 is not set
+# CONFIG_MDM_LCC_9615 is not set
+CONFIG_MEMFD_CREATE=y
+# CONFIG_MFD_HI6421_SPMI is not set
+# CONFIG_MFD_MAX77714 is not set
+CONFIG_MFD_QCOM_RPM=y
+# CONFIG_MFD_SIMPLE_MFD_I2C is not set
+# CONFIG_MFD_SPMI_PMIC is not set
+CONFIG_MFD_SYSCON=y
+# CONFIG_MHI_BUS_EP is not set
+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
+CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_ARMMMCI=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=16
+CONFIG_MMC_CQHCI=y
+CONFIG_MMC_QCOM_DML=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+CONFIG_MMC_SDHCI_MSM=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MODULES_USE_ELF_REL=y
+# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set
+# CONFIG_MSE102X is not set
+CONFIG_MSM_GCC_8660=y
+# CONFIG_MSM_GCC_8916 is not set
+# CONFIG_MSM_GCC_8939 is not set
+# CONFIG_MSM_GCC_8960 is not set
+# CONFIG_MSM_GCC_8974 is not set
+# CONFIG_MSM_GCC_8976 is not set
+# CONFIG_MSM_GCC_8994 is not set
+# CONFIG_MSM_GCC_8996 is not set
+# CONFIG_MSM_GCC_8998 is not set
+# CONFIG_MSM_GPUCC_8998 is not set
+# CONFIG_MSM_IOMMU is not set
+# CONFIG_MSM_LCC_8960 is not set
+# CONFIG_MSM_MMCC_8960 is not set
+# CONFIG_MSM_MMCC_8974 is not set
+# CONFIG_MSM_MMCC_8996 is not set
+# CONFIG_MSM_MMCC_8998 is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_NAND_CORE=y
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_MXIC is not set
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+CONFIG_MTD_NAND_QCOM=y
+CONFIG_MTD_QCOMSMEM_PARTS=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPLIT_FIRMWARE=y
+CONFIG_MTD_SPLIT_FIT_FW=y
+CONFIG_MTD_SPLIT_UIMAGE_FW=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEON=y
+CONFIG_NET_DEVLINK=y
+# CONFIG_NET_DEV_REFCNT_TRACKER is not set
+CONFIG_NET_DSA=y
+# CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON is not set
+CONFIG_NET_DSA_QCA8K=y
+# CONFIG_NET_DSA_REALTEK is not set
+CONFIG_NET_DSA_TAG_QCA=y
+# CONFIG_NET_DSA_TAG_RTL8_4 is not set
+# CONFIG_NET_DSA_TAG_RZN1_A5PSW is not set
+CONFIG_NET_FLOW_LIMIT=y
+# CONFIG_NET_NS_REFCNT_TRACKER is not set
+CONFIG_NET_PTP_CLASSIFY=y
+CONFIG_NET_SELFTESTS=y
+CONFIG_NET_SWITCHDEV=y
+CONFIG_NET_VENDOR_ASIX=y
+CONFIG_NET_VENDOR_DAVICOM=y
+CONFIG_NET_VENDOR_ENGLEDER=y
+CONFIG_NET_VENDOR_FUNGIBLE=y
+CONFIG_NET_VENDOR_VERTEXCOM=y
+CONFIG_NET_VENDOR_WANGXUN=y
+CONFIG_NLS=y
+CONFIG_NO_HZ=y
+CONFIG_NO_HZ_COMMON=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_NR_CPUS=2
+CONFIG_NVMEM=y
+# CONFIG_NVMEM_SPMI_SDAM is not set
+CONFIG_NVMEM_SYSFS=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_OLD_SIGACTION=y
+CONFIG_OLD_SIGSUSPEND3=y
+# CONFIG_OPEN_DICE is not set
+CONFIG_PADATA=y
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PAGE_POOL=y
+# CONFIG_PAGE_POOL_STATS is not set
+CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
+CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
+CONFIG_PAHOLE_HAS_SPLIT_BTF=y
+CONFIG_PAHOLE_VERSION=123
+CONFIG_PCI=y
+CONFIG_PCIEAER=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIE_DW=y
+CONFIG_PCIE_DW_HOST=y
+CONFIG_PCIE_QCOM=y
+CONFIG_PCI_DEBUG=y
+CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DOMAINS_GENERIC=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_MSI_IRQ_DOMAIN=y
+CONFIG_PCS_XPCS=y
+# CONFIG_PECI is not set
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PHYLINK=y
+# CONFIG_PHY_CADENCE_DPHY_RX is not set
+# CONFIG_PHY_LAN966X_SERDES is not set
+# CONFIG_PHY_QCOM_APQ8064_SATA is not set
+# CONFIG_PHY_QCOM_EDP is not set
+# CONFIG_PHY_QCOM_IPQ4019_USB is not set
+CONFIG_PHY_QCOM_IPQ806X_SATA=y
+# CONFIG_PHY_QCOM_IPQ806X_USB is not set
+# CONFIG_PHY_QCOM_PCIE2 is not set
+# CONFIG_PHY_QCOM_QMP is not set
+# CONFIG_PHY_QCOM_QUSB2 is not set
+# CONFIG_PHY_QCOM_USB_HS_28NM is not set
+# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set
+# CONFIG_PHY_QCOM_USB_SS is not set
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_APQ8064 is not set
+# CONFIG_PINCTRL_APQ8084 is not set
+# CONFIG_PINCTRL_IPQ4019 is not set
+# CONFIG_PINCTRL_IPQ6018 is not set
+CONFIG_PINCTRL_IPQ8064=y
+# CONFIG_PINCTRL_IPQ8074 is not set
+# CONFIG_PINCTRL_MDM9615 is not set
+CONFIG_PINCTRL_MSM=y
+# CONFIG_PINCTRL_MSM8226 is not set
+# CONFIG_PINCTRL_MSM8660 is not set
+# CONFIG_PINCTRL_MSM8909 is not set
+# CONFIG_PINCTRL_MSM8916 is not set
+# CONFIG_PINCTRL_MSM8960 is not set
+# CONFIG_PINCTRL_MSM8976 is not set
+# CONFIG_PINCTRL_MSM8994 is not set
+# CONFIG_PINCTRL_MSM8996 is not set
+# CONFIG_PINCTRL_MSM8998 is not set
+# CONFIG_PINCTRL_QCM2290 is not set
+# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set
+# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
+# CONFIG_PINCTRL_QCS404 is not set
+# CONFIG_PINCTRL_SC7180 is not set
+# CONFIG_PINCTRL_SC8280XP is not set
+# CONFIG_PINCTRL_SDM660 is not set
+# CONFIG_PINCTRL_SDM845 is not set
+# CONFIG_PINCTRL_SDX65 is not set
+# CONFIG_PINCTRL_SM6350 is not set
+# CONFIG_PINCTRL_SM6375 is not set
+# CONFIG_PINCTRL_SM8150 is not set
+# CONFIG_PINCTRL_SM8250 is not set
+# CONFIG_PINCTRL_SM8450 is not set
+CONFIG_PM_DEVFREQ=y
+# CONFIG_PM_DEVFREQ_EVENT is not set
+CONFIG_PM_OPP=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_MSM=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_PPS=y
+CONFIG_PREEMPT_NONE_BUILD=y
+CONFIG_PRINTK_TIME=y
+CONFIG_PTP_1588_CLOCK=y
+CONFIG_PTP_1588_CLOCK_OPTIONAL=y
+# CONFIG_QCM_DISPCC_2290 is not set
+# CONFIG_QCM_GCC_2290 is not set
+# CONFIG_QCOM_A53PLL is not set
+CONFIG_QCOM_ADM=y
+CONFIG_QCOM_BAM_DMA=y
+CONFIG_QCOM_CLK_RPM=y
+# CONFIG_QCOM_COMMAND_DB is not set
+# CONFIG_QCOM_CPR is not set
+# CONFIG_QCOM_EBI2 is not set
+# CONFIG_QCOM_GENI_SE is not set
+CONFIG_QCOM_GSBI=y
+CONFIG_QCOM_HFPLL=y
+# CONFIG_QCOM_ICC_BWMON is not set
+# CONFIG_QCOM_IOMMU is not set
+# CONFIG_QCOM_LLCC is not set
+# CONFIG_QCOM_OCMEM is not set
+# CONFIG_QCOM_PDC is not set
+CONFIG_QCOM_QFPROM=y
+# CONFIG_QCOM_QMI_HELPERS is not set
+# CONFIG_QCOM_RMTFS_MEM is not set
+CONFIG_QCOM_RPMCC=y
+# CONFIG_QCOM_RPMH is not set
+CONFIG_QCOM_SCM=y
+# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
+CONFIG_QCOM_SMEM=y
+# CONFIG_QCOM_SMSM is not set
+# CONFIG_QCOM_SOCINFO is not set
+CONFIG_QCOM_SPM=y
+# CONFIG_QCOM_SSC_BLOCK_BUS is not set
+# CONFIG_QCOM_STATS is not set
+CONFIG_QCOM_TCSR=y
+CONFIG_QCOM_TSENS=y
+CONFIG_QCOM_WDT=y
+# CONFIG_QCS_GCC_404 is not set
+# CONFIG_QCS_Q6SSTOP_404 is not set
+# CONFIG_QCS_TURING_404 is not set
+CONFIG_RANDSTRUCT_NONE=y
+CONFIG_RAS=y
+CONFIG_RATIONAL=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=21
+CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0
+CONFIG_REGMAP=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+# CONFIG_REGULATOR_MAX20086 is not set
+# CONFIG_REGULATOR_QCOM_LABIBB is not set
+CONFIG_REGULATOR_QCOM_RPM=y
+# CONFIG_REGULATOR_QCOM_SPMI is not set
+# CONFIG_REGULATOR_QCOM_USB_VBUS is not set
+# CONFIG_REGULATOR_RT5190A is not set
+# CONFIG_REGULATOR_RT5759 is not set
+# CONFIG_REGULATOR_SY7636A is not set
+# CONFIG_REGULATOR_TPS6286X is not set
+# CONFIG_REGULATOR_VQMMC_IPQ4019 is not set
+CONFIG_RESET_CONTROLLER=y
+# CONFIG_RESET_QCOM_AOSS is not set
+# CONFIG_RESET_QCOM_PDC is not set
+# CONFIG_RESET_SIMPLE is not set
+# CONFIG_RESET_TI_TPS380X is not set
+CONFIG_RFKILL_LEDS=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_DRV_NCT3018Y is not set
+CONFIG_RTC_I2C_AND_SPI=y
+CONFIG_RTC_MC146818_LIB=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+# CONFIG_SC_CAMCC_7280 is not set
+# CONFIG_SC_DISPCC_7180 is not set
+# CONFIG_SC_GCC_7180 is not set
+# CONFIG_SC_GCC_8280XP is not set
+# CONFIG_SC_GPUCC_7180 is not set
+# CONFIG_SC_LPASSCC_7280 is not set
+# CONFIG_SC_LPASS_CORECC_7180 is not set
+# CONFIG_SC_LPASS_CORECC_7280 is not set
+# CONFIG_SC_MSS_7180 is not set
+# CONFIG_SC_VIDEOCC_7180 is not set
+# CONFIG_SDM_CAMCC_845 is not set
+# CONFIG_SDM_DISPCC_845 is not set
+# CONFIG_SDM_GCC_660 is not set
+# CONFIG_SDM_GCC_845 is not set
+# CONFIG_SDM_GPUCC_845 is not set
+# CONFIG_SDM_LPASSCC_845 is not set
+# CONFIG_SDM_VIDEOCC_845 is not set
+# CONFIG_SDX_GCC_65 is not set
+# CONFIG_SENSORS_INA238 is not set
+# CONFIG_SENSORS_MAX6620 is not set
+# CONFIG_SENSORS_NCT6775_I2C is not set
+# CONFIG_SENSORS_SY7636A is not set
+# CONFIG_SENSORS_TMP464 is not set
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_8250_PERICOM=y
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SERIAL_MSM=y
+CONFIG_SERIAL_MSM_CONSOLE=y
+# CONFIG_SFC_SIENA is not set
+CONFIG_SGL_ALLOC=y
+# CONFIG_SHRINKER_DEBUG is not set
+CONFIG_SMP=y
+CONFIG_SMP_ON_UP=y
+# CONFIG_SM_CAMCC_8450 is not set
+# CONFIG_SM_GCC_8150 is not set
+# CONFIG_SM_GCC_8250 is not set
+# CONFIG_SM_GCC_8450 is not set
+# CONFIG_SM_GPUCC_6350 is not set
+# CONFIG_SM_GPUCC_8150 is not set
+# CONFIG_SM_GPUCC_8250 is not set
+# CONFIG_SM_GPUCC_8350 is not set
+# CONFIG_SM_VIDEOCC_8150 is not set
+# CONFIG_SM_VIDEOCC_8250 is not set
+CONFIG_SOCK_RX_QUEUE_MAPPING=y
+CONFIG_SOFTIRQ_ON_OWN_STACK=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_SPI=y
+# CONFIG_SPI_AX88796C is not set
+# CONFIG_SPI_CADENCE_XSPI is not set
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
+# CONFIG_SPI_MICROCHIP_CORE is not set
+CONFIG_SPI_QUP=y
+CONFIG_SPMI=y
+# CONFIG_SPMI_HISI3670 is not set
+CONFIG_SPMI_MSM_PMIC_ARB=y
+# CONFIG_SPMI_PMIC_CLKDIV is not set
+CONFIG_SRCU=y
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_PLATFORM=y
+CONFIG_SWPHY=y
+CONFIG_SWP_EMULATE=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_TEST_REF_TRACKER is not set
+# CONFIG_TEST_SIPHASH is not set
+CONFIG_THERMAL=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERMAL_OF=y
+CONFIG_THREAD_INFO_IN_TASK=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_PROBE=y
+CONFIG_TREE_RCU=y
+CONFIG_TREE_SRCU=y
+# CONFIG_TSNEP is not set
+# CONFIG_TXGBE is not set
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+# CONFIG_UCLAMP_TASK is not set
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
+CONFIG_UNWINDER_ARM=y
+CONFIG_USB=y
+CONFIG_USB_COMMON=y
+# CONFIG_USB_ONBOARD_HUB is not set
+# CONFIG_USB_QCOM_EUD is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USE_OF=y
+# CONFIG_VCPU_STALL_DETECTOR is not set
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_VMAP_STACK=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_WLAN_VENDOR_PURELIFI=y
+CONFIG_WLAN_VENDOR_SILABS=y
+# CONFIG_XILINX_INTC is not set
+CONFIG_XPS=y
+CONFIG_XXHASH=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_BCJ=y
+# CONFIG_XZ_DEC_MICROLZMA is not set
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZSTD_COMPRESS=y
+CONFIG_ZSTD_DECOMPRESS=y
+# CONFIG_ZSWAP is not set

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
new file mode 100644 (file)
index 0000000..c1c2185
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
@@ -0,0 +1,479 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8062.dtsi"
+#include <dt-bindings/input/input.h>
+
+/delete-node/ &nand_pins;
+
+/ {
+       model = "NEC Platforms Aterm WG2600HP3";
+       compatible = "nec,wg2600hp3", "qcom,ipq8062", "qcom,ipq8064";
+
+       memory {
+               device_type = "memory";
+               reg =  <0x42000000 0x1e000000>;
+       };
+
+       aliases {
+               label-mac-device = &gmac2;
+
+               led-boot = &led_power_green;
+               led-failsafe = &led_power_red;
+               led-running = &led_power_green;
+               led-upgrade = &led_power_red;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&buttons_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               mode0 {
+                       label = "mode0";
+                       gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               mode1 {
+                       label = "mode1";
+                       gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_1>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pinctrl-0 = <&leds_pins>;
+               pinctrl-names = "default";
+
+               led_power_green: power_green {
+                       label = "green:power";
+                       gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_power_red: power_red {
+                       label = "red:power";
+                       gpios = <&qcom_pinmux 35 GPIO_ACTIVE_HIGH>;
+               };
+
+               active_green {
+                       label = "green:active";
+                       gpios = <&qcom_pinmux 42 GPIO_ACTIVE_HIGH>;
+               };
+
+               active_red {
+                       label = "red:active";
+                       gpios = <&qcom_pinmux 38 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g_green {
+                       label = "green:wlan2g";
+                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "phy1tpt";
+               };
+
+               wlan2g_red {
+                       label = "red:wlan2g";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g_green {
+                       label = "green:wlan5g";
+                       gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "phy0tpt";
+               };
+
+               wlan5g_red {
+                       label = "red:wlan5g";
+                       gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
+               };
+
+               tv_green {
+                       label = "green:tv";
+                       gpios = <&qcom_pinmux 46 GPIO_ACTIVE_HIGH>;
+               };
+
+               tv_red {
+                       label = "red:tv";
+                       gpios = <&qcom_pinmux 36 GPIO_ACTIVE_HIGH>;
+               };
+
+               converter_green {
+                       label = "green:converter";
+                       gpios = <&qcom_pinmux 43 GPIO_ACTIVE_HIGH>;
+               };
+
+               converter_red {
+                       label = "red:converter";
+                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       pinctrl-0 = <&akro_pins>;
+       pinctrl-names = "default";
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <10>;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       buttons_pins: buttons_pins {
+               mux {
+                       pins = "gpio22", "gpio24", "gpio40",
+                               "gpio41";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       leds_pins: leds_pins {
+               mux {
+                       pins = "gpio14", "gpio15", "gpio35",
+                               "gpio36", "gpio38", "gpio42",
+                               "gpio43", "gpio46", "gpio55",
+                               "gpio56", "gpio57", "gpio58";
+                       function = "gpio";
+                       bias-pull-down;
+               };
+
+               akro2 {
+                       pins = "gpio15", "gpio35", "gpio38",
+                               "gpio42", "gpio43", "gpio46",
+                               "gpio55", "gpio56", "gpio57",
+                               "gpio58";
+                       drive-strength = <2>;
+               };
+
+               akro4 {
+                       pins = "gpio14", "gpio36";
+                       drive-strength = <4>;
+               };
+       };
+
+       /*
+        * Stock firmware has the following settings, so let's do the same.
+        * I don't sure why these are required.
+        */
+       akro_pins: akro_pinmux {
+               akro {
+                       pins = "gpio17", "gpio26", "gpio47";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+
+               reset {
+                       pins = "gpio45";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-disable;
+                       output-low;
+               };
+
+               gmac0_rgmii {
+                       pins = "gpio25";
+                       function = "gpio";
+                       drive-strength = <8>;
+                       bias-disable;
+               };
+       };
+};
+
+&gsbi5 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_SPI>;
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       reg = <0>;
+                       spi-max-frequency = <50000000>;
+                       m25p,fast-read;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               partition@0 {
+                                       label = "SBL1";
+                                       reg = <0x0000000 0x0020000>;
+                                       read-only;
+                               };
+
+                               partition@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x0020000 0x0020000>;
+                                       read-only;
+                               };
+
+                               partition@40000 {
+                                       label = "SBL2";
+                                       reg = <0x0040000 0x0040000>;
+                                       read-only;
+                               };
+
+                               partition@80000 {
+                                       label = "SBL3";
+                                       reg = <0x0080000 0x0080000>;
+                                       read-only;
+                               };
+
+                               partition@100000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x0100000 0x0010000>;
+                                       read-only;
+                               };
+
+                               partition@110000 {
+                                       label = "SSD";
+                                       reg = <0x0110000 0x0010000>;
+                                       read-only;
+                               };
+
+                               partition@120000 {
+                                       label = "TZ";
+                                       reg = <0x0120000 0x0080000>;
+                                       read-only;
+                               };
+
+                               partition@1a0000 {
+                                       label = "RPM";
+                                       reg = <0x01a0000 0x0080000>;
+                                       read-only;
+                               };
+
+                               partition@220000 {
+                                       label = "APPSBL";
+                                       reg = <0x0220000 0x0080000>;
+                                       read-only;
+                               };
+
+                               partition@2a0000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x02a0000 0x0010000>;
+                                       read-only;
+                               };
+
+                               factory: partition@2b0000 {
+                                       label = "PRODUCTDATA";
+                                       reg = <0x02b0000 0x0030000>;
+                                       read-only;
+                               };
+
+                               partition@2e0000 {
+                                       label = "ART";
+                                       reg = <0x02e0000 0x0040000>;
+                                       read-only;
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_ART_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_ART_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+
+                               partition@320000 {
+                                       label = "TP";
+                                       reg = <0x0320000 0x0040000>;
+                                       read-only;
+                               };
+
+                               partition@360000 {
+                                       label = "TINY";
+                                       reg = <0x0360000 0x0500000>;
+                                       read-only;
+                               };
+
+                               partition@860000 {
+                                       compatible = "denx,uimage";
+                                       label = "firmware";
+                                       reg = <0x0860000 0x17a0000>;
+                               };
+                       };
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
+
+                       nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       force_gen1 = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       ieee80211-freq-limit = <2400000 2483000>;
+                       qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
+
+                       nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x04 0x80080080  /* PAD0_MODE */
+                       0x0c 0x06000000  /* PAD6_MODE */
+                       0x10 0x002613a0  /* PWS_REG */
+                       0x50 0xcc36cc36  /* LED_CTRL0 */
+                       0x54 0xca36ca36  /* LED_CTRL1 */
+                       0x58 0xc936c936  /* LED_CTRL2 */
+                       0x5c 0x03ffff00  /* LED_CTRL3 */
+                       0x7c 0x0000004e  /* PORT0_STATUS */
+                       0x94 0x0000004e  /* PORT6_STATUS */
+                       0xe0 0xc74164de  /* SGMII_CTRL */
+                       0xe4 0x0006a545  /* MAC_PWR_SEL */
+                       >;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+       mdiobus = <&mdio0>;
+       nvmem-cells = <&macaddr_factory_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       mdiobus = <&mdio0>;
+       nvmem-cells = <&macaddr_factory_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&factory {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_factory_0: macaddr@0 {
+               reg = <0x0 0x6>;
+       };
+
+       macaddr_factory_6: macaddr@6 {
+               reg = <0x6 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_c: macaddr@c {
+               reg = <0xc 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_12: macaddr@12 {
+               reg = <0x12 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8062.dtsi b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8062.dtsi
new file mode 100644 (file)
index 0000000..29226ca
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8062.dtsi
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "qcom-ipq8064.dtsi"
+
+/ {
+       model = "Qualcomm IPQ8062";
+       compatible = "qcom,ipq8062", "qcom,ipq8064";
+
+       aliases {
+               serial0 = &gsbi4_serial;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+};
+
+&gsbi4 {
+       qcom,mode = <GSBI_PROT_I2C_UART>;
+       status = "okay";
+
+       serial@16340000 {
+               status = "okay";
+       };
+       /*
+       * The i2c device on gsbi4 should not be enabled.
+       * On ipq806x designs gsbi4 i2c is meant for exclusive
+       * RPM usage. Turning this on in kernel manifests as
+       * i2c failure for the RPM.
+       */
+};
+
+&opp_table0 {
+       /delete-node/opp-1200000000;
+       /delete-node/opp-1400000000;
+
+       /*
+        * Voltage thresholds are <target min max>
+        */
+       opp-384000000 {
+               opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
+               opp-microvolt-speed0-pvs1-v0 = < 925000 878750  971250>;
+               opp-microvolt-speed0-pvs2-v0 = < 875000 831250  918750>;
+               opp-microvolt-speed0-pvs3-v0 = < 800000 760000  840000>;
+       };
+
+       opp-600000000 {
+               opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
+               opp-microvolt-speed0-pvs1-v0 = < 975000 926250 1023750>;
+               opp-microvolt-speed0-pvs2-v0 = < 925000 878750  971250>;
+               opp-microvolt-speed0-pvs3-v0 = < 850000 807500  892500>;
+       };
+
+       opp-800000000 {
+               opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
+               opp-microvolt-speed0-pvs1-v0 = <1025000  973750 1076250>;
+               opp-microvolt-speed0-pvs2-v0 = < 995000  945250 1044750>;
+               opp-microvolt-speed0-pvs3-v0 = < 900000  855000  945000>;
+       };
+
+       opp-1000000000 {
+               opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
+               opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
+               opp-microvolt-speed0-pvs2-v0 = <1025000  973750 1076250>;
+               opp-microvolt-speed0-pvs3-v0 = < 950000  902500  997500>;
+       };
+};
+
+&pcie0 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&pcie1 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&pcie2 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&smb208_s2a {
+       regulator-max-microvolt = <1150000>;
+};
+
+&smb208_s2b {
+       regulator-max-microvolt = <1150000>;
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi
new file mode 100644 (file)
index 0000000..115c6d4
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi
@@ -0,0 +1,375 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+               label-mac-device = &gmac2;
+       };
+};
+
+&qcom_pinmux {
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       usb0_pwr_en_pin: usb0_pwr_en_pin {
+               mux {
+                       pins = "gpio25";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+                       output-high;
+               };
+       };
+
+       usb1_pwr_en_pin: usb1_pwr_en_pin {
+               mux {
+                       pins = "gpio23";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+                       output-high;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               partition@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x20000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@40000 {
+                                       label = "SBL2";
+                                       reg = <0x40000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@60000 {
+                                       label = "SBL3";
+                                       reg = <0x60000 0x30000>;
+                                       read-only;
+                               };
+
+                               partition@90000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x90000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@a0000 {
+                                       label = "SSD";
+                                       reg = <0xa0000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@b0000 {
+                                       label = "TZ";
+                                       reg = <0xb0000 0x30000>;
+                                       read-only;
+                               };
+
+                               partition@e0000 {
+                                       label = "RPM";
+                                       reg = <0xe0000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@100000 {
+                                       label = "fs-uboot";
+                                       reg = <0x100000 0x70000>;
+                                       read-only;
+                               };
+
+                               partition@170000 {
+                                       label = "uboot-env";
+                                       reg = <0x170000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@1b0000 {
+                                       label = "radio";
+                                       reg = <0x1b0000 0x40000>;
+                                       read-only;
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_radio_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_radio_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+
+                               partition@1f0000 {
+                                       label = "os-image";
+                                       reg = <0x1f0000 0x400000>;
+                               };
+
+                               partition@5f0000 {
+                                       label = "rootfs";
+                                       reg = <0x5f0000 0x1900000>;
+                               };
+
+                               defaultmac: partition@1ef0000 {
+                                       label = "default-mac";
+                                       reg = <0x1ef0000 0x00200>;
+                                       read-only;
+                               };
+
+                               partition@1ef0200 {
+                                       label = "pin";
+                                       reg = <0x1ef0200 0x00200>;
+                                       read-only;
+                               };
+
+                               partition@1ef0400 {
+                                       label = "product-info";
+                                       reg = <0x1ef0400 0x0fc00>;
+                                       read-only;
+                               };
+
+                               partition@1f00000 {
+                                       label = "partition-table";
+                                       reg = <0x1f00000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f10000 {
+                                       label = "soft-version";
+                                       reg = <0x1f10000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f20000 {
+                                       label = "support-list";
+                                       reg = <0x1f20000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f30000 {
+                                       label = "profile";
+                                       reg = <0x1f30000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f40000 {
+                                       label = "default-config";
+                                       reg = <0x1f40000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f50000 {
+                                       label = "user-config";
+                                       reg = <0x1f50000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@1f90000 {
+                                       label = "qos-db";
+                                       reg = <0x1f90000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@1fd0000 {
+                                       label = "usb-config";
+                                       reg = <0x1fd0000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1fe0000 {
+                                       label = "log";
+                                       reg = <0x1fe0000 0x20000>;
+                                       read-only;
+                               };
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pin>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pin>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(-1)>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_defaultmac_8>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_defaultmac_8>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&defaultmac {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_defaultmac_8: macaddr@8 {
+               reg = <0x8 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts
new file mode 100644 (file)
index 0000000..6cb21fc
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-ad7200-c2600.dtsi"
+
+/ {
+       model = "TP-Link Talon AD7200";
+       compatible = "tplink,ad7200", "qcom,ipq8064";
+
+       aliases {
+               led-boot = &led_status;
+               led-failsafe = &led_status;
+               led-running = &led_status;
+               led-upgrade = &led_status;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               led_enable {
+                       label = "led-enable";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_LIGHTS_TOGGLE>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               lan {
+                       label = "blue:lan";
+                       gpios = <&qcom_pinmux 2 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb1 {
+                       label = "blue:usb1";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g {
+                       label = "blue:wlan5g";
+                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb3 {
+                       label = "blue:usb3";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g {
+                       label = "blue:wlan2g";
+                       gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_orange {
+                       label = "orange:wan";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               wan_blue {
+                       label = "blue:wan";
+                       gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>;
+               };
+
+               wps {
+                       label = "blue:wps";
+                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan60g {
+                       label = "blue:wlan60g";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_status: status {
+                       label = "blue:status";
+                       gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio53", "gpio54", "gpio67";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio2", "gpio8", "gpio15", "gpio16", "gpio17", "gpio26",
+                                       "gpio33", "gpio55", "gpio56", "gpio66";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&pcie2 {
+       status = "okay";
+       max-link-speed = <1>;
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
new file mode 100644 (file)
index 0000000..70034a5
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -0,0 +1,121 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+       model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
+       compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&flash {
+       partitions {
+               compatible = "qcom,smem-part";
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "qcom,smem-part";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ap161.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
new file mode 100644 (file)
index 0000000..c771a62
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
@@ -0,0 +1,159 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+       model = "Qualcomm IPQ8064/AP161";
+       compatible = "qcom,ipq8064-ap161", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+       };
+};
+
+&qcom_pinmux {
+       rgmii2_pins: rgmii2_pins {
+               mux {
+                       pins = "gpio27", "gpio28", "gpio29",
+                              "gpio30", "gpio31", "gpio32",
+                              "gpio51", "gpio52", "gpio59",
+                              "gpio60", "gpio61", "gpio62",
+                              "gpio2", "gpio66";
+               };
+       };
+};
+
+&flash {
+       partitions {
+               compatible = "qcom,smem-part";
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+};
+
+&pcie2 {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "qcom,smem-part";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x20080     /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+               qca,phy-rgmii-en;
+               qca,txclk-delay-en;
+               qca,rxclk-delay-en;
+       };
+
+       phy3: ethernet-phy@3 {
+               device_type = "ethernet-phy";
+               reg = <3>;
+       };
+};
+
+&gmac0 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <0>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+       mdiobus = <&mdio0>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+       mdiobus = <&mdio0>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       mdiobus = <&mdio0>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
new file mode 100644 (file)
index 0000000..cef1aba
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
@@ -0,0 +1,119 @@
+#include "qcom-ipq8064-ad7200-c2600.dtsi"
+
+/ {
+       model = "TP-Link Archer C2600";
+       compatible = "tplink,c2600", "qcom,ipq8064";
+
+       aliases {
+               led-boot = &power;
+               led-failsafe = &general;
+               led-running = &power;
+               led-upgrade = &general;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 49 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               ledswitch {
+                       label = "ledswitch";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_LIGHTS_TOGGLE>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               lan {
+                       label = "white:lan";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb4 {
+                       label = "white:usb_4";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb2 {
+                       label = "white:usb_2";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_amber {
+                       label = "amber:wan";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               wan_white {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               general: general {
+                       label = "white:general";
+                       gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio16", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio26", "gpio33",
+                                       "gpio53", "gpio66";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
new file mode 100644 (file)
index 0000000..23487c9
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
@@ -0,0 +1,384 @@
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Netgear Nighthawk X4 D7800";
+       compatible = "netgear,d7800", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               rsvd@5fe00000 {
+                       reg = <0x5fe00000 0x200000>;
+                       reusable;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power_white;
+               led-failsafe = &power_amber;
+               led-running = &power_white;
+               led-upgrade = &power_amber;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               usb1 {
+                       label = "white:usb1";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb2 {
+                       label = "white:usb2";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_amber: power_amber {
+                       label = "amber:power";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_white {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_amber {
+                       label = "amber:wan";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               esata {
+                       label = "white:esata";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_white: power_white {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               wifi {
+                       label = "white:wifi";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
+                               "gpio24","gpio26", "gpio53", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       usb0_pwr_en_pins: usb0_pwr_en_pins {
+               mux {
+                       pins = "gpio15";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       usb1_pwr_en_pins: usb1_pwr_en_pins {
+               mux {
+                       pins = "gpio16", "gpio68";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+};
+
+&sata_phy {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(1)>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(2)>;
+               };
+       };
+};
+
+&pcie2 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie2_pins>;
+       pinctrl-names = "default";
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1180000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       qcadata@0 {
+                               label = "qcadata";
+                               reg = <0x0000000 0x0c80000>;
+                               read-only;
+                       };
+
+                       APPSBL@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       APPSBLENV@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                               read-only;
+                       };
+
+                       art@1200000 {
+                               label = "art";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_art_0: macaddr@0 {
+                                       reg = <0x0 0x6>;
+                               };
+
+                               macaddr_art_6: macaddr@6 {
+                                       reg = <0x6 0x6>;
+                               };
+
+                               precal_art_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_art_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+
+                       artbak: art@1340000 {
+                               label = "artbak";
+                               reg = <0x1340000 0x0140000>;
+                               read-only;
+                       };
+
+                       kernel@1480000 {
+                               label = "kernel";
+                               reg = <0x1480000 0x0400000>;
+                       };
+
+                       ubi@1880000 {
+                               label = "ubi";
+                               reg = <0x1880000 0x6080000>;
+                       };
+
+                       reserve@7900000 {
+                               label = "reserve";
+                               reg = <0x7900000 0x0700000>;
+                               read-only;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-db149.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-db149.dts
new file mode 100644 (file)
index 0000000..8e8d942
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-db149.dts
@@ -0,0 +1,163 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+       model = "Qualcomm IPQ8064/DB149";
+       compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
+
+       aliases {
+               serial0 = &gsbi2_serial;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+};
+
+&qcom_pinmux {
+       rgmii0_pins: rgmii0_pins {
+               mux {
+                       pins = "gpio2", "gpio66";
+                       drive-strength = <8>;
+                       bias-disable;
+               };
+       };
+};
+
+&gsbi2 {
+       qcom,mode = <GSBI_PROT_I2C_UART>;
+       status = "okay";
+
+       gsbi2_serial: serial@12490000 {
+               status = "okay";
+       };
+};
+
+&gsbi4 {
+       status = "disabled";
+};
+
+&gsbi4_serial {
+       status = "disabled";
+};
+
+&flash {
+       m25p,fast-read;
+
+       partition@0 {
+               label = "lowlevel_init";
+               reg = <0x0 0x1b0000>;
+       };
+
+       partition@1 {
+               label = "u-boot";
+               reg = <0x1b0000 0x80000>;
+       };
+
+       partition@2 {
+               label = "u-boot-env";
+               reg = <0x230000 0x40000>;
+       };
+
+       partition@3 {
+               label = "caldata";
+               reg = <0x270000 0x40000>;
+       };
+
+       partition@4 {
+               label = "firmware";
+               reg = <0x2b0000 0x1d50000>;
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&pcie2 {
+       status = "okay";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+               >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+
+       phy6: ethernet-phy@6 {
+               reg = <6>;
+       };
+
+       phy7: ethernet-phy@7 {
+               reg = <7>;
+       };
+};
+
+&gmac0 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <0>;
+       phy-handle = <&phy4>;
+
+       pinctrl-0 = <&rgmii0_pins>;
+       pinctrl-names = "default";
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       phy-handle = <&phy6>;
+};
+
+&gmac3 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <3>;
+       phy-handle = <&phy7>;
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts
new file mode 100644 (file)
index 0000000..9d82d52
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-eax500.dtsi"
+
+/ {
+       model = "Linksys EA7500 V1 WiFi Router";
+       compatible = "linksys,ea7500-v1", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0xe000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               led-boot = &led_power;
+               led-failsafe = &led_power;
+               led-running = &led_power;
+               led-upgrade = &led_power;
+       };
+
+       chosen {
+               /* look for root deviceblock nbr in this bootarg */
+               find-rootblock = "ubi.mtd=";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       default-state = "keep";
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio65", "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio6";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&partitions {
+       partition@5f80000 {
+               label = "sysdiag";
+               reg = <0x5f80000 0x100000>;
+       };
+
+       partition@6080000 {
+               label = "syscfg";
+               reg = <0x6080000 0x1f80000>;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
new file mode 100644 (file)
index 0000000..1c6a4bd
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
@@ -0,0 +1,128 @@
+#include "qcom-ipq8064-eax500.dtsi"
+
+/ {
+       model = "Linksys EA8500 WiFi Router";
+       compatible = "linksys,ea8500", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &led_power;
+               led-failsafe = &led_power;
+               led-running = &led_power;
+               led-upgrade = &led_power;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               wps {
+                       label = "green:wps";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       default-state = "keep";
+               };
+
+               wifi {
+                       label = "green:wifi";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio65", "gpio67", "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio6", "gpio53", "gpio54";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&sata_phy {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&partitions {
+       partition@5f80000 {
+               label = "syscfg";
+               reg = <0x5f80000 0x2080000>;
+       };
+};
+
+&mdio0 {
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       qcom,phy_mdio_addr = <4>;
+       qcom,poll_required = <1>;
+       qcom,rgmii_delay = <0>;
+       qcom,emulation = <0>;
+};
+
+/* LAN */
+&gmac2 {
+       qcom,phy_mdio_addr = <0>;       /* none */
+       qcom,poll_required = <0>;       /* no polling */
+       qcom,rgmii_delay = <0>;
+       qcom,emulation = <0>;
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
new file mode 100644 (file)
index 0000000..e74d2dc
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       chosen {
+               bootargs = "console=ttyMSM0,115200n8";
+               /* append to bootargs adding the root deviceblock nbr from bootloader */
+               append-rootblock = "ubi.mtd=";
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+
+       max-link-speed = <1>;
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&pcie2 {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x0c80000>;
+
+               partitions: partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "SBL1";
+                               reg = <0x0000000 0x0040000>;
+                               read-only;
+                       };
+
+                       partition@40000 {
+                               label = "MIBIB";
+                               reg = <0x0040000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "SBL2";
+                               reg = <0x0180000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@2c0000 {
+                               label = "SBL3";
+                               reg = <0x02c0000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@540000 {
+                               label = "DDRCONFIG";
+                               reg = <0x0540000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@660000 {
+                               label = "SSD";
+                               reg = <0x0660000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@780000 {
+                               label = "TZ";
+                               reg = <0x0780000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@a00000 {
+                               label = "RPM";
+                               reg = <0x0a00000 0x0280000>;
+                               read-only;
+                       };
+
+                       art: partition@c80000 {
+                               label = "art";
+                               reg = <0x0c80000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@dc0000 {
+                               label = "APPSBL";
+                               reg = <0x0dc0000 0x0100000>;
+                               read-only;
+                       };
+
+                       partition@ec0000 {
+                               label = "u_env";
+                               reg = <0x0ec0000 0x0040000>;
+                       };
+
+                       partition@f00000 {
+                               label = "s_env";
+                               reg = <0x0f00000 0x0040000>;
+                       };
+
+                       partition@f40000 {
+                               label = "devinfo";
+                               reg = <0x0f40000 0x0040000>;
+                       };
+
+                       partition@f80000 {
+                               label = "kernel1";
+                               reg = <0x0f80000 0x2800000>;  /* 4 MB, spill to rootfs */
+                       };
+
+                       partition@1380000 {
+                               label = "rootfs1";
+                               reg = <0x1380000 0x2400000>;
+                       };
+
+                       partition@3780000 {
+                               label = "kernel2";
+                               reg = <0x3780000 0x2800000>;
+                       };
+
+                       partition@3b80000 {
+                               label = "rootfs2";
+                               reg = <0x3b80000 0x2400000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x00010 0x2613a0    /* PWS_REG */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-g10.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-g10.dts
new file mode 100644 (file)
index 0000000..735ccb2
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-g10.dts
@@ -0,0 +1,279 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       compatible = "asrock,g10", "qcom,ipq8064";
+       model = "ASRock G10";
+
+       aliases {
+               ethernet0 = &gmac1;
+               ethernet1 = &gmac0;
+
+               led-boot = &led_status_blue;
+               led-failsafe = &led_status_amber;
+               led-running = &led_status_blue;
+               led-upgrade = &led_status_amber;
+       };
+
+       chosen {
+               bootargs-override = "console=ttyMSM0,115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               /*
+                * this is a bit misleading. Because there are about seven
+                * multicolor LEDs connected all wired together in parallel.
+                */
+
+               status_yellow {
+                       label = "yellow:status";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_status_amber: status_amber {
+                       label = "amber:status";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_status_blue: status_blue {
+                       label = "blue:status";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               /*
+                * LED is declared in vendors boardfile but it's not
+                * working and the manual doesn't mention anything
+                * about the LED being white.
+
+               status_white {
+                       label = "white:status";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+               */
+       };
+
+       i2c-gpio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               compatible = "i2c-gpio";
+               gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>, /* sda */
+                       <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; /* scl */
+               i2c-gpio,delay-us = <5>;
+               i2c-gpio,scl-output-only;
+
+               mcu@50 {
+                       reg = <0x50>;
+                       compatible = "sonix,sn8f25e21";
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               ir-remote {
+                       label = "ir-remote";
+                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps5g {
+                       label = "wps5g";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps2g {
+                       label = "wps2g";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&gmac1 {
+       status = "okay";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gsbi4_serial {
+       pinctrl-0 = <&uart0_pins>;
+       pinctrl-names = "default";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1200000>;
+
+               partitions {
+                       compatible = "qcom,smem-part";
+               };
+       };
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi5g: wifi@1,0 {
+                       reg = <0x00010000 0 0 0 0>;
+                       compatible = "qcom,ath10k";
+                       qcom,ath10k-calibration-variant = "ASRock-G10";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi2g: wifi@1,0 {
+                       reg = <0x00010000 0 0 0 0>;
+                       compatible = "qcom,ath10k";
+                       qcom,ath10k-calibration-variant = "ASRock-G10";
+               };
+       };
+};
+
+&qcom_pinmux {
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio26";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio15", "gpio16", "gpio64", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       uart0_pins: uart0_pins {
+               mux {
+                       pins = "gpio10", "gpio11";
+                       function = "gsbi4";
+                       drive-strength = <10>;
+                       bias-disable;
+               };
+       };
+};
+
+&rpm {
+       pinctrl-0 = <&i2c4_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&tcsr {
+       qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
+};
+
+/delete-node/ &pcie2_pins;
+/delete-node/ &pcie2;

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
new file mode 100644 (file)
index 0000000..0970eaf
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
@@ -0,0 +1,314 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       model = "Netgear Nighthawk X4 R7500";
+       compatible = "netgear,r7500", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0xe000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power_white;
+               led-failsafe = &power_amber;
+               led-running = &power_white;
+               led-upgrade = &power_amber;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               usb1 {
+                       label = "white:usb1";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb2 {
+                       label = "white:usb2";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_amber: power_amber {
+                       label = "amber:power";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_white {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_amber {
+                       label = "amber:wan";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               esata {
+                       label = "white:esata";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_white: power_white {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               wifi {
+                       label = "white:wifi";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
+                               "gpio24","gpio26", "gpio53", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&gsbi5 {
+       status = "disabled";
+
+       spi@1a280000 {
+               status = "disabled";
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1180000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       qcadata@0 {
+                               label = "qcadata";
+                               reg = <0x0000000 0x0c80000>;
+                               read-only;
+                       };
+
+                       APPSBL@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       APPSBLENV@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                               read-only;
+                       };
+
+                       art: art@1200000 {
+                               label = "art";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                       };
+
+                       kernel@1340000 {
+                               label = "kernel";
+                               reg = <0x1340000 0x0400000>;
+                       };
+
+                       ubi@1740000 {
+                               label = "ubi";
+                               reg = <0x1740000 0x1600000>;
+                       };
+
+                       netgear@2d40000 {
+                               label = "netgear";
+                               reg = <0x2d40000 0x0c00000>;
+                               read-only;
+                       };
+
+                       reserve@3940000 {
+                               label = "reserve";
+                               reg = <0x3940000 0x46c0000>;
+                               read-only;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&tcsr {
+       qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
+       compatible = "qcom,tcsr";
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&art {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_art_0: macaddr@0 {
+               reg = <0x0 0x6>;
+       };
+
+       macaddr_art_6: macaddr@6 {
+               reg = <0x6 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
new file mode 100644 (file)
index 0000000..30b56bb
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
@@ -0,0 +1,374 @@
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Netgear Nighthawk X4 R7500v2";
+       compatible = "netgear,r7500v2", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               rsvd@5fe00000 {
+                       reg = <0x5fe00000 0x200000>;
+                       reusable;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power;
+               led-failsafe = &power;
+               led-running = &power;
+               led-upgrade = &power;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               usb1 {
+                       label = "amber:usb1";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb3 {
+                       label = "amber:usb3";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               status {
+                       label = "amber:status";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               internet {
+                       label = "white:internet";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               esata {
+                       label = "white:esata";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               wifi {
+                       label = "white:wifi";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
+                               "gpio24","gpio26", "gpio53", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       usb0_pwr_en_pins: usb0_pwr_en_pins {
+               mux {
+                       pins = "gpio15";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       usb1_pwr_en_pins: usb1_pwr_en_pins {
+               mux {
+                       pins = "gpio16", "gpio68";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+};
+
+&sata_phy {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(1)>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(2)>;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1180000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       qcadata@0 {
+                               label = "qcadata";
+                               reg = <0x0000000 0x0c80000>;
+                               read-only;
+                       };
+
+                       APPSBL@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       APPSBLENV@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                               read-only;
+                       };
+
+                       art@1200000 {
+                               label = "art";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_art_0: macaddr@0 {
+                                       reg = <0x0 0x6>;
+                               };
+
+                               macaddr_art_6: macaddr@6 {
+                                       reg = <0x6 0x6>;
+                               };
+
+                               precal_art_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_art_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+
+                       artbak: art@1340000 {
+                               label = "artbak";
+                               reg = <0x1340000 0x0140000>;
+                               read-only;
+                       };
+
+                       kernel@1480000 {
+                               label = "kernel";
+                               reg = <0x1480000 0x0400000>;
+                       };
+
+                       ubi@1880000 {
+                               label = "ubi";
+                               reg = <0x1880000 0x6080000>;
+                       };
+
+                       reserve@7900000 {
+                               label = "reserve";
+                               reg = <0x7900000 0x0700000>;
+                               read-only;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0xaa545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
new file mode 100644 (file)
index 0000000..b3e06db
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
@@ -0,0 +1,317 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Ubiquiti UniFi AC HD";
+       compatible = "ubnt,unifi-ac-hd", "qcom,ipq8064";
+
+       aliases {
+               label-mac-device = &gmac2;
+               led-boot = &led_dome_white;
+               led-failsafe = &led_dome_white;
+               led-running = &led_dome_blue;
+               led-upgrade = &led_dome_blue;
+               mdio-gpio0 = &mdio0;
+               ethernet0 = &gmac2;
+               ethernet1 = &gmac1;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_dome_blue: dome_blue {
+                       label = "blue:dome";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_dome_white: dome_white {
+                       label = "white:dome";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio9", "gpio53";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+                       output-low;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       drive-strength = <10>;
+                       bias-none;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <12>;
+               };
+       };
+};
+
+&CPU_SPC {
+       status = "disabled";
+};
+
+&gsbi5 {
+       status = "okay";
+
+       qcom,mode = <GSBI_PROT_SPI>;
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+               cs-gpios = <&qcom_pinmux 20 0>;
+
+               flash@0 {
+                       compatible = "mx25u25635f", "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+                       m25p,fast-read;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               partition@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x20000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@30000 {
+                                       label = "SBL2";
+                                       reg = <0x30000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@50000 {
+                                       label = "SBL3";
+                                       reg = <0x50000 0x30000>;
+                                       read-only;
+                               };
+
+                               partition@80000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x80000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@90000 {
+                                       label = "SSD";
+                                       reg = <0x90000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@a0000 {
+                                       label = "TZ";
+                                       reg = <0xa0000 0x30000>;
+                                       read-only;
+                               };
+
+                               partition@d0000 {
+                                       label = "RPM";
+                                       reg = <0xd0000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@f0000 {
+                                       label = "APPSBL";
+                                       reg = <0xf0000 0xc0000>;
+                                       read-only;
+                               };
+
+                               partition@1b0000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x1b0000 0x10000>;
+                                       read-only;
+                               };
+
+                               eeprom: partition@1c0000 {
+                                       label = "EEPROM";
+                                       reg = <0x1c0000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1d0000 {
+                                       label = "bootselect";
+                                       reg = <0x1d0000 0x10000>;
+                               };
+
+                               partition@1e0000 {
+                                       compatible = "denx,fit";
+                                       label = "firmware";
+                                       reg = <0x1e0000 0xe70000>;
+                               };
+
+                               partition@1050000 {
+                                       label = "kernel1";
+                                       reg = <0x1050000 0xe70000>;
+                                       read-only;
+                               };
+
+                               partition@1ec0000 {
+                                       label = "debug";
+                                       reg = <0x1ec0000 0x100000>;
+                                       read-only;
+                               };
+
+                               partition@1fc0000 {
+                                       label = "cfg";
+                                       reg = <0x1fc0000 0x40000>;
+                                       read-only;
+                               };
+                       };
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+       nand-ecc-strength = <4>;
+       nand-bus-width = <8>;
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+
+       phy5: ethernet-phy@5 {
+               reg = <5>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       mdiobus = <&mdio0>;
+       phy-handle = <&phy5>;
+       phy-mode = "sgmii";
+       qcom,id = <1>;
+
+       nvmem-cells = <&macaddr_eeprom_6>;
+       nvmem-cell-names = "mac-address";
+};
+
+&gmac2 {
+       status = "okay";
+
+       mdiobus = <&mdio0>;
+       phy-handle = <&phy4>;
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_eeprom_0>;
+       nvmem-cell-names = "mac-address";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&tcsr {
+       status = "okay";
+};
+
+&hs_phy_0 {
+       status = "okay";
+};
+
+&ss_phy_0 {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&hs_phy_1 {
+       status = "okay";
+};
+
+&ss_phy_1 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&eeprom {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_eeprom_0: macaddr@0 {
+               reg = <0x0 0x6>;
+       };
+
+       macaddr_eeprom_6: macaddr@6 {
+               reg = <0x6 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
new file mode 100644 (file)
index 0000000..b9ee86a
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
@@ -0,0 +1,69 @@
+#include "qcom-ipq8064.dtsi"
+
+/ {
+       aliases {
+               serial0 = &gsbi4_serial;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+};
+
+&gsbi4 {
+       qcom,mode = <GSBI_PROT_I2C_UART>;
+       status = "okay";
+
+       serial@16340000 {
+               status = "okay";
+       };
+       /*
+       * The i2c device on gsbi4 should not be enabled.
+       * On ipq806x designs gsbi4 i2c is meant for exclusive
+       * RPM usage. Turning this on in kernel manifests as
+       * i2c failure for the RPM.
+       */
+};
+
+&CPU_SPC {
+       status = "okay";
+};
+
+&pcie0 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&pcie1 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&pcie2 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&sata {
+       ports-implemented = <0x1>;
+};
+
+&ss_phy_0 {
+       qcom,rx-eq = <2>;
+       qcom,tx-deamp_3_5db = <32>;
+       qcom,mpll = <5>;
+};
+
+&ss_phy_1 {
+       qcom,rx-eq = <2>;
+       qcom,tx-deamp_3_5db = <32>;
+       qcom,mpll = <5>;
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
new file mode 100644 (file)
index 0000000..27d9fc8
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
@@ -0,0 +1,408 @@
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "TP-Link Archer VR2600v";
+       compatible = "tplink,vr2600v", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power;
+               led-failsafe = &general;
+               led-running = &power;
+               led-upgrade = &general;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               dect {
+                       label = "dect";
+                       gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_PHONE>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               ledswitch {
+                       label = "ledswitch";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_LIGHTS_TOGGLE>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               dsl {
+                       label = "white:dsl";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb {
+                       label = "white:usb";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               lan {
+                       label = "white:lan";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g {
+                       label = "white:wlan2g";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g {
+                       label = "white:wlan5g";
+                       gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               phone {
+                       label = "white:phone";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
+               };
+
+               general: general {
+                       label = "white:general";
+                       gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17",
+                               "gpio26", "gpio53", "gpio56", "gpio66";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi4: spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               partition@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x20000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@40000 {
+                                       label = "SBL2";
+                                       reg = <0x40000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@80000 {
+                                       label = "SBL3";
+                                       reg = <0x80000 0x80000>;
+                                       read-only;
+                               };
+
+                               partition@100000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x100000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@110000 {
+                                       label = "SSD";
+                                       reg = <0x110000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@120000 {
+                                       label = "TZ";
+                                       reg = <0x120000 0x80000>;
+                                       read-only;
+                               };
+
+                               partition@1a0000 {
+                                       label = "RPM";
+                                       reg = <0x1a0000 0x80000>;
+                                       read-only;
+                               };
+
+                               partition@220000 {
+                                       label = "APPSBL";
+                                       reg = <0x220000 0x80000>;
+                                       read-only;
+                               };
+
+                               partition@2a0000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x2a0000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@2e0000 {
+                                       label = "OLDART";
+                                       reg = <0x2e0000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@320000 {
+                                       label = "firmware";
+                                       reg = <0x320000 0xc60000>;
+                                       compatible = "openwrt,uimage";
+                                       openwrt,offset = <512>; /* account for pad-extra 512 */
+                               };
+
+                               /* hole 0xf80000 - 0xfaf100 */
+
+                               partition@faf100 {
+                                       label = "default-mac";
+                                       reg = <0xfaf100 0x00200>;
+                                       read-only;
+
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       macaddr_defaultmac_0: macaddr@0 {
+                                               reg = <0x0 0x6>;
+                                       };
+                               };
+
+                               partition@fc0000 {
+                                       label = "ART";
+                                       reg = <0xfc0000 0x40000>;
+                                       read-only;
+
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_ART_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_ART_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(-1)>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_defaultmac_0>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_defaultmac_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
new file mode 100644 (file)
index 0000000..998dad5
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
@@ -0,0 +1,447 @@
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "NEC Aterm WG2600HP";
+       compatible = "nec,wg2600hp", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power_green;
+               led-failsafe = &power_red;
+               led-running = &power_green;
+               led-upgrade = &power_green;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               bridge {
+                       label = "bridge";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               converter {
+                       label = "converter";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               converter_green {
+                       label = "green:converter";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_red: power_red {
+                       label = "red:power";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               active_green {
+                       label = "green:active";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               active_red {
+                       label = "red:active";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_green: power_green {
+                       label = "green:power";
+                       gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
+               };
+
+               converter_red {
+                       label = "red:converter";
+                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g_green {
+                       label = "green:wlan2g";
+                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g_red {
+                       label = "red:wlan2g";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g_green {
+                       label = "green:wlan5g";
+                       gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g_red {
+                       label = "red:wlan5g";
+                       gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
+               };
+
+               tv_green {
+                       label = "green:tv";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+
+               tv_red {
+                       label = "red:tv";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&CPU_SPC {
+       status = "disabled";
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x06000000  /* PAD0_MODE */
+                       0x0000c 0x00080080  /* PAD6_MODE */
+                       0x000e4 0x0006a545  /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x0000004e  /* PORT0_STATUS */
+                       0x00094 0x0000004e  /* PORT6_STATUS */
+                       >;
+       };
+
+       ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_PRODUCTDATA_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_PRODUCTDATA_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gsbi5 {
+       status = "okay";
+
+       qcom,mode = <GSBI_PROT_SPI>;
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               SBL1@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x20000>;
+                                       read-only;
+                               };
+
+                               MIBIB@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x20000 0x20000>;
+                                       read-only;
+                               };
+
+                               SBL2@40000 {
+                                       label = "SBL2";
+                                       reg = <0x40000 0x40000>;
+                                       read-only;
+                               };
+
+                               SBL3@80000 {
+                                       label = "SBL3";
+                                       reg = <0x80000 0x80000>;
+                                       read-only;
+                               };
+
+                               DDRCONFIG@100000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x100000 0x10000>;
+                                       read-only;
+                               };
+
+                               SSD@110000 {
+                                       label = "SSD";
+                                       reg = <0x110000 0x10000>;
+                                       read-only;
+                               };
+
+                               TZ@120000 {
+                                       label = "TZ";
+                                       reg = <0x120000 0x80000>;
+                                       read-only;
+                               };
+
+                               RPM@1a0000 {
+                                       label = "RPM";
+                                       reg = <0x1a0000 0x80000>;
+                                       read-only;
+                               };
+
+                               APPSBL@220000 {
+                                       label = "APPSBL";
+                                       reg = <0x220000 0x80000>;
+                                       read-only;
+                               };
+
+                               APPSBLENV@2a0000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x2a0000 0x10000>;
+                               };
+
+                               PRODUCTDATA: PRODUCTDATA@2b0000 {
+                                       label = "PRODUCTDATA";
+                                       reg = <0x2b0000 0x30000>;
+                                       read-only;
+                               };
+
+                               ART@2e0000 {
+                                       label = "ART";
+                                       reg = <0x2e0000 0x40000>;
+                                       read-only;
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_ART_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_ART_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+
+                               TP@320000 {
+                                       label = "TP";
+                                       reg = <0x320000 0x40000>;
+                                       read-only;
+                               };
+
+                               TINY@360000 {
+                                       label = "TINY";
+                                       reg = <0x360000 0x500000>;
+                                       read-only;
+                               };
+
+                               firmware@860000 {
+                                       compatible = "denx,uimage";
+                                       label = "firmware";
+                                       reg = <0x860000 0x17a0000>;
+                               };
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio16", "gpio54", "gpio24", "gpio25";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio14",
+                               "gpio15", "gpio55", "gpio56", "gpio57", "gpio58",
+                               "gpio64", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       usb_pwr_en_pins: usb_pwr_en_pins {
+               mux {
+                       pins = "gpio22";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+};
+
+&PRODUCTDATA {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_PRODUCTDATA_0: macaddr@0 {
+               reg = <0x0 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_6: macaddr@6 {
+               reg = <0x6 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_c: macaddr@c {
+               reg = <0xc 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_12: macaddr@12 {
+               reg = <0x12 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
new file mode 100644 (file)
index 0000000..d7f3a7f
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
@@ -0,0 +1,465 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright (C) 2017 Christian Mehlis <[email protected]>
+ *  Copyright (C) 2018 Mathias Kresin <[email protected]>
+ *  All rights reserved.
+ */
+
+#include "qcom-ipq8064-v1.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       compatible = "compex,wpq864", "qcom,ipq8064";
+       model = "Compex WPQ864";
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+               ethernet0 = &gmac1;
+               ethernet1 = &gmac0;
+
+               led-boot = &led_pass;
+               led-failsafe = &led_fail;
+               led-running = &led_pass;
+               led-upgrade = &led_pass;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               rss4 {
+                       label = "green:rss4";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               rss3 {
+                       label = "green:rss3";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               rss2 {
+                       label = "orange:rss2";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
+               };
+
+               rss1 {
+                       label = "red:rss1";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_pass: pass {
+                       label = "green:pass";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_fail: fail {
+                       label = "green:fail";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb {
+                       label = "green:usb";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb-pcie {
+                       label = "green:usb-pcie";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       beeper {
+               compatible = "gpio-beeper";
+
+               pinctrl-0 = <&beeper_pins>;
+               pinctrl-names = "default";
+
+               gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&rpm {
+       pinctrl-0 = <&rpm_pins>;
+       pinctrl-names = "default";
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       mt29f2g08abbeah4@0 {
+               compatible = "qcom,nandcs";
+
+               reg = <0>;
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1180000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       SBL1@0 {
+                               label = "SBL1";
+                               reg = <0x0000000 0x0040000>;
+                               read-only;
+                       };
+
+                       MIBIB@40000 {
+                               label = "MIBIB";
+                               reg = <0x0040000 0x0140000>;
+                               read-only;
+                       };
+
+                       SBL2@180000 {
+                               label = "SBL2";
+                               reg = <0x0180000 0x0140000>;
+                               read-only;
+                       };
+
+                       SBL3@2c0000 {
+                               label = "SBL3";
+                               reg = <0x02c0000 0x0280000>;
+                               read-only;
+                       };
+
+                       DDRCONFIG@540000 {
+                               label = "DDRCONFIG";
+                               reg = <0x0540000 0x0120000>;
+                               read-only;
+                       };
+
+                       SSD@660000 {
+                               label = "SSD";
+                               reg = <0x0660000 0x0120000>;
+                               read-only;
+                       };
+
+                       TZ@780000 {
+                               label = "TZ";
+                               reg = <0x0780000 0x0280000>;
+                               read-only;
+                       };
+
+                       RPM@a00000 {
+                               label = "RPM";
+                               reg = <0x0a00000 0x0280000>;
+                               read-only;
+                       };
+
+                       APPSBL@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       APPSBLENV@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                       };
+
+                       ART@1200000 {
+                               label = "ART";
+                               reg = <0x1200000 0x0140000>;
+                       };
+
+                       ubi@1340000 {
+                               label = "ubi";
+                               reg = <0x1340000 0x4000000>;
+                       };
+
+                       BOOTCONFIG@5340000 {
+                               label = "BOOTCONFIG";
+                               reg = <0x5340000 0x0060000>;
+                       };
+
+                       SBL2-1@53a0000- {
+                               label = "SBL2_1";
+                               reg = <0x53a0000 0x0140000>;
+                               read-only;
+                       };
+
+                       SBL3-1@54e0000 {
+                               label = "SBL3_1";
+                               reg = <0x54e0000 0x0280000>;
+                               read-only;
+                       };
+
+                       DDRCONFIG-1@5760000 {
+                               label = "DDRCONFIG_1";
+                               reg = <0x5760000 0x0120000>;
+                               read-only;
+                       };
+
+                       SSD-1@5880000 {
+                               label = "SSD_1";
+                               reg = <0x5880000 0x0120000>;
+                               read-only;
+                       };
+
+                       TZ-1@59a0000 {
+                               label = "TZ_1";
+                               reg = <0x59a0000 0x0280000>;
+                               read-only;
+                       };
+
+                       RPM-1@5c20000 {
+                               label = "RPM_1";
+                               reg = <0x5c20000 0x0280000>;
+                               read-only;
+                       };
+
+                       BOOTCONFIG1@5ea0000 {
+                               label = "BOOTCONFIG1";
+                               reg = <0x5ea0000 0x0060000>;
+                       };
+
+                       APPSBL-1@5f00000 {
+                               label = "APPSBL_1";
+                               reg = <0x5f00000 0x0500000>;
+                               read-only;
+                       };
+
+                       ubi-1@6400000 {
+                               label = "ubi_1";
+                               reg = <0x6400000 0x4000000>;
+                       };
+
+                       unused@a400000 {
+                               label = "unused";
+                               reg = <0xa400000 0x5c00000>;
+                       };
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gsbi4_serial {
+       pinctrl-0 = <&uart0_pins>;
+       pinctrl-names = "default";
+};
+
+&flash {
+       compatible = "jedec,spi-nor";
+};
+
+&sata_phy {
+       status = "disabled";
+};
+
+&sata {
+       status = "disabled";
+};
+
+&ss_phy_0 {            /* USB3 port 0 SS phy */
+       status = "okay";
+
+       rx_eq = <2>;
+       tx_deamp_3_5db = <32>;
+       mpll = <160>;
+};
+
+&ss_phy_1 {            /* USB3 port 1 SS phy */
+       status = "okay";
+
+       rx_eq = <2>;
+       tx_deamp_3_5db = <32>;
+       mpll = <160>;
+};
+
+&pcie0 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&pcie2 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+};
+
+&qcom_pinmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&state_default>;
+
+       state_default: pinctrl0 {
+               pcie0_pcie2_perst {
+                       pins = "gpio3";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-disable;
+                       output-high;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio22",
+                              "gpio23", "gpio24", "gpio25", "gpio53";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio54";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       beeper_pins: beeper_pins {
+               mux {
+                       pins = "gpio55";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       rpm_pins: rpm_pins {
+               mux {
+                       pins = "gpio12", "gpio13";
+                       function = "gsbi4";
+                       drive-strength = <10>;
+                       bias-disable;
+               };
+       };
+
+       uart0_pins: uart0_pins {
+               mux {
+                       pins = "gpio10", "gpio11";
+                       function = "gsbi4";
+                       drive-strength = <10>;
+                       bias-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19";
+                       function = "gsbi5";
+                       drive-strength = <10>;
+                       bias-pull-down;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       function = "gsbi5";
+                       drive-strength = <12>;
+                       bias-pull-down;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&tcsr {
+       qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
new file mode 100644 (file)
index 0000000..04a2261
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
@@ -0,0 +1,526 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Buffalo WXR-2533DHP";
+       compatible = "buffalo,wxr-2533dhp", "qcom,ipq8064";
+
+       memory@42000000 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               led-boot = &power;
+               led-failsafe = &diag;
+               led-running = &power;
+               led-upgrade = &power;
+       };
+
+       chosen {
+               /* use "ubi_rootfs" volume in "ubi" partition as rootfs */
+               bootargs = "ubi.block=0,1 root=/dev/ubiblock0_1 rootfstype=squashfs";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               usb {
+                       label = "green:usb";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "usbport";
+                       trigger-sources = <&hub_port0 &hub_port1>;
+               };
+
+               guestport {
+                       label = "green:guestport";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               diag: diag {
+                       label = "orange:diag";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               internet_orange {
+                       label = "orange:internet";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
+               };
+
+               internet_white {
+                       label = "white:internet";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wireless_orange {
+                       label = "orange:wireless";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wireless_white {
+                       label = "white:wireless";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               router_orange {
+                       label = "orange:router";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
+               };
+
+               router_white {
+                       label = "white:router";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               power {
+                       label = "power";
+                       gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_POWER>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               eject {
+                       label = "eject";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_EJECTCD>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               guest {
+                       label = "guest";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               ap {
+                       label = "ap";
+                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_1>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               router {
+                       label = "router";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_1>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               auto {
+                       label = "auto";
+                       gpios = <&qcom_pinmux 57 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_1>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       cs@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       ubi@0 {
+                               label = "ubi";
+                               reg = <0x0000000 0x4000000>;
+                       };
+
+                       rootfs_1@4000000 {
+                               label = "rootfs_1";
+                               reg = <0x4000000 0x4000000>;
+                       };
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x07600000  /* PAD0_MODE */
+                       0x00008 0x01000000  /* PAD5_MODE */
+                       0x0000c 0x00000080  /* PAD6_MODE */
+                       0x00050 0xcc35cc35  /* LED_CTRL0 */
+                       0x00054 0xca35ca35  /* LED_CTRL1 */
+                       0x00058 0xc935c935  /* LED_CTRL2 */
+                       0x0005c 0x03ffff00  /* LED_CTRL3 */
+                       0x000e4 0x0006a545  /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x0000007e  /* PORT0_STATUS */
+                       0x00094 0x0000007e  /* PORT6_STATUS */
+                       >;
+       };
+
+       ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_ART_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_ART_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gsbi4_serial {
+       pinctrl-0 = <&uart0_pins>;
+       pinctrl-names = "default";
+};
+
+&gsbi5 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_SPI>;
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               SBL1@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x10000>;
+                                       read-only;
+                               };
+
+                               MIBIB@10000 {
+                                       label = "MIBIB";
+                                       reg = <0x10000 0x20000>;
+                                       read-only;
+                               };
+
+                               SBL2@30000 {
+                                       label = "SBL2";
+                                       reg = <0x30000 0x30000>;
+                                       read-only;
+                               };
+
+                               SBL3@60000 {
+                                       label = "SBL3";
+                                       reg = <0x60000 0x30000>;
+                                       read-only;
+                               };
+
+                               DDRCONFIG@90000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x90000 0x10000>;
+                                       read-only;
+                               };
+
+                               SSD@a0000 {
+                                       label = "SSD";
+                                       reg = <0xa0000 0x10000>;
+                                       read-only;
+                               };
+
+                               TZ@b0000 {
+                                       label = "TZ";
+                                       reg = <0xb0000 0x30000>;
+                                       read-only;
+                               };
+
+                               RPM@e0000 {
+                                       label = "RPM";
+                                       reg = <0xe0000 0x20000>;
+                                       read-only;
+                               };
+
+                               APPSBL@100000 {
+                                       label = "APPSBL";
+                                       reg = <0x100000 0x70000>;
+                                       read-only;
+                               };
+
+                               APPSBLENV@170000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x170000 0x10000>;
+                                       read-only;
+                               };
+
+                               ART@180000 {
+                                       label = "ART";
+                                       reg = <0x180000 0x40000>;
+                                       read-only;
+
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       macaddr_ART_0: macaddr@0 {
+                                               reg = <0x0 0x6>;
+                                       };
+
+                                       macaddr_ART_6: macaddr@6 {
+                                               reg = <0x6 0x6>;
+                                       };
+
+                                       macaddr_ART_18: macaddr@18 {
+                                               reg = <0x18 0x6>;
+                                       };
+
+                                       macaddr_ART_1e: macaddr@1e {
+                                               reg = <0x1e 0x6>;
+                                       };
+
+                                       precal_ART_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_ART_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+
+                               BOOTCONFIG@1c0000 {
+                                       label = "BOOTCONFIG";
+                                       reg = <0x1c0000 0x10000>;
+                                       read-only;
+                               };
+
+                               APPSBL_1@1d0000 {
+                                       label = "APPSBL_1";
+                                       reg = <0x1d0000 0x70000>;
+                                       read-only;
+                               };
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&dwc3_0 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       hub_port0: port@1 {
+               reg = <1>;
+               #trigger-source-cells = <0>;
+       };
+};
+
+&dwc3_1 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       hub_port1: port@1 {
+               reg = <1>;
+               #trigger-source-cells = <0>;
+       };
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio55", "gpio56", "gpio57",
+                               "gpio58", "gpio64", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio22",
+                               "gpio23", "gpio24", "gpio25", "gpio26", "gpio53";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       uart0_pins: uart0_pins {
+               mux {
+                       pins = "gpio10", "gpio11";
+                       function = "gsbi4";
+                       drive-strength = <12>;
+                       bias-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs{
+                       pins = "gpio20";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       usb_pwr_en_pins: usb_pwr_en_pins {
+               mux{
+                       pins = "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       output-high;
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
new file mode 100644 (file)
index 0000000..969ca72
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
@@ -0,0 +1,316 @@
+#include "qcom-ipq8065.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "ZyXEL NBG6817";
+       compatible = "zyxel,nbg6817", "qcom,ipq8065", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+               sdcc1 = &sdcc1;
+
+               led-boot = &power;
+               led-failsafe = &power;
+               led-running = &power;
+               led-upgrade = &power;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd fstools_ignore_partname=1";
+               append-rootblock = "root=/dev/mmcblk0p";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               internet {
+                       label = "white:internet";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               wifi2g {
+                       label = "amber:wifi2g";
+                       gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
+               };
+
+               /* wifi2g amber from the manual is missing */
+
+               wifi5g {
+                       label = "amber:wifi5g";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+
+               /* wifi5g amber from the manual is missing */
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio53", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio9", "gpio26", "gpio33", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       mdio0_pins: mdio0_pins {
+               clk {
+                       pins = "gpio1";
+                       input-disable;
+               };
+       };
+
+       rgmii2_pins: rgmii2_pins {
+               tx {
+                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
+                       input-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <12>;
+               };
+       };
+
+       usb0_pwr_en_pins: usb0_pwr_en_pins {
+               mux {
+                       pins = "gpio16", "gpio17";
+                       function = "gpio";
+                       drive-strength = <12>;
+               };
+
+               pwr {
+                       pins = "gpio17";
+                       bias-pull-down;
+                       output-high;
+               };
+
+               ovc {
+                       pins = "gpio16";
+                       bias-pull-up;
+               };
+       };
+
+       usb1_pwr_en_pins: usb1_pwr_en_pins {
+               mux {
+                       pins = "gpio14", "gpio15";
+                       function = "gpio";
+                       drive-strength = <12>;
+               };
+
+               pwr {
+                       pins = "gpio14";
+                       bias-pull-down;
+                       output-high;
+               };
+
+               ovc {
+                       pins = "gpio15";
+                       bias-pull-up;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi4: spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               m25p80@0 {
+                       compatible = "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <51200000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "qcom,smem-part";
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0xaa545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       0x00970 0x1e864443  /* QM_PORT0_CTRL0 */
+                       0x00974 0x000001c6  /* QM_PORT0_CTRL1 */
+                       0x00978 0x19008643  /* QM_PORT1_CTRL0 */
+                       0x0097c 0x000001c6  /* QM_PORT1_CTRL1 */
+                       0x00980 0x19008643  /* QM_PORT2_CTRL0 */
+                       0x00984 0x000001c6  /* QM_PORT2_CTRL1 */
+                       0x00988 0x19008643  /* QM_PORT3_CTRL0 */
+                       0x0098c 0x000001c6  /* QM_PORT3_CTRL1 */
+                       0x00990 0x19008643  /* QM_PORT4_CTRL0 */
+                       0x00994 0x000001c6  /* QM_PORT4_CTRL1 */
+                       0x00998 0x1e864443  /* QM_PORT5_CTRL0 */
+                       0x0099c 0x000001c6  /* QM_PORT5_CTRL1 */
+                       0x009a0 0x1e864443  /* QM_PORT6_CTRL0 */
+                       0x009a4 0x000001c6  /* QM_PORT6_CTRL1 */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+               qca,ar8327-initvals = <
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       >;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+       qcom,phy_mdio_addr = <4>;
+       qcom,poll_required = <0>;
+       qcom,rgmii_delay = <1>;
+       qcom,phy_mii_type = <0>;
+       qcom,emulation = <0>;
+       qcom,irq = <255>;
+       mdiobus = <&mdio0>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       qcom,phy_mdio_addr = <0>;       /* none */
+       qcom,poll_required = <0>;       /* no polling */
+       qcom,rgmii_delay = <0>;
+       qcom,phy_mii_type = <1>;
+       qcom,emulation = <0>;
+       qcom,irq = <258>;
+       mdiobus = <&mdio0>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&amba {
+       sdcc1: sdcc@12400000 {
+               status = "okay";
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi
new file mode 100644 (file)
index 0000000..c899fa7
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi
@@ -0,0 +1,453 @@
+#include "qcom-ipq8065.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               rsvd@5fe00000 {
+                       reg = <0x5fe00000 0x200000>;
+                       reusable;
+               };
+
+               ramoops@42100000 {
+                       compatible = "ramoops";
+                       reg = <0x42100000 0x40000>;
+                       record-size = <0x4000>;
+                       console-size = <0x4000>;
+                       ftrace-size = <0x4000>;
+                       pmsg-size = <0x4000>;
+               };
+       };
+
+       aliases {
+               label-mac-device = &gmac2;
+
+               led-boot = &power_white;
+               led-failsafe = &power_amber;
+               led-running = &power_white;
+               led-upgrade = &power_amber;
+
+               mdio-gpio0 = &mdio0;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds: leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               power_white: power_white {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               power_amber: power_amber {
+                       label = "amber:power";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_white {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_amber {
+                       label = "amber:wan";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wifi {
+                       label = "white:wifi";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9",
+                               "gpio22", "gpio23", "gpio24",
+                               "gpio26", "gpio53", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       mdio0_pins: mdio0_pins {
+               clk {
+                       pins = "gpio1";
+                       input-disable;
+               };
+       };
+
+       rgmii2_pins: rgmii2_pins {
+               tx {
+                       pins = "gpio27", "gpio28", "gpio29",
+                               "gpio30", "gpio31", "gpio32";
+                       input-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       spi6_pins: spi6_pins {
+               mux {
+                       pins = "gpio55", "gpio56", "gpio58";
+                       function = "gsbi6";
+                       bias-pull-down;
+               };
+
+               mosi {
+                       pins = "gpio55";
+                       drive-strength = <12>;
+               };
+
+               miso {
+                       pins = "gpio56";
+                       drive-strength = <14>;
+               };
+
+               cs {
+                       pins = "gpio57";
+                       drive-strength = <12>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio58";
+                       drive-strength = <12>;
+               };
+
+               reset {
+                       pins = "gpio33";
+                       drive-strength = <10>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       usb0_pwr_en_pins: usb0_pwr_en_pins {
+               mux {
+                       pins = "gpio15";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       usb1_pwr_en_pins: usb1_pwr_en_pins {
+               mux {
+                       pins = "gpio16", "gpio68";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1180000>;
+
+               partitions: partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "qcadata";
+                               reg = <0x0000000 0x0c80000>;
+                               read-only;
+                       };
+
+                       partition@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       partition@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                               read-only;
+                       };
+
+                       art: partition@1200000 {
+                               label = "art";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_art_0: macaddr@0 {
+                                       reg = <0x0 0x6>;
+                               };
+
+                               macaddr_art_6: macaddr@6 {
+                                       reg = <0x6 0x6>;
+                               };
+
+                               precal_art_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_art_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+
+                       partition@1340000 {
+                               label = "artbak";
+                               reg = <0x1340000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@1480000 {
+                               label = "kernel";
+                               reg = <0x1480000 0x0400000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0xaa545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       0x00970 0x1e864443  /* QM_PORT0_CTRL0 */
+                       0x00974 0x000001c6  /* QM_PORT0_CTRL1 */
+                       0x00978 0x19008643  /* QM_PORT1_CTRL0 */
+                       0x0097c 0x000001c6  /* QM_PORT1_CTRL1 */
+                       0x00980 0x19008643  /* QM_PORT2_CTRL0 */
+                       0x00984 0x000001c6  /* QM_PORT2_CTRL1 */
+                       0x00988 0x19008643  /* QM_PORT3_CTRL0 */
+                       0x0098c 0x000001c6  /* QM_PORT3_CTRL1 */
+                       0x00990 0x19008643  /* QM_PORT4_CTRL0 */
+                       0x00994 0x000001c6  /* QM_PORT4_CTRL1 */
+                       0x00998 0x1e864443  /* QM_PORT5_CTRL0 */
+                       0x0099c 0x000001c6  /* QM_PORT5_CTRL1 */
+                       0x009a0 0x1e864443  /* QM_PORT6_CTRL0 */
+                       0x009a4 0x000001c6  /* QM_PORT6_CTRL1 */
+                       >;
+               qca,ar8327-vlans = <
+                       0x1     0x5e        /* VLAN1 Ports 1/2/3/4/6 */
+                       0x2     0x21        /* VLAN2 Ports 0/5 */
+               >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+               qca,ar8327-initvals = <
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       >;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+       qcom,phy_mdio_addr = <4>;
+       qcom,poll_required = <0>;
+       qcom,rgmii_delay = <1>;
+       qcom,phy_mii_type = <0>;
+       qcom,emulation = <0>;
+       qcom,irq = <255>;
+       mdiobus = <&mdio0>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       qcom,phy_mdio_addr = <0>;       /* none */
+       qcom,poll_required = <0>;       /* no polling */
+       qcom,rgmii_delay = <0>;
+       qcom,phy_mii_type = <1>;
+       qcom,emulation = <0>;
+       qcom,irq = <258>;
+       mdiobus = <&mdio0>;
+
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&sata_phy {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi0: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi1: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
new file mode 100644 (file)
index 0000000..bf7c963
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
@@ -0,0 +1,48 @@
+#include "qcom-ipq8065-nighthawk.dtsi"
+
+/ {
+       model = "Netgear Nighthawk X4S R7800";
+       compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
+};
+
+&leds {
+       usb1 {
+               label = "white:usb1";
+               gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+       };
+
+       usb2 {
+               label = "white:usb2";
+               gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+       };
+
+       esata {
+               label = "white:esata";
+               gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&partitions {
+       partition@1880000 {
+               label = "ubi";
+               reg = <0x1880000 0x6080000>;
+       };
+
+       partition@7900000 {
+               label = "reserve";
+               reg = <0x7900000 0x0700000>;
+               read-only;
+       };
+};
+
+&wifi0 {
+       nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
+       nvmem-cell-names = "mac-address", "pre-calibration";
+       mac-address-increment = <(1)>;
+};
+
+&wifi1 {
+       nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
+       nvmem-cell-names = "mac-address", "pre-calibration";
+       mac-address-increment = <(2)>;
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
new file mode 100644 (file)
index 0000000..9616333
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
@@ -0,0 +1,403 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "qcom-ipq8065.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Askey RT4230W REV6";
+       compatible = "askey,rt4230w-rev6", "qcom,ipq8065", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x3e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               led-boot = &ledctrl3;
+               led-failsafe = &ledctrl1;
+               led-running = &ledctrl2;
+               led-upgrade = &ledctrl3;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               ledctrl1: ledctrl1 {
+                       label = "ledctrl1";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               ledctrl2: ledctrl2 {
+                       label = "ledctrl2";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               ledctrl3: ledctrl3 {
+                       label = "ledctrl3";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio54", "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio22", "gpio23", "gpio24";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       rgmii2_pins: rgmii2_pins {
+               mux {
+                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31",
+                               "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62";
+                       function = "rgmii2";
+                       drive-strength = <8>;
+                       bias-disable;
+               };
+
+               tx {
+                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
+                       input-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <12>;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "everspin,mr25h256";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <40000000>;
+                       reg = <0>;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "0:SBL1";
+                               reg = <0x0000000 0x0040000>;
+                               read-only;
+                       };
+
+                       partition@40000 {
+                               label = "0:MIBIB";
+                               reg = <0x0040000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "0:SBL2";
+                               reg = <0x0180000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@2c0000 {
+                               label = "0:SBL3";
+                               reg = <0x02c0000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@540000 {
+                               label = "0:DDRCONFIG";
+                               reg = <0x0540000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@660000 {
+                               label = "0:SSD";
+                               reg = <0x0660000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@780000 {
+                               label = "0:TZ";
+                               reg = <0x0780000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@a00000 {
+                               label = "0:RPM";
+                               reg = <0x0a00000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@c80000 {
+                               label = "0:APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       partition@1180000 {
+                               label = "0:APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                       };
+
+                       partition@1200000 {
+                               label = "0:ART";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_ART_0: macaddr@0 {
+                                       reg = <0x0 0x6>;
+                               };
+
+                               macaddr_ART_6: macaddr@6 {
+                                       reg = <0x6 0x6>;
+                               };
+
+                               precal_ART_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_ART_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+
+                       partition@1340000 {
+                               label = "0:BOOTCONFIG";
+                               reg = <0x1340000 0x0060000>;
+                               read-only;
+                       };
+
+                       partition@13a0000 {
+                               label = "0:SBL2_1";
+                               reg = <0x13a0000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@14e0000 {
+                               label = "0:SBL3_1";
+                               reg = <0x14e0000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@1760000 {
+                               label = "0:DDRCONFIG_1";
+                               reg = <0x1760000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@1880000 {
+                               label = "0:SSD_1";
+                               reg = <0x1880000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@19a0000 {
+                               label = "0:TZ_1";
+                               reg = <0x19a0000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@1c20000 {
+                               label = "0:RPM_1";
+                               reg = <0x1c20000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@1ea0000 {
+                               label = "0:BOOTCONFIG1";
+                               reg = <0x1ea0000 0x0060000>;
+                               read-only;
+                       };
+
+                       partition@1f00000 {
+                               label = "0:APPSBL_1";
+                               reg = <0x1f00000 0x0500000>;
+                               read-only;
+                       };
+
+                       partition@2400000 {
+                               label = "ubi";
+                               reg = <0x2400000 0x1a000000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0x0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0xaa545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       0x00050 0xcf02cf02  /* LED_CTRL_0 */
+                       0x00054 0xc832c832  /* LED_CTRL_1 */
+                       >;
+       };
+};
+
+&gmac0 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <0>;
+
+       nvmem-cells = <&macaddr_ART_0>;
+       nvmem-cell-names = "mac-address";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <1>;
+
+       nvmem-cells = <&macaddr_ART_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi0: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_ART_1000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi1: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_ART_5000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts
new file mode 100644 (file)
index 0000000..871cc09
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts
@@ -0,0 +1,425 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "qcom-ipq8065.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Arris TR4400 v2";
+       compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               led-boot = &led_status_blue;
+               led-failsafe = &led_status_red;
+               led-running = &led_status_blue;
+               led-upgrade = &led_status_red;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_status_red: status_red {
+                       label = "red:status";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_status_blue: status_blue {
+                       label = "blue:status";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       rgmii2_pins: rgmii2_pins {
+               tx {
+                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
+                       input-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <12>;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "everspin,mr25h256";
+                       spi-max-frequency = <40000000>;
+                       reg = <0>;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "0:SBL1";
+                               reg = <0x0000000 0x0040000>;
+                               read-only;
+                       };
+                       partition@40000 {
+                               label = "0:MIBIB";
+                               reg = <0x0040000 0x0140000>;
+                               read-only;
+                       };
+                       partition@180000 {
+                               label = "0:SBL2";
+                               reg = <0x0180000 0x0140000>;
+                               read-only;
+                       };
+                       partition@2c0000 {
+                               label = "0:SBL3";
+                               reg = <0x02c0000 0x0280000>;
+                               read-only;
+                       };
+                       partition@540000 {
+                               label = "0:DDRCONFIG";
+                               reg = <0x0540000 0x0120000>;
+                               read-only;
+                       };
+                       partition@660000 {
+                               label = "0:SSD";
+                               reg = <0x0660000 0x0120000>;
+                               read-only;
+                       };
+                       partition@780000 {
+                               label = "0:TZ";
+                               reg = <0x0780000 0x0280000>;
+                               read-only;
+                       };
+                       partition@a00000 {
+                               label = "0:RPM";
+                               reg = <0x0a00000 0x0280000>;
+                               read-only;
+                       };
+                       partition@c80000 {
+                               label = "0:APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+                       partition@1180000 {
+                               label = "0:APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                       };
+                       partition@1200000 {
+                               label = "0:ART";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               precal_ART_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+                               precal_ART_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+                       stock_partition@1340000 {
+                               label = "stock_rootfs";
+                               reg = <0x1340000 0x4000000>;
+                       };
+                       partition@5340000 {
+                               label = "0:BOOTCONFIG";
+                               reg = <0x5340000 0x0060000>;
+                               read-only;
+                       };
+                       partition@53a0000 {
+                               label = "0:SBL2_1";
+                               reg = <0x53a0000 0x0140000>;
+                               read-only;
+                       };
+                       partition@54e0000 {
+                               label = "0:SBL3_1";
+                               reg = <0x54e0000 0x0280000>;
+                               read-only;
+                       };
+                       partition@5760000 {
+                               label = "0:DDRCONFIG_1";
+                               reg = <0x5760000 0x0120000>;
+                               read-only;
+                       };
+                       partition@5880000 {
+                               label = "0:SSD_1";
+                               reg = <0x5880000 0x0120000>;
+                               read-only;
+                       };
+                       partition@59a0000 {
+                               label = "0:TZ_1";
+                               reg = <0x59a0000 0x0280000>;
+                               read-only;
+                       };
+                       partition@5c20000 {
+                               label = "0:RPM_1";
+                               reg = <0x5c20000 0x0280000>;
+                               read-only;
+                       };
+                       partition@5ea0000 {
+                               label = "0:BOOTCONFIG1";
+                               reg = <0x5ea0000 0x0060000>;
+                               read-only;
+                       };
+                       partition@5f00000 {
+                               label = "0:APPSBL_1";
+                               reg = <0x5f00000 0x0500000>;
+                               read-only;
+                       };
+                       stock_partition@6400000 {
+                               label = "stock_rootfs_1";
+                               reg = <0x6400000 0x4000000>;
+                       };
+                       stock_partition@a400000 {
+                               label = "stock_fw_env";
+                               reg = <0xa400000 0x0100000>;
+                       };
+                       stock_partition@a500000 {
+                               label = "stock_config";
+                               reg = <0xa500000 0x0800000>;
+                       };
+                       stock_partition@ad00000 {
+                               label = "stock_PKI";
+                               reg = <0xad00000 0x0200000>;
+                       };
+                       stock_partition@af00000 {
+                               label = "stock_scfgmgr";
+                               reg = <0xaf00000 0x0100000>;
+                       };
+
+                       partition@6400000 {
+                               label = "fw_env";
+                               reg = <0x6400000 0x0100000>;
+
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_fw_env_0: macaddr@0 {
+                                       reg = <0x00 0x6>;
+                               };
+                               macaddr_fw_env_6: macaddr@6 {
+                                       reg = <0x06 0x6>;
+                               };
+                               macaddr_fw_env_c: macaddr@c {
+                                       reg = <0x0c 0x6>;
+                               };
+                               macaddr_fw_env_12: macaddr@12 {
+                                       reg = <0x12 0x6>;
+                               };
+                               macaddr_fw_env_18: macaddr@18 {
+                                       reg = <0x18 0x6>;
+                               };
+                       };
+                       partition@6500000 {
+                               label = "ubi";
+                               reg = <0x6500000 0x9b00000>;
+                       };
+                       partition@1340000 {
+                               label = "extra";
+                               reg = <0x1340000 0x4000000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       ethernet-phy@0 {
+               reg = <0x0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0xaa545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy7: ethernet-phy@7 {
+               reg = <7>;
+       };
+};
+
+&gmac0 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <0>;
+
+       nvmem-cells = <&macaddr_fw_env_18>;
+       nvmem-cell-names = "mac-address";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <1>;
+
+       nvmem-cells = <&macaddr_fw_env_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac3 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <3>;
+       phy-handle = <&phy7>;
+
+       nvmem-cells = <&macaddr_fw_env_6>;
+       nvmem-cell-names = "mac-address";
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi0: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
+                       nvmem-cell-names = "pre-calibration", "mac-address";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi1: wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
+                       nvmem-cell-names = "pre-calibration", "mac-address";
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-xr500.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-xr500.dts
new file mode 100644 (file)
index 0000000..f584735
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065-xr500.dts
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8065-nighthawk.dtsi"
+
+/ {
+       model = "Netgear Nighthawk XR500";
+       compatible = "netgear,xr500", "qcom,ipq8065", "qcom,ipq8064";
+
+};
+
+&leds {
+       usb1 {
+               label = "white:usb1";
+               gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+       };
+
+       usb2 {
+               label = "white:usb2";
+               gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&partitions {
+       partition@1880000 {
+               label = "ubi";
+               reg = <0x1880000 0xce00000>;
+       };
+
+       partition@e680000 {
+               label = "reserve";
+               reg = <0xe680000 0x0780000>;
+               read-only;
+       };
+};
+
+&wifi0 {
+       nvmem-cells = <&macaddr_art_c>, <&precal_art_1000>;
+       nvmem-cell-names = "mac-address", "pre-calibration";
+};
+
+&wifi1 {
+       nvmem-cells = <&macaddr_art_0>, <&precal_art_5000>;
+       nvmem-cell-names = "mac-address", "pre-calibration";
+};
+
+&art {
+       macaddr_art_c: macaddr@c {
+               reg = <0xc 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065.dtsi
new file mode 100644 (file)
index 0000000..c70a5cb
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8065.dtsi
@@ -0,0 +1,167 @@
+#include "qcom-ipq8064.dtsi"
+
+/ {
+       model = "Qualcomm IPQ8065";
+       compatible = "qcom,ipq8065", "qcom,ipq8064";
+
+       aliases {
+               serial0 = &gsbi4_serial;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+};
+
+&gsbi4 {
+       qcom,mode = <GSBI_PROT_I2C_UART>;
+       status = "okay";
+
+       serial@16340000 {
+               status = "okay";
+       };
+       /*
+       * The i2c device on gsbi4 should not be enabled.
+       * On ipq806x designs gsbi4 i2c is meant for exclusive
+       * RPM usage. Turning this on in kernel manifests as
+       * i2c failure for the RPM.
+       */
+};
+
+&pcie0 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&pcie1 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&pcie2 {
+       compatible = "qcom,pcie-ipq8064-v2";
+};
+
+&sata {
+       ports-implemented = <0x1>;
+};
+
+&smb208_s2a {
+       regulator-min-microvolt = <775000>;
+       regulator-max-microvolt = <1275000>;
+};
+
+&smb208_s2b {
+       regulator-min-microvolt = <775000>;
+       regulator-max-microvolt = <1275000>;
+};
+
+&ss_phy_0 {
+       qcom,rx-eq = <2>;
+       qcom,tx-deamp_3_5db = <32>;
+       qcom,mpll = <5>;
+};
+
+&ss_phy_1 {
+       qcom,rx-eq = <2>;
+       qcom,tx-deamp_3_5db = <32>;
+       qcom,mpll = <5>;
+};
+
+&opp_table_l2 {
+       /delete-node/opp-1200000000;
+
+       opp-1400000000 {
+               opp-hz = /bits/ 64 <1400000000>;
+               opp-microvolt = <1150000>;
+               clock-latency-ns = <100000>;
+               opp-level = <2>;
+       };
+};
+
+&opp_table0 {
+       /* 
+        * On ipq8065 1.2 ghz freq is not present
+        * Remove it to make cpufreq work and not
+        * complain for missing definition
+        */
+
+       /delete-node/opp-1200000000;
+
+       /*
+        * Voltage thresholds are <target min max>
+        */
+       opp-384000000 {
+               opp-microvolt-speed0-pvs0-v0 = <975000 926250 1023750>;
+               opp-microvolt-speed0-pvs1-v0 = <950000 902500 997500>;
+               opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
+               opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
+               opp-microvolt-speed0-pvs4-v0 = <875000 831250 918750>;
+               opp-microvolt-speed0-pvs5-v0 = <825000 783750 866250>;
+               opp-microvolt-speed0-pvs6-v0 = <775000 736250 813750>;
+       };
+
+       opp-600000000 {
+               opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
+               opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
+               opp-microvolt-speed0-pvs2-v0 = <950000 902500 997500>;
+               opp-microvolt-speed0-pvs3-v0 = <925000 878750 971250>;
+               opp-microvolt-speed0-pvs4-v0 = <900000 855000 945000>;
+               opp-microvolt-speed0-pvs5-v0 = <850000 807500 892500>;
+               opp-microvolt-speed0-pvs6-v0 = <800000 760000 840000>;
+       };
+
+       opp-800000000 {
+               opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
+               opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
+               opp-microvolt-speed0-pvs2-v0 = <1000000 950000 1050000>;
+               opp-microvolt-speed0-pvs3-v0 = <975000 926250 1023750>;
+               opp-microvolt-speed0-pvs4-v0 = <950000 902500 997500>;
+               opp-microvolt-speed0-pvs5-v0 = <900000 855000 945000>;
+               opp-microvolt-speed0-pvs6-v0 = <850000 807500 892500>;
+       };
+
+       opp-1000000000 {
+               opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
+               opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
+               opp-microvolt-speed0-pvs2-v0 = <1050000 997500 1102500>;
+               opp-microvolt-speed0-pvs3-v0 = <1025000 973750 1076250>;
+               opp-microvolt-speed0-pvs4-v0 = <1000000 950000 1050000>;
+               opp-microvolt-speed0-pvs5-v0 = <950000 902500 997500>;
+               opp-microvolt-speed0-pvs6-v0 = <900000 855000 945000>;
+       };
+
+       opp-1400000000 {
+               opp-microvolt-speed0-pvs0-v0 = <1175000 1116250 1233750>;
+               opp-microvolt-speed0-pvs1-v0 = <1150000 1092500 1207500>;
+               opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
+               opp-microvolt-speed0-pvs3-v0 = <1100000 1045000 1155000>;
+               opp-microvolt-speed0-pvs4-v0 = <1075000 1021250 1128750>;
+               opp-microvolt-speed0-pvs5-v0 = <1025000 973750 1076250>;
+               opp-microvolt-speed0-pvs6-v0 = <975000 926250 1023750>;
+               opp-level = <1>;
+       };
+
+       opp-1725000000 {
+               opp-hz = /bits/ 64 <1725000000>;
+               opp-microvolt-speed0-pvs0-v0 = <1262500 1199375 1325625>;
+               opp-microvolt-speed0-pvs1-v0 = <1225000 1163750 1286250>;
+               opp-microvolt-speed0-pvs2-v0 = <1200000 1140000 1260000>;
+               opp-microvolt-speed0-pvs3-v0 = <1175000 1116250 1233750>;
+               opp-microvolt-speed0-pvs4-v0 = <1150000 1092500 1207500>;
+               opp-microvolt-speed0-pvs5-v0 = <1100000 1045000 1155000>;
+               opp-microvolt-speed0-pvs6-v0 = <1050000 997500 1102500>;
+               opp-supported-hw = <0x1>;
+               clock-latency-ns = <100000>;
+               opp-level = <2>;
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi
new file mode 100644 (file)
index 0000000..141c71a
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi
@@ -0,0 +1,239 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+
+#include "qcom-ipq8064-v2.0.dtsi"
+
+/ {
+       memory {
+               device_type = "memory";
+               linux,usable-memory = <0x41500000 0x1ea00000>;
+               reg = <0x40000000 0x20000000>;
+       };
+
+       cpus {
+               idle-states {
+                       CPU_SPC: spc {
+                               status = "disabled";
+                       };
+               };
+       };
+
+       chosen {
+               bootargs-append = " console=ttyMSM0,115200n8 ubi.mtd=ubi ubi.mtd=art";
+       };
+};
+
+&qcom_pinmux {
+       mdio0_pins_active: mdio0_pins_active {
+               mux {
+                       pins = "gpio0", "gpio1";
+                       function = "mdio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+                       output-low;
+               };
+
+               clk {
+                       pins = "gpio1";
+                       input-disable;
+               };
+       };
+
+       phy_active: phy_active {
+               phy {
+                       pins = "gpio6", "gpio7";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       uart1_pins: uart1_pins {
+               mux {
+                       pins = "gpio51", "gpio52";
+                       function = "gsbi1";
+                       drive-strength = <4>;
+                       bias-disable;
+               };
+       };
+};
+
+&gsbi1 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_UART_W_FC>;
+
+       serial@12450000 {
+               status = "okay";
+
+               pinctrl-0 = <&uart1_pins>;
+               pinctrl-names = "default";
+       };
+};
+
+&pcie0 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x0 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi0: wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x10000 0 0 0 0>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x0 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi1: wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x10000 0 0 0 0>;
+               };
+       };
+};
+
+&pcie2 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x0 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi2: wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x10000 0 0 0 0>;
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               compatible = "qcom,nandcs";
+
+               reg = <0>;
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x2140000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "sbl1";
+                               reg = <0x0 0x40000>;
+                               read-only;
+                       };
+
+                       partition@40000 {
+                               label = "mibib";
+                               reg = <0x40000 0x140000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "sbl2";
+                               reg = <0x180000 0x140000>;
+                               read-only;
+                       };
+
+                       partition@2c0000 {
+                               label = "sbl3";
+                               reg = <0x2c0000 0x280000>;
+                               read-only;
+                       };
+
+                       partition@540000 {
+                               label = "ddrconfig";
+                               reg = <0x540000 0x120000>;
+                               read-only;
+                       };
+
+                       partition@660000 {
+                               label = "ssd";
+                               reg = <0x660000 0x120000>;
+                               read-only;
+                       };
+
+                       partition@780000 {
+                               label = "tz";
+                               reg = <0x780000 0x280000>;
+                               read-only;
+                       };
+
+                       partition@a00000 {
+                               label = "rpm";
+                               reg = <0xa00000 0x280000>;
+                               read-only;
+                       };
+
+                       partition@1fc0000 {
+                               label = "u-boot";
+                               reg = <0x1fc0000 0x180000>;
+                               read-only;
+                       };
+
+                       partition@21c0000 {
+                               label = "bootkernel1";
+                               reg = <0x21c0000 0xa80000>;
+                       };
+
+                       partition@2c40000 {
+                               label = "bootkernel2";
+                               reg = <0x2c40000 0xa80000>;
+                       };
+
+                       partition@36c0000 {
+                               label = "ubi";
+                               reg = <0x36c0000 0x46c0000>;
+                       };
+
+                       partition@7d80000 {
+                               label = "art";
+                               reg = <0x7d80000 0x200000>;
+                               read-only;
+                       };
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
new file mode 100644 (file)
index 0000000..85b0dc3
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
@@ -0,0 +1,332 @@
+#include "qcom-ipq8064-v2.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       model = "Edgecore ECW5410";
+       compatible = "edgecore,ecw5410", "qcom,ipq8064";
+
+       reserved-memory {
+               nss@40000000 {
+                       reg = <0x40000000 0x1000000>;
+                       no-map;
+               };
+
+               smem: smem@41000000 {
+                       reg = <0x41000000 0x200000>;
+                       no-map;
+               };
+
+               wifi_dump@44000000 {
+                       reg = <0x44000000 0x600000>;
+                       no-map;
+               };
+       };
+
+       cpus {
+               idle-states {
+                       CPU_SPC: spc {
+                               status = "disabled";
+                       };
+               };
+       };
+
+       aliases {
+               serial1 = &gsbi1_serial;
+               ethernet0 = &gmac2;
+               ethernet1 = &gmac3;
+
+               led-boot = &led_power_green;
+               led-failsafe = &led_power_red;
+               led-running = &led_power_green;
+               led-upgrade = &led_power_green;
+       };
+
+       chosen {
+               bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_power_green: power_green {
+                       label = "green:power";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g_green {
+                       label = "green:wlan2g";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
+               };
+
+               wlan2g_yellow {
+                       label = "yellow:wlan2g";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
+               };
+
+               wlan5g_green {
+                       label = "green:wlan5g";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               led_power_red: power_red {
+                       label = "red:power";
+                       gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
+               };
+
+               wlan5g_yellow {
+                       label = "yellow:wlan5g";
+                       gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+
+&qcom_pinmux {
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19";
+                       function = "gsbi5";
+                       drive-strength = <10>;
+                       bias-pull-down;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       function = "gsbi5";
+                       drive-strength = <12>;
+                       bias-pull-down;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio16", "gpio23", "gpio24", "gpio26",
+                                  "gpio28", "gpio59";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio25";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       uart1_pins: uart1_pins {
+               mux {
+                       pins = "gpio51", "gpio52", "gpio53", "gpio54";
+                       function = "gsbi1";
+                       drive-strength = <12>;
+                       bias-none;
+               };
+       };
+};
+
+&gsbi1 {
+       qcom,mode = <GSBI_PROT_UART_W_FC>;
+       status = "okay";
+
+       serial@12450000 {
+               status = "okay";
+
+               pinctrl-0 = <&uart1_pins>;
+               pinctrl-names = "default";
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi4: spi@1a280000 {
+               status = "okay";
+               spi-max-frequency = <50000000>;
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               m25p80@0 {
+                       compatible = "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "qcom,smem-part";
+                       };
+               };
+       };
+};
+
+&hs_phy_0 {            /* USB3 port 0 HS phy */
+       status = "okay";
+};
+
+&hs_phy_1 {            /* USB3 port 1 HS phy */
+       status = "okay";
+};
+
+&ss_phy_0 {            /* USB3 port 0 SS phy */
+       status = "okay";
+};
+
+&ss_phy_1 {            /* USB3 port 1 SS phy */
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x00010000 0 0 0 0>;
+                       qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
+               };
+       };
+};
+
+&pcie2 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x00010000 0 0 0 0>;
+                       qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       pinctrl-0 = <&nand_pins>;
+       pinctrl-names = "default";
+
+       nand@0 {
+               compatible = "qcom,nandcs";
+
+               reg = <0>;
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       rootfs1@0 {
+                               label = "rootfs1";
+                               reg = <0x0000000 0x4000000>;
+                       };
+
+                       rootfs2@4000000 {
+                               label = "rootfs2";
+                               reg = <0x4000000 0x4000000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+       };
+
+       phy1: ethernet-phy@1 {
+               reg = <1>;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       qcom,id = <2>;
+       mdiobus = <&mdio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy1>;
+};
+
+&gmac3 {
+       status = "okay";
+
+       qcom,id = <3>;
+       mdiobus = <&mdio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy0>;
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-mr42.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-mr42.dts
new file mode 100644 (file)
index 0000000..ccf2554
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-mr42.dts
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+
+#include "qcom-ipq8068-cryptid-common.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Meraki MR42";
+       compatible = "meraki,mr42", "qcom,ipq8064";
+
+       aliases {
+               serial1 = &gsbi1_serial;
+               ethernet0 = &gmac3;
+
+               led-boot = &led_active;
+               led-failsafe = &led_power;
+               led-running = &led_active;
+               led-upgrade = &led_active;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_power: power {
+                       label = "orange:power";
+                       gpios = <&qcom_pinmux 31 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_active: active {
+                       label = "white:active";
+                       gpios = <&qcom_pinmux 32 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&gmac3 {
+       status = "okay";
+
+       qcom,id = <3>;
+       mdiobus = <&mdio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy2>;
+
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+};
+
+&gsbi2 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_I2C>;
+};
+
+&gsbi2_i2c {
+       status = "okay";
+
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+
+       ina2xx@40 {
+               compatible = "ina219";
+               shunt-resistor = <40000>;
+               reg = <0x40>;
+       };
+
+       eeprom@56 {
+               compatible = "atmel,24c64";
+               pagesize = <32>;
+               reg = <0x56>;
+               read-only;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               mac_address: mac-address@66 {
+                       reg = <0x66 0x6>;
+               };
+       };
+};
+
+&gsbi6 {
+       qcom,mode = <GSBI_PROT_I2C>;
+       status = "okay";
+};
+
+&gsbi6_i2c {
+       status = "okay";
+
+       pinctrl-0 = <&i2c1_pins>;
+       pinctrl-names = "default";
+
+       tlc591xx@40 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "ti,tlc59108";
+               reg = <0x40>;
+
+               red@0 {
+                       label = "red:user";
+                       reg = <0x0>;
+               };
+
+               green@1 {
+                       label = "green:user";
+                       reg = <0x1>;
+               };
+
+               blue@2 {
+                       label = "blue:user";
+                       reg = <0x2>;
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins_active>, <&phy_active>;
+       pinctrl-names = "default";
+
+       phy2: ethernet-phy2 {
+               reg = <2>;
+
+               reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+               reset-assert-us = <24000>;
+
+               eee-broken-100tx;
+               eee-broken-1000t;
+       };
+};
+
+&qcom_pinmux {
+       i2c0_pins: i2c0_pins {
+               mux {
+                       pins = "gpio24", "gpio25";
+                       function = "gsbi2";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       input;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio26";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       i2c1_pins: i2c1_pins {
+               mux {
+                       pins = "gpio29", "gpio30";
+                       function = "gsbi6";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       input;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio31", "gpio32";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-low;
+               };
+       };
+};
+
+&wifi0 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <1>;
+};
+
+&wifi1 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <2>;
+};
+
+&wifi2 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <3>;
+};

diff --git a/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-mr52.dts b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-mr52.dts
new file mode 100644 (file)
index 0000000..e1c2332
--- /dev/null
+++ b/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8068-mr52.dts
@@ -0,0 +1,230 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+
+#include "qcom-ipq8068-cryptid-common.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Meraki MR52";
+       compatible = "meraki,mr52", "qcom,ipq8064";
+
+       aliases {
+               serial1 = &gsbi1_serial;
+               mdio-gpio0 = &mdio_gpio0;
+               ethernet0 = &gmac2;
+               ethernet1 = &gmac3;
+
+               led-boot = &led_active;
+               led-failsafe = &led_power;
+               led-running = &led_active;
+               led-upgrade = &led_active;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_power: power {
+                       label = "orange:power";
+                       gpios = <&qcom_pinmux 19 GPIO_ACTIVE_HIGH>;
+               };
+
+               lan2_green {
+                       label = "green:lan2";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               lan1_green {
+                       label = "green:lan1";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_active: active {
+                       label = "white:active";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               lan2_orange {
+                       label = "orange:lan2";
+                       gpios = <&qcom_pinmux 60 GPIO_ACTIVE_HIGH>;
+               };
+
+               lan1_orange {
+                       label = "orange:lan1";
+                       gpios = <&qcom_pinmux 62 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       qcom,id = <2>;
+       mdiobus = <&mdio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy0>;
+
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+};
+
+&gmac3 {
+       status = "okay";
+
+       qcom,id = <3>;
+       mdiobus = <&mdio_gpio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy4>;
+
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <1>;
+};
+
+&gsbi7 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_I2C>;
+};
+
+&gsbi7_i2c {
+       status = "okay";
+
+       pinctrl-0 = <&i2c_pins>;
+       pinctrl-names = "default";
+
+       ina2xx@45 {
+               compatible = "ina219";
+               shunt-resistor = <80000>;
+               reg = <0x45>;
+       };
+
+       tlc591xx@49 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "ti,tlc59108";
+               reg = <0x49>;
+
+               red@0 {
+                       label = "red:user";
+                       reg = <0x0>;
+               };
+
+               green@1 {
+                       label = "green:user";
+                       reg = <0x1>;
+               };
+
+               blue@2 {
+                       label = "blue:user";
+                       reg = <0x2>;
+               };
+       };
+
+       eeprom@52 {
+               compatible = "atmel,24c64";
+               pagesize = <32>;
+               reg = <0x52>;
+               read-only;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               mac_address: mac-address@66 {
+                       reg = <0x66 0x6>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       i2c_pins: i2c_pins {
+               mux {
+                       pins = "gpio8", "gpio9";
+                       function = "gsbi7";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       input;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio19", "gpio26";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-low;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio25";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       input;
+               };
+       };
+};
+
+&soc {
+       mdio_gpio0: mdio {
+               compatible = "virtual,mdio-gpio";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               status = "okay";
+
+               pinctrl-0 = <&mdio0_pins_active>, <&phy_active>;
+               pinctrl-names = "default";
+
+               gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH
+                        &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+               phy0: ethernet-phy0 {
+                       reg = <0>;
+                       reset-gpios = <&qcom_pinmux 7 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <24000>;
+               };
+
+               phy4: ethernet-phy4 {
+                       reg = <4>;
+                       reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <24000>;
+               };
+       };
+};
+
+&wifi0 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <4>;
+};
+
+&wifi1 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <3>;
+};
+
+&wifi2 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <2>;
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
new file mode 100644 (file)
index 0000000..2ca9863
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
@@ -0,0 +1,487 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8062-smb208.dtsi"
+#include <dt-bindings/input/input.h>
+
+
+/ {
+       model = "NEC Platforms Aterm WG2600HP3";
+       compatible = "nec,wg2600hp3", "qcom,ipq8062", "qcom,ipq8064";
+
+       memory {
+               device_type = "memory";
+               reg =  <0x42000000 0x1e000000>;
+       };
+
+       aliases {
+               label-mac-device = &gmac2;
+
+               led-boot = &led_power_green;
+               led-failsafe = &led_power_red;
+               led-running = &led_power_green;
+               led-upgrade = &led_power_red;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&buttons_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               mode0 {
+                       label = "mode0";
+                       gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               mode1 {
+                       label = "mode1";
+                       gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_1>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pinctrl-0 = <&leds_pins>;
+               pinctrl-names = "default";
+
+               led_power_green: power_green {
+                       label = "green:power";
+                       gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_power_red: power_red {
+                       label = "red:power";
+                       gpios = <&qcom_pinmux 35 GPIO_ACTIVE_HIGH>;
+               };
+
+               active_green {
+                       label = "green:active";
+                       gpios = <&qcom_pinmux 42 GPIO_ACTIVE_HIGH>;
+               };
+
+               active_red {
+                       label = "red:active";
+                       gpios = <&qcom_pinmux 38 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g_green {
+                       label = "green:wlan2g";
+                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "phy1tpt";
+               };
+
+               wlan2g_red {
+                       label = "red:wlan2g";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g_green {
+                       label = "green:wlan5g";
+                       gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "phy0tpt";
+               };
+
+               wlan5g_red {
+                       label = "red:wlan5g";
+                       gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
+               };
+
+               tv_green {
+                       label = "green:tv";
+                       gpios = <&qcom_pinmux 46 GPIO_ACTIVE_HIGH>;
+               };
+
+               tv_red {
+                       label = "red:tv";
+                       gpios = <&qcom_pinmux 36 GPIO_ACTIVE_HIGH>;
+               };
+
+               converter_green {
+                       label = "green:converter";
+                       gpios = <&qcom_pinmux 43 GPIO_ACTIVE_HIGH>;
+               };
+
+               converter_red {
+                       label = "red:converter";
+                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+/* nand_pins are used for leds_pins, empty the node
+ * from ipq8064.dtsi
+ */
+&nand_pins {
+       /delete-property/ disable;
+       /delete-property/ pullups;
+       /delete-property/ hold;
+};
+
+&qcom_pinmux {
+       pinctrl-0 = <&akro_pins>;
+       pinctrl-names = "default";
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <10>;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       buttons_pins: buttons_pins {
+               mux {
+                       pins = "gpio22", "gpio24", "gpio40",
+                               "gpio41";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       leds_pins: leds_pins {
+               mux {
+                       pins = "gpio14", "gpio15", "gpio35",
+                               "gpio36", "gpio38", "gpio42",
+                               "gpio43", "gpio46", "gpio55",
+                               "gpio56", "gpio57", "gpio58";
+                       function = "gpio";
+                       bias-pull-down;
+               };
+
+               akro2 {
+                       pins = "gpio15", "gpio35", "gpio38",
+                               "gpio42", "gpio43", "gpio46",
+                               "gpio55", "gpio56", "gpio57",
+                               "gpio58";
+                       drive-strength = <2>;
+               };
+
+               akro4 {
+                       pins = "gpio14", "gpio36";
+                       drive-strength = <4>;
+               };
+       };
+
+       /*
+        * Stock firmware has the following settings, so let's do the same.
+        * I don't sure why these are required.
+        */
+       akro_pins: akro_pinmux {
+               akro {
+                       pins = "gpio17", "gpio26", "gpio47";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+
+               reset {
+                       pins = "gpio45";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-disable;
+                       output-low;
+               };
+
+               gmac0_rgmii {
+                       pins = "gpio25";
+                       function = "gpio";
+                       drive-strength = <8>;
+                       bias-disable;
+               };
+       };
+};
+
+&gsbi5 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_SPI>;
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       reg = <0>;
+                       spi-max-frequency = <50000000>;
+                       m25p,fast-read;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               partition@0 {
+                                       label = "SBL1";
+                                       reg = <0x0000000 0x0020000>;
+                                       read-only;
+                               };
+
+                               partition@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x0020000 0x0020000>;
+                                       read-only;
+                               };
+
+                               partition@40000 {
+                                       label = "SBL2";
+                                       reg = <0x0040000 0x0040000>;
+                                       read-only;
+                               };
+
+                               partition@80000 {
+                                       label = "SBL3";
+                                       reg = <0x0080000 0x0080000>;
+                                       read-only;
+                               };
+
+                               partition@100000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x0100000 0x0010000>;
+                                       read-only;
+                               };
+
+                               partition@110000 {
+                                       label = "SSD";
+                                       reg = <0x0110000 0x0010000>;
+                                       read-only;
+                               };
+
+                               partition@120000 {
+                                       label = "TZ";
+                                       reg = <0x0120000 0x0080000>;
+                                       read-only;
+                               };
+
+                               partition@1a0000 {
+                                       label = "RPM";
+                                       reg = <0x01a0000 0x0080000>;
+                                       read-only;
+                               };
+
+                               partition@220000 {
+                                       label = "APPSBL";
+                                       reg = <0x0220000 0x0080000>;
+                                       read-only;
+                               };
+
+                               partition@2a0000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x02a0000 0x0010000>;
+                                       read-only;
+                               };
+
+                               factory: partition-factory@2b0000 {
+                                       label = "PRODUCTDATA";
+                                       reg = <0x02b0000 0x0030000>;
+                                       read-only;
+                               };
+
+                               partition@2e0000 {
+                                       label = "ART";
+                                       reg = <0x02e0000 0x0040000>;
+                                       read-only;
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_ART_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_ART_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+
+                               partition@320000 {
+                                       label = "TP";
+                                       reg = <0x0320000 0x0040000>;
+                                       read-only;
+                               };
+
+                               partition@360000 {
+                                       label = "TINY";
+                                       reg = <0x0360000 0x0500000>;
+                                       read-only;
+                               };
+
+                               partition@860000 {
+                                       compatible = "denx,uimage";
+                                       label = "firmware";
+                                       reg = <0x0860000 0x17a0000>;
+                               };
+                       };
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
+
+                       nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       force_gen1 = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       ieee80211-freq-limit = <2400000 2483000>;
+                       qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
+
+                       nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x04 0x80080080  /* PAD0_MODE */
+                       0x0c 0x06000000  /* PAD6_MODE */
+                       0x10 0x002613a0  /* PWS_REG */
+                       0x50 0xcc36cc36  /* LED_CTRL0 */
+                       0x54 0xca36ca36  /* LED_CTRL1 */
+                       0x58 0xc936c936  /* LED_CTRL2 */
+                       0x5c 0x03ffff00  /* LED_CTRL3 */
+                       0x7c 0x0000004e  /* PORT0_STATUS */
+                       0x94 0x0000004e  /* PORT6_STATUS */
+                       0xe0 0xc74164de  /* SGMII_CTRL */
+                       0xe4 0x0006a545  /* MAC_PWR_SEL */
+                       >;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+       mdiobus = <&mdio0>;
+       nvmem-cells = <&macaddr_factory_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       mdiobus = <&mdio0>;
+       nvmem-cells = <&macaddr_factory_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&factory {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_factory_0: macaddr@0 {
+               reg = <0x0 0x6>;
+       };
+
+       macaddr_factory_6: macaddr@6 {
+               reg = <0x6 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_c: macaddr@c {
+               reg = <0xc 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_12: macaddr@12 {
+               reg = <0x12 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi
new file mode 100644 (file)
index 0000000..46d24f0
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi
@@ -0,0 +1,375 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+               label-mac-device = &gmac2;
+       };
+};
+
+&qcom_pinmux {
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       usb0_pwr_en_pin: usb0_pwr_en_pin {
+               mux {
+                       pins = "gpio25";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+                       output-high;
+               };
+       };
+
+       usb1_pwr_en_pin: usb1_pwr_en_pin {
+               mux {
+                       pins = "gpio23";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+                       output-high;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               partition@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x20000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@40000 {
+                                       label = "SBL2";
+                                       reg = <0x40000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@60000 {
+                                       label = "SBL3";
+                                       reg = <0x60000 0x30000>;
+                                       read-only;
+                               };
+
+                               partition@90000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x90000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@a0000 {
+                                       label = "SSD";
+                                       reg = <0xa0000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@b0000 {
+                                       label = "TZ";
+                                       reg = <0xb0000 0x30000>;
+                                       read-only;
+                               };
+
+                               partition@e0000 {
+                                       label = "RPM";
+                                       reg = <0xe0000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@100000 {
+                                       label = "fs-uboot";
+                                       reg = <0x100000 0x70000>;
+                                       read-only;
+                               };
+
+                               partition@170000 {
+                                       label = "uboot-env";
+                                       reg = <0x170000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@1b0000 {
+                                       label = "radio";
+                                       reg = <0x1b0000 0x40000>;
+                                       read-only;
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_radio_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_radio_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+
+                               partition@1f0000 {
+                                       label = "os-image";
+                                       reg = <0x1f0000 0x400000>;
+                               };
+
+                               partition@5f0000 {
+                                       label = "rootfs";
+                                       reg = <0x5f0000 0x1900000>;
+                               };
+
+                               defaultmac: partition-defaultmac@1ef0000 {
+                                       label = "default-mac";
+                                       reg = <0x1ef0000 0x00200>;
+                                       read-only;
+                               };
+
+                               partition@1ef0200 {
+                                       label = "pin";
+                                       reg = <0x1ef0200 0x00200>;
+                                       read-only;
+                               };
+
+                               partition@1ef0400 {
+                                       label = "product-info";
+                                       reg = <0x1ef0400 0x0fc00>;
+                                       read-only;
+                               };
+
+                               partition@1f00000 {
+                                       label = "partition-table";
+                                       reg = <0x1f00000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f10000 {
+                                       label = "soft-version";
+                                       reg = <0x1f10000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f20000 {
+                                       label = "support-list";
+                                       reg = <0x1f20000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f30000 {
+                                       label = "profile";
+                                       reg = <0x1f30000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f40000 {
+                                       label = "default-config";
+                                       reg = <0x1f40000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1f50000 {
+                                       label = "user-config";
+                                       reg = <0x1f50000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@1f90000 {
+                                       label = "qos-db";
+                                       reg = <0x1f90000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@1fd0000 {
+                                       label = "usb-config";
+                                       reg = <0x1fd0000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1fe0000 {
+                                       label = "log";
+                                       reg = <0x1fe0000 0x20000>;
+                                       read-only;
+                               };
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pin>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pin>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(-1)>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_defaultmac_8>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_defaultmac_8>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&defaultmac {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_defaultmac_8: macaddr@8 {
+               reg = <0x8 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts
new file mode 100644 (file)
index 0000000..9ccf3d7
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-ad7200-c2600.dtsi"
+
+/ {
+       model = "TP-Link Talon AD7200";
+       compatible = "tplink,ad7200", "qcom,ipq8064";
+
+       aliases {
+               led-boot = &led_status;
+               led-failsafe = &led_status;
+               led-running = &led_status;
+               led-upgrade = &led_status;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+
+               led_enable {
+                       label = "led-enable";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_LIGHTS_TOGGLE>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               lan {
+                       label = "blue:lan";
+                       gpios = <&qcom_pinmux 2 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb1 {
+                       label = "blue:usb1";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g {
+                       label = "blue:wlan5g";
+                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb3 {
+                       label = "blue:usb3";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g {
+                       label = "blue:wlan2g";
+                       gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_orange {
+                       label = "orange:wan";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               wan_blue {
+                       label = "blue:wan";
+                       gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>;
+               };
+
+               wps {
+                       label = "blue:wps";
+                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan60g {
+                       label = "blue:wlan60g";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_status: status {
+                       label = "blue:status";
+                       gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio53", "gpio54", "gpio67";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio2", "gpio8", "gpio15", "gpio16", "gpio17", "gpio26",
+                                       "gpio33", "gpio55", "gpio56", "gpio66";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&pcie2 {
+       status = "okay";
+       max-link-speed = <1>;
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
new file mode 100644 (file)
index 0000000..628b764
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -0,0 +1,168 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+       model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
+       compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&flash {
+       partitions {
+               compatible = "qcom,smem";
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "qcom,smem";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               qca8k,rgmii56_1_8v;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "rgmii-id";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                       };
+
+                       /*
+                       port@6 {
+                                       reg = <0>;
+                                       label = "cpu";
+                                       ethernet = <&gmac2>;
+                                       phy-mode = "rgmii";
+
+                                       fixed-link {
+                                                       speed = <1000>;
+                                                       full-duplex;
+                                                       pause;
+                                                       asym-pause;
+                                       };
+                       };
+                       */
+               };
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ap161.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
new file mode 100644 (file)
index 0000000..34fee52
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
@@ -0,0 +1,198 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+       model = "Qualcomm IPQ8064/AP161";
+       compatible = "qcom,ipq8064-ap161", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+       };
+};
+
+&qcom_pinmux {
+       rgmii2_pins: rgmii2-pins {
+               mux {
+                       pins = "gpio27", "gpio28", "gpio29",
+                              "gpio30", "gpio31", "gpio32",
+                              "gpio51", "gpio52", "gpio59",
+                              "gpio60", "gpio61", "gpio62",
+                              "gpio2", "gpio66";
+               };
+       };
+};
+
+&flash {
+       partitions {
+               compatible = "qcom,smem";
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+};
+
+&pcie2 {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "qcom,smem";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               qca8k,rgmii56_1_8v;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac2>;
+                               phy-mode = "sgmii";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                       };
+
+                       /*
+                       port@6 {
+                                       reg = <0>;
+                                       label = "cpu";
+                                       ethernet = <&gmac2>;
+                                       phy-mode = "rgmii";
+
+                                       fixed-link {
+                                                       speed = <1000>;
+                                                       full-duplex;
+                                                       pause;
+                                                       asym-pause;
+                                       };
+                       };
+                       */
+               };
+       };
+};
+
+&gmac0 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <0>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+       mdiobus = <&mdio0>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+       mdiobus = <&mdio0>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       mdiobus = <&mdio0>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
new file mode 100644 (file)
index 0000000..3f2a90f
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
@@ -0,0 +1,111 @@
+#include "qcom-ipq8064-ad7200-c2600.dtsi"
+
+/ {
+       model = "TP-Link Archer C2600";
+       compatible = "tplink,c2600", "qcom,ipq8064";
+
+       aliases {
+               led-boot = &power;
+               led-failsafe = &general;
+               led-running = &power;
+               led-upgrade = &general;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 49 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+
+               ledswitch {
+                       label = "ledswitch";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_LIGHTS_TOGGLE>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               lan {
+                       label = "white:lan";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb4 {
+                       label = "white:usb_4";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb2 {
+                       label = "white:usb_2";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_amber {
+                       label = "amber:wan";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               wan_white {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               general: general {
+                       label = "white:general";
+                       gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio16", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio26", "gpio33",
+                                       "gpio53", "gpio66";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
new file mode 100644 (file)
index 0000000..baa99eb
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
@@ -0,0 +1,378 @@
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Netgear Nighthawk X4 D7800";
+       compatible = "netgear,d7800", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               rsvd@5fe00000 {
+                       reg = <0x5fe00000 0x200000>;
+                       reusable;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power_white;
+               led-failsafe = &power_amber;
+               led-running = &power_white;
+               led-upgrade = &power_amber;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               usb1 {
+                       label = "white:usb1";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb2 {
+                       label = "white:usb2";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_amber: power_amber {
+                       label = "amber:power";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_white {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_amber {
+                       label = "amber:wan";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               esata {
+                       label = "white:esata";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_white: power_white {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               wifi {
+                       label = "white:wifi";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
+                               "gpio24","gpio26", "gpio53", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       usb0_pwr_en_pins: usb0_pwr_en_pins {
+               mux {
+                       pins = "gpio15";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       usb1_pwr_en_pins: usb1_pwr_en_pins {
+               mux {
+                       pins = "gpio16", "gpio68";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+};
+
+&sata_phy {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(1)>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(2)>;
+               };
+       };
+};
+
+&pcie2 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie2_pins>;
+       pinctrl-names = "default";
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1180000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       qcadata@0 {
+                               label = "qcadata";
+                               reg = <0x0000000 0x0c80000>;
+                               read-only;
+                       };
+
+                       APPSBL@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       APPSBLENV@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                               read-only;
+                       };
+
+                       art@1200000 {
+                               label = "art";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_art_0: macaddr@0 {
+                                       reg = <0x0 0x6>;
+                               };
+
+                               macaddr_art_6: macaddr@6 {
+                                       reg = <0x6 0x6>;
+                               };
+
+                               precal_art_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_art_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+
+                       artbak: partition-artbak@1340000 {
+                               label = "artbak";
+                               reg = <0x1340000 0x0140000>;
+                               read-only;
+                       };
+
+                       kernel@1480000 {
+                               label = "kernel";
+                               reg = <0x1480000 0x0400000>;
+                       };
+
+                       ubi@1880000 {
+                               label = "ubi";
+                               reg = <0x1880000 0x6080000>;
+                       };
+
+                       reserve@7900000 {
+                               label = "reserve";
+                               reg = <0x7900000 0x0700000>;
+                               read-only;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-db149.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-db149.dts
new file mode 100644 (file)
index 0000000..eb26aa4
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-db149.dts
@@ -0,0 +1,217 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+       model = "Qualcomm IPQ8064/DB149";
+       compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
+
+       aliases {
+               serial0 = &gsbi2_serial;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+};
+
+&qcom_pinmux {
+       rgmii0_pins: rgmii0_pins {
+               mux {
+                       pins = "gpio2", "gpio66";
+                       drive-strength = <8>;
+                       bias-disable;
+               };
+       };
+};
+
+&gsbi2 {
+       qcom,mode = <GSBI_PROT_I2C_UART>;
+       status = "okay";
+
+       gsbi2_serial: serial@12490000 {
+               status = "okay";
+       };
+};
+
+&gsbi4 {
+       status = "disabled";
+};
+
+&gsbi4_serial {
+       status = "disabled";
+};
+
+&flash {
+       m25p,fast-read;
+
+       partition@0 {
+               label = "lowlevel_init";
+               reg = <0x0 0x1b0000>;
+       };
+
+       partition@1 {
+               label = "u-boot";
+               reg = <0x1b0000 0x80000>;
+       };
+
+       partition@2 {
+               label = "u-boot-env";
+               reg = <0x230000 0x40000>;
+       };
+
+       partition@3 {
+               label = "caldata";
+               reg = <0x270000 0x40000>;
+       };
+
+       partition@4 {
+               label = "firmware";
+               reg = <0x2b0000 0x1d50000>;
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&pcie2 {
+       status = "okay";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               qca8k,rgmii56_1_8v;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac2>;
+                               phy-mode = "sgmii";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                       };
+
+                       /*
+                       port@6 {
+                                       reg = <0>;
+                                       label = "cpu";
+                                       ethernet = <&gmac2>;
+                                       phy-mode = "rgmii";
+
+                                       fixed-link {
+                                                       speed = <1000>;
+                                                       full-duplex;
+                                                       pause;
+                                                       asym-pause;
+                                       };
+                       };
+                       */
+               };
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+
+       phy6: ethernet-phy@6 {
+               reg = <6>;
+       };
+
+       phy7: ethernet-phy@7 {
+               reg = <7>;
+       };
+};
+
+&gmac0 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <0>;
+       phy-handle = <&phy4>;
+
+       pinctrl-0 = <&rgmii0_pins>;
+       pinctrl-names = "default";
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       phy-handle = <&phy6>;
+};
+
+&gmac3 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <3>;
+       phy-handle = <&phy7>;
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts
new file mode 100644 (file)
index 0000000..1768071
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-eax500.dtsi"
+
+/ {
+       model = "Linksys EA7500 V1 WiFi Router";
+       compatible = "linksys,ea7500-v1", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0xe000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               led-boot = &led_power;
+               led-failsafe = &led_power;
+               led-running = &led_power;
+               led-upgrade = &led_power;
+       };
+
+       chosen {
+               /* look for root deviceblock nbr in this bootarg */
+               find-rootblock = "ubi.mtd=";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       default-state = "keep";
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio65", "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio6";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&partitions {
+       partition@5f80000 {
+               label = "sysdiag";
+               reg = <0x5f80000 0x100000>;
+       };
+
+       partition@6080000 {
+               label = "syscfg";
+               reg = <0x6080000 0x1f80000>;
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
new file mode 100644 (file)
index 0000000..9b01ae0
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
@@ -0,0 +1,122 @@
+#include "qcom-ipq8064-eax500.dtsi"
+
+/ {
+       model = "Linksys EA8500 WiFi Router";
+       compatible = "linksys,ea8500", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &led_power;
+               led-failsafe = &led_power;
+               led-running = &led_power;
+               led-upgrade = &led_power;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               wps {
+                       label = "green:wps";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       default-state = "keep";
+               };
+
+               wifi {
+                       label = "green:wifi";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio65", "gpio67", "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio6", "gpio53", "gpio54";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&sata_phy {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&partitions {
+       partition@5f80000 {
+               label = "syscfg";
+               reg = <0x5f80000 0x2080000>;
+       };
+};
+
+&mdio0 {
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       qcom,phy_mdio_addr = <4>;
+       qcom,poll_required = <1>;
+       qcom,rgmii_delay = <0>;
+       qcom,emulation = <0>;
+};
+
+/* LAN */
+&gmac2 {
+       qcom,phy_mdio_addr = <0>;       /* none */
+       qcom,poll_required = <0>;       /* no polling */
+       qcom,rgmii_delay = <0>;
+       qcom,emulation = <0>;
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
new file mode 100644 (file)
index 0000000..525eadc
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
@@ -0,0 +1,301 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       chosen {
+               bootargs = "console=ttyMSM0,115200n8";
+               /* append to bootargs adding the root deviceblock nbr from bootloader */
+               append-rootblock = "ubi.mtd=";
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_art_1000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_art_5000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&pcie2 {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x0c80000>;
+
+               partitions: partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "SBL1";
+                               reg = <0x0000000 0x0040000>;
+                               read-only;
+                       };
+
+                       partition@40000 {
+                               label = "MIBIB";
+                               reg = <0x0040000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "SBL2";
+                               reg = <0x0180000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@2c0000 {
+                               label = "SBL3";
+                               reg = <0x02c0000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@540000 {
+                               label = "DDRCONFIG";
+                               reg = <0x0540000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@660000 {
+                               label = "SSD";
+                               reg = <0x0660000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@780000 {
+                               label = "TZ";
+                               reg = <0x0780000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@a00000 {
+                               label = "RPM";
+                               reg = <0x0a00000 0x0280000>;
+                               read-only;
+                       };
+
+                       art: partition-art@c80000 {
+                               label = "art";
+                               reg = <0x0c80000 0x0140000>;
+                               read-only;
+
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               precal_art_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_art_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+
+                       partition@dc0000 {
+                               label = "APPSBL";
+                               reg = <0x0dc0000 0x0100000>;
+                               read-only;
+                       };
+
+                       partition@ec0000 {
+                               label = "u_env";
+                               reg = <0x0ec0000 0x0040000>;
+                       };
+
+                       partition@f00000 {
+                               label = "s_env";
+                               reg = <0x0f00000 0x0040000>;
+                       };
+
+                       partition@f40000 {
+                               label = "devinfo";
+                               reg = <0x0f40000 0x0040000>;
+                       };
+
+                       partition@f80000 {
+                               label = "kernel1";
+                               reg = <0x0f80000 0x2800000>;  /* 4 MB, spill to rootfs */
+                       };
+
+                       partition@1380000 {
+                               label = "rootfs1";
+                               reg = <0x1380000 0x2400000>;
+                       };
+
+                       partition@3780000 {
+                               label = "kernel2";
+                               reg = <0x3780000 0x2800000>;
+                       };
+
+                       partition@3b80000 {
+                               label = "rootfs2";
+                               reg = <0x3b80000 0x2400000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               qca8k,rgmii56_1_8v;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "rgmii-id";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                       };
+
+                       /*
+                       port@6 {
+                                       reg = <0>;
+                                       label = "cpu";
+                                       ethernet = <&gmac2>;
+                                       phy-mode = "rgmii";
+
+                                       fixed-link {
+                                                       speed = <1000>;
+                                                       full-duplex;
+                                                       pause;
+                                                       asym-pause;
+                                       };
+                       };
+                       */
+               };
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-g10.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-g10.dts
new file mode 100644 (file)
index 0000000..43f47ed
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-g10.dts
@@ -0,0 +1,342 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       compatible = "asrock,g10", "qcom,ipq8064";
+       model = "ASRock G10";
+
+       aliases {
+               ethernet0 = &gmac1;
+               ethernet1 = &gmac0;
+
+               led-boot = &led_status_blue;
+               led-failsafe = &led_status_amber;
+               led-running = &led_status_blue;
+               led-upgrade = &led_status_amber;
+       };
+
+       chosen {
+               bootargs-override = "console=ttyMSM0,115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               /*
+                * this is a bit misleading. Because there are about seven
+                * multicolor LEDs connected all wired together in parallel.
+                */
+
+               status_yellow {
+                       label = "yellow:status";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_status_amber: status_amber {
+                       label = "amber:status";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_status_blue: status_blue {
+                       label = "blue:status";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               /*
+                * LED is declared in vendors boardfile but it's not
+                * working and the manual doesn't mention anything
+                * about the LED being white.
+
+               status_white {
+                       label = "white:status";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+               */
+       };
+
+       i2c-gpio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               compatible = "i2c-gpio";
+               gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>, /* sda */
+                       <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; /* scl */
+               i2c-gpio,delay-us = <5>;
+               i2c-gpio,scl-output-only;
+
+               mcu@50 {
+                       reg = <0x50>;
+                       compatible = "sonix,sn8f25e21";
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               ir-remote {
+                       label = "ir-remote";
+                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+
+               wps5g {
+                       label = "wps5g";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+
+               wps2g {
+                       label = "wps2g";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&gmac1 {
+       status = "okay";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gsbi4_serial {
+       pinctrl-0 = <&uart0_pins>;
+       pinctrl-names = "default";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               qca8k,rgmii56_1_8v;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "rgmii-id";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                       };
+
+                       /*
+                       port@6 {
+                                       reg = <0>;
+                                       label = "cpu";
+                                       ethernet = <&gmac2>;
+                                       phy-mode = "rgmii";
+
+                                       fixed-link {
+                                                       speed = <1000>;
+                                                       full-duplex;
+                                                       pause;
+                                                       asym-pause;
+                                       };
+                       };
+                       */
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1200000>;
+
+               partitions {
+                       compatible = "qcom,smem";
+
+                       partition-art {
+                               label = "0:art";
+                               read-only;
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               precal_art_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_art_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+               };
+       };
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi5g: wifi@1,0 {
+                       reg = <0x00010000 0 0 0 0>;
+                       compatible = "qcom,ath10k";
+                       qcom,ath10k-calibration-variant = "ASRock-G10";
+                       nvmem-cells = <&precal_art_1000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi2g: wifi@1,0 {
+                       reg = <0x00010000 0 0 0 0>;
+                       compatible = "qcom,ath10k";
+                       qcom,ath10k-calibration-variant = "ASRock-G10";
+                       nvmem-cells = <&precal_art_5000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&qcom_pinmux {
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio26";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio15", "gpio16", "gpio64", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       uart0_pins: uart0_pins {
+               mux {
+                       pins = "gpio10", "gpio11";
+                       function = "gsbi4";
+                       drive-strength = <10>;
+                       bias-disable;
+               };
+       };
+};
+
+&rpm {
+       pinctrl-0 = <&i2c4_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&tcsr {
+       qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
+};
+
+/delete-node/ &pcie2_pins;
+/delete-node/ &pcie2;

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
new file mode 100644 (file)
index 0000000..7d462ea
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
@@ -0,0 +1,311 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       model = "Netgear Nighthawk X4 R7500";
+       compatible = "netgear,r7500", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0xe000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               rsvd@41200000 {
+                       reg = <0x41200000 0x300000>;
+                       no-map;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power_white;
+               led-failsafe = &power_amber;
+               led-running = &power_white;
+               led-upgrade = &power_amber;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               usb1 {
+                       label = "white:usb1";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb2 {
+                       label = "white:usb2";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_amber: power_amber {
+                       label = "amber:power";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_white {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_amber {
+                       label = "amber:wan";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               esata {
+                       label = "white:esata";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_white: power_white {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               wifi {
+                       label = "white:wifi";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
+                               "gpio24","gpio26", "gpio53", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&gsbi5 {
+       status = "disabled";
+
+       spi@1a280000 {
+               status = "disabled";
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1180000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       qcadata@0 {
+                               label = "qcadata";
+                               reg = <0x0000000 0x0c80000>;
+                               read-only;
+                       };
+
+                       APPSBL@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       APPSBLENV@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                               read-only;
+                       };
+
+                       art: partition-art@1200000 {
+                               label = "art";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                       };
+
+                       kernel@1340000 {
+                               label = "kernel";
+                               reg = <0x1340000 0x0400000>;
+                       };
+
+                       ubi@1740000 {
+                               label = "ubi";
+                               reg = <0x1740000 0x1600000>;
+                       };
+
+                       netgear@2d40000 {
+                               label = "netgear";
+                               reg = <0x2d40000 0x0c00000>;
+                               read-only;
+                       };
+
+                       reserve@3940000 {
+                               label = "reserve";
+                               reg = <0x3940000 0x46c0000>;
+                               read-only;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&tcsr {
+       qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
+       compatible = "qcom,tcsr";
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&art {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_art_0: macaddr@0 {
+               reg = <0x0 0x6>;
+       };
+
+       macaddr_art_6: macaddr@6 {
+               reg = <0x6 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
new file mode 100644 (file)
index 0000000..06e3c34
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
@@ -0,0 +1,371 @@
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Netgear Nighthawk X4 R7500v2";
+       compatible = "netgear,r7500v2", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               rsvd@5fe00000 {
+                       reg = <0x5fe00000 0x200000>;
+                       reusable;
+               };
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power;
+               led-failsafe = &power;
+               led-running = &power;
+               led-upgrade = &power;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               usb1 {
+                       label = "amber:usb1";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb3 {
+                       label = "amber:usb3";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               status {
+                       label = "amber:status";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               internet {
+                       label = "white:internet";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               esata {
+                       label = "white:esata";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               wifi {
+                       label = "white:wifi";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
+                               "gpio24","gpio26", "gpio53", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       usb0_pwr_en_pins: usb0_pwr_en_pins {
+               mux {
+                       pins = "gpio15";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       usb1_pwr_en_pins: usb1_pwr_en_pins {
+               mux {
+                       pins = "gpio16", "gpio68";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+};
+
+&sata_phy {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(1)>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(2)>;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x1180000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       qcadata@0 {
+                               label = "qcadata";
+                               reg = <0x0000000 0x0c80000>;
+                               read-only;
+                       };
+
+                       APPSBL@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       APPSBLENV@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                               read-only;
+                       };
+
+                       art@1200000 {
+                               label = "art";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_art_0: macaddr@0 {
+                                       reg = <0x0 0x6>;
+                               };
+
+                               macaddr_art_6: macaddr@6 {
+                                       reg = <0x6 0x6>;
+                               };
+
+                               precal_art_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_art_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+
+                       artbak: partition-artbak@1340000 {
+                               label = "artbak";
+                               reg = <0x1340000 0x0140000>;
+                               read-only;
+                       };
+
+                       kernel@1480000 {
+                               label = "kernel";
+                               reg = <0x1480000 0x0400000>;
+                       };
+
+                       ubi@1880000 {
+                               label = "ubi";
+                               reg = <0x1880000 0x6080000>;
+                       };
+
+                       reserve@7900000 {
+                               label = "reserve";
+                               reg = <0x7900000 0x0700000>;
+                               read-only;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0xaa545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
new file mode 100644 (file)
index 0000000..ae2a58d
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
@@ -0,0 +1,315 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Ubiquiti UniFi AC HD";
+       compatible = "ubnt,unifi-ac-hd", "qcom,ipq8064";
+
+       aliases {
+               label-mac-device = &gmac2;
+               led-boot = &led_dome_white;
+               led-failsafe = &led_dome_white;
+               led-running = &led_dome_blue;
+               led-upgrade = &led_dome_blue;
+               mdio-gpio0 = &mdio0;
+               ethernet0 = &gmac2;
+               ethernet1 = &gmac1;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_dome_blue: dome_blue {
+                       label = "blue:dome";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_dome_white: dome_white {
+                       label = "white:dome";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio9", "gpio53";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+                       output-low;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       drive-strength = <10>;
+                       bias-none;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <12>;
+               };
+       };
+};
+
+&CPU_SPC {
+       status = "disabled";
+};
+
+&gsbi5 {
+       status = "okay";
+
+       qcom,mode = <GSBI_PROT_SPI>;
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+               cs-gpios = <&qcom_pinmux 20 0>;
+
+               flash@0 {
+                       compatible = "mx25u25635f", "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+                       m25p,fast-read;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               partition@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x20000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@30000 {
+                                       label = "SBL2";
+                                       reg = <0x30000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@50000 {
+                                       label = "SBL3";
+                                       reg = <0x50000 0x30000>;
+                                       read-only;
+                               };
+
+                               partition@80000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x80000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@90000 {
+                                       label = "SSD";
+                                       reg = <0x90000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@a0000 {
+                                       label = "TZ";
+                                       reg = <0xa0000 0x30000>;
+                                       read-only;
+                               };
+
+                               partition@d0000 {
+                                       label = "RPM";
+                                       reg = <0xd0000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@f0000 {
+                                       label = "APPSBL";
+                                       reg = <0xf0000 0xc0000>;
+                                       read-only;
+                               };
+
+                               partition@1b0000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x1b0000 0x10000>;
+                                       read-only;
+                               };
+
+                               eeprom: partition-eeprom@1c0000 {
+                                       label = "EEPROM";
+                                       reg = <0x1c0000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@1d0000 {
+                                       label = "bootselect";
+                                       reg = <0x1d0000 0x10000>;
+                               };
+
+                               partition@1e0000 {
+                                       compatible = "denx,fit";
+                                       label = "firmware";
+                                       reg = <0x1e0000 0xe70000>;
+                               };
+
+                               partition@1050000 {
+                                       label = "kernel1";
+                                       reg = <0x1050000 0xe70000>;
+                                       read-only;
+                               };
+
+                               partition@1ec0000 {
+                                       label = "debug";
+                                       reg = <0x1ec0000 0x100000>;
+                                       read-only;
+                               };
+
+                               partition@1fc0000 {
+                                       label = "cfg";
+                                       reg = <0x1fc0000 0x40000>;
+                                       read-only;
+                               };
+                       };
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       nand-ecc-strength = <4>;
+       nand-bus-width = <8>;
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+
+       phy5: ethernet-phy@5 {
+               reg = <5>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       mdiobus = <&mdio0>;
+       phy-handle = <&phy5>;
+       phy-mode = "sgmii";
+       qcom,id = <1>;
+
+       nvmem-cells = <&macaddr_eeprom_6>;
+       nvmem-cell-names = "mac-address";
+};
+
+&gmac2 {
+       status = "okay";
+
+       mdiobus = <&mdio0>;
+       phy-handle = <&phy4>;
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_eeprom_0>;
+       nvmem-cell-names = "mac-address";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&tcsr {
+       status = "okay";
+};
+
+&hs_phy_0 {
+       status = "okay";
+};
+
+&ss_phy_0 {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&hs_phy_1 {
+       status = "okay";
+};
+
+&ss_phy_1 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&eeprom {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_eeprom_0: macaddr@0 {
+               reg = <0x0 0x6>;
+       };
+
+       macaddr_eeprom_6: macaddr@6 {
+               reg = <0x6 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
new file mode 100644 (file)
index 0000000..5ae1a3e
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
@@ -0,0 +1,408 @@
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "TP-Link Archer VR2600v";
+       compatible = "tplink,vr2600v", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power;
+               led-failsafe = &general;
+               led-running = &power;
+               led-upgrade = &general;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               dect {
+                       label = "dect";
+                       gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_PHONE>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               ledswitch {
+                       label = "ledswitch";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_LIGHTS_TOGGLE>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               dsl {
+                       label = "white:dsl";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb {
+                       label = "white:usb";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               lan {
+                       label = "white:lan";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g {
+                       label = "white:wlan2g";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g {
+                       label = "white:wlan5g";
+                       gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               phone {
+                       label = "white:phone";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
+               };
+
+               general: general {
+                       label = "white:general";
+                       gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17",
+                               "gpio26", "gpio53", "gpio56", "gpio66";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi4: spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               partition@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x20000 0x20000>;
+                                       read-only;
+                               };
+
+                               partition@40000 {
+                                       label = "SBL2";
+                                       reg = <0x40000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@80000 {
+                                       label = "SBL3";
+                                       reg = <0x80000 0x80000>;
+                                       read-only;
+                               };
+
+                               partition@100000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x100000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@110000 {
+                                       label = "SSD";
+                                       reg = <0x110000 0x10000>;
+                                       read-only;
+                               };
+
+                               partition@120000 {
+                                       label = "TZ";
+                                       reg = <0x120000 0x80000>;
+                                       read-only;
+                               };
+
+                               partition@1a0000 {
+                                       label = "RPM";
+                                       reg = <0x1a0000 0x80000>;
+                                       read-only;
+                               };
+
+                               partition@220000 {
+                                       label = "APPSBL";
+                                       reg = <0x220000 0x80000>;
+                                       read-only;
+                               };
+
+                               partition@2a0000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x2a0000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@2e0000 {
+                                       label = "OLDART";
+                                       reg = <0x2e0000 0x40000>;
+                                       read-only;
+                               };
+
+                               partition@320000 {
+                                       label = "firmware";
+                                       reg = <0x320000 0xc60000>;
+                                       compatible = "openwrt,uimage";
+                                       openwrt,offset = <512>; /* account for pad-extra 512 */
+                               };
+
+                               /* hole 0xf80000 - 0xfaf100 */
+
+                               partition@faf100 {
+                                       label = "default-mac";
+                                       reg = <0xfaf100 0x00200>;
+                                       read-only;
+
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       macaddr_defaultmac_0: macaddr@0 {
+                                               reg = <0x0 0x6>;
+                                       };
+                               };
+
+                               partition@fc0000 {
+                                       label = "ART";
+                                       reg = <0xfc0000 0x40000>;
+                                       read-only;
+
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_ART_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_ART_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+                       mac-address-increment = <(-1)>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_defaultmac_0>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_defaultmac_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
new file mode 100644 (file)
index 0000000..b33183d
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
@@ -0,0 +1,447 @@
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "NEC Aterm WG2600HP";
+       compatible = "nec,wg2600hp", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+
+               led-boot = &power_green;
+               led-failsafe = &power_red;
+               led-running = &power_green;
+               led-upgrade = &power_green;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               bridge {
+                       label = "bridge";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               converter {
+                       label = "converter";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               converter_green {
+                       label = "green:converter";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_red: power_red {
+                       label = "red:power";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               active_green {
+                       label = "green:active";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               active_red {
+                       label = "red:active";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_green: power_green {
+                       label = "green:power";
+                       gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
+               };
+
+               converter_red {
+                       label = "red:converter";
+                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g_green {
+                       label = "green:wlan2g";
+                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g_red {
+                       label = "red:wlan2g";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g_green {
+                       label = "green:wlan5g";
+                       gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan5g_red {
+                       label = "red:wlan5g";
+                       gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
+               };
+
+               tv_green {
+                       label = "green:tv";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+
+               tv_red {
+                       label = "red:tv";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&CPU_SPC {
+       status = "disabled";
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x06000000  /* PAD0_MODE */
+                       0x0000c 0x00080080  /* PAD6_MODE */
+                       0x000e4 0x0006a545  /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x0000004e  /* PORT0_STATUS */
+                       0x00094 0x0000004e  /* PORT6_STATUS */
+                       >;
+       };
+
+       ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_PRODUCTDATA_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_PRODUCTDATA_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gsbi5 {
+       status = "okay";
+
+       qcom,mode = <GSBI_PROT_SPI>;
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               SBL1@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x20000>;
+                                       read-only;
+                               };
+
+                               MIBIB@20000 {
+                                       label = "MIBIB";
+                                       reg = <0x20000 0x20000>;
+                                       read-only;
+                               };
+
+                               SBL2@40000 {
+                                       label = "SBL2";
+                                       reg = <0x40000 0x40000>;
+                                       read-only;
+                               };
+
+                               SBL3@80000 {
+                                       label = "SBL3";
+                                       reg = <0x80000 0x80000>;
+                                       read-only;
+                               };
+
+                               DDRCONFIG@100000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x100000 0x10000>;
+                                       read-only;
+                               };
+
+                               SSD@110000 {
+                                       label = "SSD";
+                                       reg = <0x110000 0x10000>;
+                                       read-only;
+                               };
+
+                               TZ@120000 {
+                                       label = "TZ";
+                                       reg = <0x120000 0x80000>;
+                                       read-only;
+                               };
+
+                               RPM@1a0000 {
+                                       label = "RPM";
+                                       reg = <0x1a0000 0x80000>;
+                                       read-only;
+                               };
+
+                               APPSBL@220000 {
+                                       label = "APPSBL";
+                                       reg = <0x220000 0x80000>;
+                                       read-only;
+                               };
+
+                               APPSBLENV@2a0000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x2a0000 0x10000>;
+                               };
+
+                               PRODUCTDATA: PRODUCTDATA@2b0000 {
+                                       label = "PRODUCTDATA";
+                                       reg = <0x2b0000 0x30000>;
+                                       read-only;
+                               };
+
+                               ART@2e0000 {
+                                       label = "ART";
+                                       reg = <0x2e0000 0x40000>;
+                                       read-only;
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_ART_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_ART_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+
+                               TP@320000 {
+                                       label = "TP";
+                                       reg = <0x320000 0x40000>;
+                                       read-only;
+                               };
+
+                               TINY@360000 {
+                                       label = "TINY";
+                                       reg = <0x360000 0x500000>;
+                                       read-only;
+                               };
+
+                               firmware@860000 {
+                                       compatible = "denx,uimage";
+                                       label = "firmware";
+                                       reg = <0x860000 0x17a0000>;
+                               };
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio16", "gpio54", "gpio24", "gpio25";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio14",
+                               "gpio15", "gpio55", "gpio56", "gpio57", "gpio58",
+                               "gpio64", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       usb_pwr_en_pins: usb_pwr_en_pins {
+               mux {
+                       pins = "gpio22";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+};
+
+&PRODUCTDATA {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_PRODUCTDATA_0: macaddr@0 {
+               reg = <0x0 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_6: macaddr@6 {
+               reg = <0x6 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_c: macaddr@c {
+               reg = <0xc 0x6>;
+       };
+
+       macaddr_PRODUCTDATA_12: macaddr@12 {
+               reg = <0x12 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
new file mode 100644 (file)
index 0000000..633e6ff
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
@@ -0,0 +1,510 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ *  Copyright (C) 2017 Christian Mehlis <[email protected]>
+ *  Copyright (C) 2018 Mathias Kresin <[email protected]>
+ *  All rights reserved.
+ */
+
+#include "qcom-ipq8064-v1.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       compatible = "compex,wpq864", "qcom,ipq8064";
+       model = "Compex WPQ864";
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+               ethernet0 = &gmac1;
+               ethernet1 = &gmac0;
+
+               led-boot = &led_pass;
+               led-failsafe = &led_fail;
+               led-running = &led_pass;
+               led-upgrade = &led_pass;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               rss4 {
+                       label = "green:rss4";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               rss3 {
+                       label = "green:rss3";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               rss2 {
+                       label = "orange:rss2";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
+               };
+
+               rss1 {
+                       label = "red:rss1";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_pass: pass {
+                       label = "green:pass";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_fail: fail {
+                       label = "green:fail";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb {
+                       label = "green:usb";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               usb-pcie {
+                       label = "green:usb-pcie";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+       };
+
+       beeper {
+               compatible = "gpio-beeper";
+
+               pinctrl-0 = <&beeper_pins>;
+               pinctrl-names = "default";
+
+               gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&rpm {
+       pinctrl-0 = <&rpm_pins>;
+       pinctrl-names = "default";
+};
+
+&nand {
+       status = "okay";
+
+       mt29f2g08abbeah4@0 {
+               compatible = "qcom,nandcs";
+
+               reg = <0>;
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x0c80000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       SBL1@0 {
+                               label = "SBL1";
+                               reg = <0x0000000 0x0040000>;
+                               read-only;
+                       };
+
+                       MIBIB@40000 {
+                               label = "MIBIB";
+                               reg = <0x0040000 0x0140000>;
+                               read-only;
+                       };
+
+                       SBL2@180000 {
+                               label = "SBL2";
+                               reg = <0x0180000 0x0140000>;
+                               read-only;
+                       };
+
+                       SBL3@2c0000 {
+                               label = "SBL3";
+                               reg = <0x02c0000 0x0280000>;
+                               read-only;
+                       };
+
+                       DDRCONFIG@540000 {
+                               label = "DDRCONFIG";
+                               reg = <0x0540000 0x0120000>;
+                               read-only;
+                       };
+
+                       SSD@660000 {
+                               label = "SSD";
+                               reg = <0x0660000 0x0120000>;
+                               read-only;
+                       };
+
+                       TZ@780000 {
+                               label = "TZ";
+                               reg = <0x0780000 0x0280000>;
+                               read-only;
+                       };
+
+                       RPM@a00000 {
+                               label = "RPM";
+                               reg = <0x0a00000 0x0280000>;
+                               read-only;
+                       };
+
+                       APPSBL@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       APPSBLENV@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                       };
+
+                       ART@1200000 {
+                               label = "ART";
+                               reg = <0x1200000 0x0140000>;
+                       };
+
+                       ubi@1340000 {
+                               label = "ubi";
+                               reg = <0x1340000 0x4000000>;
+                       };
+
+                       BOOTCONFIG@5340000 {
+                               label = "BOOTCONFIG";
+                               reg = <0x5340000 0x0060000>;
+                       };
+
+                       SBL2-1@53a0000- {
+                               label = "SBL2_1";
+                               reg = <0x53a0000 0x0140000>;
+                               read-only;
+                       };
+
+                       SBL3-1@54e0000 {
+                               label = "SBL3_1";
+                               reg = <0x54e0000 0x0280000>;
+                               read-only;
+                       };
+
+                       DDRCONFIG-1@5760000 {
+                               label = "DDRCONFIG_1";
+                               reg = <0x5760000 0x0120000>;
+                               read-only;
+                       };
+
+                       SSD-1@5880000 {
+                               label = "SSD_1";
+                               reg = <0x5880000 0x0120000>;
+                               read-only;
+                       };
+
+                       TZ-1@59a0000 {
+                               label = "TZ_1";
+                               reg = <0x59a0000 0x0280000>;
+                               read-only;
+                       };
+
+                       RPM-1@5c20000 {
+                               label = "RPM_1";
+                               reg = <0x5c20000 0x0280000>;
+                               read-only;
+                       };
+
+                       BOOTCONFIG1@5ea0000 {
+                               label = "BOOTCONFIG1";
+                               reg = <0x5ea0000 0x0060000>;
+                       };
+
+                       APPSBL-1@5f00000 {
+                               label = "APPSBL_1";
+                               reg = <0x5f00000 0x0500000>;
+                               read-only;
+                       };
+
+                       ubi-1@6400000 {
+                               label = "ubi_1";
+                               reg = <0x6400000 0x4000000>;
+                       };
+
+                       unused@a400000 {
+                               label = "unused";
+                               reg = <0xa400000 0x5c00000>;
+                       };
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               qca8k,rgmii56_1_8v;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "rgmii-id";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                       };
+
+                       /*
+                       port@6 {
+                                       reg = <0>;
+                                       label = "cpu";
+                                       ethernet = <&gmac2>;
+                                       phy-mode = "rgmii";
+
+                                       fixed-link {
+                                                       speed = <1000>;
+                                                       full-duplex;
+                                                       pause;
+                                                       asym-pause;
+                                       };
+                       };
+                       */
+               };
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gsbi4_serial {
+       pinctrl-0 = <&uart0_pins>;
+       pinctrl-names = "default";
+};
+
+&flash {
+       compatible = "jedec,spi-nor";
+};
+
+&sata_phy {
+       status = "disabled";
+};
+
+&sata {
+       status = "disabled";
+};
+
+&ss_phy_0 {            /* USB3 port 0 SS phy */
+       status = "okay";
+
+       rx_eq = <2>;
+       tx_deamp_3_5db = <32>;
+       mpll = <160>;
+};
+
+&ss_phy_1 {            /* USB3 port 1 SS phy */
+       status = "okay";
+
+       rx_eq = <2>;
+       tx_deamp_3_5db = <32>;
+       mpll = <160>;
+};
+
+&pcie0 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&pcie2 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+};
+
+&qcom_pinmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&state_default>;
+
+       state_default: pinctrl0 {
+               pcie0_pcie2_perst {
+                       pins = "gpio3";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-disable;
+                       output-high;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio22",
+                              "gpio23", "gpio24", "gpio25", "gpio53";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio54";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       beeper_pins: beeper_pins {
+               mux {
+                       pins = "gpio55";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       rpm_pins: rpm_pins {
+               mux {
+                       pins = "gpio12", "gpio13";
+                       function = "gsbi4";
+                       drive-strength = <10>;
+                       bias-disable;
+               };
+       };
+
+       uart0_pins: uart0_pins {
+               mux {
+                       pins = "gpio10", "gpio11";
+                       function = "gsbi4";
+                       drive-strength = <10>;
+                       bias-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19";
+                       function = "gsbi5";
+                       drive-strength = <10>;
+                       bias-pull-down;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       function = "gsbi5";
+                       drive-strength = <12>;
+                       bias-pull-down;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&tcsr {
+       qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
new file mode 100644 (file)
index 0000000..c617064
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
@@ -0,0 +1,523 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Buffalo WXR-2533DHP";
+       compatible = "buffalo,wxr-2533dhp", "qcom,ipq8064";
+
+       memory@42000000 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               led-boot = &power;
+               led-failsafe = &diag;
+               led-running = &power;
+               led-upgrade = &power;
+       };
+
+       chosen {
+               /* use "ubi_rootfs" volume in "ubi" partition as rootfs */
+               bootargs = "ubi.block=0,1 root=/dev/ubiblock0_1 rootfstype=squashfs";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               usb {
+                       label = "green:usb";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "usbport";
+                       trigger-sources = <&hub_port0 &hub_port1>;
+               };
+
+               guestport {
+                       label = "green:guestport";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+
+               diag: diag {
+                       label = "orange:diag";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               internet_orange {
+                       label = "orange:internet";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
+               };
+
+               internet_white {
+                       label = "white:internet";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wireless_orange {
+                       label = "orange:wireless";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wireless_white {
+                       label = "white:wireless";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               router_orange {
+                       label = "orange:router";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
+               };
+
+               router_white {
+                       label = "white:router";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               power {
+                       label = "power";
+                       gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_POWER>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               eject {
+                       label = "eject";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_EJECTCD>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               guest {
+                       label = "guest";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_0>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               ap {
+                       label = "ap";
+                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_1>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               router {
+                       label = "router";
+                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_1>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               auto {
+                       label = "auto";
+                       gpios = <&qcom_pinmux 57 GPIO_ACTIVE_LOW>;
+                       linux,code = <BTN_1>;
+                       linux,input-type = <EV_SW>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       cs@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       ubi@0 {
+                               label = "ubi";
+                               reg = <0x0000000 0x4000000>;
+                       };
+
+                       rootfs_1@4000000 {
+                               label = "rootfs_1";
+                               reg = <0x4000000 0x4000000>;
+                       };
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x07600000  /* PAD0_MODE */
+                       0x00008 0x01000000  /* PAD5_MODE */
+                       0x0000c 0x00000080  /* PAD6_MODE */
+                       0x00050 0xcc35cc35  /* LED_CTRL0 */
+                       0x00054 0xca35ca35  /* LED_CTRL1 */
+                       0x00058 0xc935c935  /* LED_CTRL2 */
+                       0x0005c 0x03ffff00  /* LED_CTRL3 */
+                       0x000e4 0x0006a545  /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x0000007e  /* PORT0_STATUS */
+                       0x00094 0x0000007e  /* PORT6_STATUS */
+                       >;
+       };
+
+       ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_ART_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       nvmem-cells = <&macaddr_ART_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gsbi4_serial {
+       pinctrl-0 = <&uart0_pins>;
+       pinctrl-names = "default";
+};
+
+&gsbi5 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_SPI>;
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "jedec,spi-nor";
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "fixed-partitions";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               SBL1@0 {
+                                       label = "SBL1";
+                                       reg = <0x0 0x10000>;
+                                       read-only;
+                               };
+
+                               MIBIB@10000 {
+                                       label = "MIBIB";
+                                       reg = <0x10000 0x20000>;
+                                       read-only;
+                               };
+
+                               SBL2@30000 {
+                                       label = "SBL2";
+                                       reg = <0x30000 0x30000>;
+                                       read-only;
+                               };
+
+                               SBL3@60000 {
+                                       label = "SBL3";
+                                       reg = <0x60000 0x30000>;
+                                       read-only;
+                               };
+
+                               DDRCONFIG@90000 {
+                                       label = "DDRCONFIG";
+                                       reg = <0x90000 0x10000>;
+                                       read-only;
+                               };
+
+                               SSD@a0000 {
+                                       label = "SSD";
+                                       reg = <0xa0000 0x10000>;
+                                       read-only;
+                               };
+
+                               TZ@b0000 {
+                                       label = "TZ";
+                                       reg = <0xb0000 0x30000>;
+                                       read-only;
+                               };
+
+                               RPM@e0000 {
+                                       label = "RPM";
+                                       reg = <0xe0000 0x20000>;
+                                       read-only;
+                               };
+
+                               APPSBL@100000 {
+                                       label = "APPSBL";
+                                       reg = <0x100000 0x70000>;
+                                       read-only;
+                               };
+
+                               APPSBLENV@170000 {
+                                       label = "APPSBLENV";
+                                       reg = <0x170000 0x10000>;
+                                       read-only;
+                               };
+
+                               ART@180000 {
+                                       label = "ART";
+                                       reg = <0x180000 0x40000>;
+                                       read-only;
+
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       macaddr_ART_0: macaddr@0 {
+                                               reg = <0x0 0x6>;
+                                       };
+
+                                       macaddr_ART_6: macaddr@6 {
+                                               reg = <0x6 0x6>;
+                                       };
+
+                                       macaddr_ART_18: macaddr@18 {
+                                               reg = <0x18 0x6>;
+                                       };
+
+                                       macaddr_ART_1e: macaddr@1e {
+                                               reg = <0x1e 0x6>;
+                                       };
+
+                                       precal_ART_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_ART_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+
+                               BOOTCONFIG@1c0000 {
+                                       label = "BOOTCONFIG";
+                                       reg = <0x1c0000 0x10000>;
+                                       read-only;
+                               };
+
+                               APPSBL_1@1d0000 {
+                                       label = "APPSBL_1";
+                                       reg = <0x1d0000 0x70000>;
+                                       read-only;
+                               };
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&dwc3_0 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       hub_port0: port@1 {
+               reg = <1>;
+               #trigger-source-cells = <0>;
+       };
+};
+
+&dwc3_1 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       hub_port1: port@1 {
+               reg = <1>;
+               #trigger-source-cells = <0>;
+       };
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>;
+                       nvmem-cell-names = "mac-address", "pre-calibration";
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio55", "gpio56", "gpio57",
+                               "gpio58", "gpio64", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio22",
+                               "gpio23", "gpio24", "gpio25", "gpio26", "gpio53";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       uart0_pins: uart0_pins {
+               mux {
+                       pins = "gpio10", "gpio11";
+                       function = "gsbi4";
+                       drive-strength = <12>;
+                       bias-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs{
+                       pins = "gpio20";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       usb_pwr_en_pins: usb_pwr_en_pins {
+               mux{
+                       pins = "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       output-high;
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
new file mode 100644 (file)
index 0000000..9bdc39b
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
@@ -0,0 +1,385 @@
+#include "qcom-ipq8065-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "ZyXEL NBG6817";
+       compatible = "zyxel,nbg6817", "qcom,ipq8065", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+               sdcc1 = &sdcc1;
+
+               led-boot = &power;
+               led-failsafe = &power;
+               led-running = &power;
+               led-upgrade = &power;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd fstools_ignore_partname=1";
+               append-rootblock = "root=/dev/mmcblk0p";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       linux,input-type = <EV_SW>;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               internet {
+                       label = "white:internet";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+
+               power: power {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               wifi2g {
+                       label = "amber:wifi2g";
+                       gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
+               };
+
+               /* wifi2g amber from the manual is missing */
+
+               wifi5g {
+                       label = "amber:wifi5g";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+               };
+
+               /* wifi5g amber from the manual is missing */
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio53", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio9", "gpio26", "gpio33", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       mdio0_pins: mdio0-pins {
+               clk {
+                       pins = "gpio1";
+                       input-disable;
+               };
+       };
+
+       rgmii2_pins: rgmii2-pins {
+               tx {
+                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
+                       input-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <12>;
+               };
+       };
+
+       usb0_pwr_en_pins: usb0_pwr_en_pins {
+               mux {
+                       pins = "gpio16", "gpio17";
+                       function = "gpio";
+                       drive-strength = <12>;
+               };
+
+               pwr {
+                       pins = "gpio17";
+                       bias-pull-down;
+                       output-high;
+               };
+
+               ovc {
+                       pins = "gpio16";
+                       bias-pull-up;
+               };
+       };
+
+       usb1_pwr_en_pins: usb1_pwr_en_pins {
+               mux {
+                       pins = "gpio14", "gpio15";
+                       function = "gpio";
+                       drive-strength = <12>;
+               };
+
+               pwr {
+                       pins = "gpio14";
+                       bias-pull-down;
+                       output-high;
+               };
+
+               ovc {
+                       pins = "gpio15";
+                       bias-pull-up;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi4: spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               m25p80@0 {
+                       compatible = "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <51200000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "qcom,smem";
+
+                               partition-art {
+                                       label = "0:art";
+                                       read-only;
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_art_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_art_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       reg = <0x00010000 0 0 0 0>;
+                       compatible = "qcom,ath10k";
+
+                       nvmem-cells = <&precal_art_1000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       reg = <0x00010000 0 0 0 0>;
+                       compatible = "qcom,ath10k";
+
+                       nvmem-cells = <&precal_art_5000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               qca8k,rgmii0_1_8v;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "rgmii-id";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                       };
+
+                       /*
+                       port@6 {
+                                       reg = <0>;
+                                       label = "cpu";
+                                       ethernet = <&gmac2>;
+                                       phy-mode = "rgmii";
+
+                                       fixed-link {
+                                                       speed = <1000>;
+                                                       full-duplex;
+                                                       pause;
+                                                       asym-pause;
+                                       };
+                       };
+                       */
+               };
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+       qcom,phy_mdio_addr = <4>;
+       qcom,poll_required = <0>;
+       qcom,rgmii_delay = <1>;
+       qcom,phy_mii_type = <0>;
+       qcom,emulation = <0>;
+       qcom,irq = <255>;
+       mdiobus = <&mdio0>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       qcom,phy_mdio_addr = <0>;       /* none */
+       qcom,poll_required = <0>;       /* no polling */
+       qcom,rgmii_delay = <0>;
+       qcom,phy_mii_type = <1>;
+       qcom,emulation = <0>;
+       qcom,irq = <258>;
+       mdiobus = <&mdio0>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&sdcc1 {
+       status = "okay";
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi
new file mode 100644 (file)
index 0000000..6a51ff1
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi
@@ -0,0 +1,450 @@
+#include "qcom-ipq8065-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       reserved-memory {
+               rsvd@5fe00000 {
+                       reg = <0x5fe00000 0x200000>;
+                       reusable;
+               };
+
+               ramoops@42100000 {
+                       compatible = "ramoops";
+                       reg = <0x42100000 0x40000>;
+                       record-size = <0x4000>;
+                       console-size = <0x4000>;
+                       ftrace-size = <0x4000>;
+                       pmsg-size = <0x4000>;
+               };
+       };
+
+       aliases {
+               label-mac-device = &gmac2;
+
+               led-boot = &power_white;
+               led-failsafe = &power_amber;
+               led-running = &power_white;
+               led-upgrade = &power_amber;
+
+               mdio-gpio0 = &mdio0;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               wifi {
+                       label = "wifi";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RFKILL>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds: leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               power_white: power_white {
+                       label = "white:power";
+                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+
+               power_amber: power_amber {
+                       label = "amber:power";
+                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_white {
+                       label = "white:wan";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_amber {
+                       label = "amber:wan";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               wifi {
+                       label = "white:wifi";
+                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
+               };
+
+               wps {
+                       label = "white:wps";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54", "gpio65";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8", "gpio9",
+                               "gpio22", "gpio23", "gpio24",
+                               "gpio26", "gpio53", "gpio64";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       mdio0_pins: mdio0-pins {
+               clk {
+                       pins = "gpio1";
+                       input-disable;
+               };
+       };
+
+       rgmii2_pins: rgmii2-pins {
+               tx {
+                       pins = "gpio27", "gpio28", "gpio29",
+                               "gpio30", "gpio31", "gpio32";
+                       input-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19", "gpio21";
+                       function = "gsbi5";
+                       bias-pull-down;
+               };
+
+               data {
+                       pins = "gpio18", "gpio19";
+                       drive-strength = <10>;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       drive-strength = <12>;
+               };
+       };
+
+       spi6_pins: spi6_pins {
+               mux {
+                       pins = "gpio55", "gpio56", "gpio58";
+                       function = "gsbi6";
+                       bias-pull-down;
+               };
+
+               mosi {
+                       pins = "gpio55";
+                       drive-strength = <12>;
+               };
+
+               miso {
+                       pins = "gpio56";
+                       drive-strength = <14>;
+               };
+
+               cs {
+                       pins = "gpio57";
+                       drive-strength = <12>;
+                       bias-pull-up;
+               };
+
+               clk {
+                       pins = "gpio58";
+                       drive-strength = <12>;
+               };
+
+               reset {
+                       pins = "gpio33";
+                       drive-strength = <10>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       usb0_pwr_en_pins: usb0_pwr_en_pins {
+               mux {
+                       pins = "gpio15";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       usb1_pwr_en_pins: usb1_pwr_en_pins {
+               mux {
+                       pins = "gpio16", "gpio68";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot-partitions = <0x0 0x1180000>;
+
+               partitions: partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "qcadata";
+                               reg = <0x0000000 0x0c80000>;
+                               read-only;
+                       };
+
+                       partition@c80000 {
+                               label = "APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       partition@1180000 {
+                               label = "APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                               read-only;
+                       };
+
+                       art: partition-art@1200000 {
+                               label = "art";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_art_0: macaddr@0 {
+                                       reg = <0x0 0x6>;
+                               };
+
+                               macaddr_art_6: macaddr@6 {
+                                       reg = <0x6 0x6>;
+                               };
+
+                               precal_art_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_art_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+
+                       partition@1340000 {
+                               label = "artbak";
+                               reg = <0x1340000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@1480000 {
+                               label = "kernel";
+                               reg = <0x1480000 0x0400000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0xaa545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       0x00970 0x1e864443  /* QM_PORT0_CTRL0 */
+                       0x00974 0x000001c6  /* QM_PORT0_CTRL1 */
+                       0x00978 0x19008643  /* QM_PORT1_CTRL0 */
+                       0x0097c 0x000001c6  /* QM_PORT1_CTRL1 */
+                       0x00980 0x19008643  /* QM_PORT2_CTRL0 */
+                       0x00984 0x000001c6  /* QM_PORT2_CTRL1 */
+                       0x00988 0x19008643  /* QM_PORT3_CTRL0 */
+                       0x0098c 0x000001c6  /* QM_PORT3_CTRL1 */
+                       0x00990 0x19008643  /* QM_PORT4_CTRL0 */
+                       0x00994 0x000001c6  /* QM_PORT4_CTRL1 */
+                       0x00998 0x1e864443  /* QM_PORT5_CTRL0 */
+                       0x0099c 0x000001c6  /* QM_PORT5_CTRL1 */
+                       0x009a0 0x1e864443  /* QM_PORT6_CTRL0 */
+                       0x009a4 0x000001c6  /* QM_PORT6_CTRL1 */
+                       >;
+               qca,ar8327-vlans = <
+                       0x1     0x5e        /* VLAN1 Ports 1/2/3/4/6 */
+                       0x2     0x21        /* VLAN2 Ports 0/5 */
+               >;
+       };
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+               qca,ar8327-initvals = <
+                       0x000e4 0x6a545     /* MAC_POWER_SEL */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       >;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+       qcom,phy_mdio_addr = <4>;
+       qcom,poll_required = <0>;
+       qcom,rgmii_delay = <1>;
+       qcom,phy_mii_type = <0>;
+       qcom,emulation = <0>;
+       qcom,irq = <255>;
+       mdiobus = <&mdio0>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       qcom,phy_mdio_addr = <0>;       /* none */
+       qcom,poll_required = <0>;       /* no polling */
+       qcom,rgmii_delay = <0>;
+       qcom,phy_mii_type = <1>;
+       qcom,emulation = <0>;
+       qcom,irq = <258>;
+       mdiobus = <&mdio0>;
+
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&sata_phy {
+       status = "okay";
+};
+
+&sata {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+
+       pinctrl-0 = <&usb0_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&usb3_1 {
+       status = "okay";
+
+       pinctrl-0 = <&usb1_pwr_en_pins>;
+       pinctrl-names = "default";
+};
+
+&pcie0 {
+       status = "okay";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi0: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi1: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
new file mode 100644 (file)
index 0000000..473bf74
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
@@ -0,0 +1,409 @@
+#include "qcom-ipq8065-nighthawk.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+       model = "Netgear Nighthawk X4S R7800";
+       compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
+};
+
+&leds {
+       usb1 {
+               label = "white:usb1";
+               gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+       };
+
+       usb2 {
+               label = "white:usb2";
+               gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+       };
+
+       esata {
+               label = "white:esata";
+               gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&partitions {
+       partition@1880000 {
+               label = "ubi";
+               reg = <0x1880000 0x6080000>;
+       };
+
+       partition@7900000 {
+               label = "reserve";
+               reg = <0x7900000 0x0700000>;
+               read-only;
+       };
+};
+
+&wifi0 {
+       nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
+       nvmem-cell-names = "mac-address", "pre-calibration";
+       mac-address-increment = <(1)>;
+};
+
+&wifi1 {
+       nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
+       nvmem-cell-names = "mac-address", "pre-calibration";
+       mac-address-increment = <(2)>;
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "rgmii-id";
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port1>;
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port2>;
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port3>;
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port4>;
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port5>;
+                       };
+
+                       // port@6 {
+                       //      reg = <6>;
+                       //      label = "cpu";
+                       //      ethernet = <&gmac2>;
+                       //      phy-mode = "sgmii";
+
+                       //      fixed-link {
+                       //              speed = <1000>;
+                       //              full-duplex;
+                       //      };
+                       // };
+               };
+
+               mdio {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       phy_port1: phy@0 {
+                               reg = <0>;
+
+                               leds {
+
+                                       lan1_led@0 {
+                                               reg = <0>;
+                                               color = <LED_COLOR_ID_WHITE>;
+                                               function = LED_FUNCTION_LAN;
+                                               function-enumerator = <1>;
+                                               linux,default-trigger = "offload-phy-activity";
+                                               linux,supported-offload-triggers = "rx-blink", "tx-blink", "ollision-blink",
+                                                                               "link-10M", "link-100M", "link-1000M",
+                                                                               "half-duplex", "full-duplex", "linkup-over",
+                                                                               "power-on-reset", "blink-2hz", "blink-4hz",
+                                                                               "blink-8hz", "blink-auto";
+                                       };
+
+                                       lan1_led@1 {
+                                               reg = <1>;
+                                               color = <LED_COLOR_ID_AMBER>;
+                                               function = LED_FUNCTION_LAN;
+                                               function-enumerator = <1>;
+                                               linux,default-trigger = "offload-phy-activity";
+                                               linux,supported-offload-triggers = "rx-blink", "tx-blink", "ollision-blink",
+                                                                               "link-10M", "link-100M", "link-1000M",
+                                                                               "half-duplex", "full-duplex", "linkup-over",
+                                                                               "power-on-reset", "blink-2hz", "blink-4hz",
+                                                                               "blink-8hz", "blink-auto";
+                                       };
+                               };
+                       };
+
+                       phy_port2: phy@1 {
+                               reg = <1>;
+
+                               leds {
+
+                                       lan1_led@0 {
+                                               reg = <0>;
+                                               color = <LED_COLOR_ID_WHITE>;
+                                               function = LED_FUNCTION_LAN;
+                                               function-enumerator = <2>;
+                                               linux,default-trigger = "offload-phy-activity";
+                                               linux,supported-offload-triggers = "rx-blink", "tx-blink", "ollision-blink",
+                                                                               "link-10M", "link-100M", "link-1000M",
+                                                                               "half-duplex", "full-duplex", "linkup-over",
+                                                                               "power-on-reset", "blink-2hz", "blink-4hz",
+                                                                               "blink-8hz", "blink-auto";
+                                       };
+
+                                       lan1_led@1 {
+                                               reg = <1>;
+                                               color = <LED_COLOR_ID_AMBER>;
+                                               function = LED_FUNCTION_LAN;
+                                               function-enumerator = <2>;
+                                               linux,default-trigger = "offload-phy-activity";
+                                               linux,supported-offload-triggers = "rx-blink", "tx-blink", "ollision-blink",
+                                                                               "link-10M", "link-100M", "link-1000M",
+                                                                               "half-duplex", "full-duplex", "linkup-over",
+                                                                               "power-on-reset", "blink-2hz", "blink-4hz",
+                                                                               "blink-8hz", "blink-auto";
+                                       };
+                               };
+                       };
+
+                       phy_port3: phy@2 {
+                               reg = <2>;
+
+                               leds {
+                                       lan1_led@0 {
+                                               reg = <0>;
+                                               color = <LED_COLOR_ID_WHITE>;
+                                               function = LED_FUNCTION_LAN;
+                                               function-enumerator = <3>;
+                                               linux,default-trigger = "offload-phy-activity";
+                                               linux,supported-offload-triggers = "rx-blink", "tx-blink", "ollision-blink",
+                                                                               "link-10M", "link-100M", "link-1000M",
+                                                                               "half-duplex", "full-duplex", "linkup-over",
+                                                                               "power-on-reset", "blink-2hz", "blink-4hz",
+                                                                               "blink-8hz", "blink-auto";
+                                       };
+
+                                       lan1_led@1 {
+                                               reg = <1>;
+                                               color = <LED_COLOR_ID_AMBER>;
+                                               function = LED_FUNCTION_LAN;
+                                               function-enumerator = <3>;
+                                               linux,default-trigger = "offload-phy-activity";
+                                               linux,supported-offload-triggers = "rx-blink", "tx-blink", "ollision-blink",
+                                                                               "link-10M", "link-100M", "link-1000M",
+                                                                               "half-duplex", "full-duplex", "linkup-over",
+                                                                               "power-on-reset", "blink-2hz", "blink-4hz",
+                                                                               "blink-8hz", "blink-auto";
+                                       };
+                               };
+                       };
+
+                       phy_port4: phy@3 {
+                               reg = <3>;
+
+                               leds {
+                                       lan1_led@0 {
+                                               reg = <0>;
+                                               color = <LED_COLOR_ID_WHITE>;
+                                               function = LED_FUNCTION_LAN;
+                                               function-enumerator = <4>;
+                                               linux,default-trigger = "offload-phy-activity";
+                                               linux,supported-offload-triggers = "rx-blink", "tx-blink", "ollision-blink",
+                                                                               "link-10M", "link-100M", "link-1000M",
+                                                                               "half-duplex", "full-duplex", "linkup-over",
+                                                                               "power-on-reset", "blink-2hz", "blink-4hz",
+                                                                               "blink-8hz", "blink-auto";
+                                       };
+
+                                       lan1_led@1 {
+                                               reg = <1>;
+                                               color = <LED_COLOR_ID_AMBER>;
+                                               function = LED_FUNCTION_LAN;
+                                               function-enumerator = <4>;
+                                               linux,default-trigger = "offload-phy-activity";
+                                               linux,supported-offload-triggers = "rx-blink", "tx-blink", "ollision-blink",
+                                                                               "link-10M", "link-100M", "link-1000M",
+                                                                               "half-duplex", "full-duplex", "linkup-over",
+                                                                               "power-on-reset", "blink-2hz", "blink-4hz",
+                                                                               "blink-8hz", "blink-auto";
+                                       };
+                               };
+                       };
+
+                       phy_port5: phy@4 {
+                               reg = <4>;
+                       };
+               };
+       };
+
+       // phy0: ethernet-phy@0 {
+       //      reg = <0>;
+       //      qca,ar8327-initvals = <
+       //              0x00004 0x7600000   /* PAD0_MODE */
+       //              0x00008 0x1000000   /* PAD5_MODE */
+       //              0x0000c 0x80        /* PAD6_MODE */
+       //              0x000e4 0xaa545     /* MAC_POWER_SEL */
+       //              0x000e0 0xc74164de  /* SGMII_CTRL */
+       //              0x0007c 0x4e        /* PORT0_STATUS */
+       //              0x00094 0x4e        /* PORT6_STATUS */
+       //              0x00970 0x1e864443  /* QM_PORT0_CTRL0 */
+       //              0x00974 0x000001c6  /* QM_PORT0_CTRL1 */
+       //              0x00978 0x19008643  /* QM_PORT1_CTRL0 */
+       //              0x0097c 0x000001c6  /* QM_PORT1_CTRL1 */
+       //              0x00980 0x19008643  /* QM_PORT2_CTRL0 */
+       //              0x00984 0x000001c6  /* QM_PORT2_CTRL1 */
+       //              0x00988 0x19008643  /* QM_PORT3_CTRL0 */
+       //              0x0098c 0x000001c6  /* QM_PORT3_CTRL1 */
+       //              0x00990 0x19008643  /* QM_PORT4_CTRL0 */
+       //              0x00994 0x000001c6  /* QM_PORT4_CTRL1 */
+       //              0x00998 0x1e864443  /* QM_PORT5_CTRL0 */
+       //              0x0099c 0x000001c6  /* QM_PORT5_CTRL1 */
+       //              0x009a0 0x1e864443  /* QM_PORT6_CTRL0 */
+       //              0x009a4 0x000001c6  /* QM_PORT6_CTRL1 */
+       //              >;
+       //      qca,ar8327-vlans = <
+       //              0x1     0x5e        /* VLAN1 Ports 1/2/3/4/6 */
+       //              0x2     0x21        /* VLAN2 Ports 0/5 */
+       //      >;
+       // };
+
+       // phy4: ethernet-phy@4 {
+       //      reg = <4>;
+       //      qca,ar8327-initvals = <
+       //              0x000e4 0x6a545     /* MAC_POWER_SEL */
+       //              0x0000c 0x80        /* PAD6_MODE */
+       //              >;
+       // };
+};
+
+// &gmac1 {
+//     status = "okay";
+//     compatible = "qcom,nss-gmac";
+//     reg = <0x37200000 0x200000>;
+//     interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+//     phy-mode = "rgmii";
+//     qcom,id = <1>;
+//     qcom,pcs-chanid = <0>;
+//     qcom,phy-mdio-addr = <4>;
+//     qcom,poll-required = <0>;
+//     qcom,rgmii-delay = <1>;
+//     qcom,phy_mii_type = <0>;
+//     qcom,emulation = <0>;
+//     qcom,forced-speed = <1000>;
+//     qcom,forced-duplex = <1>;
+//     qcom,socver = <0>;
+//     qcom,irq = <255>;
+//     mdiobus = <&mdio0>;
+
+//     pinctrl-0 = <&rgmii2_pins>;
+//     pinctrl-names = "default";
+
+//     nvmem-cells = <&macaddr_art_6>;
+//     nvmem-cell-names = "mac-address";
+
+//     fixed-link {
+//             speed = <1000>;
+//             full-duplex;
+//     };
+// };
+
+// &gmac2 {
+//     status = "okay";
+//     compatible = "qcom,nss-gmac";
+//     reg = <0x37400000 0x200000>;
+//     interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+//     phy-mode = "sgmii";
+//     qcom,id = <2>;
+//     qcom,pcs-chanid = <1>;
+//     qcom,phy-mdio-addr = <0>;       /* none */
+//     qcom,poll-required = <0>;       /* no polling */
+//     qcom,rgmii-delay = <0>;
+//     qcom,phy_mii_type = <1>;
+//     qcom,emulation = <0>;
+//     qcom,forced-speed = <1000>;
+//     qcom,forced-duplex = <1>;
+//     qcom,socver = <0>;
+//     qcom,irq = <258>;
+//     mdiobus = <&mdio0>;
+
+//     nvmem-cells = <&macaddr_art_0>;
+//     nvmem-cell-names = "mac-address";
+
+//     fixed-link {
+//             speed = <1000>;
+//             full-duplex;
+//     };
+// };
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+       qcom,phy_mdio_addr = <4>;
+       qcom,poll_required = <0>;
+       qcom,rgmii_delay = <1>;
+       qcom,phy_mii_type = <0>;
+       qcom,emulation = <0>;
+       qcom,irq = <255>;
+       mdiobus = <&mdio0>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       nvmem-cells = <&macaddr_art_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+       qcom,phy_mdio_addr = <0>;       /* none */
+       qcom,poll_required = <0>;       /* no polling */
+       qcom,rgmii_delay = <0>;
+       qcom,phy_mii_type = <1>;
+       qcom,emulation = <0>;
+       qcom,irq = <258>;
+       mdiobus = <&mdio0>;
+
+       nvmem-cells = <&macaddr_art_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
\ No newline at end of file

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
new file mode 100644 (file)
index 0000000..51ef2c3
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
@@ -0,0 +1,400 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "qcom-ipq8065-smb208.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Askey RT4230W REV6";
+       compatible = "askey,rt4230w-rev6", "qcom,ipq8065", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x3e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               led-boot = &ledctrl3;
+               led-failsafe = &ledctrl1;
+               led-running = &ledctrl2;
+               led-upgrade = &ledctrl3;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               ledctrl1: ledctrl1 {
+                       label = "ledctrl1";
+                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
+               };
+
+               ledctrl2: ledctrl2 {
+                       label = "ledctrl2";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               ledctrl3: ledctrl3 {
+                       label = "ledctrl3";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio54", "gpio68";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio22", "gpio23", "gpio24";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       rgmii2_pins: rgmii2-pins {
+               mux {
+                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31",
+                               "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62";
+                       function = "rgmii2";
+                       drive-strength = <8>;
+                       bias-disable;
+               };
+
+               tx {
+                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
+                       input-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <12>;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "everspin,mr25h256";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <40000000>;
+                       reg = <0>;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "0:SBL1";
+                               reg = <0x0000000 0x0040000>;
+                               read-only;
+                       };
+
+                       partition@40000 {
+                               label = "0:MIBIB";
+                               reg = <0x0040000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "0:SBL2";
+                               reg = <0x0180000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@2c0000 {
+                               label = "0:SBL3";
+                               reg = <0x02c0000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@540000 {
+                               label = "0:DDRCONFIG";
+                               reg = <0x0540000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@660000 {
+                               label = "0:SSD";
+                               reg = <0x0660000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@780000 {
+                               label = "0:TZ";
+                               reg = <0x0780000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@a00000 {
+                               label = "0:RPM";
+                               reg = <0x0a00000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@c80000 {
+                               label = "0:APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+
+                       partition@1180000 {
+                               label = "0:APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                       };
+
+                       partition@1200000 {
+                               label = "0:ART";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_ART_0: macaddr@0 {
+                                       reg = <0x0 0x6>;
+                               };
+
+                               macaddr_ART_6: macaddr@6 {
+                                       reg = <0x6 0x6>;
+                               };
+
+                               precal_ART_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+
+                               precal_ART_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+
+                       partition@1340000 {
+                               label = "0:BOOTCONFIG";
+                               reg = <0x1340000 0x0060000>;
+                               read-only;
+                       };
+
+                       partition@13a0000 {
+                               label = "0:SBL2_1";
+                               reg = <0x13a0000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@14e0000 {
+                               label = "0:SBL3_1";
+                               reg = <0x14e0000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@1760000 {
+                               label = "0:DDRCONFIG_1";
+                               reg = <0x1760000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@1880000 {
+                               label = "0:SSD_1";
+                               reg = <0x1880000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@19a0000 {
+                               label = "0:TZ_1";
+                               reg = <0x19a0000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@1c20000 {
+                               label = "0:RPM_1";
+                               reg = <0x1c20000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@1ea0000 {
+                               label = "0:BOOTCONFIG1";
+                               reg = <0x1ea0000 0x0060000>;
+                               read-only;
+                       };
+
+                       partition@1f00000 {
+                               label = "0:APPSBL_1";
+                               reg = <0x1f00000 0x0500000>;
+                               read-only;
+                       };
+
+                       partition@2400000 {
+                               label = "ubi";
+                               reg = <0x2400000 0x1a000000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0x0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0xaa545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       0x00050 0xcf02cf02  /* LED_CTRL_0 */
+                       0x00054 0xc832c832  /* LED_CTRL_1 */
+                       >;
+       };
+};
+
+&gmac0 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <0>;
+
+       nvmem-cells = <&macaddr_ART_0>;
+       nvmem-cell-names = "mac-address";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <1>;
+
+       nvmem-cells = <&macaddr_ART_6>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi0: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_ART_1000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi1: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_ART_5000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts
new file mode 100644 (file)
index 0000000..9244639
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts
@@ -0,0 +1,422 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "qcom-ipq8065-smb208.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Arris TR4400 v2";
+       compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064";
+
+       memory@0 {
+               reg = <0x42000000 0x1e000000>;
+               device_type = "memory";
+       };
+
+       aliases {
+               led-boot = &led_status_blue;
+               led-failsafe = &led_status_red;
+               led-running = &led_status_blue;
+               led-upgrade = &led_status_red;
+       };
+
+       chosen {
+               bootargs = "rootfstype=squashfs noinitrd";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+
+               wps {
+                       label = "wps";
+                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_WPS_BUTTON>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_status_red: status_red {
+                       label = "red:status";
+                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_status_blue: status_blue {
+                       label = "blue:status";
+                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio6", "gpio54";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio7", "gpio8";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+               };
+       };
+
+       rgmii2_pins: rgmii2-pins {
+               tx {
+                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
+                       input-disable;
+               };
+       };
+
+       spi_pins: spi_pins {
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <12>;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "everspin,mr25h256";
+                       spi-max-frequency = <40000000>;
+                       reg = <0>;
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "0:SBL1";
+                               reg = <0x0000000 0x0040000>;
+                               read-only;
+                       };
+                       partition@40000 {
+                               label = "0:MIBIB";
+                               reg = <0x0040000 0x0140000>;
+                               read-only;
+                       };
+                       partition@180000 {
+                               label = "0:SBL2";
+                               reg = <0x0180000 0x0140000>;
+                               read-only;
+                       };
+                       partition@2c0000 {
+                               label = "0:SBL3";
+                               reg = <0x02c0000 0x0280000>;
+                               read-only;
+                       };
+                       partition@540000 {
+                               label = "0:DDRCONFIG";
+                               reg = <0x0540000 0x0120000>;
+                               read-only;
+                       };
+                       partition@660000 {
+                               label = "0:SSD";
+                               reg = <0x0660000 0x0120000>;
+                               read-only;
+                       };
+                       partition@780000 {
+                               label = "0:TZ";
+                               reg = <0x0780000 0x0280000>;
+                               read-only;
+                       };
+                       partition@a00000 {
+                               label = "0:RPM";
+                               reg = <0x0a00000 0x0280000>;
+                               read-only;
+                       };
+                       partition@c80000 {
+                               label = "0:APPSBL";
+                               reg = <0x0c80000 0x0500000>;
+                               read-only;
+                       };
+                       partition@1180000 {
+                               label = "0:APPSBLENV";
+                               reg = <0x1180000 0x0080000>;
+                       };
+                       partition@1200000 {
+                               label = "0:ART";
+                               reg = <0x1200000 0x0140000>;
+                               read-only;
+
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               precal_ART_1000: precal@1000 {
+                                       reg = <0x1000 0x2f20>;
+                               };
+                               precal_ART_5000: precal@5000 {
+                                       reg = <0x5000 0x2f20>;
+                               };
+                       };
+                       stock_partition@1340000 {
+                               label = "stock_rootfs";
+                               reg = <0x1340000 0x4000000>;
+                       };
+                       partition@5340000 {
+                               label = "0:BOOTCONFIG";
+                               reg = <0x5340000 0x0060000>;
+                               read-only;
+                       };
+                       partition@53a0000 {
+                               label = "0:SBL2_1";
+                               reg = <0x53a0000 0x0140000>;
+                               read-only;
+                       };
+                       partition@54e0000 {
+                               label = "0:SBL3_1";
+                               reg = <0x54e0000 0x0280000>;
+                               read-only;
+                       };
+                       partition@5760000 {
+                               label = "0:DDRCONFIG_1";
+                               reg = <0x5760000 0x0120000>;
+                               read-only;
+                       };
+                       partition@5880000 {
+                               label = "0:SSD_1";
+                               reg = <0x5880000 0x0120000>;
+                               read-only;
+                       };
+                       partition@59a0000 {
+                               label = "0:TZ_1";
+                               reg = <0x59a0000 0x0280000>;
+                               read-only;
+                       };
+                       partition@5c20000 {
+                               label = "0:RPM_1";
+                               reg = <0x5c20000 0x0280000>;
+                               read-only;
+                       };
+                       partition@5ea0000 {
+                               label = "0:BOOTCONFIG1";
+                               reg = <0x5ea0000 0x0060000>;
+                               read-only;
+                       };
+                       partition@5f00000 {
+                               label = "0:APPSBL_1";
+                               reg = <0x5f00000 0x0500000>;
+                               read-only;
+                       };
+                       stock_partition@6400000 {
+                               label = "stock_rootfs_1";
+                               reg = <0x6400000 0x4000000>;
+                       };
+                       stock_partition@a400000 {
+                               label = "stock_fw_env";
+                               reg = <0xa400000 0x0100000>;
+                       };
+                       stock_partition@a500000 {
+                               label = "stock_config";
+                               reg = <0xa500000 0x0800000>;
+                       };
+                       stock_partition@ad00000 {
+                               label = "stock_PKI";
+                               reg = <0xad00000 0x0200000>;
+                       };
+                       stock_partition@af00000 {
+                               label = "stock_scfgmgr";
+                               reg = <0xaf00000 0x0100000>;
+                       };
+
+                       partition@6400000 {
+                               label = "fw_env";
+                               reg = <0x6400000 0x0100000>;
+
+                               compatible = "nvmem-cells";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               macaddr_fw_env_0: macaddr@0 {
+                                       reg = <0x00 0x6>;
+                               };
+                               macaddr_fw_env_6: macaddr@6 {
+                                       reg = <0x06 0x6>;
+                               };
+                               macaddr_fw_env_c: macaddr@c {
+                                       reg = <0x0c 0x6>;
+                               };
+                               macaddr_fw_env_12: macaddr@12 {
+                                       reg = <0x12 0x6>;
+                               };
+                               macaddr_fw_env_18: macaddr@18 {
+                                       reg = <0x18 0x6>;
+                               };
+                       };
+                       partition@6500000 {
+                               label = "ubi";
+                               reg = <0x6500000 0x9b00000>;
+                       };
+                       partition@1340000 {
+                               label = "extra";
+                               reg = <0x1340000 0x4000000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       ethernet-phy@0 {
+               reg = <0x0>;
+               qca,ar8327-initvals = <
+                       0x00004 0x7600000   /* PAD0_MODE */
+                       0x00008 0x1000000   /* PAD5_MODE */
+                       0x0000c 0x80        /* PAD6_MODE */
+                       0x000e4 0xaa545     /* MAC_POWER_SEL */
+                       0x000e0 0xc74164de  /* SGMII_CTRL */
+                       0x0007c 0x4e        /* PORT0_STATUS */
+                       0x00094 0x4e        /* PORT6_STATUS */
+                       >;
+       };
+
+       phy7: ethernet-phy@7 {
+               reg = <7>;
+       };
+};
+
+&gmac0 {
+       status = "okay";
+       phy-mode = "rgmii";
+       qcom,id = <0>;
+
+       nvmem-cells = <&macaddr_fw_env_18>;
+       nvmem-cell-names = "mac-address";
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac1 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <1>;
+
+       nvmem-cells = <&macaddr_fw_env_0>;
+       nvmem-cell-names = "mac-address";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac3 {
+       status = "okay";
+       phy-mode = "sgmii";
+       qcom,id = <3>;
+       phy-handle = <&phy7>;
+
+       nvmem-cells = <&macaddr_fw_env_6>;
+       nvmem-cell-names = "mac-address";
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie0_pins>;
+       pinctrl-names = "default";
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi0: wifi@1,0 {
+                       compatible = "pci168c,0046";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
+                       nvmem-cell-names = "pre-calibration", "mac-address";
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
+       pinctrl-0 = <&pcie1_pins>;
+       pinctrl-names = "default";
+       max-link-speed = <1>;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi1: wifi@1,0 {
+                       compatible = "pci168c,0040";
+                       reg = <0x00010000 0 0 0 0>;
+
+                       nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
+                       nvmem-cell-names = "pre-calibration", "mac-address";
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-xr500.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-xr500.dts
new file mode 100644 (file)
index 0000000..f584735
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8065-xr500.dts
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8065-nighthawk.dtsi"
+
+/ {
+       model = "Netgear Nighthawk XR500";
+       compatible = "netgear,xr500", "qcom,ipq8065", "qcom,ipq8064";
+
+};
+
+&leds {
+       usb1 {
+               label = "white:usb1";
+               gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
+       };
+
+       usb2 {
+               label = "white:usb2";
+               gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&partitions {
+       partition@1880000 {
+               label = "ubi";
+               reg = <0x1880000 0xce00000>;
+       };
+
+       partition@e680000 {
+               label = "reserve";
+               reg = <0xe680000 0x0780000>;
+               read-only;
+       };
+};
+
+&wifi0 {
+       nvmem-cells = <&macaddr_art_c>, <&precal_art_1000>;
+       nvmem-cell-names = "mac-address", "pre-calibration";
+};
+
+&wifi1 {
+       nvmem-cells = <&macaddr_art_0>, <&precal_art_5000>;
+       nvmem-cell-names = "mac-address", "pre-calibration";
+};
+
+&art {
+       macaddr_art_c: macaddr@c {
+               reg = <0xc 0x6>;
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi
new file mode 100644 (file)
index 0000000..93b9aa8
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+/ {
+       memory {
+               device_type = "memory";
+               linux,usable-memory = <0x41500000 0x1ea00000>;
+               reg = <0x40000000 0x20000000>;
+       };
+
+       cpus {
+               idle-states {
+                       CPU_SPC: spc {
+                               status = "disabled";
+                       };
+               };
+       };
+
+       chosen {
+               bootargs-append = " console=ttyMSM0,115200n8 ubi.mtd=ubi ubi.mtd=art";
+       };
+};
+
+&qcom_pinmux {
+       mdio0_pins_active: mdio0_pins_active {
+               mux {
+                       pins = "gpio0", "gpio1";
+                       function = "mdio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+                       output-low;
+               };
+
+               clk {
+                       pins = "gpio1";
+                       input-disable;
+               };
+       };
+
+       phy_active: phy_active {
+               phy {
+                       pins = "gpio6", "gpio7";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-down;
+                       output-high;
+               };
+       };
+
+       uart1_pins: uart1_pins {
+               mux {
+                       pins = "gpio51", "gpio52";
+                       function = "gsbi1";
+                       drive-strength = <4>;
+                       bias-disable;
+               };
+       };
+};
+
+&gsbi1 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_UART_W_FC>;
+
+       serial@12450000 {
+               status = "okay";
+
+               pinctrl-0 = <&uart1_pins>;
+               pinctrl-names = "default";
+       };
+};
+
+&pcie0 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x0 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi0: wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x10000 0 0 0 0>;
+               };
+       };
+};
+
+&pcie1 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x0 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi1: wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x10000 0 0 0 0>;
+               };
+       };
+};
+
+&pcie2 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x0 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi2: wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x10000 0 0 0 0>;
+               };
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               compatible = "qcom,nandcs";
+
+               reg = <0>;
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot_pages_size = <0x2140000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "sbl1";
+                               reg = <0x0 0x40000>;
+                               read-only;
+                       };
+
+                       partition@40000 {
+                               label = "mibib";
+                               reg = <0x40000 0x140000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "sbl2";
+                               reg = <0x180000 0x140000>;
+                               read-only;
+                       };
+
+                       partition@2c0000 {
+                               label = "sbl3";
+                               reg = <0x2c0000 0x280000>;
+                               read-only;
+                       };
+
+                       partition@540000 {
+                               label = "ddrconfig";
+                               reg = <0x540000 0x120000>;
+                               read-only;
+                       };
+
+                       partition@660000 {
+                               label = "ssd";
+                               reg = <0x660000 0x120000>;
+                               read-only;
+                       };
+
+                       partition@780000 {
+                               label = "tz";
+                               reg = <0x780000 0x280000>;
+                               read-only;
+                       };
+
+                       partition@a00000 {
+                               label = "rpm";
+                               reg = <0xa00000 0x280000>;
+                               read-only;
+                       };
+
+                       partition@1fc0000 {
+                               label = "u-boot";
+                               reg = <0x1fc0000 0x180000>;
+                               read-only;
+                       };
+
+                       partition@21c0000 {
+                               label = "bootkernel1";
+                               reg = <0x21c0000 0xa80000>;
+                       };
+
+                       partition@2c40000 {
+                               label = "bootkernel2";
+                               reg = <0x2c40000 0xa80000>;
+                       };
+
+                       partition@36c0000 {
+                               label = "ubi";
+                               reg = <0x36c0000 0x46c0000>;
+                       };
+
+                       partition@7d80000 {
+                               label = "art";
+                               reg = <0x7d80000 0x200000>;
+                               read-only;
+                       };
+               };
+       };
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
new file mode 100644 (file)
index 0000000..1fee257
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
@@ -0,0 +1,349 @@
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+       model = "Edgecore ECW5410";
+       compatible = "edgecore,ecw5410", "qcom,ipq8064";
+
+       reserved-memory {
+               nss@40000000 {
+                       reg = <0x40000000 0x1000000>;
+                       no-map;
+               };
+
+               smem@41000000 {
+                       reg = <0x41000000 0x200000>;
+                       no-map;
+               };
+
+               wifi_dump@44000000 {
+                       reg = <0x44000000 0x600000>;
+                       no-map;
+               };
+       };
+
+       cpus {
+               idle-states {
+                       CPU_SPC: spc {
+                               status = "disabled";
+                       };
+               };
+       };
+
+       aliases {
+               serial1 = &gsbi1_serial;
+               ethernet0 = &gmac2;
+               ethernet1 = &gmac3;
+
+               led-boot = &led_power_green;
+               led-failsafe = &led_power_red;
+               led-running = &led_power_green;
+               led-upgrade = &led_power_green;
+       };
+
+       chosen {
+               bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1";
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_power_green: power_green {
+                       label = "green:power";
+                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
+               };
+
+               wlan2g_green {
+                       label = "green:wlan2g";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
+               };
+
+               wlan2g_yellow {
+                       label = "yellow:wlan2g";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
+               };
+
+               wlan5g_green {
+                       label = "green:wlan5g";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               led_power_red: power_red {
+                       label = "red:power";
+                       gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
+               };
+
+               wlan5g_yellow {
+                       label = "yellow:wlan5g";
+                       gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+
+&qcom_pinmux {
+       spi_pins: spi_pins {
+               mux {
+                       pins = "gpio18", "gpio19";
+                       function = "gsbi5";
+                       drive-strength = <10>;
+                       bias-pull-down;
+               };
+
+               clk {
+                       pins = "gpio21";
+                       function = "gsbi5";
+                       drive-strength = <12>;
+                       bias-pull-down;
+               };
+
+               cs {
+                       pins = "gpio20";
+                       function = "gpio";
+                       drive-strength = <10>;
+                       bias-pull-up;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio16", "gpio23", "gpio24", "gpio26",
+                                  "gpio28", "gpio59";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio25";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       uart1_pins: uart1_pins {
+               mux {
+                       pins = "gpio51", "gpio52", "gpio53", "gpio54";
+                       function = "gsbi1";
+                       drive-strength = <12>;
+                       bias-none;
+               };
+       };
+};
+
+&gsbi1 {
+       qcom,mode = <GSBI_PROT_UART_W_FC>;
+       status = "okay";
+
+       serial@12450000 {
+               status = "okay";
+
+               pinctrl-0 = <&uart1_pins>;
+               pinctrl-names = "default";
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi4: spi@1a280000 {
+               status = "okay";
+               spi-max-frequency = <50000000>;
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               m25p80@0 {
+                       compatible = "jedec,spi-nor";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+
+                       partitions {
+                               compatible = "qcom,smem-part";
+
+                               partition-art {
+                                       label = "0:art";
+                                       read-only;
+                                       compatible = "nvmem-cells";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       precal_art_1000: precal@1000 {
+                                               reg = <0x1000 0x2f20>;
+                                       };
+
+                                       precal_art_5000: precal@5000 {
+                                               reg = <0x5000 0x2f20>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
+
+&hs_phy_0 {            /* USB3 port 0 HS phy */
+       status = "okay";
+};
+
+&hs_phy_1 {            /* USB3 port 1 HS phy */
+       status = "okay";
+};
+
+&ss_phy_0 {            /* USB3 port 0 SS phy */
+       status = "okay";
+};
+
+&ss_phy_1 {            /* USB3 port 1 SS phy */
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x00010000 0 0 0 0>;
+                       qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
+                       nvmem-cells = <&precal_art_1000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&pcie2 {
+       status = "okay";
+
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpios;
+
+       bridge@0,0 {
+               reg = <0x00000000 0 0 0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               ranges;
+
+               wifi@1,0 {
+                       compatible = "qcom,ath10k";
+                       status = "okay";
+                       reg = <0x00010000 0 0 0 0>;
+                       qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
+                       nvmem-cells = <&precal_art_5000>;
+                       nvmem-cell-names = "pre-calibration";
+               };
+       };
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               compatible = "qcom,nandcs";
+
+               reg = <0>;
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       rootfs1@0 {
+                               label = "rootfs1";
+                               reg = <0x0000000 0x4000000>;
+                       };
+
+                       rootfs2@4000000 {
+                               label = "rootfs2";
+                               reg = <0x4000000 0x4000000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+       };
+
+       phy1: ethernet-phy@1 {
+               reg = <1>;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       qcom,id = <2>;
+       mdiobus = <&mdio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy1>;
+};
+
+&gmac3 {
+       status = "okay";
+
+       qcom,id = <3>;
+       mdiobus = <&mdio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy0>;
+};
+
+&adm_dma {
+       status = "okay";
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-mr42.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-mr42.dts
new file mode 100644 (file)
index 0000000..ccf2554
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-mr42.dts
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+
+#include "qcom-ipq8068-cryptid-common.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Meraki MR42";
+       compatible = "meraki,mr42", "qcom,ipq8064";
+
+       aliases {
+               serial1 = &gsbi1_serial;
+               ethernet0 = &gmac3;
+
+               led-boot = &led_active;
+               led-failsafe = &led_power;
+               led-running = &led_active;
+               led-upgrade = &led_active;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_power: power {
+                       label = "orange:power";
+                       gpios = <&qcom_pinmux 31 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_active: active {
+                       label = "white:active";
+                       gpios = <&qcom_pinmux 32 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&gmac3 {
+       status = "okay";
+
+       qcom,id = <3>;
+       mdiobus = <&mdio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy2>;
+
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+};
+
+&gsbi2 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_I2C>;
+};
+
+&gsbi2_i2c {
+       status = "okay";
+
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+
+       ina2xx@40 {
+               compatible = "ina219";
+               shunt-resistor = <40000>;
+               reg = <0x40>;
+       };
+
+       eeprom@56 {
+               compatible = "atmel,24c64";
+               pagesize = <32>;
+               reg = <0x56>;
+               read-only;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               mac_address: mac-address@66 {
+                       reg = <0x66 0x6>;
+               };
+       };
+};
+
+&gsbi6 {
+       qcom,mode = <GSBI_PROT_I2C>;
+       status = "okay";
+};
+
+&gsbi6_i2c {
+       status = "okay";
+
+       pinctrl-0 = <&i2c1_pins>;
+       pinctrl-names = "default";
+
+       tlc591xx@40 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "ti,tlc59108";
+               reg = <0x40>;
+
+               red@0 {
+                       label = "red:user";
+                       reg = <0x0>;
+               };
+
+               green@1 {
+                       label = "green:user";
+                       reg = <0x1>;
+               };
+
+               blue@2 {
+                       label = "blue:user";
+                       reg = <0x2>;
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins_active>, <&phy_active>;
+       pinctrl-names = "default";
+
+       phy2: ethernet-phy2 {
+               reg = <2>;
+
+               reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+               reset-assert-us = <24000>;
+
+               eee-broken-100tx;
+               eee-broken-1000t;
+       };
+};
+
+&qcom_pinmux {
+       i2c0_pins: i2c0_pins {
+               mux {
+                       pins = "gpio24", "gpio25";
+                       function = "gsbi2";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       input;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio26";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+               };
+       };
+
+       i2c1_pins: i2c1_pins {
+               mux {
+                       pins = "gpio29", "gpio30";
+                       function = "gsbi6";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       input;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio31", "gpio32";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-low;
+               };
+       };
+};
+
+&wifi0 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <1>;
+};
+
+&wifi1 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <2>;
+};
+
+&wifi2 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <3>;
+};

diff --git a/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-mr52.dts b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-mr52.dts
new file mode 100644 (file)
index 0000000..e1c2332
--- /dev/null
+++ b/target/linux/ipq806x/files-6.0/arch/arm/boot/dts/qcom-ipq8068-mr52.dts
@@ -0,0 +1,230 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+
+#include "qcom-ipq8068-cryptid-common.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Meraki MR52";
+       compatible = "meraki,mr52", "qcom,ipq8064";
+
+       aliases {
+               serial1 = &gsbi1_serial;
+               mdio-gpio0 = &mdio_gpio0;
+               ethernet0 = &gmac2;
+               ethernet1 = &gmac3;
+
+               led-boot = &led_active;
+               led-failsafe = &led_power;
+               led-running = &led_active;
+               led-upgrade = &led_active;
+       };
+
+       keys {
+               compatible = "gpio-keys";
+               pinctrl-0 = <&button_pins>;
+               pinctrl-names = "default";
+
+               reset {
+                       label = "reset";
+                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_RESTART>;
+                       debounce-interval = <60>;
+                       wakeup-source;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-0 = <&led_pins>;
+               pinctrl-names = "default";
+
+               led_power: power {
+                       label = "orange:power";
+                       gpios = <&qcom_pinmux 19 GPIO_ACTIVE_HIGH>;
+               };
+
+               lan2_green {
+                       label = "green:lan2";
+                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
+               };
+
+               lan1_green {
+                       label = "green:lan1";
+                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
+               };
+
+               led_active: active {
+                       label = "white:active";
+                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
+               };
+
+               lan2_orange {
+                       label = "orange:lan2";
+                       gpios = <&qcom_pinmux 60 GPIO_ACTIVE_HIGH>;
+               };
+
+               lan1_orange {
+                       label = "orange:lan1";
+                       gpios = <&qcom_pinmux 62 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       qcom,id = <2>;
+       mdiobus = <&mdio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy0>;
+
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+};
+
+&gmac3 {
+       status = "okay";
+
+       qcom,id = <3>;
+       mdiobus = <&mdio_gpio0>;
+
+       phy-mode = "sgmii";
+       phy-handle = <&phy4>;
+
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <1>;
+};
+
+&gsbi7 {
+       status = "okay";
+       qcom,mode = <GSBI_PROT_I2C>;
+};
+
+&gsbi7_i2c {
+       status = "okay";
+
+       pinctrl-0 = <&i2c_pins>;
+       pinctrl-names = "default";
+
+       ina2xx@45 {
+               compatible = "ina219";
+               shunt-resistor = <80000>;
+               reg = <0x45>;
+       };
+
+       tlc591xx@49 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "ti,tlc59108";
+               reg = <0x49>;
+
+               red@0 {
+                       label = "red:user";
+                       reg = <0x0>;
+               };
+
+               green@1 {
+                       label = "green:user";
+                       reg = <0x1>;
+               };
+
+               blue@2 {
+                       label = "blue:user";
+                       reg = <0x2>;
+               };
+       };
+
+       eeprom@52 {
+               compatible = "atmel,24c64";
+               pagesize = <32>;
+               reg = <0x52>;
+               read-only;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               mac_address: mac-address@66 {
+                       reg = <0x66 0x6>;
+               };
+       };
+};
+
+&qcom_pinmux {
+       i2c_pins: i2c_pins {
+               mux {
+                       pins = "gpio8", "gpio9";
+                       function = "gsbi7";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       input;
+               };
+       };
+
+       led_pins: led_pins {
+               mux {
+                       pins = "gpio19", "gpio26";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-down;
+                       output-low;
+               };
+       };
+
+       button_pins: button_pins {
+               mux {
+                       pins = "gpio25";
+                       function = "gpio";
+                       drive-strength = <2>;
+                       bias-pull-up;
+                       input;
+               };
+       };
+};
+
+&soc {
+       mdio_gpio0: mdio {
+               compatible = "virtual,mdio-gpio";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               status = "okay";
+
+               pinctrl-0 = <&mdio0_pins_active>, <&phy_active>;
+               pinctrl-names = "default";
+
+               gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH
+                        &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+
+               phy0: ethernet-phy0 {
+                       reg = <0>;
+                       reset-gpios = <&qcom_pinmux 7 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <24000>;
+               };
+
+               phy4: ethernet-phy4 {
+                       reg = <4>;
+                       reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <24000>;
+               };
+       };
+};
+
+&wifi0 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <4>;
+};
+
+&wifi1 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <3>;
+};
+
+&wifi2 {
+       nvmem-cells = <&mac_address>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <2>;
+};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
deleted file mode 100644 (file)
index c1c2185..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
+++ /dev/null
@@ -1,479 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-
-#include "qcom-ipq8062.dtsi"
-#include <dt-bindings/input/input.h>
-
-/delete-node/ &nand_pins;
-
-/ {
-       model = "NEC Platforms Aterm WG2600HP3";
-       compatible = "nec,wg2600hp3", "qcom,ipq8062", "qcom,ipq8064";
-
-       memory {
-               device_type = "memory";
-               reg =  <0x42000000 0x1e000000>;
-       };
-
-       aliases {
-               label-mac-device = &gmac2;
-
-               led-boot = &led_power_green;
-               led-failsafe = &led_power_red;
-               led-running = &led_power_green;
-               led-upgrade = &led_power_red;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-
-               pinctrl-0 = <&buttons_pins>;
-               pinctrl-names = "default";
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               mode0 {
-                       label = "mode0";
-                       gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>;
-                       linux,code = <BTN_0>;
-                       linux,input-type = <EV_SW>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               mode1 {
-                       label = "mode1";
-                       gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>;
-                       linux,code = <BTN_1>;
-                       linux,input-type = <EV_SW>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-
-               pinctrl-0 = <&leds_pins>;
-               pinctrl-names = "default";
-
-               led_power_green: power_green {
-                       label = "green:power";
-                       gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_power_red: power_red {
-                       label = "red:power";
-                       gpios = <&qcom_pinmux 35 GPIO_ACTIVE_HIGH>;
-               };
-
-               active_green {
-                       label = "green:active";
-                       gpios = <&qcom_pinmux 42 GPIO_ACTIVE_HIGH>;
-               };
-
-               active_red {
-                       label = "red:active";
-                       gpios = <&qcom_pinmux 38 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan2g_green {
-                       label = "green:wlan2g";
-                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
-                       linux,default-trigger = "phy1tpt";
-               };
-
-               wlan2g_red {
-                       label = "red:wlan2g";
-                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan5g_green {
-                       label = "green:wlan5g";
-                       gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
-                       linux,default-trigger = "phy0tpt";
-               };
-
-               wlan5g_red {
-                       label = "red:wlan5g";
-                       gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
-               };
-
-               tv_green {
-                       label = "green:tv";
-                       gpios = <&qcom_pinmux 46 GPIO_ACTIVE_HIGH>;
-               };
-
-               tv_red {
-                       label = "red:tv";
-                       gpios = <&qcom_pinmux 36 GPIO_ACTIVE_HIGH>;
-               };
-
-               converter_green {
-                       label = "green:converter";
-                       gpios = <&qcom_pinmux 43 GPIO_ACTIVE_HIGH>;
-               };
-
-               converter_red {
-                       label = "red:converter";
-                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       pinctrl-0 = <&akro_pins>;
-       pinctrl-names = "default";
-
-       spi_pins: spi_pins {
-               mux {
-                       pins = "gpio18", "gpio19", "gpio21";
-                       function = "gsbi5";
-                       bias-pull-down;
-               };
-
-               data {
-                       pins = "gpio18", "gpio19";
-                       drive-strength = <10>;
-               };
-
-               cs {
-                       pins = "gpio20";
-                       drive-strength = <10>;
-               };
-
-               clk {
-                       pins = "gpio21";
-                       drive-strength = <12>;
-               };
-       };
-
-       buttons_pins: buttons_pins {
-               mux {
-                       pins = "gpio22", "gpio24", "gpio40",
-                               "gpio41";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       leds_pins: leds_pins {
-               mux {
-                       pins = "gpio14", "gpio15", "gpio35",
-                               "gpio36", "gpio38", "gpio42",
-                               "gpio43", "gpio46", "gpio55",
-                               "gpio56", "gpio57", "gpio58";
-                       function = "gpio";
-                       bias-pull-down;
-               };
-
-               akro2 {
-                       pins = "gpio15", "gpio35", "gpio38",
-                               "gpio42", "gpio43", "gpio46",
-                               "gpio55", "gpio56", "gpio57",
-                               "gpio58";
-                       drive-strength = <2>;
-               };
-
-               akro4 {
-                       pins = "gpio14", "gpio36";
-                       drive-strength = <4>;
-               };
-       };
-
-       /*
-        * Stock firmware has the following settings, so let's do the same.
-        * I don't sure why these are required.
-        */
-       akro_pins: akro_pinmux {
-               akro {
-                       pins = "gpio17", "gpio26", "gpio47";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-               };
-
-               reset {
-                       pins = "gpio45";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-disable;
-                       output-low;
-               };
-
-               gmac0_rgmii {
-                       pins = "gpio25";
-                       function = "gpio";
-                       drive-strength = <8>;
-                       bias-disable;
-               };
-       };
-};
-
-&gsbi5 {
-       status = "okay";
-       qcom,mode = <GSBI_PROT_SPI>;
-
-       spi@1a280000 {
-               status = "okay";
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-
-               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-
-               flash@0 {
-                       compatible = "jedec,spi-nor";
-                       reg = <0>;
-                       spi-max-frequency = <50000000>;
-                       m25p,fast-read;
-
-                       partitions {
-                               compatible = "fixed-partitions";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               partition@0 {
-                                       label = "SBL1";
-                                       reg = <0x0000000 0x0020000>;
-                                       read-only;
-                               };
-
-                               partition@20000 {
-                                       label = "MIBIB";
-                                       reg = <0x0020000 0x0020000>;
-                                       read-only;
-                               };
-
-                               partition@40000 {
-                                       label = "SBL2";
-                                       reg = <0x0040000 0x0040000>;
-                                       read-only;
-                               };
-
-                               partition@80000 {
-                                       label = "SBL3";
-                                       reg = <0x0080000 0x0080000>;
-                                       read-only;
-                               };
-
-                               partition@100000 {
-                                       label = "DDRCONFIG";
-                                       reg = <0x0100000 0x0010000>;
-                                       read-only;
-                               };
-
-                               partition@110000 {
-                                       label = "SSD";
-                                       reg = <0x0110000 0x0010000>;
-                                       read-only;
-                               };
-
-                               partition@120000 {
-                                       label = "TZ";
-                                       reg = <0x0120000 0x0080000>;
-                                       read-only;
-                               };
-
-                               partition@1a0000 {
-                                       label = "RPM";
-                                       reg = <0x01a0000 0x0080000>;
-                                       read-only;
-                               };
-
-                               partition@220000 {
-                                       label = "APPSBL";
-                                       reg = <0x0220000 0x0080000>;
-                                       read-only;
-                               };
-
-                               partition@2a0000 {
-                                       label = "APPSBLENV";
-                                       reg = <0x02a0000 0x0010000>;
-                                       read-only;
-                               };
-
-                               factory: partition@2b0000 {
-                                       label = "PRODUCTDATA";
-                                       reg = <0x02b0000 0x0030000>;
-                                       read-only;
-                               };
-
-                               partition@2e0000 {
-                                       label = "ART";
-                                       reg = <0x02e0000 0x0040000>;
-                                       read-only;
-                                       compatible = "nvmem-cells";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       precal_ART_1000: precal@1000 {
-                                               reg = <0x1000 0x2f20>;
-                                       };
-
-                                       precal_ART_5000: precal@5000 {
-                                               reg = <0x5000 0x2f20>;
-                                       };
-                               };
-
-                               partition@320000 {
-                                       label = "TP";
-                                       reg = <0x0320000 0x0040000>;
-                                       read-only;
-                               };
-
-                               partition@360000 {
-                                       label = "TINY";
-                                       reg = <0x0360000 0x0500000>;
-                                       read-only;
-                               };
-
-                               partition@860000 {
-                                       compatible = "denx,uimage";
-                                       label = "firmware";
-                                       reg = <0x0860000 0x17a0000>;
-                               };
-                       };
-               };
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "qcom,ath10k";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
-
-                       nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-       force_gen1 = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "qcom,ath10k";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       ieee80211-freq-limit = <2400000 2483000>;
-                       qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
-
-                       nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x04 0x80080080  /* PAD0_MODE */
-                       0x0c 0x06000000  /* PAD6_MODE */
-                       0x10 0x002613a0  /* PWS_REG */
-                       0x50 0xcc36cc36  /* LED_CTRL0 */
-                       0x54 0xca36ca36  /* LED_CTRL1 */
-                       0x58 0xc936c936  /* LED_CTRL2 */
-                       0x5c 0x03ffff00  /* LED_CTRL3 */
-                       0x7c 0x0000004e  /* PORT0_STATUS */
-                       0x94 0x0000004e  /* PORT6_STATUS */
-                       0xe0 0xc74164de  /* SGMII_CTRL */
-                       0xe4 0x0006a545  /* MAC_PWR_SEL */
-                       >;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-       mdiobus = <&mdio0>;
-       nvmem-cells = <&macaddr_factory_0>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-       mdiobus = <&mdio0>;
-       nvmem-cells = <&macaddr_factory_6>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&factory {
-       compatible = "nvmem-cells";
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       macaddr_factory_0: macaddr@0 {
-               reg = <0x0 0x6>;
-       };
-
-       macaddr_factory_6: macaddr@6 {
-               reg = <0x6 0x6>;
-       };
-
-       macaddr_PRODUCTDATA_c: macaddr@c {
-               reg = <0xc 0x6>;
-       };
-
-       macaddr_PRODUCTDATA_12: macaddr@12 {
-               reg = <0x12 0x6>;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062.dtsi
deleted file mode 100644 (file)
index 29226ca..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062.dtsi
+++ /dev/null
@@ -1,98 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-#include "qcom-ipq8064.dtsi"
-
-/ {
-       model = "Qualcomm IPQ8062";
-       compatible = "qcom,ipq8062", "qcom,ipq8064";
-
-       aliases {
-               serial0 = &gsbi4_serial;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       reserved-memory {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-
-               rsvd@41200000 {
-                       reg = <0x41200000 0x300000>;
-                       no-map;
-               };
-       };
-};
-
-&gsbi4 {
-       qcom,mode = <GSBI_PROT_I2C_UART>;
-       status = "okay";
-
-       serial@16340000 {
-               status = "okay";
-       };
-       /*
-       * The i2c device on gsbi4 should not be enabled.
-       * On ipq806x designs gsbi4 i2c is meant for exclusive
-       * RPM usage. Turning this on in kernel manifests as
-       * i2c failure for the RPM.
-       */
-};
-
-&opp_table0 {
-       /delete-node/opp-1200000000;
-       /delete-node/opp-1400000000;
-
-       /*
-        * Voltage thresholds are <target min max>
-        */
-       opp-384000000 {
-               opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
-               opp-microvolt-speed0-pvs1-v0 = < 925000 878750  971250>;
-               opp-microvolt-speed0-pvs2-v0 = < 875000 831250  918750>;
-               opp-microvolt-speed0-pvs3-v0 = < 800000 760000  840000>;
-       };
-
-       opp-600000000 {
-               opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
-               opp-microvolt-speed0-pvs1-v0 = < 975000 926250 1023750>;
-               opp-microvolt-speed0-pvs2-v0 = < 925000 878750  971250>;
-               opp-microvolt-speed0-pvs3-v0 = < 850000 807500  892500>;
-       };
-
-       opp-800000000 {
-               opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
-               opp-microvolt-speed0-pvs1-v0 = <1025000  973750 1076250>;
-               opp-microvolt-speed0-pvs2-v0 = < 995000  945250 1044750>;
-               opp-microvolt-speed0-pvs3-v0 = < 900000  855000  945000>;
-       };
-
-       opp-1000000000 {
-               opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
-               opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
-               opp-microvolt-speed0-pvs2-v0 = <1025000  973750 1076250>;
-               opp-microvolt-speed0-pvs3-v0 = < 950000  902500  997500>;
-       };
-};
-
-&pcie0 {
-       compatible = "qcom,pcie-ipq8064-v2";
-};
-
-&pcie1 {
-       compatible = "qcom,pcie-ipq8064-v2";
-};
-
-&pcie2 {
-       compatible = "qcom,pcie-ipq8064-v2";
-};
-
-&smb208_s2a {
-       regulator-max-microvolt = <1150000>;
-};
-
-&smb208_s2b {
-       regulator-max-microvolt = <1150000>;
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi
deleted file mode 100644 (file)
index 115c6d4..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200-c2600.dtsi
+++ /dev/null
@@ -1,375 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-               label-mac-device = &gmac2;
-       };
-};
-
-&qcom_pinmux {
-       spi_pins: spi_pins {
-               mux {
-                       pins = "gpio18", "gpio19", "gpio21";
-                       function = "gsbi5";
-                       bias-pull-down;
-               };
-
-               data {
-                       pins = "gpio18", "gpio19";
-                       drive-strength = <10>;
-               };
-
-               cs {
-                       pins = "gpio20";
-                       function = "gpio";
-                       drive-strength = <10>;
-                       bias-pull-up;
-               };
-
-               clk {
-                       pins = "gpio21";
-                       drive-strength = <12>;
-               };
-       };
-
-       usb0_pwr_en_pin: usb0_pwr_en_pin {
-               mux {
-                       pins = "gpio25";
-                       function = "gpio";
-                       drive-strength = <10>;
-                       bias-pull-up;
-                       output-high;
-               };
-       };
-
-       usb1_pwr_en_pin: usb1_pwr_en_pin {
-               mux {
-                       pins = "gpio23";
-                       function = "gpio";
-                       drive-strength = <10>;
-                       bias-pull-up;
-                       output-high;
-               };
-       };
-};
-
-&gsbi5 {
-       qcom,mode = <GSBI_PROT_SPI>;
-       status = "okay";
-
-       spi@1a280000 {
-               status = "okay";
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-
-               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-
-               flash@0 {
-                       compatible = "jedec,spi-nor";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       spi-max-frequency = <50000000>;
-                       reg = <0>;
-
-                       partitions {
-                               compatible = "fixed-partitions";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               partition@0 {
-                                       label = "SBL1";
-                                       reg = <0x0 0x20000>;
-                                       read-only;
-                               };
-
-                               partition@20000 {
-                                       label = "MIBIB";
-                                       reg = <0x20000 0x20000>;
-                                       read-only;
-                               };
-
-                               partition@40000 {
-                                       label = "SBL2";
-                                       reg = <0x40000 0x20000>;
-                                       read-only;
-                               };
-
-                               partition@60000 {
-                                       label = "SBL3";
-                                       reg = <0x60000 0x30000>;
-                                       read-only;
-                               };
-
-                               partition@90000 {
-                                       label = "DDRCONFIG";
-                                       reg = <0x90000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@a0000 {
-                                       label = "SSD";
-                                       reg = <0xa0000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@b0000 {
-                                       label = "TZ";
-                                       reg = <0xb0000 0x30000>;
-                                       read-only;
-                               };
-
-                               partition@e0000 {
-                                       label = "RPM";
-                                       reg = <0xe0000 0x20000>;
-                                       read-only;
-                               };
-
-                               partition@100000 {
-                                       label = "fs-uboot";
-                                       reg = <0x100000 0x70000>;
-                                       read-only;
-                               };
-
-                               partition@170000 {
-                                       label = "uboot-env";
-                                       reg = <0x170000 0x40000>;
-                                       read-only;
-                               };
-
-                               partition@1b0000 {
-                                       label = "radio";
-                                       reg = <0x1b0000 0x40000>;
-                                       read-only;
-                                       compatible = "nvmem-cells";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       precal_radio_1000: precal@1000 {
-                                               reg = <0x1000 0x2f20>;
-                                       };
-
-                                       precal_radio_5000: precal@5000 {
-                                               reg = <0x5000 0x2f20>;
-                                       };
-                               };
-
-                               partition@1f0000 {
-                                       label = "os-image";
-                                       reg = <0x1f0000 0x400000>;
-                               };
-
-                               partition@5f0000 {
-                                       label = "rootfs";
-                                       reg = <0x5f0000 0x1900000>;
-                               };
-
-                               defaultmac: partition@1ef0000 {
-                                       label = "default-mac";
-                                       reg = <0x1ef0000 0x00200>;
-                                       read-only;
-                               };
-
-                               partition@1ef0200 {
-                                       label = "pin";
-                                       reg = <0x1ef0200 0x00200>;
-                                       read-only;
-                               };
-
-                               partition@1ef0400 {
-                                       label = "product-info";
-                                       reg = <0x1ef0400 0x0fc00>;
-                                       read-only;
-                               };
-
-                               partition@1f00000 {
-                                       label = "partition-table";
-                                       reg = <0x1f00000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@1f10000 {
-                                       label = "soft-version";
-                                       reg = <0x1f10000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@1f20000 {
-                                       label = "support-list";
-                                       reg = <0x1f20000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@1f30000 {
-                                       label = "profile";
-                                       reg = <0x1f30000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@1f40000 {
-                                       label = "default-config";
-                                       reg = <0x1f40000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@1f50000 {
-                                       label = "user-config";
-                                       reg = <0x1f50000 0x40000>;
-                                       read-only;
-                               };
-
-                               partition@1f90000 {
-                                       label = "qos-db";
-                                       reg = <0x1f90000 0x40000>;
-                                       read-only;
-                               };
-
-                               partition@1fd0000 {
-                                       label = "usb-config";
-                                       reg = <0x1fd0000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@1fe0000 {
-                                       label = "log";
-                                       reg = <0x1fe0000 0x20000>;
-                                       read-only;
-                               };
-                       };
-               };
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-
-       pinctrl-0 = <&usb0_pwr_en_pin>;
-       pinctrl-names = "default";
-};
-
-&usb3_1 {
-       status = "okay";
-
-       pinctrl-0 = <&usb1_pwr_en_pin>;
-       pinctrl-names = "default";
-};
-
-&pcie0 {
-       status = "okay";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_1000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-                       mac-address-increment = <(-1)>;
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-       max-link-speed = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_defaultmac_8>, <&precal_radio_5000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       nvmem-cells = <&macaddr_defaultmac_8>;
-       nvmem-cell-names = "mac-address";
-       mac-address-increment = <1>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       nvmem-cells = <&macaddr_defaultmac_8>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&defaultmac {
-       compatible = "nvmem-cells";
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       macaddr_defaultmac_8: macaddr@8 {
-               reg = <0x8 0x6>;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts
deleted file mode 100644 (file)
index 6cb21fc..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ad7200.dts
+++ /dev/null
@@ -1,135 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-
-#include "qcom-ipq8064-ad7200-c2600.dtsi"
-
-/ {
-       model = "TP-Link Talon AD7200";
-       compatible = "tplink,ad7200", "qcom,ipq8064";
-
-       aliases {
-               led-boot = &led_status;
-               led-failsafe = &led_status;
-               led-running = &led_status;
-               led-upgrade = &led_status;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wifi {
-                       label = "wifi";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RFKILL>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               led_enable {
-                       label = "led-enable";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_LIGHTS_TOGGLE>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               lan {
-                       label = "blue:lan";
-                       gpios = <&qcom_pinmux 2 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb1 {
-                       label = "blue:usb1";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan5g {
-                       label = "blue:wlan5g";
-                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb3 {
-                       label = "blue:usb3";
-                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan2g {
-                       label = "blue:wlan2g";
-                       gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan_orange {
-                       label = "orange:wan";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
-               };
-
-               wan_blue {
-                       label = "blue:wan";
-                       gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>;
-               };
-
-               wps {
-                       label = "blue:wps";
-                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan60g {
-                       label = "blue:wlan60g";
-                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_status: status {
-                       label = "blue:status";
-                       gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio53", "gpio54", "gpio67";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio2", "gpio8", "gpio15", "gpio16", "gpio17", "gpio26",
-                                       "gpio33", "gpio55", "gpio56", "gpio66";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-};
-
-&pcie2 {
-       status = "okay";
-       max-link-speed = <1>;
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
deleted file mode 100644 (file)
index 70034a5..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ /dev/null
@@ -1,121 +0,0 @@
-#include "qcom-ipq8064-v1.0.dtsi"
-
-/ {
-       model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
-       compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       reserved-memory {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-               rsvd@41200000 {
-                       reg = <0x41200000 0x300000>;
-                       no-map;
-               };
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&flash {
-       partitions {
-               compatible = "qcom,smem-part";
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-};
-
-&pcie1 {
-       status = "okay";
-       max-link-speed = <1>;
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               partitions {
-                       compatible = "qcom,smem-part";
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
deleted file mode 100644 (file)
index c771a62..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
+++ /dev/null
@@ -1,159 +0,0 @@
-#include "qcom-ipq8064-v1.0.dtsi"
-
-/ {
-       model = "Qualcomm IPQ8064/AP161";
-       compatible = "qcom,ipq8064-ap161", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       reserved-memory {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-               rsvd@41200000 {
-                       reg = <0x41200000 0x300000>;
-                       no-map;
-               };
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-       };
-};
-
-&qcom_pinmux {
-       rgmii2_pins: rgmii2_pins {
-               mux {
-                       pins = "gpio27", "gpio28", "gpio29",
-                              "gpio30", "gpio31", "gpio32",
-                              "gpio51", "gpio52", "gpio59",
-                              "gpio60", "gpio61", "gpio62",
-                              "gpio2", "gpio66";
-               };
-       };
-};
-
-&flash {
-       partitions {
-               compatible = "qcom,smem-part";
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-};
-
-&pcie1 {
-       status = "okay";
-       max-link-speed = <1>;
-};
-
-&pcie2 {
-       status = "okay";
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               partitions {
-                       compatible = "qcom,smem-part";
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x20080     /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-               qca,phy-rgmii-en;
-               qca,txclk-delay-en;
-               qca,rxclk-delay-en;
-       };
-
-       phy3: ethernet-phy@3 {
-               device_type = "ethernet-phy";
-               reg = <3>;
-       };
-};
-
-&gmac0 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <0>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-       mdiobus = <&mdio0>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-       mdiobus = <&mdio0>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-       mdiobus = <&mdio0>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
deleted file mode 100644 (file)
index cef1aba..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
+++ /dev/null
@@ -1,119 +0,0 @@
-#include "qcom-ipq8064-ad7200-c2600.dtsi"
-
-/ {
-       model = "TP-Link Archer C2600";
-       compatible = "tplink,c2600", "qcom,ipq8064";
-
-       aliases {
-               led-boot = &power;
-               led-failsafe = &general;
-               led-running = &power;
-               led-upgrade = &general;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wifi {
-                       label = "wifi";
-                       gpios = <&qcom_pinmux 49 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RFKILL>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               ledswitch {
-                       label = "ledswitch";
-                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_LIGHTS_TOGGLE>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               lan {
-                       label = "white:lan";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb4 {
-                       label = "white:usb_4";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb2 {
-                       label = "white:usb_2";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-
-               wps {
-                       label = "white:wps";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan_amber {
-                       label = "amber:wan";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
-               };
-
-               wan_white {
-                       label = "white:wan";
-                       gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>;
-               };
-
-               power: power {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-                       default-state = "keep";
-               };
-
-               general: general {
-                       label = "white:general";
-                       gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio16", "gpio54", "gpio65";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio26", "gpio33",
-                                       "gpio53", "gpio66";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
deleted file mode 100644 (file)
index 23487c9..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
+++ /dev/null
@@ -1,384 +0,0 @@
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "Netgear Nighthawk X4 D7800";
-       compatible = "netgear,d7800", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       reserved-memory {
-               rsvd@5fe00000 {
-                       reg = <0x5fe00000 0x200000>;
-                       reusable;
-               };
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-
-               led-boot = &power_white;
-               led-failsafe = &power_amber;
-               led-running = &power_white;
-               led-upgrade = &power_amber;
-       };
-
-       chosen {
-               bootargs = "rootfstype=squashfs noinitrd";
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wifi {
-                       label = "wifi";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RFKILL>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               usb1 {
-                       label = "white:usb1";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb2 {
-                       label = "white:usb2";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-
-               power_amber: power_amber {
-                       label = "amber:power";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan_white {
-                       label = "white:wan";
-                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan_amber {
-                       label = "amber:wan";
-                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
-               };
-
-               wps {
-                       label = "white:wps";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
-               };
-
-               esata {
-                       label = "white:esata";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
-               };
-
-               power_white: power_white {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-                       default-state = "keep";
-               };
-
-               wifi {
-                       label = "white:wifi";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio6", "gpio54", "gpio65";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
-                               "gpio24","gpio26", "gpio53", "gpio64";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       usb0_pwr_en_pins: usb0_pwr_en_pins {
-               mux {
-                       pins = "gpio15";
-                       function = "gpio";
-                       drive-strength = <12>;
-                       bias-pull-down;
-                       output-high;
-               };
-       };
-
-       usb1_pwr_en_pins: usb1_pwr_en_pins {
-               mux {
-                       pins = "gpio16", "gpio68";
-                       function = "gpio";
-                       drive-strength = <12>;
-                       bias-pull-down;
-                       output-high;
-               };
-       };
-};
-
-&sata_phy {
-       status = "okay";
-};
-
-&sata {
-       status = "okay";
-};
-
-&usb3_0 {
-       status = "okay";
-
-       pinctrl-0 = <&usb0_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&usb3_1 {
-       status = "okay";
-
-       pinctrl-0 = <&usb1_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&pcie0 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
-       pinctrl-0 = <&pcie0_pins>;
-       pinctrl-names = "default";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-                       mac-address-increment = <(1)>;
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
-       pinctrl-0 = <&pcie1_pins>;
-       pinctrl-names = "default";
-       max-link-speed = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-                       mac-address-increment = <(2)>;
-               };
-       };
-};
-
-&pcie2 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
-       pinctrl-0 = <&pcie2_pins>;
-       pinctrl-names = "default";
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       #address-cells = <1>;
-       #size-cells = <0>;
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               nand-is-boot-medium;
-               qcom,boot_pages_size = <0x1180000>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       qcadata@0 {
-                               label = "qcadata";
-                               reg = <0x0000000 0x0c80000>;
-                               read-only;
-                       };
-
-                       APPSBL@c80000 {
-                               label = "APPSBL";
-                               reg = <0x0c80000 0x0500000>;
-                               read-only;
-                       };
-
-                       APPSBLENV@1180000 {
-                               label = "APPSBLENV";
-                               reg = <0x1180000 0x0080000>;
-                               read-only;
-                       };
-
-                       art@1200000 {
-                               label = "art";
-                               reg = <0x1200000 0x0140000>;
-                               read-only;
-                               compatible = "nvmem-cells";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               macaddr_art_0: macaddr@0 {
-                                       reg = <0x0 0x6>;
-                               };
-
-                               macaddr_art_6: macaddr@6 {
-                                       reg = <0x6 0x6>;
-                               };
-
-                               precal_art_1000: precal@1000 {
-                                       reg = <0x1000 0x2f20>;
-                               };
-
-                               precal_art_5000: precal@5000 {
-                                       reg = <0x5000 0x2f20>;
-                               };
-                       };
-
-                       artbak: art@1340000 {
-                               label = "artbak";
-                               reg = <0x1340000 0x0140000>;
-                               read-only;
-                       };
-
-                       kernel@1480000 {
-                               label = "kernel";
-                               reg = <0x1480000 0x0400000>;
-                       };
-
-                       ubi@1880000 {
-                               label = "ubi";
-                               reg = <0x1880000 0x6080000>;
-                       };
-
-                       reserve@7900000 {
-                               label = "reserve";
-                               reg = <0x7900000 0x0700000>;
-                               read-only;
-                       };
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       nvmem-cells = <&macaddr_art_6>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       nvmem-cells = <&macaddr_art_0>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-db149.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-db149.dts
deleted file mode 100644 (file)
index 8e8d942..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-db149.dts
+++ /dev/null
@@ -1,163 +0,0 @@
-#include "qcom-ipq8064-v1.0.dtsi"
-
-/ {
-       model = "Qualcomm IPQ8064/DB149";
-       compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
-
-       aliases {
-               serial0 = &gsbi2_serial;
-       };
-
-       reserved-memory {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-               rsvd@41200000 {
-                       reg = <0x41200000 0x300000>;
-                       no-map;
-               };
-       };
-};
-
-&qcom_pinmux {
-       rgmii0_pins: rgmii0_pins {
-               mux {
-                       pins = "gpio2", "gpio66";
-                       drive-strength = <8>;
-                       bias-disable;
-               };
-       };
-};
-
-&gsbi2 {
-       qcom,mode = <GSBI_PROT_I2C_UART>;
-       status = "okay";
-
-       gsbi2_serial: serial@12490000 {
-               status = "okay";
-       };
-};
-
-&gsbi4 {
-       status = "disabled";
-};
-
-&gsbi4_serial {
-       status = "disabled";
-};
-
-&flash {
-       m25p,fast-read;
-
-       partition@0 {
-               label = "lowlevel_init";
-               reg = <0x0 0x1b0000>;
-       };
-
-       partition@1 {
-               label = "u-boot";
-               reg = <0x1b0000 0x80000>;
-       };
-
-       partition@2 {
-               label = "u-boot-env";
-               reg = <0x230000 0x40000>;
-       };
-
-       partition@3 {
-               label = "caldata";
-               reg = <0x270000 0x40000>;
-       };
-
-       partition@4 {
-               label = "firmware";
-               reg = <0x2b0000 0x1d50000>;
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-};
-
-&pcie1 {
-       status = "okay";
-};
-
-&pcie2 {
-       status = "okay";
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-               >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-       };
-
-       phy6: ethernet-phy@6 {
-               reg = <6>;
-       };
-
-       phy7: ethernet-phy@7 {
-               reg = <7>;
-       };
-};
-
-&gmac0 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <0>;
-       phy-handle = <&phy4>;
-
-       pinctrl-0 = <&rgmii0_pins>;
-       pinctrl-names = "default";
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <1>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-       phy-handle = <&phy6>;
-};
-
-&gmac3 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <3>;
-       phy-handle = <&phy7>;
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts
deleted file mode 100644 (file)
index 9d82d52..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts
+++ /dev/null
@@ -1,91 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-
-#include "qcom-ipq8064-eax500.dtsi"
-
-/ {
-       model = "Linksys EA7500 V1 WiFi Router";
-       compatible = "linksys,ea7500-v1", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0xe000000>;
-               device_type = "memory";
-       };
-
-       aliases {
-               led-boot = &led_power;
-               led-failsafe = &led_power;
-               led-running = &led_power;
-               led-upgrade = &led_power;
-       };
-
-       chosen {
-               /* look for root deviceblock nbr in this bootarg */
-               find-rootblock = "ubi.mtd=";
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               led_power: power {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-                       default-state = "keep";
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio65", "gpio68";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio6";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-};
-
-&partitions {
-       partition@5f80000 {
-               label = "sysdiag";
-               reg = <0x5f80000 0x100000>;
-       };
-
-       partition@6080000 {
-               label = "syscfg";
-               reg = <0x6080000 0x1f80000>;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
deleted file mode 100644 (file)
index 1c6a4bd..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
+++ /dev/null
@@ -1,128 +0,0 @@
-#include "qcom-ipq8064-eax500.dtsi"
-
-/ {
-       model = "Linksys EA8500 WiFi Router";
-       compatible = "linksys,ea8500", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-
-               led-boot = &led_power;
-               led-failsafe = &led_power;
-               led-running = &led_power;
-               led-upgrade = &led_power;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wifi {
-                       label = "wifi";
-                       gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RFKILL>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               wps {
-                       label = "green:wps";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_power: power {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-                       default-state = "keep";
-               };
-
-               wifi {
-                       label = "green:wifi";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio65", "gpio67", "gpio68";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio6", "gpio53", "gpio54";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-};
-
-&sata_phy {
-       status = "okay";
-};
-
-&sata {
-       status = "okay";
-};
-
-&partitions {
-       partition@5f80000 {
-               label = "syscfg";
-               reg = <0x5f80000 0x2080000>;
-       };
-};
-
-&mdio0 {
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       qcom,phy_mdio_addr = <4>;
-       qcom,poll_required = <1>;
-       qcom,rgmii_delay = <0>;
-       qcom,emulation = <0>;
-};
-
-/* LAN */
-&gmac2 {
-       qcom,phy_mdio_addr = <0>;       /* none */
-       qcom,poll_required = <0>;       /* no polling */
-       qcom,rgmii_delay = <0>;
-       qcom,emulation = <0>;
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
deleted file mode 100644 (file)
index e74d2dc..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
+++ /dev/null
@@ -1,207 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       chosen {
-               bootargs = "console=ttyMSM0,115200n8";
-               /* append to bootargs adding the root deviceblock nbr from bootloader */
-               append-rootblock = "ubi.mtd=";
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-
-       max-link-speed = <1>;
-};
-
-&pcie1 {
-       status = "okay";
-};
-
-&pcie2 {
-       status = "okay";
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               nand-is-boot-medium;
-               qcom,boot_pages_size = <0x0c80000>;
-
-               partitions: partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       partition@0 {
-                               label = "SBL1";
-                               reg = <0x0000000 0x0040000>;
-                               read-only;
-                       };
-
-                       partition@40000 {
-                               label = "MIBIB";
-                               reg = <0x0040000 0x0140000>;
-                               read-only;
-                       };
-
-                       partition@180000 {
-                               label = "SBL2";
-                               reg = <0x0180000 0x0140000>;
-                               read-only;
-                       };
-
-                       partition@2c0000 {
-                               label = "SBL3";
-                               reg = <0x02c0000 0x0280000>;
-                               read-only;
-                       };
-
-                       partition@540000 {
-                               label = "DDRCONFIG";
-                               reg = <0x0540000 0x0120000>;
-                               read-only;
-                       };
-
-                       partition@660000 {
-                               label = "SSD";
-                               reg = <0x0660000 0x0120000>;
-                               read-only;
-                       };
-
-                       partition@780000 {
-                               label = "TZ";
-                               reg = <0x0780000 0x0280000>;
-                               read-only;
-                       };
-
-                       partition@a00000 {
-                               label = "RPM";
-                               reg = <0x0a00000 0x0280000>;
-                               read-only;
-                       };
-
-                       art: partition@c80000 {
-                               label = "art";
-                               reg = <0x0c80000 0x0140000>;
-                               read-only;
-                       };
-
-                       partition@dc0000 {
-                               label = "APPSBL";
-                               reg = <0x0dc0000 0x0100000>;
-                               read-only;
-                       };
-
-                       partition@ec0000 {
-                               label = "u_env";
-                               reg = <0x0ec0000 0x0040000>;
-                       };
-
-                       partition@f00000 {
-                               label = "s_env";
-                               reg = <0x0f00000 0x0040000>;
-                       };
-
-                       partition@f40000 {
-                               label = "devinfo";
-                               reg = <0x0f40000 0x0040000>;
-                       };
-
-                       partition@f80000 {
-                               label = "kernel1";
-                               reg = <0x0f80000 0x2800000>;  /* 4 MB, spill to rootfs */
-                       };
-
-                       partition@1380000 {
-                               label = "rootfs1";
-                               reg = <0x1380000 0x2400000>;
-                       };
-
-                       partition@3780000 {
-                               label = "kernel2";
-                               reg = <0x3780000 0x2800000>;
-                       };
-
-                       partition@3b80000 {
-                               label = "rootfs2";
-                               reg = <0x3b80000 0x2400000>;
-                       };
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x00010 0x2613a0    /* PWS_REG */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts
deleted file mode 100644 (file)
index 735ccb2..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-g10.dts
+++ /dev/null
@@ -1,279 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/soc/qcom,tcsr.h>
-
-/ {
-       compatible = "asrock,g10", "qcom,ipq8064";
-       model = "ASRock G10";
-
-       aliases {
-               ethernet0 = &gmac1;
-               ethernet1 = &gmac0;
-
-               led-boot = &led_status_blue;
-               led-failsafe = &led_status_amber;
-               led-running = &led_status_blue;
-               led-upgrade = &led_status_amber;
-       };
-
-       chosen {
-               bootargs-override = "console=ttyMSM0,115200n8";
-       };
-
-       leds {
-               compatible = "gpio-leds";
-
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               /*
-                * this is a bit misleading. Because there are about seven
-                * multicolor LEDs connected all wired together in parallel.
-                */
-
-               status_yellow {
-                       label = "yellow:status";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_status_amber: status_amber {
-                       label = "amber:status";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_status_blue: status_blue {
-                       label = "blue:status";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               /*
-                * LED is declared in vendors boardfile but it's not
-                * working and the manual doesn't mention anything
-                * about the LED being white.
-
-               status_white {
-                       label = "white:status";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
-               };
-               */
-       };
-
-       i2c-gpio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               compatible = "i2c-gpio";
-               gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>, /* sda */
-                       <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; /* scl */
-               i2c-gpio,delay-us = <5>;
-               i2c-gpio,scl-output-only;
-
-               mcu@50 {
-                       reg = <0x50>;
-                       compatible = "sonix,sn8f25e21";
-               };
-       };
-
-       keys {
-               compatible = "gpio-keys";
-
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               ir-remote {
-                       label = "ir-remote";
-                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
-                       linux,code = <BTN_0>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps5g {
-                       label = "wps5g";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps2g {
-                       label = "wps2g";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&gmac1 {
-       status = "okay";
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gsbi4_serial {
-       pinctrl-0 = <&uart0_pins>;
-       pinctrl-names = "default";
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               nand-is-boot-medium;
-               qcom,boot_pages_size = <0x1200000>;
-
-               partitions {
-                       compatible = "qcom,smem-part";
-               };
-       };
-};
-
-&pcie0 {
-       status = "okay";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi5g: wifi@1,0 {
-                       reg = <0x00010000 0 0 0 0>;
-                       compatible = "qcom,ath10k";
-                       qcom,ath10k-calibration-variant = "ASRock-G10";
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi2g: wifi@1,0 {
-                       reg = <0x00010000 0 0 0 0>;
-                       compatible = "qcom,ath10k";
-                       qcom,ath10k-calibration-variant = "ASRock-G10";
-               };
-       };
-};
-
-&qcom_pinmux {
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio7", "gpio8", "gpio9", "gpio26";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio15", "gpio16", "gpio64", "gpio65";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       uart0_pins: uart0_pins {
-               mux {
-                       pins = "gpio10", "gpio11";
-                       function = "gsbi4";
-                       drive-strength = <10>;
-                       bias-disable;
-               };
-       };
-};
-
-&rpm {
-       pinctrl-0 = <&i2c4_pins>;
-       pinctrl-names = "default";
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&tcsr {
-       qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
-};
-
-/delete-node/ &pcie2_pins;
-/delete-node/ &pcie2;

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
deleted file mode 100644 (file)
index 0970eaf..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
+++ /dev/null
@@ -1,314 +0,0 @@
-#include "qcom-ipq8064-v1.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/soc/qcom,tcsr.h>
-
-/ {
-       model = "Netgear Nighthawk X4 R7500";
-       compatible = "netgear,r7500", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0xe000000>;
-               device_type = "memory";
-       };
-
-       reserved-memory {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-               rsvd@41200000 {
-                       reg = <0x41200000 0x300000>;
-                       no-map;
-               };
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-
-               led-boot = &power_white;
-               led-failsafe = &power_amber;
-               led-running = &power_white;
-               led-upgrade = &power_amber;
-       };
-
-       chosen {
-               bootargs = "rootfstype=squashfs noinitrd";
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wifi {
-                       label = "wifi";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RFKILL>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               usb1 {
-                       label = "white:usb1";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb2 {
-                       label = "white:usb2";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-
-               power_amber: power_amber {
-                       label = "amber:power";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan_white {
-                       label = "white:wan";
-                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan_amber {
-                       label = "amber:wan";
-                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
-               };
-
-               wps {
-                       label = "white:wps";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
-               };
-
-               esata {
-                       label = "white:esata";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
-               };
-
-               power_white: power_white {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-                       default-state = "keep";
-               };
-
-               wifi {
-                       label = "white:wifi";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio6", "gpio54", "gpio65";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
-                               "gpio24","gpio26", "gpio53", "gpio64";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-};
-
-&gsbi5 {
-       status = "disabled";
-
-       spi@1a280000 {
-               status = "disabled";
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-};
-
-&pcie1 {
-       status = "okay";
-       max-link-speed = <1>;
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               nand-is-boot-medium;
-               qcom,boot_pages_size = <0x1180000>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       qcadata@0 {
-                               label = "qcadata";
-                               reg = <0x0000000 0x0c80000>;
-                               read-only;
-                       };
-
-                       APPSBL@c80000 {
-                               label = "APPSBL";
-                               reg = <0x0c80000 0x0500000>;
-                               read-only;
-                       };
-
-                       APPSBLENV@1180000 {
-                               label = "APPSBLENV";
-                               reg = <0x1180000 0x0080000>;
-                               read-only;
-                       };
-
-                       art: art@1200000 {
-                               label = "art";
-                               reg = <0x1200000 0x0140000>;
-                               read-only;
-                       };
-
-                       kernel@1340000 {
-                               label = "kernel";
-                               reg = <0x1340000 0x0400000>;
-                       };
-
-                       ubi@1740000 {
-                               label = "ubi";
-                               reg = <0x1740000 0x1600000>;
-                       };
-
-                       netgear@2d40000 {
-                               label = "netgear";
-                               reg = <0x2d40000 0x0c00000>;
-                               read-only;
-                       };
-
-                       reserve@3940000 {
-                               label = "reserve";
-                               reg = <0x3940000 0x46c0000>;
-                               read-only;
-                       };
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       nvmem-cells = <&macaddr_art_6>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       nvmem-cells = <&macaddr_art_0>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&tcsr {
-       qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
-       compatible = "qcom,tcsr";
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&art {
-       compatible = "nvmem-cells";
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       macaddr_art_0: macaddr@0 {
-               reg = <0x0 0x6>;
-       };
-
-       macaddr_art_6: macaddr@6 {
-               reg = <0x6 0x6>;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
deleted file mode 100644 (file)
index 30b56bb..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
+++ /dev/null
@@ -1,374 +0,0 @@
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "Netgear Nighthawk X4 R7500v2";
-       compatible = "netgear,r7500v2", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       reserved-memory {
-               rsvd@5fe00000 {
-                       reg = <0x5fe00000 0x200000>;
-                       reusable;
-               };
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-
-               led-boot = &power;
-               led-failsafe = &power;
-               led-running = &power;
-               led-upgrade = &power;
-       };
-
-       chosen {
-               bootargs = "rootfstype=squashfs noinitrd";
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wifi {
-                       label = "wifi";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RFKILL>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               usb1 {
-                       label = "amber:usb1";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb3 {
-                       label = "amber:usb3";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-
-               status {
-                       label = "amber:status";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               internet {
-                       label = "white:internet";
-                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan {
-                       label = "white:wan";
-                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
-               };
-
-               wps {
-                       label = "white:wps";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
-               };
-
-               esata {
-                       label = "white:esata";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
-               };
-
-               power: power {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-                       default-state = "keep";
-               };
-
-               wifi {
-                       label = "white:wifi";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio6", "gpio54", "gpio65";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
-                               "gpio24","gpio26", "gpio53", "gpio64";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       usb0_pwr_en_pins: usb0_pwr_en_pins {
-               mux {
-                       pins = "gpio15";
-                       function = "gpio";
-                       drive-strength = <12>;
-                       bias-pull-down;
-                       output-high;
-               };
-       };
-
-       usb1_pwr_en_pins: usb1_pwr_en_pins {
-               mux {
-                       pins = "gpio16", "gpio68";
-                       function = "gpio";
-                       drive-strength = <12>;
-                       bias-pull-down;
-                       output-high;
-               };
-       };
-};
-
-&sata_phy {
-       status = "okay";
-};
-
-&sata {
-       status = "okay";
-};
-
-&usb3_0 {
-       status = "okay";
-
-       pinctrl-0 = <&usb0_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&usb3_1 {
-       status = "okay";
-
-       pinctrl-0 = <&usb1_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&pcie0 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
-       pinctrl-0 = <&pcie0_pins>;
-       pinctrl-names = "default";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-                       mac-address-increment = <(1)>;
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
-       pinctrl-0 = <&pcie1_pins>;
-       pinctrl-names = "default";
-       max-link-speed = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-                       mac-address-increment = <(2)>;
-               };
-       };
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               nand-is-boot-medium;
-               qcom,boot_pages_size = <0x1180000>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       qcadata@0 {
-                               label = "qcadata";
-                               reg = <0x0000000 0x0c80000>;
-                               read-only;
-                       };
-
-                       APPSBL@c80000 {
-                               label = "APPSBL";
-                               reg = <0x0c80000 0x0500000>;
-                               read-only;
-                       };
-
-                       APPSBLENV@1180000 {
-                               label = "APPSBLENV";
-                               reg = <0x1180000 0x0080000>;
-                               read-only;
-                       };
-
-                       art@1200000 {
-                               label = "art";
-                               reg = <0x1200000 0x0140000>;
-                               read-only;
-                               compatible = "nvmem-cells";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               macaddr_art_0: macaddr@0 {
-                                       reg = <0x0 0x6>;
-                               };
-
-                               macaddr_art_6: macaddr@6 {
-                                       reg = <0x6 0x6>;
-                               };
-
-                               precal_art_1000: precal@1000 {
-                                       reg = <0x1000 0x2f20>;
-                               };
-
-                               precal_art_5000: precal@5000 {
-                                       reg = <0x5000 0x2f20>;
-                               };
-                       };
-
-                       artbak: art@1340000 {
-                               label = "artbak";
-                               reg = <0x1340000 0x0140000>;
-                               read-only;
-                       };
-
-                       kernel@1480000 {
-                               label = "kernel";
-                               reg = <0x1480000 0x0400000>;
-                       };
-
-                       ubi@1880000 {
-                               label = "ubi";
-                               reg = <0x1880000 0x6080000>;
-                       };
-
-                       reserve@7900000 {
-                               label = "reserve";
-                               reg = <0x7900000 0x0700000>;
-                               read-only;
-                       };
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0xaa545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       nvmem-cells = <&macaddr_art_6>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       nvmem-cells = <&macaddr_art_0>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
deleted file mode 100644 (file)
index b3e06db..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
+++ /dev/null
@@ -1,317 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "Ubiquiti UniFi AC HD";
-       compatible = "ubnt,unifi-ac-hd", "qcom,ipq8064";
-
-       aliases {
-               label-mac-device = &gmac2;
-               led-boot = &led_dome_white;
-               led-failsafe = &led_dome_white;
-               led-running = &led_dome_blue;
-               led-upgrade = &led_dome_blue;
-               mdio-gpio0 = &mdio0;
-               ethernet0 = &gmac2;
-               ethernet1 = &gmac1;
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               led_dome_blue: dome_blue {
-                       label = "blue:dome";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_dome_white: dome_white {
-                       label = "white:dome";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-               };
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio68";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio9", "gpio53";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-                       output-low;
-               };
-       };
-
-       spi_pins: spi_pins {
-               mux {
-                       pins = "gpio18", "gpio19", "gpio21";
-                       function = "gsbi5";
-                       drive-strength = <10>;
-                       bias-none;
-               };
-
-               cs {
-                       pins = "gpio20";
-                       drive-strength = <12>;
-               };
-       };
-};
-
-&CPU_SPC {
-       status = "disabled";
-};
-
-&gsbi5 {
-       status = "okay";
-
-       qcom,mode = <GSBI_PROT_SPI>;
-
-       spi@1a280000 {
-               status = "okay";
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-               cs-gpios = <&qcom_pinmux 20 0>;
-
-               flash@0 {
-                       compatible = "mx25u25635f", "jedec,spi-nor";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       spi-max-frequency = <50000000>;
-                       reg = <0>;
-                       m25p,fast-read;
-
-                       partitions {
-                               compatible = "fixed-partitions";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               partition@0 {
-                                       label = "SBL1";
-                                       reg = <0x0 0x20000>;
-                                       read-only;
-                               };
-
-                               partition@20000 {
-                                       label = "MIBIB";
-                                       reg = <0x20000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@30000 {
-                                       label = "SBL2";
-                                       reg = <0x30000 0x20000>;
-                                       read-only;
-                               };
-
-                               partition@50000 {
-                                       label = "SBL3";
-                                       reg = <0x50000 0x30000>;
-                                       read-only;
-                               };
-
-                               partition@80000 {
-                                       label = "DDRCONFIG";
-                                       reg = <0x80000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@90000 {
-                                       label = "SSD";
-                                       reg = <0x90000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@a0000 {
-                                       label = "TZ";
-                                       reg = <0xa0000 0x30000>;
-                                       read-only;
-                               };
-
-                               partition@d0000 {
-                                       label = "RPM";
-                                       reg = <0xd0000 0x20000>;
-                                       read-only;
-                               };
-
-                               partition@f0000 {
-                                       label = "APPSBL";
-                                       reg = <0xf0000 0xc0000>;
-                                       read-only;
-                               };
-
-                               partition@1b0000 {
-                                       label = "APPSBLENV";
-                                       reg = <0x1b0000 0x10000>;
-                                       read-only;
-                               };
-
-                               eeprom: partition@1c0000 {
-                                       label = "EEPROM";
-                                       reg = <0x1c0000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@1d0000 {
-                                       label = "bootselect";
-                                       reg = <0x1d0000 0x10000>;
-                               };
-
-                               partition@1e0000 {
-                                       compatible = "denx,fit";
-                                       label = "firmware";
-                                       reg = <0x1e0000 0xe70000>;
-                               };
-
-                               partition@1050000 {
-                                       label = "kernel1";
-                                       reg = <0x1050000 0xe70000>;
-                                       read-only;
-                               };
-
-                               partition@1ec0000 {
-                                       label = "debug";
-                                       reg = <0x1ec0000 0x100000>;
-                                       read-only;
-                               };
-
-                               partition@1fc0000 {
-                                       label = "cfg";
-                                       reg = <0x1fc0000 0x40000>;
-                                       read-only;
-                               };
-                       };
-               };
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-       nand-ecc-strength = <4>;
-       nand-bus-width = <8>;
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-       };
-
-       phy5: ethernet-phy@5 {
-               reg = <5>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-
-       mdiobus = <&mdio0>;
-       phy-handle = <&phy5>;
-       phy-mode = "sgmii";
-       qcom,id = <1>;
-
-       nvmem-cells = <&macaddr_eeprom_6>;
-       nvmem-cell-names = "mac-address";
-};
-
-&gmac2 {
-       status = "okay";
-
-       mdiobus = <&mdio0>;
-       phy-handle = <&phy4>;
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       nvmem-cells = <&macaddr_eeprom_0>;
-       nvmem-cell-names = "mac-address";
-};
-
-&pcie0 {
-       status = "okay";
-};
-
-&pcie1 {
-       status = "okay";
-};
-
-&tcsr {
-       status = "okay";
-};
-
-&hs_phy_0 {
-       status = "okay";
-};
-
-&ss_phy_0 {
-       status = "okay";
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&hs_phy_1 {
-       status = "okay";
-};
-
-&ss_phy_1 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&eeprom {
-       compatible = "nvmem-cells";
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       macaddr_eeprom_0: macaddr@0 {
-               reg = <0x0 0x6>;
-       };
-
-       macaddr_eeprom_6: macaddr@6 {
-               reg = <0x6 0x6>;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
deleted file mode 100644 (file)
index b9ee86a..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
+++ /dev/null
@@ -1,69 +0,0 @@
-#include "qcom-ipq8064.dtsi"
-
-/ {
-       aliases {
-               serial0 = &gsbi4_serial;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       reserved-memory {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-
-               rsvd@41200000 {
-                       reg = <0x41200000 0x300000>;
-                       no-map;
-               };
-       };
-};
-
-&gsbi4 {
-       qcom,mode = <GSBI_PROT_I2C_UART>;
-       status = "okay";
-
-       serial@16340000 {
-               status = "okay";
-       };
-       /*
-       * The i2c device on gsbi4 should not be enabled.
-       * On ipq806x designs gsbi4 i2c is meant for exclusive
-       * RPM usage. Turning this on in kernel manifests as
-       * i2c failure for the RPM.
-       */
-};
-
-&CPU_SPC {
-       status = "okay";
-};
-
-&pcie0 {
-       compatible = "qcom,pcie-ipq8064-v2";
-};
-
-&pcie1 {
-       compatible = "qcom,pcie-ipq8064-v2";
-};
-
-&pcie2 {
-       compatible = "qcom,pcie-ipq8064-v2";
-};
-
-&sata {
-       ports-implemented = <0x1>;
-};
-
-&ss_phy_0 {
-       qcom,rx-eq = <2>;
-       qcom,tx-deamp_3_5db = <32>;
-       qcom,mpll = <5>;
-};
-
-&ss_phy_1 {
-       qcom,rx-eq = <2>;
-       qcom,tx-deamp_3_5db = <32>;
-       qcom,mpll = <5>;
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
deleted file mode 100644 (file)
index 27d9fc8..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
+++ /dev/null
@@ -1,408 +0,0 @@
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "TP-Link Archer VR2600v";
-       compatible = "tplink,vr2600v", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-
-               led-boot = &power;
-               led-failsafe = &general;
-               led-running = &power;
-               led-upgrade = &general;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wifi {
-                       label = "wifi";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RFKILL>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               dect {
-                       label = "dect";
-                       gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_PHONE>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               ledswitch {
-                       label = "ledswitch";
-                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_LIGHTS_TOGGLE>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               dsl {
-                       label = "white:dsl";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb {
-                       label = "white:usb";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-
-               lan {
-                       label = "white:lan";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan2g {
-                       label = "white:wlan2g";
-                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan5g {
-                       label = "white:wlan5g";
-                       gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
-               };
-
-               power: power {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
-                       default-state = "keep";
-               };
-
-               phone {
-                       label = "white:phone";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan {
-                       label = "white:wan";
-                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
-               };
-
-               general: general {
-                       label = "white:general";
-                       gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17",
-                               "gpio26", "gpio53", "gpio56", "gpio66";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       spi_pins: spi_pins {
-               mux {
-                       pins = "gpio18", "gpio19", "gpio21";
-                       function = "gsbi5";
-                       bias-pull-down;
-               };
-
-               data {
-                       pins = "gpio18", "gpio19";
-                       drive-strength = <10>;
-               };
-
-               cs {
-                       pins = "gpio20";
-                       drive-strength = <10>;
-                       bias-pull-up;
-               };
-
-               clk {
-                       pins = "gpio21";
-                       drive-strength = <12>;
-               };
-       };
-};
-
-&gsbi5 {
-       qcom,mode = <GSBI_PROT_SPI>;
-       status = "okay";
-
-       spi4: spi@1a280000 {
-               status = "okay";
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-
-               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-
-               flash@0 {
-                       compatible = "jedec,spi-nor";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       spi-max-frequency = <50000000>;
-                       reg = <0>;
-
-                       partitions {
-                               compatible = "fixed-partitions";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               partition@0 {
-                                       label = "SBL1";
-                                       reg = <0x0 0x20000>;
-                                       read-only;
-                               };
-
-                               partition@20000 {
-                                       label = "MIBIB";
-                                       reg = <0x20000 0x20000>;
-                                       read-only;
-                               };
-
-                               partition@40000 {
-                                       label = "SBL2";
-                                       reg = <0x40000 0x40000>;
-                                       read-only;
-                               };
-
-                               partition@80000 {
-                                       label = "SBL3";
-                                       reg = <0x80000 0x80000>;
-                                       read-only;
-                               };
-
-                               partition@100000 {
-                                       label = "DDRCONFIG";
-                                       reg = <0x100000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@110000 {
-                                       label = "SSD";
-                                       reg = <0x110000 0x10000>;
-                                       read-only;
-                               };
-
-                               partition@120000 {
-                                       label = "TZ";
-                                       reg = <0x120000 0x80000>;
-                                       read-only;
-                               };
-
-                               partition@1a0000 {
-                                       label = "RPM";
-                                       reg = <0x1a0000 0x80000>;
-                                       read-only;
-                               };
-
-                               partition@220000 {
-                                       label = "APPSBL";
-                                       reg = <0x220000 0x80000>;
-                                       read-only;
-                               };
-
-                               partition@2a0000 {
-                                       label = "APPSBLENV";
-                                       reg = <0x2a0000 0x40000>;
-                                       read-only;
-                               };
-
-                               partition@2e0000 {
-                                       label = "OLDART";
-                                       reg = <0x2e0000 0x40000>;
-                                       read-only;
-                               };
-
-                               partition@320000 {
-                                       label = "firmware";
-                                       reg = <0x320000 0xc60000>;
-                                       compatible = "openwrt,uimage";
-                                       openwrt,offset = <512>; /* account for pad-extra 512 */
-                               };
-
-                               /* hole 0xf80000 - 0xfaf100 */
-
-                               partition@faf100 {
-                                       label = "default-mac";
-                                       reg = <0xfaf100 0x00200>;
-                                       read-only;
-
-                                       compatible = "nvmem-cells";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       macaddr_defaultmac_0: macaddr@0 {
-                                               reg = <0x0 0x6>;
-                                       };
-                               };
-
-                               partition@fc0000 {
-                                       label = "ART";
-                                       reg = <0xfc0000 0x40000>;
-                                       read-only;
-
-                                       compatible = "nvmem-cells";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       precal_ART_1000: precal@1000 {
-                                               reg = <0x1000 0x2f20>;
-                                       };
-
-                                       precal_ART_5000: precal@5000 {
-                                               reg = <0x5000 0x2f20>;
-                                       };
-                               };
-                       };
-               };
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_1000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-                       mac-address-increment = <(-1)>;
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-       max-link-speed = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_defaultmac_0>, <&precal_ART_5000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       nvmem-cells = <&macaddr_defaultmac_0>;
-       nvmem-cell-names = "mac-address";
-       mac-address-increment = <1>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       nvmem-cells = <&macaddr_defaultmac_0>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
deleted file mode 100644 (file)
index 998dad5..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
+++ /dev/null
@@ -1,447 +0,0 @@
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "NEC Aterm WG2600HP";
-       compatible = "nec,wg2600hp", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-
-               led-boot = &power_green;
-               led-failsafe = &power_red;
-               led-running = &power_green;
-               led-upgrade = &power_green;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               bridge {
-                       label = "bridge";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
-                       linux,code = <BTN_0>;
-                       linux,input-type = <EV_SW>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               converter {
-                       label = "converter";
-                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
-                       linux,code = <BTN_0>;
-                       linux,input-type = <EV_SW>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               converter_green {
-                       label = "green:converter";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
-               };
-
-               power_red: power_red {
-                       label = "red:power";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-               };
-
-               active_green {
-                       label = "green:active";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-
-               active_red {
-                       label = "red:active";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               power_green: power_green {
-                       label = "green:power";
-                       gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
-               };
-
-               converter_red {
-                       label = "red:converter";
-                       gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan2g_green {
-                       label = "green:wlan2g";
-                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan2g_red {
-                       label = "red:wlan2g";
-                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan5g_green {
-                       label = "green:wlan5g";
-                       gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan5g_red {
-                       label = "red:wlan5g";
-                       gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
-               };
-
-               tv_green {
-                       label = "green:tv";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
-               };
-
-               tv_red {
-                       label = "red:tv";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&CPU_SPC {
-       status = "disabled";
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x06000000  /* PAD0_MODE */
-                       0x0000c 0x00080080  /* PAD6_MODE */
-                       0x000e4 0x0006a545  /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x0000004e  /* PORT0_STATUS */
-                       0x00094 0x0000004e  /* PORT6_STATUS */
-                       >;
-       };
-
-       ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       nvmem-cells = <&macaddr_PRODUCTDATA_6>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       nvmem-cells = <&macaddr_PRODUCTDATA_0>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gsbi5 {
-       status = "okay";
-
-       qcom,mode = <GSBI_PROT_SPI>;
-
-       spi@1a280000 {
-               status = "okay";
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-
-               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-
-               flash@0 {
-                       compatible = "jedec,spi-nor";
-                       spi-max-frequency = <50000000>;
-                       reg = <0>;
-
-                       partitions {
-                               compatible = "fixed-partitions";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               SBL1@0 {
-                                       label = "SBL1";
-                                       reg = <0x0 0x20000>;
-                                       read-only;
-                               };
-
-                               MIBIB@20000 {
-                                       label = "MIBIB";
-                                       reg = <0x20000 0x20000>;
-                                       read-only;
-                               };
-
-                               SBL2@40000 {
-                                       label = "SBL2";
-                                       reg = <0x40000 0x40000>;
-                                       read-only;
-                               };
-
-                               SBL3@80000 {
-                                       label = "SBL3";
-                                       reg = <0x80000 0x80000>;
-                                       read-only;
-                               };
-
-                               DDRCONFIG@100000 {
-                                       label = "DDRCONFIG";
-                                       reg = <0x100000 0x10000>;
-                                       read-only;
-                               };
-
-                               SSD@110000 {
-                                       label = "SSD";
-                                       reg = <0x110000 0x10000>;
-                                       read-only;
-                               };
-
-                               TZ@120000 {
-                                       label = "TZ";
-                                       reg = <0x120000 0x80000>;
-                                       read-only;
-                               };
-
-                               RPM@1a0000 {
-                                       label = "RPM";
-                                       reg = <0x1a0000 0x80000>;
-                                       read-only;
-                               };
-
-                               APPSBL@220000 {
-                                       label = "APPSBL";
-                                       reg = <0x220000 0x80000>;
-                                       read-only;
-                               };
-
-                               APPSBLENV@2a0000 {
-                                       label = "APPSBLENV";
-                                       reg = <0x2a0000 0x10000>;
-                               };
-
-                               PRODUCTDATA: PRODUCTDATA@2b0000 {
-                                       label = "PRODUCTDATA";
-                                       reg = <0x2b0000 0x30000>;
-                                       read-only;
-                               };
-
-                               ART@2e0000 {
-                                       label = "ART";
-                                       reg = <0x2e0000 0x40000>;
-                                       read-only;
-                                       compatible = "nvmem-cells";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       precal_ART_1000: precal@1000 {
-                                               reg = <0x1000 0x2f20>;
-                                       };
-
-                                       precal_ART_5000: precal@5000 {
-                                               reg = <0x5000 0x2f20>;
-                                       };
-                               };
-
-                               TP@320000 {
-                                       label = "TP";
-                                       reg = <0x320000 0x40000>;
-                                       read-only;
-                               };
-
-                               TINY@360000 {
-                                       label = "TINY";
-                                       reg = <0x360000 0x500000>;
-                                       read-only;
-                               };
-
-                               firmware@860000 {
-                                       compatible = "denx,uimage";
-                                       label = "firmware";
-                                       reg = <0x860000 0x17a0000>;
-                               };
-                       };
-               };
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-
-       pinctrl-0 = <&usb_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-       max-link-speed = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio16", "gpio54", "gpio24", "gpio25";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio14",
-                               "gpio15", "gpio55", "gpio56", "gpio57", "gpio58",
-                               "gpio64", "gpio65";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-               };
-       };
-
-       spi_pins: spi_pins {
-               mux {
-                       pins = "gpio18", "gpio19", "gpio21";
-                       function = "gsbi5";
-                       bias-pull-down;
-               };
-
-               data {
-                       pins = "gpio18", "gpio19";
-                       drive-strength = <10>;
-               };
-
-               cs {
-                       pins = "gpio20";
-                       drive-strength = <10>;
-                       bias-pull-up;
-               };
-
-               clk {
-                       pins = "gpio21";
-                       drive-strength = <12>;
-               };
-       };
-
-       usb_pwr_en_pins: usb_pwr_en_pins {
-               mux {
-                       pins = "gpio22";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-                       output-high;
-               };
-       };
-};
-
-&PRODUCTDATA {
-       compatible = "nvmem-cells";
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       macaddr_PRODUCTDATA_0: macaddr@0 {
-               reg = <0x0 0x6>;
-       };
-
-       macaddr_PRODUCTDATA_6: macaddr@6 {
-               reg = <0x6 0x6>;
-       };
-
-       macaddr_PRODUCTDATA_c: macaddr@c {
-               reg = <0xc 0x6>;
-       };
-
-       macaddr_PRODUCTDATA_12: macaddr@12 {
-               reg = <0x12 0x6>;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
deleted file mode 100644 (file)
index d7f3a7f..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
+++ /dev/null
@@ -1,465 +0,0 @@
-// SPDX-License-Identifier: BSD-3-Clause
-/*
- *  Copyright (C) 2017 Christian Mehlis <[email protected]>
- *  Copyright (C) 2018 Mathias Kresin <[email protected]>
- *  All rights reserved.
- */
-
-#include "qcom-ipq8064-v1.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/soc/qcom,tcsr.h>
-
-/ {
-       compatible = "compex,wpq864", "qcom,ipq8064";
-       model = "Compex WPQ864";
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-               ethernet0 = &gmac1;
-               ethernet1 = &gmac0;
-
-               led-boot = &led_pass;
-               led-failsafe = &led_fail;
-               led-running = &led_pass;
-               led-upgrade = &led_pass;
-       };
-
-       leds {
-               compatible = "gpio-leds";
-
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               rss4 {
-                       label = "green:rss4";
-                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
-               };
-
-               rss3 {
-                       label = "green:rss3";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
-                       default-state = "keep";
-               };
-
-               rss2 {
-                       label = "orange:rss2";
-                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
-               };
-
-               rss1 {
-                       label = "red:rss1";
-                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_pass: pass {
-                       label = "green:pass";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_fail: fail {
-                       label = "green:fail";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb {
-                       label = "green:usb";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-               };
-
-               usb-pcie {
-                       label = "green:usb-pcie";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-       };
-
-       keys {
-               compatible = "gpio-keys";
-
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       beeper {
-               compatible = "gpio-beeper";
-
-               pinctrl-0 = <&beeper_pins>;
-               pinctrl-names = "default";
-
-               gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
-       };
-};
-
-&rpm {
-       pinctrl-0 = <&rpm_pins>;
-       pinctrl-names = "default";
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       mt29f2g08abbeah4@0 {
-               compatible = "qcom,nandcs";
-
-               reg = <0>;
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               nand-is-boot-medium;
-               qcom,boot_pages_size = <0x1180000>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       SBL1@0 {
-                               label = "SBL1";
-                               reg = <0x0000000 0x0040000>;
-                               read-only;
-                       };
-
-                       MIBIB@40000 {
-                               label = "MIBIB";
-                               reg = <0x0040000 0x0140000>;
-                               read-only;
-                       };
-
-                       SBL2@180000 {
-                               label = "SBL2";
-                               reg = <0x0180000 0x0140000>;
-                               read-only;
-                       };
-
-                       SBL3@2c0000 {
-                               label = "SBL3";
-                               reg = <0x02c0000 0x0280000>;
-                               read-only;
-                       };
-
-                       DDRCONFIG@540000 {
-                               label = "DDRCONFIG";
-                               reg = <0x0540000 0x0120000>;
-                               read-only;
-                       };
-
-                       SSD@660000 {
-                               label = "SSD";
-                               reg = <0x0660000 0x0120000>;
-                               read-only;
-                       };
-
-                       TZ@780000 {
-                               label = "TZ";
-                               reg = <0x0780000 0x0280000>;
-                               read-only;
-                       };
-
-                       RPM@a00000 {
-                               label = "RPM";
-                               reg = <0x0a00000 0x0280000>;
-                               read-only;
-                       };
-
-                       APPSBL@c80000 {
-                               label = "APPSBL";
-                               reg = <0x0c80000 0x0500000>;
-                               read-only;
-                       };
-
-                       APPSBLENV@1180000 {
-                               label = "APPSBLENV";
-                               reg = <0x1180000 0x0080000>;
-                       };
-
-                       ART@1200000 {
-                               label = "ART";
-                               reg = <0x1200000 0x0140000>;
-                       };
-
-                       ubi@1340000 {
-                               label = "ubi";
-                               reg = <0x1340000 0x4000000>;
-                       };
-
-                       BOOTCONFIG@5340000 {
-                               label = "BOOTCONFIG";
-                               reg = <0x5340000 0x0060000>;
-                       };
-
-                       SBL2-1@53a0000- {
-                               label = "SBL2_1";
-                               reg = <0x53a0000 0x0140000>;
-                               read-only;
-                       };
-
-                       SBL3-1@54e0000 {
-                               label = "SBL3_1";
-                               reg = <0x54e0000 0x0280000>;
-                               read-only;
-                       };
-
-                       DDRCONFIG-1@5760000 {
-                               label = "DDRCONFIG_1";
-                               reg = <0x5760000 0x0120000>;
-                               read-only;
-                       };
-
-                       SSD-1@5880000 {
-                               label = "SSD_1";
-                               reg = <0x5880000 0x0120000>;
-                               read-only;
-                       };
-
-                       TZ-1@59a0000 {
-                               label = "TZ_1";
-                               reg = <0x59a0000 0x0280000>;
-                               read-only;
-                       };
-
-                       RPM-1@5c20000 {
-                               label = "RPM_1";
-                               reg = <0x5c20000 0x0280000>;
-                               read-only;
-                       };
-
-                       BOOTCONFIG1@5ea0000 {
-                               label = "BOOTCONFIG1";
-                               reg = <0x5ea0000 0x0060000>;
-                       };
-
-                       APPSBL-1@5f00000 {
-                               label = "APPSBL_1";
-                               reg = <0x5f00000 0x0500000>;
-                               read-only;
-                       };
-
-                       ubi-1@6400000 {
-                               label = "ubi_1";
-                               reg = <0x6400000 0x4000000>;
-                       };
-
-                       unused@a400000 {
-                               label = "unused";
-                               reg = <0xa400000 0x5c00000>;
-                       };
-               };
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-
-       ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gsbi4_serial {
-       pinctrl-0 = <&uart0_pins>;
-       pinctrl-names = "default";
-};
-
-&flash {
-       compatible = "jedec,spi-nor";
-};
-
-&sata_phy {
-       status = "disabled";
-};
-
-&sata {
-       status = "disabled";
-};
-
-&ss_phy_0 {            /* USB3 port 0 SS phy */
-       status = "okay";
-
-       rx_eq = <2>;
-       tx_deamp_3_5db = <32>;
-       mpll = <160>;
-};
-
-&ss_phy_1 {            /* USB3 port 1 SS phy */
-       status = "okay";
-
-       rx_eq = <2>;
-       tx_deamp_3_5db = <32>;
-       mpll = <160>;
-};
-
-&pcie0 {
-       status = "okay";
-
-       /delete-property/ pinctrl-0;
-       /delete-property/ pinctrl-names;
-       /delete-property/ perst-gpios;
-};
-
-&pcie1 {
-       status = "okay";
-};
-
-&pcie2 {
-       status = "okay";
-
-       /delete-property/ pinctrl-0;
-       /delete-property/ pinctrl-names;
-       /delete-property/ perst-gpios;
-};
-
-&qcom_pinmux {
-       pinctrl-names = "default";
-       pinctrl-0 = <&state_default>;
-
-       state_default: pinctrl0 {
-               pcie0_pcie2_perst {
-                       pins = "gpio3";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-disable;
-                       output-high;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio7", "gpio8", "gpio9", "gpio22",
-                              "gpio23", "gpio24", "gpio25", "gpio53";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio54";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       beeper_pins: beeper_pins {
-               mux {
-                       pins = "gpio55";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       rpm_pins: rpm_pins {
-               mux {
-                       pins = "gpio12", "gpio13";
-                       function = "gsbi4";
-                       drive-strength = <10>;
-                       bias-disable;
-               };
-       };
-
-       uart0_pins: uart0_pins {
-               mux {
-                       pins = "gpio10", "gpio11";
-                       function = "gsbi4";
-                       drive-strength = <10>;
-                       bias-disable;
-               };
-       };
-
-       spi_pins: spi_pins {
-               mux {
-                       pins = "gpio18", "gpio19";
-                       function = "gsbi5";
-                       drive-strength = <10>;
-                       bias-pull-down;
-               };
-
-               clk {
-                       pins = "gpio21";
-                       function = "gsbi5";
-                       drive-strength = <12>;
-                       bias-pull-down;
-               };
-
-               cs {
-                       pins = "gpio20";
-                       function = "gpio";
-                       drive-strength = <10>;
-                       bias-pull-up;
-               };
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&tcsr {
-       qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
deleted file mode 100644 (file)
index 04a2261..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
+++ /dev/null
@@ -1,526 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "Buffalo WXR-2533DHP";
-       compatible = "buffalo,wxr-2533dhp", "qcom,ipq8064";
-
-       memory@42000000 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       aliases {
-               led-boot = &power;
-               led-failsafe = &diag;
-               led-running = &power;
-               led-upgrade = &power;
-       };
-
-       chosen {
-               /* use "ubi_rootfs" volume in "ubi" partition as rootfs */
-               bootargs = "ubi.block=0,1 root=/dev/ubiblock0_1 rootfstype=squashfs";
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               usb {
-                       label = "green:usb";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-                       linux,default-trigger = "usbport";
-                       trigger-sources = <&hub_port0 &hub_port1>;
-               };
-
-               guestport {
-                       label = "green:guestport";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-
-               diag: diag {
-                       label = "orange:diag";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               internet_orange {
-                       label = "orange:internet";
-                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
-               };
-
-               internet_white {
-                       label = "white:internet";
-                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
-               };
-
-               wireless_orange {
-                       label = "orange:wireless";
-                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
-               };
-
-               wireless_white {
-                       label = "white:wireless";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
-               };
-
-               router_orange {
-                       label = "orange:router";
-                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
-               };
-
-               router_white {
-                       label = "white:router";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
-               };
-
-               power: power {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-               };
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               power {
-                       label = "power";
-                       gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_POWER>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               eject {
-                       label = "eject";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_EJECTCD>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               guest {
-                       label = "guest";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
-                       linux,code = <BTN_0>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               ap {
-                       label = "ap";
-                       gpios = <&qcom_pinmux 55 GPIO_ACTIVE_LOW>;
-                       linux,code = <BTN_1>;
-                       linux,input-type = <EV_SW>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               router {
-                       label = "router";
-                       gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
-                       linux,code = <BTN_1>;
-                       linux,input-type = <EV_SW>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               auto {
-                       label = "auto";
-                       gpios = <&qcom_pinmux 57 GPIO_ACTIVE_LOW>;
-                       linux,code = <BTN_1>;
-                       linux,input-type = <EV_SW>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       cs@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       ubi@0 {
-                               label = "ubi";
-                               reg = <0x0000000 0x4000000>;
-                       };
-
-                       rootfs_1@4000000 {
-                               label = "rootfs_1";
-                               reg = <0x4000000 0x4000000>;
-                       };
-               };
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x07600000  /* PAD0_MODE */
-                       0x00008 0x01000000  /* PAD5_MODE */
-                       0x0000c 0x00000080  /* PAD6_MODE */
-                       0x00050 0xcc35cc35  /* LED_CTRL0 */
-                       0x00054 0xca35ca35  /* LED_CTRL1 */
-                       0x00058 0xc935c935  /* LED_CTRL2 */
-                       0x0005c 0x03ffff00  /* LED_CTRL3 */
-                       0x000e4 0x0006a545  /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x0000007e  /* PORT0_STATUS */
-                       0x00094 0x0000007e  /* PORT6_STATUS */
-                       >;
-       };
-
-       ethernet-phy@4 {
-               reg = <4>;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       nvmem-cells = <&macaddr_ART_6>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-
-       nvmem-cells = <&macaddr_ART_0>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gsbi4_serial {
-       pinctrl-0 = <&uart0_pins>;
-       pinctrl-names = "default";
-};
-
-&gsbi5 {
-       status = "okay";
-       qcom,mode = <GSBI_PROT_SPI>;
-
-       spi@1a280000 {
-               status = "okay";
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-
-               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-
-               flash@0 {
-                       compatible = "jedec,spi-nor";
-                       spi-max-frequency = <50000000>;
-                       reg = <0>;
-
-                       partitions {
-                               compatible = "fixed-partitions";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               SBL1@0 {
-                                       label = "SBL1";
-                                       reg = <0x0 0x10000>;
-                                       read-only;
-                               };
-
-                               MIBIB@10000 {
-                                       label = "MIBIB";
-                                       reg = <0x10000 0x20000>;
-                                       read-only;
-                               };
-
-                               SBL2@30000 {
-                                       label = "SBL2";
-                                       reg = <0x30000 0x30000>;
-                                       read-only;
-                               };
-
-                               SBL3@60000 {
-                                       label = "SBL3";
-                                       reg = <0x60000 0x30000>;
-                                       read-only;
-                               };
-
-                               DDRCONFIG@90000 {
-                                       label = "DDRCONFIG";
-                                       reg = <0x90000 0x10000>;
-                                       read-only;
-                               };
-
-                               SSD@a0000 {
-                                       label = "SSD";
-                                       reg = <0xa0000 0x10000>;
-                                       read-only;
-                               };
-
-                               TZ@b0000 {
-                                       label = "TZ";
-                                       reg = <0xb0000 0x30000>;
-                                       read-only;
-                               };
-
-                               RPM@e0000 {
-                                       label = "RPM";
-                                       reg = <0xe0000 0x20000>;
-                                       read-only;
-                               };
-
-                               APPSBL@100000 {
-                                       label = "APPSBL";
-                                       reg = <0x100000 0x70000>;
-                                       read-only;
-                               };
-
-                               APPSBLENV@170000 {
-                                       label = "APPSBLENV";
-                                       reg = <0x170000 0x10000>;
-                                       read-only;
-                               };
-
-                               ART@180000 {
-                                       label = "ART";
-                                       reg = <0x180000 0x40000>;
-                                       read-only;
-
-                                       compatible = "nvmem-cells";
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-
-                                       macaddr_ART_0: macaddr@0 {
-                                               reg = <0x0 0x6>;
-                                       };
-
-                                       macaddr_ART_6: macaddr@6 {
-                                               reg = <0x6 0x6>;
-                                       };
-
-                                       macaddr_ART_18: macaddr@18 {
-                                               reg = <0x18 0x6>;
-                                       };
-
-                                       macaddr_ART_1e: macaddr@1e {
-                                               reg = <0x1e 0x6>;
-                                       };
-
-                                       precal_ART_1000: precal@1000 {
-                                               reg = <0x1000 0x2f20>;
-                                       };
-
-                                       precal_ART_5000: precal@5000 {
-                                               reg = <0x5000 0x2f20>;
-                                       };
-                               };
-
-                               BOOTCONFIG@1c0000 {
-                                       label = "BOOTCONFIG";
-                                       reg = <0x1c0000 0x10000>;
-                                       read-only;
-                               };
-
-                               APPSBL_1@1d0000 {
-                                       label = "APPSBL_1";
-                                       reg = <0x1d0000 0x70000>;
-                                       read-only;
-                               };
-                       };
-               };
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-
-       pinctrl-0 = <&usb_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&dwc3_0 {
-       #address-cells = <1>;
-       #size-cells = <0>;
-
-       hub_port0: port@1 {
-               reg = <1>;
-               #trigger-source-cells = <0>;
-       };
-};
-
-&dwc3_1 {
-       #address-cells = <1>;
-       #size-cells = <0>;
-
-       hub_port1: port@1 {
-               reg = <1>;
-               #trigger-source-cells = <0>;
-       };
-};
-
-&pcie0 {
-       status = "okay";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-       max-link-speed = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>;
-                       nvmem-cell-names = "mac-address", "pre-calibration";
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio6", "gpio54", "gpio55", "gpio56", "gpio57",
-                               "gpio58", "gpio64", "gpio65";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio22",
-                               "gpio23", "gpio24", "gpio25", "gpio26", "gpio53";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       uart0_pins: uart0_pins {
-               mux {
-                       pins = "gpio10", "gpio11";
-                       function = "gsbi4";
-                       drive-strength = <12>;
-                       bias-disable;
-               };
-       };
-
-       spi_pins: spi_pins {
-               mux {
-                       pins = "gpio18", "gpio19", "gpio21";
-                       function = "gsbi5";
-                       bias-pull-down;
-               };
-
-               data {
-                       pins = "gpio18", "gpio19";
-                       drive-strength = <10>;
-               };
-
-               cs{
-                       pins = "gpio20";
-                       drive-strength = <10>;
-                       bias-pull-up;
-               };
-
-               clk {
-                       pins = "gpio21";
-                       drive-strength = <12>;
-               };
-       };
-
-       usb_pwr_en_pins: usb_pwr_en_pins {
-               mux{
-                       pins = "gpio68";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-                       output-high;
-               };
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
deleted file mode 100644 (file)
index 969ca72..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
+++ /dev/null
@@ -1,316 +0,0 @@
-#include "qcom-ipq8065.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "ZyXEL NBG6817";
-       compatible = "zyxel,nbg6817", "qcom,ipq8065", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       aliases {
-               mdio-gpio0 = &mdio0;
-               sdcc1 = &sdcc1;
-
-               led-boot = &power;
-               led-failsafe = &power;
-               led-running = &power;
-               led-upgrade = &power;
-       };
-
-       chosen {
-               bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd fstools_ignore_partname=1";
-               append-rootblock = "root=/dev/mmcblk0p";
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wifi {
-                       label = "wifi";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RFKILL>;
-                       linux,input-type = <EV_SW>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               internet {
-                       label = "white:internet";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
-               };
-
-               power: power {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-                       default-state = "keep";
-               };
-
-               wifi2g {
-                       label = "amber:wifi2g";
-                       gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
-               };
-
-               /* wifi2g amber from the manual is missing */
-
-               wifi5g {
-                       label = "amber:wifi5g";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
-               };
-
-               /* wifi5g amber from the manual is missing */
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio53", "gpio54", "gpio65";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio9", "gpio26", "gpio33", "gpio64";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-               };
-       };
-
-       mdio0_pins: mdio0_pins {
-               clk {
-                       pins = "gpio1";
-                       input-disable;
-               };
-       };
-
-       rgmii2_pins: rgmii2_pins {
-               tx {
-                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
-                       input-disable;
-               };
-       };
-
-       spi_pins: spi_pins {
-               cs {
-                       pins = "gpio20";
-                       drive-strength = <12>;
-               };
-       };
-
-       usb0_pwr_en_pins: usb0_pwr_en_pins {
-               mux {
-                       pins = "gpio16", "gpio17";
-                       function = "gpio";
-                       drive-strength = <12>;
-               };
-
-               pwr {
-                       pins = "gpio17";
-                       bias-pull-down;
-                       output-high;
-               };
-
-               ovc {
-                       pins = "gpio16";
-                       bias-pull-up;
-               };
-       };
-
-       usb1_pwr_en_pins: usb1_pwr_en_pins {
-               mux {
-                       pins = "gpio14", "gpio15";
-                       function = "gpio";
-                       drive-strength = <12>;
-               };
-
-               pwr {
-                       pins = "gpio14";
-                       bias-pull-down;
-                       output-high;
-               };
-
-               ovc {
-                       pins = "gpio15";
-                       bias-pull-up;
-               };
-       };
-};
-
-&gsbi5 {
-       qcom,mode = <GSBI_PROT_SPI>;
-       status = "okay";
-
-       spi4: spi@1a280000 {
-               status = "okay";
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-
-               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-
-               m25p80@0 {
-                       compatible = "jedec,spi-nor";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       spi-max-frequency = <51200000>;
-                       reg = <0>;
-
-                       partitions {
-                               compatible = "qcom,smem-part";
-                       };
-               };
-       };
-};
-
-&usb3_0 {
-       status = "okay";
-
-       pinctrl-0 = <&usb0_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&usb3_1 {
-       status = "okay";
-
-       pinctrl-0 = <&usb1_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&pcie0 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
-       pinctrl-0 = <&pcie0_pins>;
-       pinctrl-names = "default";
-};
-
-&pcie1 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
-       pinctrl-0 = <&pcie1_pins>;
-       pinctrl-names = "default";
-       max-link-speed = <1>;
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0xaa545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       0x00970 0x1e864443  /* QM_PORT0_CTRL0 */
-                       0x00974 0x000001c6  /* QM_PORT0_CTRL1 */
-                       0x00978 0x19008643  /* QM_PORT1_CTRL0 */
-                       0x0097c 0x000001c6  /* QM_PORT1_CTRL1 */
-                       0x00980 0x19008643  /* QM_PORT2_CTRL0 */
-                       0x00984 0x000001c6  /* QM_PORT2_CTRL1 */
-                       0x00988 0x19008643  /* QM_PORT3_CTRL0 */
-                       0x0098c 0x000001c6  /* QM_PORT3_CTRL1 */
-                       0x00990 0x19008643  /* QM_PORT4_CTRL0 */
-                       0x00994 0x000001c6  /* QM_PORT4_CTRL1 */
-                       0x00998 0x1e864443  /* QM_PORT5_CTRL0 */
-                       0x0099c 0x000001c6  /* QM_PORT5_CTRL1 */
-                       0x009a0 0x1e864443  /* QM_PORT6_CTRL0 */
-                       0x009a4 0x000001c6  /* QM_PORT6_CTRL1 */
-                       >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-               qca,ar8327-initvals = <
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       >;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-       qcom,phy_mdio_addr = <4>;
-       qcom,poll_required = <0>;
-       qcom,rgmii_delay = <1>;
-       qcom,phy_mii_type = <0>;
-       qcom,emulation = <0>;
-       qcom,irq = <255>;
-       mdiobus = <&mdio0>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-       qcom,phy_mdio_addr = <0>;       /* none */
-       qcom,poll_required = <0>;       /* no polling */
-       qcom,rgmii_delay = <0>;
-       qcom,phy_mii_type = <1>;
-       qcom,emulation = <0>;
-       qcom,irq = <258>;
-       mdiobus = <&mdio0>;
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&amba {
-       sdcc1: sdcc@12400000 {
-               status = "okay";
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi
deleted file mode 100644 (file)
index c899fa7..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi
+++ /dev/null
@@ -1,453 +0,0 @@
-#include "qcom-ipq8065.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       reserved-memory {
-               rsvd@5fe00000 {
-                       reg = <0x5fe00000 0x200000>;
-                       reusable;
-               };
-
-               ramoops@42100000 {
-                       compatible = "ramoops";
-                       reg = <0x42100000 0x40000>;
-                       record-size = <0x4000>;
-                       console-size = <0x4000>;
-                       ftrace-size = <0x4000>;
-                       pmsg-size = <0x4000>;
-               };
-       };
-
-       aliases {
-               label-mac-device = &gmac2;
-
-               led-boot = &power_white;
-               led-failsafe = &power_amber;
-               led-running = &power_white;
-               led-upgrade = &power_amber;
-
-               mdio-gpio0 = &mdio0;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               wifi {
-                       label = "wifi";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RFKILL>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds: leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               power_white: power_white {
-                       label = "white:power";
-                       gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
-                       default-state = "keep";
-               };
-
-               power_amber: power_amber {
-                       label = "amber:power";
-                       gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan_white {
-                       label = "white:wan";
-                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
-               };
-
-               wan_amber {
-                       label = "amber:wan";
-                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
-               };
-
-               wifi {
-                       label = "white:wifi";
-                       gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
-               };
-
-               wps {
-                       label = "white:wps";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio6", "gpio54", "gpio65";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio7", "gpio8", "gpio9",
-                               "gpio22", "gpio23", "gpio24",
-                               "gpio26", "gpio53", "gpio64";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-               };
-       };
-
-       mdio0_pins: mdio0_pins {
-               clk {
-                       pins = "gpio1";
-                       input-disable;
-               };
-       };
-
-       rgmii2_pins: rgmii2_pins {
-               tx {
-                       pins = "gpio27", "gpio28", "gpio29",
-                               "gpio30", "gpio31", "gpio32";
-                       input-disable;
-               };
-       };
-
-       spi_pins: spi_pins {
-               mux {
-                       pins = "gpio18", "gpio19", "gpio21";
-                       function = "gsbi5";
-                       bias-pull-down;
-               };
-
-               data {
-                       pins = "gpio18", "gpio19";
-                       drive-strength = <10>;
-               };
-
-               cs {
-                       pins = "gpio20";
-                       drive-strength = <10>;
-                       bias-pull-up;
-               };
-
-               clk {
-                       pins = "gpio21";
-                       drive-strength = <12>;
-               };
-       };
-
-       spi6_pins: spi6_pins {
-               mux {
-                       pins = "gpio55", "gpio56", "gpio58";
-                       function = "gsbi6";
-                       bias-pull-down;
-               };
-
-               mosi {
-                       pins = "gpio55";
-                       drive-strength = <12>;
-               };
-
-               miso {
-                       pins = "gpio56";
-                       drive-strength = <14>;
-               };
-
-               cs {
-                       pins = "gpio57";
-                       drive-strength = <12>;
-                       bias-pull-up;
-               };
-
-               clk {
-                       pins = "gpio58";
-                       drive-strength = <12>;
-               };
-
-               reset {
-                       pins = "gpio33";
-                       drive-strength = <10>;
-                       bias-pull-down;
-                       output-high;
-               };
-       };
-
-       usb0_pwr_en_pins: usb0_pwr_en_pins {
-               mux {
-                       pins = "gpio15";
-                       function = "gpio";
-                       drive-strength = <12>;
-                       bias-pull-down;
-                       output-high;
-               };
-       };
-
-       usb1_pwr_en_pins: usb1_pwr_en_pins {
-               mux {
-                       pins = "gpio16", "gpio68";
-                       function = "gpio";
-                       drive-strength = <12>;
-                       bias-pull-down;
-                       output-high;
-               };
-       };
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               nand-is-boot-medium;
-               qcom,boot_pages_size = <0x1180000>;
-
-               partitions: partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       partition@0 {
-                               label = "qcadata";
-                               reg = <0x0000000 0x0c80000>;
-                               read-only;
-                       };
-
-                       partition@c80000 {
-                               label = "APPSBL";
-                               reg = <0x0c80000 0x0500000>;
-                               read-only;
-                       };
-
-                       partition@1180000 {
-                               label = "APPSBLENV";
-                               reg = <0x1180000 0x0080000>;
-                               read-only;
-                       };
-
-                       art: partition@1200000 {
-                               label = "art";
-                               reg = <0x1200000 0x0140000>;
-                               read-only;
-                               compatible = "nvmem-cells";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               macaddr_art_0: macaddr@0 {
-                                       reg = <0x0 0x6>;
-                               };
-
-                               macaddr_art_6: macaddr@6 {
-                                       reg = <0x6 0x6>;
-                               };
-
-                               precal_art_1000: precal@1000 {
-                                       reg = <0x1000 0x2f20>;
-                               };
-
-                               precal_art_5000: precal@5000 {
-                                       reg = <0x5000 0x2f20>;
-                               };
-                       };
-
-                       partition@1340000 {
-                               label = "artbak";
-                               reg = <0x1340000 0x0140000>;
-                               read-only;
-                       };
-
-                       partition@1480000 {
-                               label = "kernel";
-                               reg = <0x1480000 0x0400000>;
-                       };
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0xaa545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       0x00970 0x1e864443  /* QM_PORT0_CTRL0 */
-                       0x00974 0x000001c6  /* QM_PORT0_CTRL1 */
-                       0x00978 0x19008643  /* QM_PORT1_CTRL0 */
-                       0x0097c 0x000001c6  /* QM_PORT1_CTRL1 */
-                       0x00980 0x19008643  /* QM_PORT2_CTRL0 */
-                       0x00984 0x000001c6  /* QM_PORT2_CTRL1 */
-                       0x00988 0x19008643  /* QM_PORT3_CTRL0 */
-                       0x0098c 0x000001c6  /* QM_PORT3_CTRL1 */
-                       0x00990 0x19008643  /* QM_PORT4_CTRL0 */
-                       0x00994 0x000001c6  /* QM_PORT4_CTRL1 */
-                       0x00998 0x1e864443  /* QM_PORT5_CTRL0 */
-                       0x0099c 0x000001c6  /* QM_PORT5_CTRL1 */
-                       0x009a0 0x1e864443  /* QM_PORT6_CTRL0 */
-                       0x009a4 0x000001c6  /* QM_PORT6_CTRL1 */
-                       >;
-               qca,ar8327-vlans = <
-                       0x1     0x5e        /* VLAN1 Ports 1/2/3/4/6 */
-                       0x2     0x21        /* VLAN2 Ports 0/5 */
-               >;
-       };
-
-       phy4: ethernet-phy@4 {
-               reg = <4>;
-               qca,ar8327-initvals = <
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       >;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-
-       phy-mode = "rgmii";
-       qcom,id = <1>;
-       qcom,phy_mdio_addr = <4>;
-       qcom,poll_required = <0>;
-       qcom,rgmii_delay = <1>;
-       qcom,phy_mii_type = <0>;
-       qcom,emulation = <0>;
-       qcom,irq = <255>;
-       mdiobus = <&mdio0>;
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       nvmem-cells = <&macaddr_art_6>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-
-       phy-mode = "sgmii";
-       qcom,id = <2>;
-       qcom,phy_mdio_addr = <0>;       /* none */
-       qcom,poll_required = <0>;       /* no polling */
-       qcom,rgmii_delay = <0>;
-       qcom,phy_mii_type = <1>;
-       qcom,emulation = <0>;
-       qcom,irq = <258>;
-       mdiobus = <&mdio0>;
-
-       nvmem-cells = <&macaddr_art_0>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&sata_phy {
-       status = "okay";
-};
-
-&sata {
-       status = "okay";
-};
-
-&usb3_0 {
-       status = "okay";
-
-       pinctrl-0 = <&usb0_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&usb3_1 {
-       status = "okay";
-
-       pinctrl-0 = <&usb1_pwr_en_pins>;
-       pinctrl-names = "default";
-};
-
-&pcie0 {
-       status = "okay";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi0: wifi@1,0 {
-                       compatible = "pci168c,0046";
-                       reg = <0x00010000 0 0 0 0>;
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-
-       max-link-speed = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi1: wifi@1,0 {
-                       compatible = "pci168c,0046";
-                       reg = <0x00010000 0 0 0 0>;
-               };
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
deleted file mode 100644 (file)
index bf7c963..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
+++ /dev/null
@@ -1,48 +0,0 @@
-#include "qcom-ipq8065-nighthawk.dtsi"
-
-/ {
-       model = "Netgear Nighthawk X4S R7800";
-       compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
-};
-
-&leds {
-       usb1 {
-               label = "white:usb1";
-               gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-       };
-
-       usb2 {
-               label = "white:usb2";
-               gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-       };
-
-       esata {
-               label = "white:esata";
-               gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
-       };
-};
-
-&partitions {
-       partition@1880000 {
-               label = "ubi";
-               reg = <0x1880000 0x6080000>;
-       };
-
-       partition@7900000 {
-               label = "reserve";
-               reg = <0x7900000 0x0700000>;
-               read-only;
-       };
-};
-
-&wifi0 {
-       nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
-       nvmem-cell-names = "mac-address", "pre-calibration";
-       mac-address-increment = <(1)>;
-};
-
-&wifi1 {
-       nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
-       nvmem-cell-names = "mac-address", "pre-calibration";
-       mac-address-increment = <(2)>;
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
deleted file mode 100644 (file)
index 9616333..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
+++ /dev/null
@@ -1,403 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "qcom-ipq8065.dtsi"
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "Askey RT4230W REV6";
-       compatible = "askey,rt4230w-rev6", "qcom,ipq8065", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x3e000000>;
-               device_type = "memory";
-       };
-
-       aliases {
-               led-boot = &ledctrl3;
-               led-failsafe = &ledctrl1;
-               led-running = &ledctrl2;
-               led-upgrade = &ledctrl3;
-       };
-
-       chosen {
-               bootargs = "rootfstype=squashfs noinitrd";
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               ledctrl1: ledctrl1 {
-                       label = "ledctrl1";
-                       gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
-               };
-
-               ledctrl2: ledctrl2 {
-                       label = "ledctrl2";
-                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
-               };
-
-               ledctrl3: ledctrl3 {
-                       label = "ledctrl3";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio54", "gpio68";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio22", "gpio23", "gpio24";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-               };
-       };
-
-       rgmii2_pins: rgmii2_pins {
-               mux {
-                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31",
-                               "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62";
-                       function = "rgmii2";
-                       drive-strength = <8>;
-                       bias-disable;
-               };
-
-               tx {
-                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
-                       input-disable;
-               };
-       };
-
-       spi_pins: spi_pins {
-               cs {
-                       pins = "gpio20";
-                       drive-strength = <12>;
-               };
-       };
-};
-
-&gsbi5 {
-       qcom,mode = <GSBI_PROT_SPI>;
-       status = "okay";
-
-       spi@1a280000 {
-               status = "okay";
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-
-               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-
-               flash@0 {
-                       compatible = "everspin,mr25h256";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       spi-max-frequency = <40000000>;
-                       reg = <0>;
-               };
-       };
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       partition@0 {
-                               label = "0:SBL1";
-                               reg = <0x0000000 0x0040000>;
-                               read-only;
-                       };
-
-                       partition@40000 {
-                               label = "0:MIBIB";
-                               reg = <0x0040000 0x0140000>;
-                               read-only;
-                       };
-
-                       partition@180000 {
-                               label = "0:SBL2";
-                               reg = <0x0180000 0x0140000>;
-                               read-only;
-                       };
-
-                       partition@2c0000 {
-                               label = "0:SBL3";
-                               reg = <0x02c0000 0x0280000>;
-                               read-only;
-                       };
-
-                       partition@540000 {
-                               label = "0:DDRCONFIG";
-                               reg = <0x0540000 0x0120000>;
-                               read-only;
-                       };
-
-                       partition@660000 {
-                               label = "0:SSD";
-                               reg = <0x0660000 0x0120000>;
-                               read-only;
-                       };
-
-                       partition@780000 {
-                               label = "0:TZ";
-                               reg = <0x0780000 0x0280000>;
-                               read-only;
-                       };
-
-                       partition@a00000 {
-                               label = "0:RPM";
-                               reg = <0x0a00000 0x0280000>;
-                               read-only;
-                       };
-
-                       partition@c80000 {
-                               label = "0:APPSBL";
-                               reg = <0x0c80000 0x0500000>;
-                               read-only;
-                       };
-
-                       partition@1180000 {
-                               label = "0:APPSBLENV";
-                               reg = <0x1180000 0x0080000>;
-                       };
-
-                       partition@1200000 {
-                               label = "0:ART";
-                               reg = <0x1200000 0x0140000>;
-                               read-only;
-                               compatible = "nvmem-cells";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               macaddr_ART_0: macaddr@0 {
-                                       reg = <0x0 0x6>;
-                               };
-
-                               macaddr_ART_6: macaddr@6 {
-                                       reg = <0x6 0x6>;
-                               };
-
-                               precal_ART_1000: precal@1000 {
-                                       reg = <0x1000 0x2f20>;
-                               };
-
-                               precal_ART_5000: precal@5000 {
-                                       reg = <0x5000 0x2f20>;
-                               };
-                       };
-
-                       partition@1340000 {
-                               label = "0:BOOTCONFIG";
-                               reg = <0x1340000 0x0060000>;
-                               read-only;
-                       };
-
-                       partition@13a0000 {
-                               label = "0:SBL2_1";
-                               reg = <0x13a0000 0x0140000>;
-                               read-only;
-                       };
-
-                       partition@14e0000 {
-                               label = "0:SBL3_1";
-                               reg = <0x14e0000 0x0280000>;
-                               read-only;
-                       };
-
-                       partition@1760000 {
-                               label = "0:DDRCONFIG_1";
-                               reg = <0x1760000 0x0120000>;
-                               read-only;
-                       };
-
-                       partition@1880000 {
-                               label = "0:SSD_1";
-                               reg = <0x1880000 0x0120000>;
-                               read-only;
-                       };
-
-                       partition@19a0000 {
-                               label = "0:TZ_1";
-                               reg = <0x19a0000 0x0280000>;
-                               read-only;
-                       };
-
-                       partition@1c20000 {
-                               label = "0:RPM_1";
-                               reg = <0x1c20000 0x0280000>;
-                               read-only;
-                       };
-
-                       partition@1ea0000 {
-                               label = "0:BOOTCONFIG1";
-                               reg = <0x1ea0000 0x0060000>;
-                               read-only;
-                       };
-
-                       partition@1f00000 {
-                               label = "0:APPSBL_1";
-                               reg = <0x1f00000 0x0500000>;
-                               read-only;
-                       };
-
-                       partition@2400000 {
-                               label = "ubi";
-                               reg = <0x2400000 0x1a000000>;
-                       };
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0x0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0xaa545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       0x00050 0xcf02cf02  /* LED_CTRL_0 */
-                       0x00054 0xc832c832  /* LED_CTRL_1 */
-                       >;
-       };
-};
-
-&gmac0 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <0>;
-
-       nvmem-cells = <&macaddr_ART_0>;
-       nvmem-cell-names = "mac-address";
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <1>;
-
-       nvmem-cells = <&macaddr_ART_6>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
-       pinctrl-0 = <&pcie0_pins>;
-       pinctrl-names = "default";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi0: wifi@1,0 {
-                       compatible = "pci168c,0046";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&precal_ART_1000>;
-                       nvmem-cell-names = "pre-calibration";
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
-       pinctrl-0 = <&pcie1_pins>;
-       pinctrl-names = "default";
-       max-link-speed = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi1: wifi@1,0 {
-                       compatible = "pci168c,0046";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&precal_ART_5000>;
-                       nvmem-cell-names = "pre-calibration";
-               };
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts
deleted file mode 100644 (file)
index 871cc09..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts
+++ /dev/null
@@ -1,425 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "qcom-ipq8065.dtsi"
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "Arris TR4400 v2";
-       compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064";
-
-       memory@0 {
-               reg = <0x42000000 0x1e000000>;
-               device_type = "memory";
-       };
-
-       aliases {
-               led-boot = &led_status_blue;
-               led-failsafe = &led_status_red;
-               led-running = &led_status_blue;
-               led-upgrade = &led_status_red;
-       };
-
-       chosen {
-               bootargs = "rootfstype=squashfs noinitrd";
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-
-               wps {
-                       label = "wps";
-                       gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_WPS_BUTTON>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               led_status_red: status_red {
-                       label = "red:status";
-                       gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_status_blue: status_blue {
-                       label = "blue:status";
-                       gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio6", "gpio54";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio7", "gpio8";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-               };
-       };
-
-       rgmii2_pins: rgmii2_pins {
-               tx {
-                       pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
-                       input-disable;
-               };
-       };
-
-       spi_pins: spi_pins {
-               cs {
-                       pins = "gpio20";
-                       drive-strength = <12>;
-               };
-       };
-};
-
-&gsbi5 {
-       qcom,mode = <GSBI_PROT_SPI>;
-       status = "okay";
-
-       spi@1a280000 {
-               status = "okay";
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-
-               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-
-               flash@0 {
-                       compatible = "everspin,mr25h256";
-                       spi-max-frequency = <40000000>;
-                       reg = <0>;
-               };
-       };
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               reg = <0>;
-               compatible = "qcom,nandcs";
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       partition@0 {
-                               label = "0:SBL1";
-                               reg = <0x0000000 0x0040000>;
-                               read-only;
-                       };
-                       partition@40000 {
-                               label = "0:MIBIB";
-                               reg = <0x0040000 0x0140000>;
-                               read-only;
-                       };
-                       partition@180000 {
-                               label = "0:SBL2";
-                               reg = <0x0180000 0x0140000>;
-                               read-only;
-                       };
-                       partition@2c0000 {
-                               label = "0:SBL3";
-                               reg = <0x02c0000 0x0280000>;
-                               read-only;
-                       };
-                       partition@540000 {
-                               label = "0:DDRCONFIG";
-                               reg = <0x0540000 0x0120000>;
-                               read-only;
-                       };
-                       partition@660000 {
-                               label = "0:SSD";
-                               reg = <0x0660000 0x0120000>;
-                               read-only;
-                       };
-                       partition@780000 {
-                               label = "0:TZ";
-                               reg = <0x0780000 0x0280000>;
-                               read-only;
-                       };
-                       partition@a00000 {
-                               label = "0:RPM";
-                               reg = <0x0a00000 0x0280000>;
-                               read-only;
-                       };
-                       partition@c80000 {
-                               label = "0:APPSBL";
-                               reg = <0x0c80000 0x0500000>;
-                               read-only;
-                       };
-                       partition@1180000 {
-                               label = "0:APPSBLENV";
-                               reg = <0x1180000 0x0080000>;
-                       };
-                       partition@1200000 {
-                               label = "0:ART";
-                               reg = <0x1200000 0x0140000>;
-                               read-only;
-
-                               compatible = "nvmem-cells";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               precal_ART_1000: precal@1000 {
-                                       reg = <0x1000 0x2f20>;
-                               };
-                               precal_ART_5000: precal@5000 {
-                                       reg = <0x5000 0x2f20>;
-                               };
-                       };
-                       stock_partition@1340000 {
-                               label = "stock_rootfs";
-                               reg = <0x1340000 0x4000000>;
-                       };
-                       partition@5340000 {
-                               label = "0:BOOTCONFIG";
-                               reg = <0x5340000 0x0060000>;
-                               read-only;
-                       };
-                       partition@53a0000 {
-                               label = "0:SBL2_1";
-                               reg = <0x53a0000 0x0140000>;
-                               read-only;
-                       };
-                       partition@54e0000 {
-                               label = "0:SBL3_1";
-                               reg = <0x54e0000 0x0280000>;
-                               read-only;
-                       };
-                       partition@5760000 {
-                               label = "0:DDRCONFIG_1";
-                               reg = <0x5760000 0x0120000>;
-                               read-only;
-                       };
-                       partition@5880000 {
-                               label = "0:SSD_1";
-                               reg = <0x5880000 0x0120000>;
-                               read-only;
-                       };
-                       partition@59a0000 {
-                               label = "0:TZ_1";
-                               reg = <0x59a0000 0x0280000>;
-                               read-only;
-                       };
-                       partition@5c20000 {
-                               label = "0:RPM_1";
-                               reg = <0x5c20000 0x0280000>;
-                               read-only;
-                       };
-                       partition@5ea0000 {
-                               label = "0:BOOTCONFIG1";
-                               reg = <0x5ea0000 0x0060000>;
-                               read-only;
-                       };
-                       partition@5f00000 {
-                               label = "0:APPSBL_1";
-                               reg = <0x5f00000 0x0500000>;
-                               read-only;
-                       };
-                       stock_partition@6400000 {
-                               label = "stock_rootfs_1";
-                               reg = <0x6400000 0x4000000>;
-                       };
-                       stock_partition@a400000 {
-                               label = "stock_fw_env";
-                               reg = <0xa400000 0x0100000>;
-                       };
-                       stock_partition@a500000 {
-                               label = "stock_config";
-                               reg = <0xa500000 0x0800000>;
-                       };
-                       stock_partition@ad00000 {
-                               label = "stock_PKI";
-                               reg = <0xad00000 0x0200000>;
-                       };
-                       stock_partition@af00000 {
-                               label = "stock_scfgmgr";
-                               reg = <0xaf00000 0x0100000>;
-                       };
-
-                       partition@6400000 {
-                               label = "fw_env";
-                               reg = <0x6400000 0x0100000>;
-
-                               compatible = "nvmem-cells";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               macaddr_fw_env_0: macaddr@0 {
-                                       reg = <0x00 0x6>;
-                               };
-                               macaddr_fw_env_6: macaddr@6 {
-                                       reg = <0x06 0x6>;
-                               };
-                               macaddr_fw_env_c: macaddr@c {
-                                       reg = <0x0c 0x6>;
-                               };
-                               macaddr_fw_env_12: macaddr@12 {
-                                       reg = <0x12 0x6>;
-                               };
-                               macaddr_fw_env_18: macaddr@18 {
-                                       reg = <0x18 0x6>;
-                               };
-                       };
-                       partition@6500000 {
-                               label = "ubi";
-                               reg = <0x6500000 0x9b00000>;
-                       };
-                       partition@1340000 {
-                               label = "extra";
-                               reg = <0x1340000 0x4000000>;
-                       };
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       ethernet-phy@0 {
-               reg = <0x0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0xaa545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
-
-       phy7: ethernet-phy@7 {
-               reg = <7>;
-       };
-};
-
-&gmac0 {
-       status = "okay";
-       phy-mode = "rgmii";
-       qcom,id = <0>;
-
-       nvmem-cells = <&macaddr_fw_env_18>;
-       nvmem-cell-names = "mac-address";
-
-       pinctrl-0 = <&rgmii2_pins>;
-       pinctrl-names = "default";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac1 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <1>;
-
-       nvmem-cells = <&macaddr_fw_env_0>;
-       nvmem-cell-names = "mac-address";
-
-       fixed-link {
-               speed = <1000>;
-               full-duplex;
-       };
-};
-
-&gmac3 {
-       status = "okay";
-       phy-mode = "sgmii";
-       qcom,id = <3>;
-       phy-handle = <&phy7>;
-
-       nvmem-cells = <&macaddr_fw_env_6>;
-       nvmem-cell-names = "mac-address";
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie0 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
-       pinctrl-0 = <&pcie0_pins>;
-       pinctrl-names = "default";
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi0: wifi@1,0 {
-                       compatible = "pci168c,0046";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
-                       nvmem-cell-names = "pre-calibration", "mac-address";
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-       reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
-       pinctrl-0 = <&pcie1_pins>;
-       pinctrl-names = "default";
-       max-link-speed = <1>;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi1: wifi@1,0 {
-                       compatible = "pci168c,0040";
-                       reg = <0x00010000 0 0 0 0>;
-
-                       nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
-                       nvmem-cell-names = "pre-calibration", "mac-address";
-               };
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr500.dts
deleted file mode 100644 (file)
index f584735..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-xr500.dts
+++ /dev/null
@@ -1,50 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-
-#include "qcom-ipq8065-nighthawk.dtsi"
-
-/ {
-       model = "Netgear Nighthawk XR500";
-       compatible = "netgear,xr500", "qcom,ipq8065", "qcom,ipq8064";
-
-};
-
-&leds {
-       usb1 {
-               label = "white:usb1";
-               gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
-       };
-
-       usb2 {
-               label = "white:usb2";
-               gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
-       };
-};
-
-&partitions {
-       partition@1880000 {
-               label = "ubi";
-               reg = <0x1880000 0xce00000>;
-       };
-
-       partition@e680000 {
-               label = "reserve";
-               reg = <0xe680000 0x0780000>;
-               read-only;
-       };
-};
-
-&wifi0 {
-       nvmem-cells = <&macaddr_art_c>, <&precal_art_1000>;
-       nvmem-cell-names = "mac-address", "pre-calibration";
-};
-
-&wifi1 {
-       nvmem-cells = <&macaddr_art_0>, <&precal_art_5000>;
-       nvmem-cell-names = "mac-address", "pre-calibration";
-};
-
-&art {
-       macaddr_art_c: macaddr@c {
-               reg = <0xc 0x6>;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
deleted file mode 100644 (file)
index c70a5cb..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ /dev/null
@@ -1,167 +0,0 @@
-#include "qcom-ipq8064.dtsi"
-
-/ {
-       model = "Qualcomm IPQ8065";
-       compatible = "qcom,ipq8065", "qcom,ipq8064";
-
-       aliases {
-               serial0 = &gsbi4_serial;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       reserved-memory {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-
-               rsvd@41200000 {
-                       reg = <0x41200000 0x300000>;
-                       no-map;
-               };
-       };
-};
-
-&gsbi4 {
-       qcom,mode = <GSBI_PROT_I2C_UART>;
-       status = "okay";
-
-       serial@16340000 {
-               status = "okay";
-       };
-       /*
-       * The i2c device on gsbi4 should not be enabled.
-       * On ipq806x designs gsbi4 i2c is meant for exclusive
-       * RPM usage. Turning this on in kernel manifests as
-       * i2c failure for the RPM.
-       */
-};
-
-&pcie0 {
-       compatible = "qcom,pcie-ipq8064-v2";
-};
-
-&pcie1 {
-       compatible = "qcom,pcie-ipq8064-v2";
-};
-
-&pcie2 {
-       compatible = "qcom,pcie-ipq8064-v2";
-};
-
-&sata {
-       ports-implemented = <0x1>;
-};
-
-&smb208_s2a {
-       regulator-min-microvolt = <775000>;
-       regulator-max-microvolt = <1275000>;
-};
-
-&smb208_s2b {
-       regulator-min-microvolt = <775000>;
-       regulator-max-microvolt = <1275000>;
-};
-
-&ss_phy_0 {
-       qcom,rx-eq = <2>;
-       qcom,tx-deamp_3_5db = <32>;
-       qcom,mpll = <5>;
-};
-
-&ss_phy_1 {
-       qcom,rx-eq = <2>;
-       qcom,tx-deamp_3_5db = <32>;
-       qcom,mpll = <5>;
-};
-
-&opp_table_l2 {
-       /delete-node/opp-1200000000;
-
-       opp-1400000000 {
-               opp-hz = /bits/ 64 <1400000000>;
-               opp-microvolt = <1150000>;
-               clock-latency-ns = <100000>;
-               opp-level = <2>;
-       };
-};
-
-&opp_table0 {
-       /* 
-        * On ipq8065 1.2 ghz freq is not present
-        * Remove it to make cpufreq work and not
-        * complain for missing definition
-        */
-
-       /delete-node/opp-1200000000;
-
-       /*
-        * Voltage thresholds are <target min max>
-        */
-       opp-384000000 {
-               opp-microvolt-speed0-pvs0-v0 = <975000 926250 1023750>;
-               opp-microvolt-speed0-pvs1-v0 = <950000 902500 997500>;
-               opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
-               opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
-               opp-microvolt-speed0-pvs4-v0 = <875000 831250 918750>;
-               opp-microvolt-speed0-pvs5-v0 = <825000 783750 866250>;
-               opp-microvolt-speed0-pvs6-v0 = <775000 736250 813750>;
-       };
-
-       opp-600000000 {
-               opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
-               opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
-               opp-microvolt-speed0-pvs2-v0 = <950000 902500 997500>;
-               opp-microvolt-speed0-pvs3-v0 = <925000 878750 971250>;
-               opp-microvolt-speed0-pvs4-v0 = <900000 855000 945000>;
-               opp-microvolt-speed0-pvs5-v0 = <850000 807500 892500>;
-               opp-microvolt-speed0-pvs6-v0 = <800000 760000 840000>;
-       };
-
-       opp-800000000 {
-               opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
-               opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
-               opp-microvolt-speed0-pvs2-v0 = <1000000 950000 1050000>;
-               opp-microvolt-speed0-pvs3-v0 = <975000 926250 1023750>;
-               opp-microvolt-speed0-pvs4-v0 = <950000 902500 997500>;
-               opp-microvolt-speed0-pvs5-v0 = <900000 855000 945000>;
-               opp-microvolt-speed0-pvs6-v0 = <850000 807500 892500>;
-       };
-
-       opp-1000000000 {
-               opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
-               opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
-               opp-microvolt-speed0-pvs2-v0 = <1050000 997500 1102500>;
-               opp-microvolt-speed0-pvs3-v0 = <1025000 973750 1076250>;
-               opp-microvolt-speed0-pvs4-v0 = <1000000 950000 1050000>;
-               opp-microvolt-speed0-pvs5-v0 = <950000 902500 997500>;
-               opp-microvolt-speed0-pvs6-v0 = <900000 855000 945000>;
-       };
-
-       opp-1400000000 {
-               opp-microvolt-speed0-pvs0-v0 = <1175000 1116250 1233750>;
-               opp-microvolt-speed0-pvs1-v0 = <1150000 1092500 1207500>;
-               opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
-               opp-microvolt-speed0-pvs3-v0 = <1100000 1045000 1155000>;
-               opp-microvolt-speed0-pvs4-v0 = <1075000 1021250 1128750>;
-               opp-microvolt-speed0-pvs5-v0 = <1025000 973750 1076250>;
-               opp-microvolt-speed0-pvs6-v0 = <975000 926250 1023750>;
-               opp-level = <1>;
-       };
-
-       opp-1725000000 {
-               opp-hz = /bits/ 64 <1725000000>;
-               opp-microvolt-speed0-pvs0-v0 = <1262500 1199375 1325625>;
-               opp-microvolt-speed0-pvs1-v0 = <1225000 1163750 1286250>;
-               opp-microvolt-speed0-pvs2-v0 = <1200000 1140000 1260000>;
-               opp-microvolt-speed0-pvs3-v0 = <1175000 1116250 1233750>;
-               opp-microvolt-speed0-pvs4-v0 = <1150000 1092500 1207500>;
-               opp-microvolt-speed0-pvs5-v0 = <1100000 1045000 1155000>;
-               opp-microvolt-speed0-pvs6-v0 = <1050000 997500 1102500>;
-               opp-supported-hw = <0x1>;
-               clock-latency-ns = <100000>;
-               opp-level = <2>;
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi
deleted file mode 100644 (file)
index 141c71a..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-cryptid-common.dtsi
+++ /dev/null
@@ -1,239 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-
-#include "qcom-ipq8064-v2.0.dtsi"
-
-/ {
-       memory {
-               device_type = "memory";
-               linux,usable-memory = <0x41500000 0x1ea00000>;
-               reg = <0x40000000 0x20000000>;
-       };
-
-       cpus {
-               idle-states {
-                       CPU_SPC: spc {
-                               status = "disabled";
-                       };
-               };
-       };
-
-       chosen {
-               bootargs-append = " console=ttyMSM0,115200n8 ubi.mtd=ubi ubi.mtd=art";
-       };
-};
-
-&qcom_pinmux {
-       mdio0_pins_active: mdio0_pins_active {
-               mux {
-                       pins = "gpio0", "gpio1";
-                       function = "mdio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-                       output-low;
-               };
-
-               clk {
-                       pins = "gpio1";
-                       input-disable;
-               };
-       };
-
-       phy_active: phy_active {
-               phy {
-                       pins = "gpio6", "gpio7";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-down;
-                       output-high;
-               };
-       };
-
-       uart1_pins: uart1_pins {
-               mux {
-                       pins = "gpio51", "gpio52";
-                       function = "gsbi1";
-                       drive-strength = <4>;
-                       bias-disable;
-               };
-       };
-};
-
-&gsbi1 {
-       status = "okay";
-       qcom,mode = <GSBI_PROT_UART_W_FC>;
-
-       serial@12450000 {
-               status = "okay";
-
-               pinctrl-0 = <&uart1_pins>;
-               pinctrl-names = "default";
-       };
-};
-
-&pcie0 {
-       status = "okay";
-
-       /delete-property/ pinctrl-0;
-       /delete-property/ pinctrl-names;
-       /delete-property/ perst-gpios;
-
-       bridge@0,0 {
-               reg = <0x0 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi0: wifi@1,0 {
-                       compatible = "qcom,ath10k";
-                       status = "okay";
-                       reg = <0x10000 0 0 0 0>;
-               };
-       };
-};
-
-&pcie1 {
-       status = "okay";
-
-       /delete-property/ pinctrl-0;
-       /delete-property/ pinctrl-names;
-       /delete-property/ perst-gpios;
-
-       bridge@0,0 {
-               reg = <0x0 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi1: wifi@1,0 {
-                       compatible = "qcom,ath10k";
-                       status = "okay";
-                       reg = <0x10000 0 0 0 0>;
-               };
-       };
-};
-
-&pcie2 {
-       status = "okay";
-
-       /delete-property/ pinctrl-0;
-       /delete-property/ pinctrl-names;
-       /delete-property/ perst-gpios;
-
-       bridge@0,0 {
-               reg = <0x0 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi2: wifi@1,0 {
-                       compatible = "qcom,ath10k";
-                       status = "okay";
-                       reg = <0x10000 0 0 0 0>;
-               };
-       };
-};
-
-&adm_dma {
-       status = "okay";
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               compatible = "qcom,nandcs";
-
-               reg = <0>;
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               nand-is-boot-medium;
-               qcom,boot_pages_size = <0x2140000>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       partition@0 {
-                               label = "sbl1";
-                               reg = <0x0 0x40000>;
-                               read-only;
-                       };
-
-                       partition@40000 {
-                               label = "mibib";
-                               reg = <0x40000 0x140000>;
-                               read-only;
-                       };
-
-                       partition@180000 {
-                               label = "sbl2";
-                               reg = <0x180000 0x140000>;
-                               read-only;
-                       };
-
-                       partition@2c0000 {
-                               label = "sbl3";
-                               reg = <0x2c0000 0x280000>;
-                               read-only;
-                       };
-
-                       partition@540000 {
-                               label = "ddrconfig";
-                               reg = <0x540000 0x120000>;
-                               read-only;
-                       };
-
-                       partition@660000 {
-                               label = "ssd";
-                               reg = <0x660000 0x120000>;
-                               read-only;
-                       };
-
-                       partition@780000 {
-                               label = "tz";
-                               reg = <0x780000 0x280000>;
-                               read-only;
-                       };
-
-                       partition@a00000 {
-                               label = "rpm";
-                               reg = <0xa00000 0x280000>;
-                               read-only;
-                       };
-
-                       partition@1fc0000 {
-                               label = "u-boot";
-                               reg = <0x1fc0000 0x180000>;
-                               read-only;
-                       };
-
-                       partition@21c0000 {
-                               label = "bootkernel1";
-                               reg = <0x21c0000 0xa80000>;
-                       };
-
-                       partition@2c40000 {
-                               label = "bootkernel2";
-                               reg = <0x2c40000 0xa80000>;
-                       };
-
-                       partition@36c0000 {
-                               label = "ubi";
-                               reg = <0x36c0000 0x46c0000>;
-                       };
-
-                       partition@7d80000 {
-                               label = "art";
-                               reg = <0x7d80000 0x200000>;
-                               read-only;
-                       };
-               };
-       };
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
deleted file mode 100644 (file)
index 85b0dc3..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ecw5410.dts
+++ /dev/null
@@ -1,332 +0,0 @@
-#include "qcom-ipq8064-v2.0.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/soc/qcom,tcsr.h>
-
-/ {
-       model = "Edgecore ECW5410";
-       compatible = "edgecore,ecw5410", "qcom,ipq8064";
-
-       reserved-memory {
-               nss@40000000 {
-                       reg = <0x40000000 0x1000000>;
-                       no-map;
-               };
-
-               smem: smem@41000000 {
-                       reg = <0x41000000 0x200000>;
-                       no-map;
-               };
-
-               wifi_dump@44000000 {
-                       reg = <0x44000000 0x600000>;
-                       no-map;
-               };
-       };
-
-       cpus {
-               idle-states {
-                       CPU_SPC: spc {
-                               status = "disabled";
-                       };
-               };
-       };
-
-       aliases {
-               serial1 = &gsbi1_serial;
-               ethernet0 = &gmac2;
-               ethernet1 = &gmac3;
-
-               led-boot = &led_power_green;
-               led-failsafe = &led_power_red;
-               led-running = &led_power_green;
-               led-upgrade = &led_power_green;
-       };
-
-       chosen {
-               bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1";
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               led_power_green: power_green {
-                       label = "green:power";
-                       gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
-               };
-
-               wlan2g_green {
-                       label = "green:wlan2g";
-                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
-               };
-
-               wlan2g_yellow {
-                       label = "yellow:wlan2g";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
-               };
-
-               wlan5g_green {
-                       label = "green:wlan5g";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
-               };
-
-               led_power_red: power_red {
-                       label = "red:power";
-                       gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
-               };
-
-               wlan5g_yellow {
-                       label = "yellow:wlan5g";
-                       gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
-               };
-       };
-};
-
-
-&qcom_pinmux {
-       spi_pins: spi_pins {
-               mux {
-                       pins = "gpio18", "gpio19";
-                       function = "gsbi5";
-                       drive-strength = <10>;
-                       bias-pull-down;
-               };
-
-               clk {
-                       pins = "gpio21";
-                       function = "gsbi5";
-                       drive-strength = <12>;
-                       bias-pull-down;
-               };
-
-               cs {
-                       pins = "gpio20";
-                       function = "gpio";
-                       drive-strength = <10>;
-                       bias-pull-up;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio16", "gpio23", "gpio24", "gpio26",
-                                  "gpio28", "gpio59";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio25";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       uart1_pins: uart1_pins {
-               mux {
-                       pins = "gpio51", "gpio52", "gpio53", "gpio54";
-                       function = "gsbi1";
-                       drive-strength = <12>;
-                       bias-none;
-               };
-       };
-};
-
-&gsbi1 {
-       qcom,mode = <GSBI_PROT_UART_W_FC>;
-       status = "okay";
-
-       serial@12450000 {
-               status = "okay";
-
-               pinctrl-0 = <&uart1_pins>;
-               pinctrl-names = "default";
-       };
-};
-
-&gsbi5 {
-       qcom,mode = <GSBI_PROT_SPI>;
-       status = "okay";
-
-       spi4: spi@1a280000 {
-               status = "okay";
-               spi-max-frequency = <50000000>;
-
-               pinctrl-0 = <&spi_pins>;
-               pinctrl-names = "default";
-
-               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
-
-               m25p80@0 {
-                       compatible = "jedec,spi-nor";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       spi-max-frequency = <50000000>;
-                       reg = <0>;
-
-                       partitions {
-                               compatible = "qcom,smem-part";
-                       };
-               };
-       };
-};
-
-&hs_phy_0 {            /* USB3 port 0 HS phy */
-       status = "okay";
-};
-
-&hs_phy_1 {            /* USB3 port 1 HS phy */
-       status = "okay";
-};
-
-&ss_phy_0 {            /* USB3 port 0 SS phy */
-       status = "okay";
-};
-
-&ss_phy_1 {            /* USB3 port 1 SS phy */
-       status = "okay";
-};
-
-&usb3_0 {
-       status = "okay";
-};
-
-&usb3_1 {
-       status = "okay";
-};
-
-&pcie1 {
-       status = "okay";
-
-       /delete-property/ pinctrl-0;
-       /delete-property/ pinctrl-names;
-       /delete-property/ perst-gpios;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "qcom,ath10k";
-                       status = "okay";
-                       reg = <0x00010000 0 0 0 0>;
-                       qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
-               };
-       };
-};
-
-&pcie2 {
-       status = "okay";
-
-       /delete-property/ pinctrl-0;
-       /delete-property/ pinctrl-names;
-       /delete-property/ perst-gpios;
-
-       bridge@0,0 {
-               reg = <0x00000000 0 0 0 0>;
-               #address-cells = <3>;
-               #size-cells = <2>;
-               ranges;
-
-               wifi@1,0 {
-                       compatible = "qcom,ath10k";
-                       status = "okay";
-                       reg = <0x00010000 0 0 0 0>;
-                       qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
-               };
-       };
-};
-
-&nand {
-       status = "okay";
-
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
-       nand@0 {
-               compatible = "qcom,nandcs";
-
-               reg = <0>;
-
-               nand-ecc-strength = <4>;
-               nand-bus-width = <8>;
-               nand-ecc-step-size = <512>;
-
-               partitions {
-                       compatible = "fixed-partitions";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-
-                       rootfs1@0 {
-                               label = "rootfs1";
-                               reg = <0x0000000 0x4000000>;
-                       };
-
-                       rootfs2@4000000 {
-                               label = "rootfs2";
-                               reg = <0x4000000 0x4000000>;
-                       };
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins>;
-       pinctrl-names = "default";
-
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-       };
-
-       phy1: ethernet-phy@1 {
-               reg = <1>;
-       };
-};
-
-&gmac2 {
-       status = "okay";
-
-       qcom,id = <2>;
-       mdiobus = <&mdio0>;
-
-       phy-mode = "sgmii";
-       phy-handle = <&phy1>;
-};
-
-&gmac3 {
-       status = "okay";
-
-       qcom,id = <3>;
-       mdiobus = <&mdio0>;
-
-       phy-mode = "sgmii";
-       phy-handle = <&phy0>;
-};
-
-&adm_dma {
-       status = "okay";
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr42.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr42.dts
deleted file mode 100644 (file)
index ccf2554..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr42.dts
+++ /dev/null
@@ -1,204 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-
-#include "qcom-ipq8068-cryptid-common.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "Meraki MR42";
-       compatible = "meraki,mr42", "qcom,ipq8064";
-
-       aliases {
-               serial1 = &gsbi1_serial;
-               ethernet0 = &gmac3;
-
-               led-boot = &led_active;
-               led-failsafe = &led_power;
-               led-running = &led_active;
-               led-upgrade = &led_active;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               led_power: power {
-                       label = "orange:power";
-                       gpios = <&qcom_pinmux 31 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_active: active {
-                       label = "white:active";
-                       gpios = <&qcom_pinmux 32 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&gmac3 {
-       status = "okay";
-
-       qcom,id = <3>;
-       mdiobus = <&mdio0>;
-
-       phy-mode = "sgmii";
-       phy-handle = <&phy2>;
-
-       nvmem-cells = <&mac_address>;
-       nvmem-cell-names = "mac-address";
-};
-
-&gsbi2 {
-       status = "okay";
-       qcom,mode = <GSBI_PROT_I2C>;
-};
-
-&gsbi2_i2c {
-       status = "okay";
-
-       pinctrl-0 = <&i2c0_pins>;
-       pinctrl-names = "default";
-
-       ina2xx@40 {
-               compatible = "ina219";
-               shunt-resistor = <40000>;
-               reg = <0x40>;
-       };
-
-       eeprom@56 {
-               compatible = "atmel,24c64";
-               pagesize = <32>;
-               reg = <0x56>;
-               read-only;
-               #address-cells = <1>;
-               #size-cells = <1>;
-
-               mac_address: mac-address@66 {
-                       reg = <0x66 0x6>;
-               };
-       };
-};
-
-&gsbi6 {
-       qcom,mode = <GSBI_PROT_I2C>;
-       status = "okay";
-};
-
-&gsbi6_i2c {
-       status = "okay";
-
-       pinctrl-0 = <&i2c1_pins>;
-       pinctrl-names = "default";
-
-       tlc591xx@40 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "ti,tlc59108";
-               reg = <0x40>;
-
-               red@0 {
-                       label = "red:user";
-                       reg = <0x0>;
-               };
-
-               green@1 {
-                       label = "green:user";
-                       reg = <0x1>;
-               };
-
-               blue@2 {
-                       label = "blue:user";
-                       reg = <0x2>;
-               };
-       };
-};
-
-&mdio0 {
-       status = "okay";
-
-       pinctrl-0 = <&mdio0_pins_active>, <&phy_active>;
-       pinctrl-names = "default";
-
-       phy2: ethernet-phy2 {
-               reg = <2>;
-
-               reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-               reset-assert-us = <24000>;
-
-               eee-broken-100tx;
-               eee-broken-1000t;
-       };
-};
-
-&qcom_pinmux {
-       i2c0_pins: i2c0_pins {
-               mux {
-                       pins = "gpio24", "gpio25";
-                       function = "gsbi2";
-                       drive-strength = <2>;
-                       bias-pull-up;
-                       input;
-               };
-       };
-
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio26";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-               };
-       };
-
-       i2c1_pins: i2c1_pins {
-               mux {
-                       pins = "gpio29", "gpio30";
-                       function = "gsbi6";
-                       drive-strength = <2>;
-                       bias-pull-up;
-                       input;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio31", "gpio32";
-                       function = "gpio";
-                       drive-strength = <12>;
-                       bias-pull-down;
-                       output-low;
-               };
-       };
-};
-
-&wifi0 {
-       nvmem-cells = <&mac_address>;
-       nvmem-cell-names = "mac-address";
-       mac-address-increment = <1>;
-};
-
-&wifi1 {
-       nvmem-cells = <&mac_address>;
-       nvmem-cell-names = "mac-address";
-       mac-address-increment = <2>;
-};
-
-&wifi2 {
-       nvmem-cells = <&mac_address>;
-       nvmem-cell-names = "mac-address";
-       mac-address-increment = <3>;
-};

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr52.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr52.dts
deleted file mode 100644 (file)
index e1c2332..0000000
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-mr52.dts
+++ /dev/null
@@ -1,230 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0 OR MIT
-
-#include "qcom-ipq8068-cryptid-common.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
-       model = "Meraki MR52";
-       compatible = "meraki,mr52", "qcom,ipq8064";
-
-       aliases {
-               serial1 = &gsbi1_serial;
-               mdio-gpio0 = &mdio_gpio0;
-               ethernet0 = &gmac2;
-               ethernet1 = &gmac3;
-
-               led-boot = &led_active;
-               led-failsafe = &led_power;
-               led-running = &led_active;
-               led-upgrade = &led_active;
-       };
-
-       keys {
-               compatible = "gpio-keys";
-               pinctrl-0 = <&button_pins>;
-               pinctrl-names = "default";
-
-               reset {
-                       label = "reset";
-                       gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_RESTART>;
-                       debounce-interval = <60>;
-                       wakeup-source;
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&led_pins>;
-               pinctrl-names = "default";
-
-               led_power: power {
-                       label = "orange:power";
-                       gpios = <&qcom_pinmux 19 GPIO_ACTIVE_HIGH>;
-               };
-
-               lan2_green {
-                       label = "green:lan2";
-                       gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
-               };
-
-               lan1_green {
-                       label = "green:lan1";
-                       gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
-               };
-
-               led_active: active {
-                       label = "white:active";
-                       gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
-               };
-
-               lan2_orange {
-                       label = "orange:lan2";
-                       gpios = <&qcom_pinmux 60 GPIO_ACTIVE_HIGH>;
-               };
-
-               lan1_orange {
-                       label = "orange:lan1";
-                       gpios = <&qcom_pinmux 62 GPIO_ACTIVE_HIGH>;
-               };
-       };
-};
-
-&gmac2 {
-       status = "okay";
-
-       qcom,id = <2>;
-       mdiobus = <&mdio0>;
-
-       phy-mode = "sgmii";
-       phy-handle = <&phy0>;
-
-       nvmem-cells = <&mac_address>;
-       nvmem-cell-names = "mac-address";
-};
-
-&gmac3 {
-       status = "okay";
-
-       qcom,id = <3>;
-       mdiobus = <&mdio_gpio0>;
-
-       phy-mode = "sgmii";
-       phy-handle = <&phy4>;
-
-       nvmem-cells = <&mac_address>;
-       nvmem-cell-names = "mac-address";
-       mac-address-increment = <1>;
-};
-
-&gsbi7 {
-       status = "okay";
-       qcom,mode = <GSBI_PROT_I2C>;
-};
-
-&gsbi7_i2c {
-       status = "okay";
-
-       pinctrl-0 = <&i2c_pins>;
-       pinctrl-names = "default";
-
-       ina2xx@45 {
-               compatible = "ina219";
-               shunt-resistor = <80000>;
-               reg = <0x45>;
-       };
-
-       tlc591xx@49 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "ti,tlc59108";
-               reg = <0x49>;
-
-               red@0 {
-                       label = "red:user";
-                       reg = <0x0>;
-               };
-
-               green@1 {
-                       label = "green:user";
-                       reg = <0x1>;
-               };
-
-               blue@2 {
-                       label = "blue:user";
-                       reg = <0x2>;
-               };
-       };
-
-       eeprom@52 {
-               compatible = "atmel,24c64";
-               pagesize = <32>;
-               reg = <0x52>;
-               read-only;
-               #address-cells = <1>;
-               #size-cells = <1>;
-
-               mac_address: mac-address@66 {
-                       reg = <0x66 0x6>;
-               };
-       };
-};
-
-&qcom_pinmux {
-       i2c_pins: i2c_pins {
-               mux {
-                       pins = "gpio8", "gpio9";
-                       function = "gsbi7";
-                       drive-strength = <2>;
-                       bias-pull-up;
-                       input;
-               };
-       };
-
-       led_pins: led_pins {
-               mux {
-                       pins = "gpio19", "gpio26";
-                       function = "gpio";
-                       drive-strength = <12>;
-                       bias-pull-down;
-                       output-low;
-               };
-       };
-
-       button_pins: button_pins {
-               mux {
-                       pins = "gpio25";
-                       function = "gpio";
-                       drive-strength = <2>;
-                       bias-pull-up;
-                       input;
-               };
-       };
-};
-
-&soc {
-       mdio_gpio0: mdio {
-               compatible = "virtual,mdio-gpio";
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               status = "okay";
-
-               pinctrl-0 = <&mdio0_pins_active>, <&phy_active>;
-               pinctrl-names = "default";
-
-               gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH
-                        &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
-
-               phy0: ethernet-phy0 {
-                       reg = <0>;
-                       reset-gpios = <&qcom_pinmux 7 GPIO_ACTIVE_LOW>;
-                       reset-assert-us = <24000>;
-               };
-
-               phy4: ethernet-phy4 {
-                       reg = <4>;
-                       reset-gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
-                       reset-assert-us = <24000>;
-               };
-       };
-};
-
-&wifi0 {
-       nvmem-cells = <&mac_address>;
-       nvmem-cell-names = "mac-address";
-       mac-address-increment = <4>;
-};
-
-&wifi1 {
-       nvmem-cells = <&mac_address>;
-       nvmem-cell-names = "mac-address";
-       mac-address-increment = <3>;
-};
-
-&wifi2 {
-       nvmem-cells = <&mac_address>;
-       nvmem-cell-names = "mac-address";
-       mac-address-increment = <2>;
-};

diff --git a/target/linux/ipq806x/patches-6.0/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch b/target/linux/ipq806x/patches-6.0/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch
new file mode 100644 (file)
index 0000000..1860cef
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch
@@ -0,0 +1,62 @@
+From fa71139b55e114aa8c3c4823ff8ee7d49ee810d4 Mon Sep 17 00:00:00 2001
+From: Mathieu Olivari <[email protected]>
+Date: Wed, 29 Apr 2015 15:21:46 -0700
+Subject: [PATCH 60/69] HACK: arch: arm: force ZRELADDR on arch-qcom
+
+ARCH_QCOM is using the ARCH_MULTIPLATFORM option, as now recommended
+on most ARM architectures. This automatically calculate ZRELADDR by
+masking PHYS_OFFSET with 0xf8000000.
+
+However, on IPQ806x, the first ~20MB of RAM is reserved for the hardware
+network accelerators, and the bootloader removes this section from the
+layout passed from the ATAGS (when used).
+
+For newer bootloader, when DT is used, this is not a problem, we just
+reserve this memory in the device tree. But if the bootloader doesn't
+have DT support, then ATAGS have to be used. In this case, the ARM
+decompressor will position the kernel in this low mem, which will not be
+in the RAM section mapped by the bootloader, which means the kernel will
+freeze in the middle of the boot process trying to map the memory.
+
+As a work around, this patch allows disabling AUTO_ZRELADDR when
+ARCH_QCOM is selected. It makes the zImage usage possible on bootloaders
+which don't support device-tree, which is the case on certain early
+IPQ806x based designs.
+
+Signed-off-by: Mathieu Olivari <[email protected]>
+---
+ arch/arm/Kconfig                 | 2 +-
+ arch/arm/Makefile                | 2 ++
+ arch/arm/mach-qcom/Makefile.boot | 1 +
+ 3 files changed, 4 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/mach-qcom/Makefile.boot
+
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -317,7 +317,7 @@ config ARCH_MULTIPLATFORM
+       select ARCH_SELECT_MEMORY_MODEL
+       select ARM_HAS_SG_CHAIN
+       select ARM_PATCH_PHYS_VIRT
+-      select AUTO_ZRELADDR
++      select AUTO_ZRELADDR if !ARCH_QCOM
+       select TIMER_OF
+       select COMMON_CLK
+       select GENERIC_IRQ_MULTI_HANDLER
+--- a/arch/arm/Makefile
++++ b/arch/arm/Makefile
+@@ -237,9 +237,11 @@ MACHINE  := arch/arm/mach-$(word 1,$(mac
+ else
+ MACHINE  :=
+ endif
++ifeq ($(CONFIG_ARCH_QCOM),)
+ ifeq ($(CONFIG_ARCH_MULTIPLATFORM),y)
+ MACHINE  :=
+ endif
++endif
+ 
+ machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
+ platdirs := $(patsubst %,arch/arm/plat-%/,$(sort $(plat-y)))
+--- /dev/null
++++ b/arch/arm/mach-qcom/Makefile.boot
+@@ -0,0 +1 @@
++zreladdr-y+= 0x42208000

diff --git a/target/linux/ipq806x/patches-6.0/0065-arm-override-compiler-flags.patch b/target/linux/ipq806x/patches-6.0/0065-arm-override-compiler-flags.patch
new file mode 100644 (file)
index 0000000..a1a0371
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/0065-arm-override-compiler-flags.patch
@@ -0,0 +1,21 @@
+From 4d8e29642661397a339ac3485f212c6360445421 Mon Sep 17 00:00:00 2001
+From: John Crispin <[email protected]>
+Date: Thu, 9 Mar 2017 09:33:32 +0100
+Subject: [PATCH 65/69] arm: override compiler flags
+
+Signed-off-by: John Crispin <[email protected]>
+---
+ arch/arm/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/Makefile
++++ b/arch/arm/Makefile
+@@ -61,7 +61,7 @@ KBUILD_CFLAGS        += $(call cc-option,-fno-i
+ # macro, but instead defines a whole series of macros which makes
+ # testing for a specific architecture or later rather impossible.
+ arch-$(CONFIG_CPU_32v7M)      =-D__LINUX_ARM_ARCH__=7 -march=armv7-m
+-arch-$(CONFIG_CPU_32v7)               =-D__LINUX_ARM_ARCH__=7 -march=armv7-a
++arch-$(CONFIG_CPU_32v7)               =-D__LINUX_ARM_ARCH__=7 -mcpu=cortex-a15
+ arch-$(CONFIG_CPU_32v6)               =-D__LINUX_ARM_ARCH__=6 -march=armv6
+ # Only override the compiler option if ARMv6. The ARMv6K extensions are
+ # always available in ARMv7

diff --git a/target/linux/ipq806x/patches-6.0/0067-generic-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/ipq806x/patches-6.0/0067-generic-Mangle-bootloader-s-kernel-arguments.patch
new file mode 100644 (file)
index 0000000..39ec7b8
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/0067-generic-Mangle-bootloader-s-kernel-arguments.patch
@@ -0,0 +1,210 @@
+From 71270226b14733a4b1f2cde58ea9265caa50b38d Mon Sep 17 00:00:00 2001
+From: Adrian Panella <[email protected]>
+Date: Thu, 9 Mar 2017 09:37:17 +0100
+Subject: [PATCH 67/69] generic: Mangle bootloader's kernel arguments
+
+The command-line arguments provided by the boot loader will be
+appended to a new device tree property: bootloader-args.
+If there is a property "append-rootblock" in DT under /chosen
+and a root= option in bootloaders command line it will be parsed
+and added to DT bootargs with the form: <append-rootblock>XX.
+Only command line ATAG will be processed, the rest of the ATAGs
+sent by bootloader will be ignored.
+This is usefull in dual boot systems, to get the current root partition
+without afecting the rest of the system.
+
+Signed-off-by: Adrian Panella <[email protected]>
+---
+ arch/arm/Kconfig                        | 11 +++++
+ arch/arm/boot/compressed/atags_to_fdt.c | 72 ++++++++++++++++++++++++++++++++-
+ init/main.c                             | 16 ++++++++
+ 3 files changed, 98 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -1727,6 +1727,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
+         The command-line arguments provided by the boot loader will be
+         appended to the the device tree bootargs property.
+ 
++config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
++      bool "Append rootblock parsing bootloader's kernel arguments"
++      help
++        The command-line arguments provided by the boot loader will be
++        appended to a new device tree property: bootloader-args.
++        If there is a property "append-rootblock" in DT under /chosen
++        and a root= option in bootloaders command line it will be parsed
++        and added to DT bootargs with the form: <append-rootblock>XX.
++        Only command line ATAG will be processed, the rest of the ATAGs
++        sent by bootloader will be ignored.
++
+ endchoice
+ 
+ config CMDLINE
+--- a/arch/arm/boot/compressed/atags_to_fdt.c
++++ b/arch/arm/boot/compressed/atags_to_fdt.c
+@@ -5,6 +5,8 @@
+ 
+ #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND)
+ #define do_extend_cmdline 1
++#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++#define do_extend_cmdline 1
+ #else
+ #define do_extend_cmdline 0
+ #endif
+@@ -69,6 +71,80 @@ static uint32_t get_cell_size(const void
+       return cell_size;
+ }
+ 
++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++/**
++ * taken from arch/x86/boot/string.c
++ * local_strstr - Find the first substring in a %NUL terminated string
++ * @s1: The string to be searched
++ * @s2: The string to search for
++ */
++static char *local_strstr(const char *s1, const char *s2)
++{
++      size_t l1, l2;
++
++      l2 = strlen(s2);
++      if (!l2)
++              return (char *)s1;
++      l1 = strlen(s1);
++      while (l1 >= l2) {
++              l1--;
++              if (!memcmp(s1, s2, l2))
++                      return (char *)s1;
++              s1++;
++      }
++      return NULL;
++}
++
++static char *append_rootblock(char *dest, const char *str, int len, void *fdt)
++{
++      char *ptr, *end, *tmp;
++      char *root="root=";
++      char *find_rootblock;
++      int i, l;
++      const char *rootblock;
++
++      find_rootblock = getprop(fdt, "/chosen", "find-rootblock", &l);
++      if(!find_rootblock)
++              find_rootblock = root;
++
++      //ARM doesn't have __HAVE_ARCH_STRSTR, so it was copied from x86
++      ptr = local_strstr(str, find_rootblock);
++
++      if(!ptr)
++              return dest;
++
++      end = strchr(ptr, ' ');
++      end = end ? (end - 1) : (strchr(ptr, 0) - 1);
++
++      // Some boards ubi.mtd=XX,ZZZZ, so let's check for '," too.
++      tmp = strchr(ptr, ',');
++
++      if(tmp)
++              end = end < tmp ? end : tmp - 1;
++
++      //find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX | ubi.mtd=XX,ZZZZ )
++      for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++);
++      ptr = end + 1;
++
++      /* if append-rootblock property is set use it to append to command line */
++      rootblock = getprop(fdt, "/chosen", "append-rootblock", &l);
++      if(rootblock != NULL) {
++              if(*dest != ' ') {
++                      *dest = ' ';
++                      dest++;
++                      len++;
++              }
++              if (len + l + i <= COMMAND_LINE_SIZE) {
++                      memcpy(dest, rootblock, l);
++                      dest += l - 1;
++                      memcpy(dest, ptr, i);
++                      dest += i;
++              }
++      }
++      return dest;
++}
++#endif
++
+ static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline)
+ {
+       char cmdline[COMMAND_LINE_SIZE];
+@@ -88,12 +164,21 @@ static void merge_fdt_bootargs(void *fdt
+ 
+       /* and append the ATAG_CMDLINE */
+       if (fdt_cmdline) {
++
++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++              //save original bootloader args
++              //and append ubi.mtd with root partition number to current cmdline
++              setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline);
++              ptr = append_rootblock(ptr, fdt_cmdline, len, fdt);
++
++#else
+               len = strlen(fdt_cmdline);
+               if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) {
+                       *ptr++ = ' ';
+                       memcpy(ptr, fdt_cmdline, len);
+                       ptr += len;
+               }
++#endif
+       }
+       *ptr = '\0';
+ 
+@@ -168,7 +253,9 @@ int atags_to_fdt(void *atag_list, void *
+                       else
+                               setprop_string(fdt, "/chosen", "bootargs",
+                                              atag->u.cmdline.cmdline);
+-              } else if (atag->hdr.tag == ATAG_MEM) {
++              }
++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
++              else if (atag->hdr.tag == ATAG_MEM) {
+                       if (memcount >= sizeof(mem_reg_property)/4)
+                               continue;
+                       if (!atag->u.mem.size)
+@@ -212,6 +299,10 @@ int atags_to_fdt(void *atag_list, void *
+               setprop(fdt, "/memory", "reg", mem_reg_property,
+                       4 * memcount * memsize);
+       }
++#else
++
++      }
++#endif
+ 
+       return fdt_pack(fdt);
+ }
+--- a/init/main.c
++++ b/init/main.c
+@@ -113,6 +113,10 @@
+ 
+ #include <kunit/test.h>
+ 
++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++#include <linux/of.h>
++#endif
++
+ static int kernel_init(void *);
+ 
+ extern void init_IRQ(void);
+@@ -992,6 +996,18 @@ asmlinkage __visible void __init __no_sa
+       pr_notice("Kernel command line: %s\n", saved_command_line);
+       /* parameters may set static keys */
+       jump_label_init();
++
++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
++      //Show bootloader's original command line for reference
++      if(of_chosen) {
++              const char *prop = of_get_property(of_chosen, "bootloader-args", NULL);
++              if(prop)
++                      pr_notice("Bootloader command line (ignored): %s\n", prop);
++              else
++                      pr_notice("Bootloader command line not present\n");
++      }
++#endif
++
+       parse_early_param();
+       after_dashes = parse_args("Booting kernel",
+                                 static_command_line, __start___param,

diff --git a/target/linux/ipq806x/patches-6.0/0069-arm-boot-add-dts-files.patch b/target/linux/ipq806x/patches-6.0/0069-arm-boot-add-dts-files.patch
new file mode 100644 (file)
index 0000000..05f39f6
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/0069-arm-boot-add-dts-files.patch
@@ -0,0 +1,43 @@
+From 8f68331e14dff9a101f2d0e1d6bec84a031f27ee Mon Sep 17 00:00:00 2001
+From: John Crispin <[email protected]>
+Date: Thu, 9 Mar 2017 11:03:18 +0100
+Subject: [PATCH 69/69] arm: boot: add dts files
+
+Signed-off-by: John Crispin <[email protected]>
+---
+ arch/arm/boot/dts/Makefile | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -956,8 +956,30 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+       qcom-ipq4019-ap.dk04.1-c3.dtb \
+       qcom-ipq4019-ap.dk07.1-c1.dtb \
+       qcom-ipq4019-ap.dk07.1-c2.dtb \
++      qcom-ipq8062-wg2600hp3.dtb \
+       qcom-ipq8064-ap148.dtb \
+       qcom-ipq8064-rb3011.dtb \
++      qcom-ipq8064-c2600.dtb \
++      qcom-ipq8064-d7800.dtb \
++      qcom-ipq8064-db149.dtb \
++      qcom-ipq8064-ap161.dtb \
++      qcom-ipq8064-ea7500-v1.dtb \
++      qcom-ipq8064-ea8500.dtb \
++      qcom-ipq8064-g10.dtb \
++      qcom-ipq8064-r7500.dtb \
++      qcom-ipq8064-r7500v2.dtb \
++      qcom-ipq8064-unifi-ac-hd.dtb \
++      qcom-ipq8064-wg2600hp.dtb \
++      qcom-ipq8064-wpq864.dtb \
++      qcom-ipq8064-wxr-2533dhp.dtb \
++      qcom-ipq8065-nbg6817.dtb \
++      qcom-ipq8065-r7800.dtb \
++      qcom-ipq8065-rt4230w-rev6.dtb \
++      qcom-ipq8065-tr4400-v2.dtb \
++      qcom-ipq8065-xr500.dtb \
++      qcom-ipq8068-ecw5410.dtb \
++      qcom-ipq8068-mr42.dtb \
++      qcom-ipq8068-mr52.dtb \
+       qcom-msm8226-samsung-s3ve3g.dtb \
+       qcom-msm8660-surf.dtb \
+       qcom-msm8960-cdp.dtb \

diff --git a/target/linux/ipq806x/patches-6.0/101-01-dmaengine-qcom-adm-fix-wrong-sizeof-config-in-slave_.patch b/target/linux/ipq806x/patches-6.0/101-01-dmaengine-qcom-adm-fix-wrong-sizeof-config-in-slave_.patch
new file mode 100644 (file)
index 0000000..887ec48
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/101-01-dmaengine-qcom-adm-fix-wrong-sizeof-config-in-slave_.patch
@@ -0,0 +1,36 @@
+From 546c7a35b7b52935a65b1eb2697b2a2fb9b5d584 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 15 Sep 2022 22:29:58 +0200
+Subject: [PATCH] dmaengine: qcom-adm: fix wrong sizeof config in slave_config
+
+Fix broken slave_config function that uncorrectly compare the
+peripheral_size with the size of the config pointer instead of the size
+of the config struct. This cause the crci value to be ignored and cause
+a kernel panic on any slave that use adm driver.
+
+To fix this, compare to the size of the struct and NOT the size of the
+pointer.
+
+Fixes: 03de6b273805 ("dmaengine: qcom-adm: stop abusing slave_id config")
+Signed-off-by: Christian Marangi <[email protected]>
+Cc: [email protected] # v5.17+
+---
+ drivers/dma/qcom/qcom_adm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/dma/qcom/qcom_adm.c b/drivers/dma/qcom/qcom_adm.c
+index facdacf8aede..c77d9de853de 100644
+--- a/drivers/dma/qcom/qcom_adm.c
++++ b/drivers/dma/qcom/qcom_adm.c
+@@ -494,7 +494,7 @@ static int adm_slave_config(struct dma_chan *chan, struct dma_slave_config *cfg)
+ 
+       spin_lock_irqsave(&achan->vc.lock, flag);
+       memcpy(&achan->slave, cfg, sizeof(struct dma_slave_config));
+-      if (cfg->peripheral_size == sizeof(config))
++      if (cfg->peripheral_size == sizeof(*config))
+               achan->crci = config->crci;
+       spin_unlock_irqrestore(&achan->vc.lock, flag);
+ 
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/101-02-dmaengine-qcom-adm-fix-wrong-calling-convention-for-.patch b/target/linux/ipq806x/patches-6.0/101-02-dmaengine-qcom-adm-fix-wrong-calling-convention-for-.patch
new file mode 100644 (file)
index 0000000..6bbf208
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/101-02-dmaengine-qcom-adm-fix-wrong-calling-convention-for-.patch
@@ -0,0 +1,98 @@
+From 9366b81f5957789f00d02b778d8a8a79c732d70a Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Fri, 16 Sep 2022 05:56:36 +0200
+Subject: [PATCH] dmaengine: qcom-adm: fix wrong calling convention for
+ prep_slave_sg
+
+The calling convention for pre_slave_sg is to return NULL on error and
+provide an error log to the system. Qcom-adm instead provide error
+pointer when an error occur. This indirectly cause kernel panic for
+example for the nandc driver that checks only if the pointer returned by
+device_prep_slave_sg is not NULL. Returning an error pointer makes nandc
+think the device_prep_slave_sg function correctly completed and makes
+the kernel panics later in the code.
+
+While nandc is the one that makes the kernel crash, it was pointed out
+that the real problem is qcom-adm not following calling convention for
+that function.
+
+To fix this, drop returning error pointer and return NULL with an error
+log.
+
+Fixes: 03de6b273805 ("dmaengine: qcom-adm: stop abusing slave_id config")
+Fixes: 5c9f8c2dbdbe ("dmaengine: qcom: Add ADM driver")
+Signed-off-by: Christian Marangi <[email protected]>
+Cc: [email protected] # v5.11+
+---
+ drivers/dma/qcom/qcom_adm.c | 20 +++++++++++++-------
+ 1 file changed, 13 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/dma/qcom/qcom_adm.c b/drivers/dma/qcom/qcom_adm.c
+index facdacf8aede..cd3f12cf4721 100644
+--- a/drivers/dma/qcom/qcom_adm.c
++++ b/drivers/dma/qcom/qcom_adm.c
+@@ -379,13 +379,13 @@ static struct dma_async_tx_descriptor *adm_prep_slave_sg(struct dma_chan *chan,
+               if (blk_size < 0) {
+                       dev_err(adev->dev, "invalid burst value: %d\n",
+                               burst);
+-                      return ERR_PTR(-EINVAL);
++                      return NULL;
+               }
+ 
+               crci = achan->crci & 0xf;
+               if (!crci || achan->crci > 0x1f) {
+                       dev_err(adev->dev, "invalid crci value\n");
+-                      return ERR_PTR(-EINVAL);
++                      return NULL;
+               }
+       }
+ 
+@@ -403,8 +403,10 @@ static struct dma_async_tx_descriptor *adm_prep_slave_sg(struct dma_chan *chan,
+       }
+ 
+       async_desc = kzalloc(sizeof(*async_desc), GFP_NOWAIT);
+-      if (!async_desc)
+-              return ERR_PTR(-ENOMEM);
++      if (!async_desc) {
++              dev_err(adev->dev, "not enough memory for async_desc struct\n");
++              return NULL;
++      }
+ 
+       async_desc->mux = achan->mux ? ADM_CRCI_CTL_MUX_SEL : 0;
+       async_desc->crci = crci;
+@@ -414,8 +416,10 @@ static struct dma_async_tx_descriptor *adm_prep_slave_sg(struct dma_chan *chan,
+                               sizeof(*cple) + 2 * ADM_DESC_ALIGN;
+ 
+       async_desc->cpl = kzalloc(async_desc->dma_len, GFP_NOWAIT);
+-      if (!async_desc->cpl)
++      if (!async_desc->cpl) {
++              dev_err(adev->dev, "not enough memory for cpl struct\n");
+               goto free;
++      }
+ 
+       async_desc->adev = adev;
+ 
+@@ -437,8 +441,10 @@ static struct dma_async_tx_descriptor *adm_prep_slave_sg(struct dma_chan *chan,
+       async_desc->dma_addr = dma_map_single(adev->dev, async_desc->cpl,
+                                             async_desc->dma_len,
+                                             DMA_TO_DEVICE);
+-      if (dma_mapping_error(adev->dev, async_desc->dma_addr))
++      if (dma_mapping_error(adev->dev, async_desc->dma_addr)) {
++              dev_err(adev->dev, "dma mapping error for cpl\n");
+               goto free;
++      }
+ 
+       cple_addr = async_desc->dma_addr + ((void *)cple - async_desc->cpl);
+ 
+@@ -454,7 +460,7 @@ static struct dma_async_tx_descriptor *adm_prep_slave_sg(struct dma_chan *chan,
+ 
+ free:
+       kfree(async_desc);
+-      return ERR_PTR(-ENOMEM);
++      return NULL;
+ }
+ 
+ /**
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch b/target/linux/ipq806x/patches-6.0/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
new file mode 100644 (file)
index 0000000..e0c195f
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/102-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch
@@ -0,0 +1,25 @@
+From 5001f2e1a325b68dbf225bd17f69a4d3d975cca5 Mon Sep 17 00:00:00 2001
+From: John Crispin <[email protected]>
+Date: Thu, 9 Mar 2017 09:31:44 +0100
+Subject: [PATCH 61/69] mtd: "rootfs" conflicts with OpenWrt auto mounting
+
+Signed-off-by: John Crispin <[email protected]>
+---
+ drivers/mtd/mtdpart.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/mtd/mtdpart.c
++++ b/drivers/mtd/mtdpart.c
+@@ -51,7 +51,11 @@ static struct mtd_info *allocate_partiti
+ 
+       /* allocate the partition structure */
+       child = kzalloc(sizeof(*child), GFP_KERNEL);
+-      name = kstrdup(part->name, GFP_KERNEL);
++      /* "rootfs" conflicts with OpenWrt auto mounting */
++      if (mtd_type_is_nand(parent) && !strcmp(part->name, "rootfs"))
++              name = "ubi";
++      else
++              name = kstrdup(part->name, GFP_KERNEL);
+       if (!name || !child) {
+               printk(KERN_ERR"memory allocation error while creating partitions for \"%s\"\n",
+                      parent->name);

diff --git a/target/linux/ipq806x/patches-6.0/106-01-ARM-dts-qcom-ipq8064-add-v2-dtsi-variant.patch b/target/linux/ipq806x/patches-6.0/106-01-ARM-dts-qcom-ipq8064-add-v2-dtsi-variant.patch
new file mode 100644 (file)
index 0000000..8b20a55
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/106-01-ARM-dts-qcom-ipq8064-add-v2-dtsi-variant.patch
@@ -0,0 +1,129 @@
+From 9f7097a8b1948533a6db1b53b5c0480cc75bbd16 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Mon, 18 Jul 2022 18:05:16 +0200
+Subject: [PATCH 1/3] ARM: dts: qcom: ipq8064: add v2 dtsi variant
+
+Add ipq8064-v2.0 dtsi variant that differ from original ipq8064 SoC for
+some additional pcie, sata and usb configuration values, additional
+reserved memory and serial output.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ .../boot/dts/qcom-ipq8064-v2.0-smb208.dtsi    | 37 ++++++++++
+ arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi      | 69 +++++++++++++++++++
+ 2 files changed, 106 insertions(+)
+ create mode 100644 arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
+ create mode 100644 arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
+
+--- /dev/null
++++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
+@@ -0,0 +1,37 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include "qcom-ipq8064-v2.0.dtsi"
++
++&rpm {
++      smb208_regulators: regulators {
++              compatible = "qcom,rpm-smb208-regulators";
++
++              smb208_s1a: s1a {
++                      regulator-min-microvolt = <1050000>;
++                      regulator-max-microvolt = <1150000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++
++              smb208_s1b: s1b {
++                      regulator-min-microvolt = <1050000>;
++                      regulator-max-microvolt = <1150000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++
++              smb208_s2a: s2a {
++                      regulator-min-microvolt = < 800000>;
++                      regulator-max-microvolt = <1250000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++
++              smb208_s2b: s2b {
++                      regulator-min-microvolt = < 800000>;
++                      regulator-max-microvolt = <1250000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++      };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
+@@ -0,0 +1,69 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include "qcom-ipq8064.dtsi"
++
++/ {
++      model = "Qualcomm Technologies, Inc. IPQ8064-v2.0";
++
++      aliases {
++              serial0 = &gsbi4_serial;
++      };
++
++      chosen {
++              stdout-path = "serial0:115200n8";
++      };
++
++      reserved-memory {
++              #address-cells = <1>;
++              #size-cells = <1>;
++              ranges;
++
++              rsvd@41200000 {
++                      reg = <0x41200000 0x300000>;
++                      no-map;
++              };
++      };
++};
++
++&gsbi4 {
++      qcom,mode = <GSBI_PROT_I2C_UART>;
++      status = "okay";
++
++      serial@16340000 {
++              status = "okay";
++      };
++      /*
++       * The i2c device on gsbi4 should not be enabled.
++       * On ipq806x designs gsbi4 i2c is meant for exclusive
++       * RPM usage. Turning this on in kernel manifests as
++       * i2c failure for the RPM.
++       */
++};
++
++&pcie0 {
++      compatible = "qcom,pcie-ipq8064-v2";
++};
++
++&pcie1 {
++      compatible = "qcom,pcie-ipq8064-v2";
++};
++
++&pcie2 {
++      compatible = "qcom,pcie-ipq8064-v2";
++};
++
++&sata {
++      ports-implemented = <0x1>;
++};
++
++&ss_phy_0 {
++      qcom,rx-eq = <2>;
++      qcom,tx-deamp_3_5db = <32>;
++      qcom,mpll = <5>;
++};
++
++&ss_phy_1 {
++      qcom,rx-eq = <2>;
++      qcom,tx-deamp_3_5db = <32>;
++      qcom,mpll = <5>;
++};

diff --git a/target/linux/ipq806x/patches-6.0/106-02-ARM-dts-qcom-ipq8064-add-ipq8062-variant.patch b/target/linux/ipq806x/patches-6.0/106-02-ARM-dts-qcom-ipq8064-add-ipq8062-variant.patch
new file mode 100644 (file)
index 0000000..fdff292
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/106-02-ARM-dts-qcom-ipq8064-add-ipq8062-variant.patch
@@ -0,0 +1,67 @@
+From 41d9fa8de7845bd92d9c963196fdfd7ea9232bb2 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Mon, 18 Jul 2022 18:07:26 +0200
+Subject: [PATCH 2/3] ARM: dts: qcom: ipq8064: add ipq8062 variant
+
+ipq8062 SoC is based on ipq8064-v2.0 with lower supported freq, lack of
+usb port and a reduced voltage output with the smb208 regulators.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi | 37 ++++++++++++++++++++++
+ arch/arm/boot/dts/qcom-ipq8062.dtsi        |  8 +++++
+ 2 files changed, 45 insertions(+)
+ create mode 100644 arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
+ create mode 100644 arch/arm/boot/dts/qcom-ipq8062.dtsi
+
+--- /dev/null
++++ b/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
+@@ -0,0 +1,37 @@
++// SPDX-License-Identifier: GPL-2.0-only
++
++#include "qcom-ipq8062.dtsi"
++
++&rpm {
++      smb208_regulators: regulators {
++              compatible = "qcom,rpm-smb208-regulators";
++
++              smb208_s1a: s1a {
++                      regulator-min-microvolt = <1050000>;
++                      regulator-max-microvolt = <1150000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++
++              smb208_s1b: s1b {
++                      regulator-min-microvolt = <1050000>;
++                      regulator-max-microvolt = <1150000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++
++              smb208_s2a: s2a {
++                      regulator-min-microvolt = < 800000>;
++                      regulator-max-microvolt = <1150000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++
++              smb208_s2b: s2b {
++                      regulator-min-microvolt = < 800000>;
++                      regulator-max-microvolt = <1150000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++      };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/qcom-ipq8062.dtsi
+@@ -0,0 +1,8 @@
++// SPDX-License-Identifier: GPL-2.0-only
++
++#include "qcom-ipq8064-v2.0.dtsi"
++
++/ {
++      model = "Qualcomm Technologies, Inc. IPQ8062";
++      compatible = "qcom,ipq8062", "qcom,ipq8064";
++};

diff --git a/target/linux/ipq806x/patches-6.0/106-03-ARM-dts-qcom-ipq8064-add-ipq8065-variant.patch b/target/linux/ipq806x/patches-6.0/106-03-ARM-dts-qcom-ipq8064-add-ipq8065-variant.patch
new file mode 100644 (file)
index 0000000..bccc577
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/106-03-ARM-dts-qcom-ipq8064-add-ipq8065-variant.patch
@@ -0,0 +1,67 @@
+From 01e7aa3fe6f76f7960f2382038136235eee9c6cd Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Mon, 18 Jul 2022 18:09:35 +0200
+Subject: [PATCH 3/3] ARM: dts: qcom: ipq8064: add ipq8065 variant
+
+ipq8065 SoC is based on ipq8064-v2.0 with a more clocked CPU and
+an increased voltage output with the smb208 regulators.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi | 37 ++++++++++++++++++++++
+ arch/arm/boot/dts/qcom-ipq8065.dtsi        |  8 +++++
+ 2 files changed, 45 insertions(+)
+ create mode 100644 arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
+ create mode 100644 arch/arm/boot/dts/qcom-ipq8065.dtsi
+
+--- /dev/null
++++ b/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
+@@ -0,0 +1,37 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include "qcom-ipq8065.dtsi"
++
++&rpm {
++      smb208_regulators: regulators {
++              compatible = "qcom,rpm-smb208-regulators";
++
++              smb208_s1a: s1a {
++                      regulator-min-microvolt = <1050000>;
++                      regulator-max-microvolt = <1150000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++
++              smb208_s1b: s1b {
++                      regulator-min-microvolt = <1050000>;
++                      regulator-max-microvolt = <1150000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++
++              smb208_s2a: s2a {
++                      regulator-min-microvolt = <775000>;
++                      regulator-max-microvolt = <1275000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++
++              smb208_s2b: s2b {
++                      regulator-min-microvolt = <775000>;
++                      regulator-max-microvolt = <1275000>;
++
++                      qcom,switch-mode-frequency = <1200000>;
++              };
++      };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
+@@ -0,0 +1,8 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include "qcom-ipq8064-v2.0.dtsi"
++
++/ {
++      model = "Qualcomm Technologies, Inc. IPQ8065";
++      compatible = "qcom,ipq8065", "qcom,ipq8064";
++};

diff --git a/target/linux/ipq806x/patches-6.0/107-01-ARM-dts-qcom-ipq8064-fix-smb208-regulator-node.patch b/target/linux/ipq806x/patches-6.0/107-01-ARM-dts-qcom-ipq8064-fix-smb208-regulator-node.patch
new file mode 100644 (file)
index 0000000..34ffa81
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/107-01-ARM-dts-qcom-ipq8064-fix-smb208-regulator-node.patch
@@ -0,0 +1,196 @@
+From 81ca06557c6071c3e64556123ac6f6afd0af4d42 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Tue, 16 Aug 2022 13:53:28 +0200
+Subject: [PATCH] ARM: dts: qcom: ipq8064: fix smb208 regulator node
+
+Fix wrong switch-mode-frequency binding. The smb208 regulators support
+only 500Hz or 1Mhz, fix the wrong value to 500Hz following original QSDK
+code.
+Add missing system-load and bias-pull-down binding for smb208
+regulators. These binding were never added and the values comes from
+ancient QSDK board data.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi      | 16 ++++++++++++----
+ arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi      | 16 ++++++++++++----
+ arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi | 16 ++++++++++++----
+ arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi      | 16 ++++++++++++----
+ 4 files changed, 48 insertions(+), 16 deletions(-)
+
+--- a/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
+@@ -9,29 +9,37 @@
+               smb208_s1a: s1a {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1200000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s1b: s1b {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1679000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s2a: s2a {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1740000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s2b: s2b {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1740000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+       };
+ };
+--- a/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
+@@ -9,29 +9,37 @@
+               smb208_s1a: s1a {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1200000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s1b: s1b {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1679000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s2a: s2a {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1250000>;
++                      regulator-system-load = <1740000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s2b: s2b {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1250000>;
++                      regulator-system-load = <1740000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+       };
+ };
+--- a/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
+@@ -9,29 +9,37 @@
+               smb208_s1a: s1a {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1200000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s1b: s1b {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1679000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s2a: s2a {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1250000>;
++                      regulator-system-load = <1740000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s2b: s2b {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1250000>;
++                      regulator-system-load = <1740000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+       };
+ };
+--- a/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
+@@ -9,29 +9,37 @@
+               smb208_s1a: s1a {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1200000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s1b: s1b {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
++                      regulator-system-load = <1679000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s2a: s2a {
+                       regulator-min-microvolt = <775000>;
+                       regulator-max-microvolt = <1275000>;
++                      regulator-system-load = <1740000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+ 
+               smb208_s2b: s2b {
+                       regulator-min-microvolt = <775000>;
+                       regulator-max-microvolt = <1275000>;
++                      regulator-system-load = <1740000>;
+ 
+-                      qcom,switch-mode-frequency = <1200000>;
++                      qcom,switch-mode-frequency = <500000>;
++                      bias-pull-down;
+               };
+       };
+ };

diff --git a/target/linux/ipq806x/patches-6.0/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch b/target/linux/ipq806x/patches-6.0/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch
new file mode 100644 (file)
index 0000000..418d6b2
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch
@@ -0,0 +1,95 @@
+From bef5018abb7cf94efafdc05087b4c998891ae4ec Mon Sep 17 00:00:00 2001
+From: Ansuel Smith <[email protected]>
+Date: Mon, 17 Jan 2022 23:39:34 +0100
+Subject: [PATCH v3 10/18] ARM: dts: qcom: add saw for l2 cache and kraitcc for
+ ipq8064
+
+Add saw compatible for l2 cache and kraitcc node for ipq8064 dtsi.
+Also declare clock-output-names for acc0 and acc1 and qsb fixed clock
+for the secondary mux.
+
+Signed-off-by: Ansuel Smith <[email protected]>
+Tested-by: Jonathan McDowell <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++--
+ 1 file changed, 32 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -301,6 +301,12 @@
+       };
+ 
+       clocks {
++              qsb: qsb {
++                      compatible = "fixed-clock";
++                      clock-frequency = <225000000>;
++                      #clock-cells = <0>;
++              };
++
+               cxo_board: cxo_board {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+@@ -503,11 +509,19 @@
+               acc0: clock-controller@2088000 {
+                       compatible = "qcom,kpss-acc-v1";
+                       reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
++                      clock-output-names = "acpu0_aux";
++                      clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
++                      clock-names = "pll8_vote", "pxo";
++                      #clock-cells = <0>;
+               };
+ 
+               acc1: clock-controller@2098000 {
+                       compatible = "qcom,kpss-acc-v1";
+                       reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
++                      clock-output-names = "acpu1_aux";
++                      clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
++                      clock-names = "pll8_vote", "pxo";
++                      #clock-cells = <0>;
+               };
+ 
+               adm_dma: dma-controller@18300000 {
+@@ -531,17 +545,23 @@
+               };
+ 
+               saw0: regulator@2089000 {
+-                      compatible = "qcom,saw2";
++                      compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
+                       reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
+                       regulator;
+               };
+ 
+               saw1: regulator@2099000 {
+-                      compatible = "qcom,saw2";
++                      compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
+                       reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
+                       regulator;
+               };
+ 
++              saw_l2: regulator@02012000 {
++                      compatible = "qcom,saw2", "syscon";
++                      reg = <0x02012000 0x1000>;
++                      regulator;
++              };
++
+               gsbi1: gsbi@12440000 {
+                       compatible = "qcom,gsbi-v1.0.0";
+                       reg = <0x12440000 0x100>;
+@@ -920,6 +940,17 @@
+                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu_l2_aux";
++                      #clock-cells = <0>;
++              };
++
++              kraitcc: clock-controller {
++                      compatible = "qcom,krait-cc-v1";
++                      clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>,
++                               <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>;
++                      clock-names = "hfpll0", "hfpll1", "hfpll_l2",
++                                    "acpu0_aux", "acpu1_aux", "acpu_l2_aux",
++                                    "qsb", "pxo";
++                      #clock-cells = <1>;
+               };
+ 
+               lcc: clock-controller@28000000 {

diff --git a/target/linux/ipq806x/patches-6.0/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch b/target/linux/ipq806x/patches-6.0/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch
new file mode 100644 (file)
index 0000000..f3c8f18
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/107-13-ARM-dts-qcom-add-opp-table-for-cpu-and-l2-for-ipq.patch
@@ -0,0 +1,268 @@
+From 076ebb6e1799c4c7a1d2e07510d88b9e9b57b551 Mon Sep 17 00:00:00 2001
+From: Ansuel Smith <[email protected]>
+Date: Tue, 18 Jan 2022 00:03:47 +0100
+Subject: [PATCH v3 13/18] ARM: dts: qcom: add opp table for cpu and l2 for
+ ipq8064
+
+Add opp table for cpu and l2 cache. While the current cpufreq is
+the generic one that doesn't scale the L2 cache, we add the l2
+cache opp anyway for the sake of completeness. This will be handy in the
+future when a dedicated cpufreq driver is introduced for krait cores
+that will correctly scale l2 cache with the core freq.
+
+Opp-level is set based on the logic of
+0: idle level
+1: normal level
+2: turbo level
+
+Signed-off-by: Ansuel Smith <[email protected]>
+Tested-by: Jonathan McDowell <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++
+ 1 file changed, 99 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -48,6 +48,105 @@
+               };
+       };
+ 
++      opp_table_l2: opp_table_l2 {
++              compatible = "operating-points-v2";
++
++              opp-384000000 {
++                      opp-hz = /bits/ 64 <384000000>;
++                      opp-microvolt = <1100000>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <0>;
++              };
++
++              opp-1000000000 {
++                      opp-hz = /bits/ 64 <1000000000>;
++                      opp-microvolt = <1100000>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <1>;
++              };
++
++              opp-1200000000 {
++                      opp-hz = /bits/ 64 <1200000000>;
++                      opp-microvolt = <1150000>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <2>;
++              };
++      };
++
++      opp_table0: opp_table0 {
++              compatible = "operating-points-v2-kryo-cpu";
++              nvmem-cells = <&speedbin_efuse>;
++
++              /*
++               * Voltage thresholds are <target min max>
++               */
++              opp-384000000 {
++                      opp-hz = /bits/ 64 <384000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
++                      opp-microvolt-speed0-pvs1-v0 = <925000 878750 971250>;
++                      opp-microvolt-speed0-pvs2-v0 = <875000 831250 918750>;
++                      opp-microvolt-speed0-pvs3-v0 = <800000 760000 840000>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <0>;
++              };
++
++              opp-600000000 {
++                      opp-hz = /bits/ 64 <600000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
++                      opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
++                      opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
++                      opp-microvolt-speed0-pvs3-v0 = <850000 807500 892500>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <1>;
++              };
++
++              opp-800000000 {
++                      opp-hz = /bits/ 64 <800000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
++                      opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
++                      opp-microvolt-speed0-pvs2-v0 = <995000 945250 1044750>;
++                      opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <1>;
++              };
++
++              opp-1000000000 {
++                      opp-hz = /bits/ 64 <1000000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
++                      opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
++                      opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>;
++                      opp-microvolt-speed0-pvs3-v0 = <950000 902500 997500>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <1>;
++              };
++
++              opp-1200000000 {
++                      opp-hz = /bits/ 64 <1200000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1200000 1140000 1260000>;
++                      opp-microvolt-speed0-pvs1-v0 = <1125000 1068750 1181250>;
++                      opp-microvolt-speed0-pvs2-v0 = <1075000 1021250 1128750>;
++                      opp-microvolt-speed0-pvs3-v0 = <1000000 950000 1050000>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <2>;
++              };
++
++              opp-1400000000 {
++                      opp-hz = /bits/ 64 <1400000000>;
++                      opp-microvolt-speed0-pvs0-v0 = <1250000 1187500 1312500>;
++                      opp-microvolt-speed0-pvs1-v0 = <1175000 1116250 1233750>;
++                      opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
++                      opp-microvolt-speed0-pvs3-v0 = <1050000 997500 1102500>;
++                      opp-supported-hw = <0x1>;
++                      clock-latency-ns = <100000>;
++                      opp-level = <2>;
++              };
++      };
++
+       thermal-zones {
+               tsens_tz_sensor0 {
+                       polling-delay-passive = <0>;
+--- a/arch/arm/boot/dts/qcom-ipq8065.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
+@@ -6,3 +6,92 @@
+       model = "Qualcomm Technologies, Inc. IPQ8065";
+       compatible = "qcom,ipq8065", "qcom,ipq8064";
+ };
++
++&opp_table_l2 {
++      /delete-node/opp-1200000000;
++
++      opp-1400000000 {
++              opp-hz = /bits/ 64 <1400000000>;
++              opp-microvolt = <1150000>;
++              clock-latency-ns = <100000>;
++              opp-level = <2>;
++      };
++};
++
++&opp_table0 {
++      /*
++       * On ipq8065 1.2 ghz freq is not present
++       * Remove it to make cpufreq work and not
++       * complain for missing definition
++       */
++
++      /delete-node/opp-1200000000;
++
++      /*
++       * Voltage thresholds are <target min max>
++       */
++      opp-384000000 {
++              opp-microvolt-speed0-pvs0-v0 = <975000 926250 1023750>;
++              opp-microvolt-speed0-pvs1-v0 = <950000 902500 997500>;
++              opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>;
++              opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>;
++              opp-microvolt-speed0-pvs4-v0 = <875000 831250 918750>;
++              opp-microvolt-speed0-pvs5-v0 = <825000 783750 866250>;
++              opp-microvolt-speed0-pvs6-v0 = <775000 736250 813750>;
++      };
++
++      opp-600000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
++              opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>;
++              opp-microvolt-speed0-pvs2-v0 = <950000 902500 997500>;
++              opp-microvolt-speed0-pvs3-v0 = <925000 878750 971250>;
++              opp-microvolt-speed0-pvs4-v0 = <900000 855000 945000>;
++              opp-microvolt-speed0-pvs5-v0 = <850000 807500 892500>;
++              opp-microvolt-speed0-pvs6-v0 = <800000 760000 840000>;
++      };
++
++      opp-800000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
++              opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>;
++              opp-microvolt-speed0-pvs2-v0 = <1000000 950000 1050000>;
++              opp-microvolt-speed0-pvs3-v0 = <975000 926250 1023750>;
++              opp-microvolt-speed0-pvs4-v0 = <950000 902500 997500>;
++              opp-microvolt-speed0-pvs5-v0 = <900000 855000 945000>;
++              opp-microvolt-speed0-pvs6-v0 = <850000 807500 892500>;
++      };
++
++      opp-1000000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
++              opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
++              opp-microvolt-speed0-pvs2-v0 = <1050000 997500 1102500>;
++              opp-microvolt-speed0-pvs3-v0 = <1025000 973750 1076250>;
++              opp-microvolt-speed0-pvs4-v0 = <1000000 950000 1050000>;
++              opp-microvolt-speed0-pvs5-v0 = <950000 902500 997500>;
++              opp-microvolt-speed0-pvs6-v0 = <900000 855000 945000>;
++      };
++
++      opp-1400000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1175000 1116250 1233750>;
++              opp-microvolt-speed0-pvs1-v0 = <1150000 1092500 1207500>;
++              opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>;
++              opp-microvolt-speed0-pvs3-v0 = <1100000 1045000 1155000>;
++              opp-microvolt-speed0-pvs4-v0 = <1075000 1021250 1128750>;
++              opp-microvolt-speed0-pvs5-v0 = <1025000 973750 1076250>;
++              opp-microvolt-speed0-pvs6-v0 = <975000 926250 1023750>;
++              opp-level = <1>;
++      };
++
++      opp-1725000000 {
++              opp-hz = /bits/ 64 <1725000000>;
++              opp-microvolt-speed0-pvs0-v0 = <1262500 1199375 1325625>;
++              opp-microvolt-speed0-pvs1-v0 = <1225000 1163750 1286250>;
++              opp-microvolt-speed0-pvs2-v0 = <1200000 1140000 1260000>;
++              opp-microvolt-speed0-pvs3-v0 = <1175000 1116250 1233750>;
++              opp-microvolt-speed0-pvs4-v0 = <1150000 1092500 1207500>;
++              opp-microvolt-speed0-pvs5-v0 = <1100000 1045000 1155000>;
++              opp-microvolt-speed0-pvs6-v0 = <1050000 997500 1102500>;
++              opp-supported-hw = <0x1>;
++              clock-latency-ns = <100000>;
++              opp-level = <2>;
++      };
++};
+--- a/arch/arm/boot/dts/qcom-ipq8062.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8062.dtsi
+@@ -6,3 +6,39 @@
+       model = "Qualcomm Technologies, Inc. IPQ8062";
+       compatible = "qcom,ipq8062", "qcom,ipq8064";
+ };
++
++&opp_table0 {
++      /delete-node/opp-1200000000;
++      /delete-node/opp-1400000000;
++
++      /*
++       * Voltage thresholds are <target min max>
++       */
++      opp-384000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>;
++              opp-microvolt-speed0-pvs1-v0 = < 925000 878750  971250>;
++              opp-microvolt-speed0-pvs2-v0 = < 875000 831250  918750>;
++              opp-microvolt-speed0-pvs3-v0 = < 800000 760000  840000>;
++      };
++
++      opp-600000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>;
++              opp-microvolt-speed0-pvs1-v0 = < 975000 926250 1023750>;
++              opp-microvolt-speed0-pvs2-v0 = < 925000 878750  971250>;
++              opp-microvolt-speed0-pvs3-v0 = < 850000 807500  892500>;
++      };
++
++      opp-800000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>;
++              opp-microvolt-speed0-pvs1-v0 = <1025000  973750 1076250>;
++              opp-microvolt-speed0-pvs2-v0 = < 995000  945250 1044750>;
++              opp-microvolt-speed0-pvs3-v0 = < 900000  855000  945000>;
++      };
++
++      opp-1000000000 {
++              opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>;
++              opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>;
++              opp-microvolt-speed0-pvs2-v0 = <1025000  973750 1076250>;
++              opp-microvolt-speed0-pvs3-v0 = < 950000  902500  997500>;
++      };
++};

diff --git a/target/linux/ipq806x/patches-6.0/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch b/target/linux/ipq806x/patches-6.0/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch
new file mode 100644 (file)
index 0000000..cf27aaa
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/107-15-ARM-dts-qcom-add-multiple-missing-binding-for-cpu.patch
@@ -0,0 +1,153 @@
+From 211fc0c0a63c99b68663a27182e643316c2d8cbe Mon Sep 17 00:00:00 2001
+From: Ansuel Smith <[email protected]>
+Date: Tue, 18 Jan 2022 00:07:57 +0100
+Subject: [PATCH v3 15/18] ARM: dts: qcom: add multiple missing binding for cpu
+ and l2 for ipq8064
+
+Add multiple binding for cpu node, l2 node and add idle-states
+definition for ipq8064 dtsi.
+
+Signed-off-by: Ansuel Smith <[email protected]>
+Tested-by: Jonathan McDowell <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -30,6 +30,15 @@
+                       next-level-cache = <&L2>;
+                       qcom,acc = <&acc0>;
+                       qcom,saw = <&saw0>;
++                      clocks = <&kraitcc 0>, <&kraitcc 4>;
++                      clock-names = "cpu", "l2";
++                      clock-latency = <100000>;
++                      operating-points-v2 = <&opp_table0>;
++                      voltage-tolerance = <5>;
++                      cooling-min-state = <0>;
++                      cooling-max-state = <10>;
++                      #cooling-cells = <2>;
++                      cpu-idle-states = <&CPU_SPC>;
+               };
+ 
+               cpu1: cpu@1 {
+@@ -40,11 +49,35 @@
+                       next-level-cache = <&L2>;
+                       qcom,acc = <&acc1>;
+                       qcom,saw = <&saw1>;
++                      clocks = <&kraitcc 1>, <&kraitcc 4>;
++                      clock-names = "cpu", "l2";
++                      clock-latency = <100000>;
++                      operating-points-v2 = <&opp_table0>;
++                      voltage-tolerance = <5>;
++                      cooling-min-state = <0>;
++                      cooling-max-state = <10>;
++                      #cooling-cells = <2>;
++                      cpu-idle-states = <&CPU_SPC>;
++              };
++
++              idle-states {
++                      CPU_SPC: spc {
++                              compatible = "qcom,idle-state-spc";
++                              status = "disabled";
++                              entry-latency-us = <400>;
++                              exit-latency-us = <900>;
++                              min-residency-us = <3000>;
++                      };
+               };
+ 
+               L2: l2-cache {
+                       compatible = "cache";
+                       cache-level = <2>;
++                      qcom,saw = <&saw_l2>;
++
++                      clocks = <&kraitcc 4>;
++                      clock-names = "l2";
++                      operating-points-v2 = <&opp_table_l2>;
+               };
+       };
+ 
+--- a/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
+@@ -2,6 +2,18 @@
+ 
+ #include "qcom-ipq8064.dtsi"
+ 
++&cpu0 {
++      cpu-supply = <&smb208_s2a>;
++};
++
++&cpu1 {
++      cpu-supply = <&smb208_s2b>;
++};
++
++&L2 {
++      l2-supply = <&smb208_s1a>;
++};
++
+ &rpm {
+       smb208_regulators: regulators {
+               compatible = "qcom,rpm-smb208-regulators";
+--- a/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
+@@ -2,6 +2,18 @@
+ 
+ #include "qcom-ipq8064-v2.0.dtsi"
+ 
++&cpu0 {
++      cpu-supply = <&smb208_s2a>;
++};
++
++&cpu1 {
++      cpu-supply = <&smb208_s2b>;
++};
++
++&L2 {
++      l2-supply = <&smb208_s1a>;
++};
++
+ &rpm {
+       smb208_regulators: regulators {
+               compatible = "qcom,rpm-smb208-regulators";
+--- a/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
+@@ -2,6 +2,18 @@
+ 
+ #include "qcom-ipq8062.dtsi"
+ 
++&cpu0 {
++      cpu-supply = <&smb208_s2a>;
++};
++
++&cpu1 {
++      cpu-supply = <&smb208_s2b>;
++};
++
++&L2 {
++      l2-supply = <&smb208_s1a>;
++};
++
+ &rpm {
+       smb208_regulators: regulators {
+               compatible = "qcom,rpm-smb208-regulators";
+--- a/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
+@@ -2,6 +2,18 @@
+ 
+ #include "qcom-ipq8065.dtsi"
+ 
++&cpu0 {
++      cpu-supply = <&smb208_s2a>;
++};
++
++&cpu1 {
++      cpu-supply = <&smb208_s2b>;
++};
++
++&L2 {
++      l2-supply = <&smb208_s1a>;
++};
++
+ &rpm {
+       smb208_regulators: regulators {
+               compatible = "qcom,rpm-smb208-regulators";

diff --git a/target/linux/ipq806x/patches-6.0/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch b/target/linux/ipq806x/patches-6.0/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch
new file mode 100644 (file)
index 0000000..d3f821a
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/108-01-ARM-dts-qcom-fix-wrong-nad_pins-definition-for-ipq80.patch
@@ -0,0 +1,29 @@
+From 6c94e0184e56f9e9f1f5d5f54b20758433e498d2 Mon Sep 17 00:00:00 2001
+From: Christian 'Ansuel' Marangi <[email protected]>
+Date: Wed, 15 Jun 2022 16:47:09 +0200
+Subject: [PATCH 1/2] ARM: dts: qcom: fix wrong nad_pins definition for ipq806x
+
+Fix wrong nand_pings definition for bias-disable pins.
+
+Signed-off-by: Christian 'Ansuel' Marangi <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 7 ++-----
+ 1 file changed, 2 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -559,12 +559,9 @@
+                       };
+ 
+                       nand_pins: nand_pins {
+-                              mux {
++                              disable {
+                                       pins = "gpio34", "gpio35", "gpio36",
+-                                             "gpio37", "gpio38", "gpio39",
+-                                             "gpio40", "gpio41", "gpio42",
+-                                             "gpio43", "gpio44", "gpio45",
+-                                             "gpio46", "gpio47";
++                                             "gpio37", "gpio38";
+                                       function = "nand";
+                                       drive-strength = <10>;
+                                       bias-disable;

diff --git a/target/linux/ipq806x/patches-6.0/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch b/target/linux/ipq806x/patches-6.0/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch
new file mode 100644 (file)
index 0000000..4a57fc0
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch
@@ -0,0 +1,188 @@
+From 504188183408fac0f61b59f5ed8ea1773fe43669 Mon Sep 17 00:00:00 2001
+From: Christian 'Ansuel' Marangi <[email protected]>
+Date: Wed, 15 Jun 2022 16:59:30 +0200
+Subject: [PATCH 2/2] ARM: dts: qcom: add MDIO dedicated controller node for
+ ipq806x
+
+Add MDIO dedicated controller attached to gmac0 and fix rb3011 dts to
+correctly use the new tag.
+
+Signed-off-by: Christian 'Ansuel' Marangi <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 134 +++++++++++-----------
+ arch/arm/boot/dts/qcom-ipq8064.dtsi       |  14 +++
+ 2 files changed, 81 insertions(+), 67 deletions(-)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
++++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
+@@ -24,73 +24,6 @@
+               device_type = "memory";
+       };
+ 
+-      mdio0: mdio-0 {
+-              status = "okay";
+-              compatible = "virtual,mdio-gpio";
+-              gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
+-                      <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+-              #address-cells = <1>;
+-              #size-cells = <0>;
+-
+-              pinctrl-0 = <&mdio0_pins>;
+-              pinctrl-names = "default";
+-
+-              switch0: switch@10 {
+-                      compatible = "qca,qca8337";
+-                      #address-cells = <1>;
+-                      #size-cells = <0>;
+-
+-                      dsa,member = <0 0>;
+-
+-                      pinctrl-0 = <&sw0_reset_pin>;
+-                      pinctrl-names = "default";
+-
+-                      reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
+-                      reg = <0x10>;
+-
+-                      ports {
+-                              #address-cells = <1>;
+-                              #size-cells = <0>;
+-
+-                              switch0cpu: port@0 {
+-                                      reg = <0>;
+-                                      label = "cpu";
+-                                      ethernet = <&gmac0>;
+-                                      phy-mode = "rgmii-id";
+-                                      fixed-link {
+-                                              speed = <1000>;
+-                                              full-duplex;
+-                                      };
+-                              };
+-
+-                              port@1 {
+-                                      reg = <1>;
+-                                      label = "sw1";
+-                              };
+-
+-                              port@2 {
+-                                      reg = <2>;
+-                                      label = "sw2";
+-                              };
+-
+-                              port@3 {
+-                                      reg = <3>;
+-                                      label = "sw3";
+-                              };
+-
+-                              port@4 {
+-                                      reg = <4>;
+-                                      label = "sw4";
+-                              };
+-
+-                              port@5 {
+-                                      reg = <5>;
+-                                      label = "sw5";
+-                              };
+-                      };
+-              };
+-      };
+-
+       mdio1: mdio-1 {
+               status = "okay";
+               compatible = "virtual,mdio-gpio";
+@@ -220,6 +153,73 @@
+       status = "okay";
+ };
+ 
++&mdio0 {
++      status = "okay";
++      compatible = "virtual,mdio-gpio";
++      gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
++              <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
++      #address-cells = <1>;
++      #size-cells = <0>;
++
++      pinctrl-0 = <&mdio0_pins>;
++      pinctrl-names = "default";
++
++      switch0: switch@10 {
++              compatible = "qca,qca8337";
++              #address-cells = <1>;
++              #size-cells = <0>;
++
++              dsa,member = <0 0>;
++
++              pinctrl-0 = <&sw0_reset_pin>;
++              pinctrl-names = "default";
++
++              reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
++              reg = <0x10>;
++
++              ports {
++                      #address-cells = <1>;
++                      #size-cells = <0>;
++
++                      switch0cpu: port@0 {
++                              reg = <0>;
++                              label = "cpu";
++                              ethernet = <&gmac0>;
++                              phy-mode = "rgmii-id";
++                              fixed-link {
++                                      speed = <1000>;
++                                      full-duplex;
++                              };
++                      };
++
++                      port@1 {
++                              reg = <1>;
++                              label = "sw1";
++                      };
++
++                      port@2 {
++                              reg = <2>;
++                              label = "sw2";
++                      };
++
++                      port@3 {
++                              reg = <3>;
++                              label = "sw3";
++                      };
++
++                      port@4 {
++                              reg = <4>;
++                              label = "sw4";
++                      };
++
++                      port@5 {
++                              reg = <5>;
++                              label = "sw5";
++                      };
++              };
++      };
++};
++
+ &gmac0 {
+       status = "okay";
+ 
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -1446,6 +1446,20 @@
+                       };
+               };
+ 
++              mdio0: mdio@37000000 {
++                      #address-cells = <1>;
++                      #size-cells = <0>;
++
++                      compatible = "qcom,ipq8064-mdio", "syscon";
++                      reg = <0x37000000 0x200000>;
++                      resets = <&gcc GMAC_CORE1_RESET>;
++                      reset-names = "stmmaceth";
++                      clocks = <&gcc GMAC_CORE1_CLK>;
++                      clock-names = "stmmaceth";
++
++                      status = "disabled";
++              };
++
+               vsdcc_fixed: vsdcc-regulator {
+                       compatible = "regulator-fixed";
+                       regulator-name = "SDCC Power";

diff --git a/target/linux/ipq806x/patches-6.0/109-01-dt-bindings-clock-add-pcm-reset-for-ipq806x-lcc.patch b/target/linux/ipq806x/patches-6.0/109-01-dt-bindings-clock-add-pcm-reset-for-ipq806x-lcc.patch
new file mode 100644 (file)
index 0000000..72e70b6
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/109-01-dt-bindings-clock-add-pcm-reset-for-ipq806x-lcc.patch
@@ -0,0 +1,29 @@
+From fc7dc1d0c10e8e3d72b68ddae8a61c8aa02a62c1 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 15 Jun 2022 17:13:32 +0200
+Subject: [PATCH v4 1/3] dt-bindings: clock: add pcm reset for ipq806x lcc
+
+Add pcm reset define for ipq806x lcc.
+
+Signed-off-by: Christian Marangi <[email protected]>
+Reviewed-by: Dmitry Baryshkov <[email protected]>
+Acked-by: Rob Herring <[email protected]>
+---
+v3:
+ - Added review tag
+ - Added ack tag
+v2:
+ - Fix Sob tag
+
+ include/dt-bindings/clock/qcom,lcc-ipq806x.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/include/dt-bindings/clock/qcom,lcc-ipq806x.h
++++ b/include/dt-bindings/clock/qcom,lcc-ipq806x.h
+@@ -19,4 +19,6 @@
+ #define SPDIF_CLK                     10
+ #define AHBIX_CLK                     11
+ 
++#define LCC_PCM_RESET                 0
++
+ #endif

diff --git a/target/linux/ipq806x/patches-6.0/109-02-clk-qcom-lcc-ipq806x-add-reset-definition.patch b/target/linux/ipq806x/patches-6.0/109-02-clk-qcom-lcc-ipq806x-add-reset-definition.patch
new file mode 100644 (file)
index 0000000..2393651
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/109-02-clk-qcom-lcc-ipq806x-add-reset-definition.patch
@@ -0,0 +1,48 @@
+From 3587d768bdf4683a53244be1acca5d095044671f Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 15 Jun 2022 17:19:55 +0200
+Subject: [PATCH v4 2/3] clk: qcom: lcc-ipq806x: add reset definition
+
+Add reset definition for lcc-ipq806x.
+
+Signed-off-by: Christian Marangi <[email protected]>
+Reviewed-by: Dmitry Baryshkov <[email protected]>
+---
+v3:
+ - Added review tag
+v2:
+ - Fix Sob tag
+
+ drivers/clk/qcom/lcc-ipq806x.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/clk/qcom/lcc-ipq806x.c
++++ b/drivers/clk/qcom/lcc-ipq806x.c
+@@ -22,6 +22,7 @@
+ #include "clk-branch.h"
+ #include "clk-regmap-divider.h"
+ #include "clk-regmap-mux.h"
++#include "reset.h"
+ 
+ static struct clk_pll pll4 = {
+       .l_reg = 0x4,
+@@ -405,6 +406,10 @@ static struct clk_regmap *lcc_ipq806x_cl
+       [AHBIX_CLK] = &ahbix_clk.clkr,
+ };
+ 
++static const struct qcom_reset_map lcc_ipq806x_resets[] = {
++      [LCC_PCM_RESET] = { 0x54, 13 },
++};
++
+ static const struct regmap_config lcc_ipq806x_regmap_config = {
+       .reg_bits       = 32,
+       .reg_stride     = 4,
+@@ -417,6 +422,8 @@ static const struct qcom_cc_desc lcc_ipq
+       .config = &lcc_ipq806x_regmap_config,
+       .clks = lcc_ipq806x_clks,
+       .num_clks = ARRAY_SIZE(lcc_ipq806x_clks),
++      .resets = lcc_ipq806x_resets,
++      .num_resets = ARRAY_SIZE(lcc_ipq806x_resets),
+ };
+ 
+ static const struct of_device_id lcc_ipq806x_match_table[] = {

diff --git a/target/linux/ipq806x/patches-6.0/109-03-clk-qcom-lcc-ipq806x-convert-to-parent-data.patch b/target/linux/ipq806x/patches-6.0/109-03-clk-qcom-lcc-ipq806x-convert-to-parent-data.patch
new file mode 100644 (file)
index 0000000..905dc5b
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/109-03-clk-qcom-lcc-ipq806x-convert-to-parent-data.patch
@@ -0,0 +1,217 @@
+From 92ef900a4a53b62e0dc32554eb088a422657606c Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 15 Jun 2022 17:35:13 +0200
+Subject: [PATCH v5 3/3] clk: qcom: lcc-ipq806x: convert to parent data
+
+Convert lcc-ipq806x driver to parent_data API.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+v5:
+- Fix the same compilation error (don't know what the hell happen
+  to my buildroot)
+v4:
+- Fix compilation error
+v3:
+ - Inline pxo pll4 parent
+ - Change .name from pxo to pxo_board
+
+ drivers/clk/qcom/lcc-ipq806x.c | 77 ++++++++++++++++++----------------
+ 1 file changed, 42 insertions(+), 35 deletions(-)
+
+--- a/drivers/clk/qcom/lcc-ipq806x.c
++++ b/drivers/clk/qcom/lcc-ipq806x.c
+@@ -34,7 +34,9 @@ static struct clk_pll pll4 = {
+       .status_bit = 16,
+       .clkr.hw.init = &(struct clk_init_data){
+               .name = "pll4",
+-              .parent_names = (const char *[]){ "pxo" },
++              .parent_data = &(const struct clk_parent_data) {
++                      .fw_name = "pxo", .name = "pxo_board",
++              },
+               .num_parents = 1,
+               .ops = &clk_pll_ops,
+       },
+@@ -64,9 +66,9 @@ static const struct parent_map lcc_pxo_p
+       { P_PLL4, 2 }
+ };
+ 
+-static const char * const lcc_pxo_pll4[] = {
+-      "pxo",
+-      "pll4_vote",
++static const struct clk_parent_data lcc_pxo_pll4[] = {
++      { .fw_name = "pxo", .name = "pxo" },
++      { .fw_name = "pll4_vote", .name = "pll4_vote" },
+ };
+ 
+ static struct freq_tbl clk_tbl_aif_mi2s[] = {
+@@ -131,18 +133,14 @@ static struct clk_rcg mi2s_osr_src = {
+               .enable_mask = BIT(9),
+               .hw.init = &(struct clk_init_data){
+                       .name = "mi2s_osr_src",
+-                      .parent_names = lcc_pxo_pll4,
+-                      .num_parents = 2,
++                      .parent_data = lcc_pxo_pll4,
++                      .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
+                       .ops = &clk_rcg_ops,
+                       .flags = CLK_SET_RATE_GATE,
+               },
+       },
+ };
+ 
+-static const char * const lcc_mi2s_parents[] = {
+-      "mi2s_osr_src",
+-};
+-
+ static struct clk_branch mi2s_osr_clk = {
+       .halt_reg = 0x50,
+       .halt_bit = 1,
+@@ -152,7 +150,9 @@ static struct clk_branch mi2s_osr_clk =
+               .enable_mask = BIT(17),
+               .hw.init = &(struct clk_init_data){
+                       .name = "mi2s_osr_clk",
+-                      .parent_names = lcc_mi2s_parents,
++                      .parent_hws = (const struct clk_hw*[]){
++                              &mi2s_osr_src.clkr.hw,
++                      },
+                       .num_parents = 1,
+                       .ops = &clk_branch_ops,
+                       .flags = CLK_SET_RATE_PARENT,
+@@ -167,7 +167,9 @@ static struct clk_regmap_div mi2s_div_cl
+       .clkr = {
+               .hw.init = &(struct clk_init_data){
+                       .name = "mi2s_div_clk",
+-                      .parent_names = lcc_mi2s_parents,
++                      .parent_hws = (const struct clk_hw*[]){
++                              &mi2s_osr_src.clkr.hw,
++                      },
+                       .num_parents = 1,
+                       .ops = &clk_regmap_div_ops,
+               },
+@@ -183,7 +185,9 @@ static struct clk_branch mi2s_bit_div_cl
+               .enable_mask = BIT(15),
+               .hw.init = &(struct clk_init_data){
+                       .name = "mi2s_bit_div_clk",
+-                      .parent_names = (const char *[]){ "mi2s_div_clk" },
++                      .parent_hws = (const struct clk_hw*[]){
++                              &mi2s_div_clk.clkr.hw,
++                      },
+                       .num_parents = 1,
+                       .ops = &clk_branch_ops,
+                       .flags = CLK_SET_RATE_PARENT,
+@@ -191,6 +195,10 @@ static struct clk_branch mi2s_bit_div_cl
+       },
+ };
+ 
++static const struct clk_parent_data lcc_mi2s_bit_div_codec_clk[] = {
++      { .hw = &mi2s_bit_div_clk.clkr.hw, },
++      { .fw_name = "mi2s_codec_clk", .name = "mi2s_codec_clk" },
++};
+ 
+ static struct clk_regmap_mux mi2s_bit_clk = {
+       .reg = 0x48,
+@@ -199,11 +207,8 @@ static struct clk_regmap_mux mi2s_bit_cl
+       .clkr = {
+               .hw.init = &(struct clk_init_data){
+                       .name = "mi2s_bit_clk",
+-                      .parent_names = (const char *[]){
+-                              "mi2s_bit_div_clk",
+-                              "mi2s_codec_clk",
+-                      },
+-                      .num_parents = 2,
++                      .parent_data = lcc_mi2s_bit_div_codec_clk,
++                      .num_parents = ARRAY_SIZE(lcc_mi2s_bit_div_codec_clk),
+                       .ops = &clk_regmap_mux_closest_ops,
+                       .flags = CLK_SET_RATE_PARENT,
+               },
+@@ -245,8 +250,8 @@ static struct clk_rcg pcm_src = {
+               .enable_mask = BIT(9),
+               .hw.init = &(struct clk_init_data){
+                       .name = "pcm_src",
+-                      .parent_names = lcc_pxo_pll4,
+-                      .num_parents = 2,
++                      .parent_data = lcc_pxo_pll4,
++                      .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
+                       .ops = &clk_rcg_ops,
+                       .flags = CLK_SET_RATE_GATE,
+               },
+@@ -262,7 +267,9 @@ static struct clk_branch pcm_clk_out = {
+               .enable_mask = BIT(11),
+               .hw.init = &(struct clk_init_data){
+                       .name = "pcm_clk_out",
+-                      .parent_names = (const char *[]){ "pcm_src" },
++                      .parent_hws = (const struct clk_hw*[]){
++                              &pcm_src.clkr.hw,
++                      },
+                       .num_parents = 1,
+                       .ops = &clk_branch_ops,
+                       .flags = CLK_SET_RATE_PARENT,
+@@ -270,6 +277,11 @@ static struct clk_branch pcm_clk_out = {
+       },
+ };
+ 
++static const struct clk_parent_data lcc_pcm_clk_out_codec_clk[] = {
++      { .hw = &pcm_clk_out.clkr.hw, },
++      { .fw_name = "pcm_codec_clk", .name = "pcm_codec_clk" },
++};
++
+ static struct clk_regmap_mux pcm_clk = {
+       .reg = 0x54,
+       .shift = 10,
+@@ -277,11 +289,8 @@ static struct clk_regmap_mux pcm_clk = {
+       .clkr = {
+               .hw.init = &(struct clk_init_data){
+                       .name = "pcm_clk",
+-                      .parent_names = (const char *[]){
+-                              "pcm_clk_out",
+-                              "pcm_codec_clk",
+-                      },
+-                      .num_parents = 2,
++                      .parent_data = lcc_pcm_clk_out_codec_clk,
++                      .num_parents = ARRAY_SIZE(lcc_pcm_clk_out_codec_clk),
+                       .ops = &clk_regmap_mux_closest_ops,
+                       .flags = CLK_SET_RATE_PARENT,
+               },
+@@ -325,18 +334,14 @@ static struct clk_rcg spdif_src = {
+               .enable_mask = BIT(9),
+               .hw.init = &(struct clk_init_data){
+                       .name = "spdif_src",
+-                      .parent_names = lcc_pxo_pll4,
+-                      .num_parents = 2,
++                      .parent_data = lcc_pxo_pll4,
++                      .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
+                       .ops = &clk_rcg_ops,
+                       .flags = CLK_SET_RATE_GATE,
+               },
+       },
+ };
+ 
+-static const char * const lcc_spdif_parents[] = {
+-      "spdif_src",
+-};
+-
+ static struct clk_branch spdif_clk = {
+       .halt_reg = 0xd4,
+       .halt_bit = 1,
+@@ -346,7 +351,9 @@ static struct clk_branch spdif_clk = {
+               .enable_mask = BIT(12),
+               .hw.init = &(struct clk_init_data){
+                       .name = "spdif_clk",
+-                      .parent_names = lcc_spdif_parents,
++                      .parent_hws = (const struct clk_hw*[]){
++                              &spdif_src.clkr.hw,
++                      },
+                       .num_parents = 1,
+                       .ops = &clk_branch_ops,
+                       .flags = CLK_SET_RATE_PARENT,
+@@ -384,8 +391,8 @@ static struct clk_rcg ahbix_clk = {
+               .enable_mask = BIT(11),
+               .hw.init = &(struct clk_init_data){
+                       .name = "ahbix",
+-                      .parent_names = lcc_pxo_pll4,
+-                      .num_parents = 2,
++                      .parent_data = lcc_pxo_pll4,
++                      .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
+                       .ops = &clk_rcg_lcc_ops,
+               },
+       },

diff --git a/target/linux/ipq806x/patches-6.0/110-01-thermal-qcom-tsens-init-debugfs-only-with-successful.patch b/target/linux/ipq806x/patches-6.0/110-01-thermal-qcom-tsens-init-debugfs-only-with-successful.patch
new file mode 100644 (file)
index 0000000..ef851df
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/110-01-thermal-qcom-tsens-init-debugfs-only-with-successful.patch
@@ -0,0 +1,41 @@
+From 8f32d48a309246a80bdca505968085a484d54408 Mon Sep 17 00:00:00 2001
+From: Ansuel Smith <[email protected]>
+Date: Mon, 19 Apr 2021 03:01:53 +0200
+Subject: [thermal-next PATCH v2 1/2] thermal: qcom: tsens: init debugfs only with
+ successful probe
+
+calibrate and tsens_register can fail or PROBE_DEFER. This will cause a
+double or a wrong init of the debugfs information. Init debugfs only
+with successful probe fixing warning about directory already present.
+
+Signed-off-by: Ansuel Smith <[email protected]>
+Acked-by: Thara Gopinath <[email protected]>
+---
+ drivers/thermal/qcom/tsens.c | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+--- a/drivers/thermal/qcom/tsens.c
++++ b/drivers/thermal/qcom/tsens.c
+@@ -917,8 +917,6 @@ int __init init_common(struct tsens_priv
+       if (tsens_version(priv) >= VER_0_1)
+               tsens_enable_irq(priv);
+ 
+-      tsens_debug_init(op);
+-
+ err_put_device:
+       put_device(&op->dev);
+       return ret;
+@@ -1157,7 +1155,12 @@ static int tsens_probe(struct platform_d
+               }
+       }
+ 
+-      return tsens_register(priv);
++      ret = tsens_register(priv);
++
++      if (!ret)
++              tsens_debug_init(pdev);
++
++      return ret;
+ }
+ 
+ static int tsens_remove(struct platform_device *pdev)

diff --git a/target/linux/ipq806x/patches-6.0/110-02-thermal-qcom-tsens-simplify-debugfs-init-function.patch b/target/linux/ipq806x/patches-6.0/110-02-thermal-qcom-tsens-simplify-debugfs-init-function.patch
new file mode 100644 (file)
index 0000000..add2ab4
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/110-02-thermal-qcom-tsens-simplify-debugfs-init-function.patch
@@ -0,0 +1,54 @@
+From 4204f22060f7a5d42c6ccb4d4c25a6a875571099 Mon Sep 17 00:00:00 2001
+From: Ansuel Smith <[email protected]>
+Date: Mon, 19 Apr 2021 03:08:37 +0200
+Subject: [thermal-next PATCH v2 2/2] thermal: qcom: tsens: simplify debugfs init
+ function
+
+Simplify debugfs init function.
+- Add check for existing dev directory.
+- Fix wrong version in dbg_version_show (with version 0.0.0, 0.1.0 was
+  incorrectly reported)
+
+Signed-off-by: Ansuel Smith <[email protected]>
+Reviewed-by: Thara Gopinath <[email protected]>
+---
+ drivers/thermal/qcom/tsens.c | 16 +++++++---------
+ 1 file changed, 7 insertions(+), 9 deletions(-)
+
+--- a/drivers/thermal/qcom/tsens.c
++++ b/drivers/thermal/qcom/tsens.c
+@@ -691,7 +691,7 @@ static int dbg_version_show(struct seq_f
+                       return ret;
+               seq_printf(s, "%d.%d.%d\n", maj_ver, min_ver, step_ver);
+       } else {
+-              seq_puts(s, "0.1.0\n");
++              seq_printf(s, "0.%d.0\n", priv->feat->ver_major);
+       }
+ 
+       return 0;
+@@ -703,21 +703,17 @@ DEFINE_SHOW_ATTRIBUTE(dbg_sensors);
+ static void tsens_debug_init(struct platform_device *pdev)
+ {
+       struct tsens_priv *priv = platform_get_drvdata(pdev);
+-      struct dentry *root, *file;
+ 
+-      root = debugfs_lookup("tsens", NULL);
+-      if (!root)
++      priv->debug_root = debugfs_lookup("tsens", NULL);
++      if (!priv->debug_root)
+               priv->debug_root = debugfs_create_dir("tsens", NULL);
+-      else
+-              priv->debug_root = root;
+ 
+-      file = debugfs_lookup("version", priv->debug_root);
+-      if (!file)
++      if (!debugfs_lookup("version", priv->debug_root))
+               debugfs_create_file("version", 0444, priv->debug_root,
+                                   pdev, &dbg_version_fops);
+ 
+       /* A directory for each instance of the TSENS IP */
+-      priv->debug = debugfs_create_dir(dev_name(&pdev->dev), priv->debug_root);
++      priv->debug = debugfs_lookup(dev_name(&pdev->dev), priv->debug_root);
+       debugfs_create_file("sensors", 0444, priv->debug, pdev, &dbg_sensors_fops);
+ }
+ #else

diff --git a/target/linux/ipq806x/patches-6.0/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch b/target/linux/ipq806x/patches-6.0/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch
new file mode 100644 (file)
index 0000000..af90393
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/114-01-devfreq-qcom-Add-L2-Krait-Cache-devfreq-scaling-driv.patch
@@ -0,0 +1,235 @@
+From b044ae89862132a86fb511648e9c52ea3cdf8c30 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 5 Aug 2020 14:19:23 +0200
+Subject: [PATCH 1/4] devfreq: qcom: Add L2 Krait Cache devfreq scaling driver
+
+Qcom L2 Krait CPUs use the generic cpufreq-dt driver and doesn't actually
+scale the Cache frequency when the CPU frequency is changed. This
+devfreq driver register with the cpu notifier and scale the Cache
+based on the max Freq across all core as the CPU cache is shared across
+all of them. If provided this also scale the voltage of the regulator
+attached to the CPU cache. The scaling logic is based on the CPU freq
+and the 3 scaling interval are set by the device dts.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/devfreq/Kconfig               |  11 ++
+ drivers/devfreq/Makefile              |   1 +
+ drivers/devfreq/krait-cache-devfreq.c | 188 ++++++++++++++++++++++++++
+ 3 files changed, 200 insertions(+)
+ create mode 100644 drivers/devfreq/krait-cache-devfreq.c
+
+--- a/drivers/devfreq/Kconfig
++++ b/drivers/devfreq/Kconfig
+@@ -132,6 +132,17 @@ config ARM_RK3399_DMC_DEVFREQ
+         It sets the frequency for the memory controller and reads the usage counts
+         from hardware.
+ 
++config ARM_KRAIT_CACHE_DEVFREQ
++      tristate "Scaling support for Krait CPU Cache Devfreq"
++      depends on ARCH_QCOM || COMPILE_TEST
++      select DEVFREQ_GOV_PASSIVE
++      help
++        This adds the DEVFREQ driver for the Krait CPU L2 Cache shared by all cores.
++
++        The driver register with the cpufreq notifier and find the right frequency
++        based on the max frequency across all core and the range set in the device
++        dts. If provided this scale also the regulator attached to the l2 cache.
++
+ source "drivers/devfreq/event/Kconfig"
+ 
+ endif # PM_DEVFREQ
+--- a/drivers/devfreq/Makefile
++++ b/drivers/devfreq/Makefile
+@@ -13,6 +13,7 @@ obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ)    += imx
+ obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ)  += imx8m-ddrc.o
+ obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ)  += rk3399_dmc.o
+ obj-$(CONFIG_ARM_TEGRA_DEVFREQ)               += tegra30-devfreq.o
++obj-$(CONFIG_ARM_KRAIT_CACHE_DEVFREQ) += krait-cache-devfreq.o
+ 
+ # DEVFREQ Event Drivers
+ obj-$(CONFIG_PM_DEVFREQ_EVENT)                += event/
+--- /dev/null
++++ b/drivers/devfreq/krait-cache-devfreq.c
+@@ -0,0 +1,181 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/cpufreq.h>
++#include <linux/devfreq.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++#include <linux/slab.h>
++#include <linux/regulator/consumer.h>
++#include <linux/pm_opp.h>
++
++#include "governor.h"
++
++struct krait_cache_data {
++      struct clk *clk;
++      unsigned long idle_freq;
++      int token;
++};
++
++static int krait_cache_config_clk(struct device *dev, struct opp_table *opp_table,
++                      struct dev_pm_opp *old_opp, struct dev_pm_opp *opp,
++                      void *data, bool scaling_down)
++{
++      struct krait_cache_data *kdata;
++      unsigned long old_freq, freq;
++      unsigned long idle_freq;
++      struct clk *clk;
++      int ret;
++
++      kdata = dev_get_drvdata(dev);
++      idle_freq = kdata->idle_freq;
++      clk = kdata->clk;
++
++      old_freq = dev_pm_opp_get_freq(old_opp);
++      freq = dev_pm_opp_get_freq(opp);
++
++      /*
++       * Set to idle bin if switching from normal to high bin
++       * or vice versa. It has been notice that a bug is triggered
++       * in cache scaling when more than one bin is scaled, to fix
++       * this we first need to transition to the base rate and then
++       * to target rate
++       */
++      if (likely(freq != idle_freq && old_freq != idle_freq)) {
++              ret = clk_set_rate(clk, idle_freq);
++              if (ret)
++                      return ret;
++      }
++
++      return clk_set_rate(clk, freq);
++};
++
++static int krait_cache_get_cur_freq(struct device *dev, unsigned long *freq)
++{
++      struct krait_cache_data *data = dev_get_drvdata(dev);
++
++      *freq = clk_get_rate(data->clk);
++
++      return 0;
++};
++
++static int krait_cache_target(struct device *dev, unsigned long *freq,
++                            u32 flags)
++{
++      struct dev_pm_opp *opp;
++
++      opp = dev_pm_opp_find_freq_ceil(dev, freq);
++      if (unlikely(IS_ERR(opp)))
++              return PTR_ERR(opp);
++
++      dev_pm_opp_put(opp);
++
++      return dev_pm_opp_set_rate(dev, *freq);
++};
++
++static int krait_cache_get_dev_status(struct device *dev,
++                                    struct devfreq_dev_status *stat)
++{
++      struct krait_cache_data *data = dev_get_drvdata(dev);
++
++      stat->busy_time = 0;
++      stat->total_time = 0;
++      stat->current_frequency = clk_get_rate(data->clk);
++
++      return 0;
++};
++
++static struct devfreq_dev_profile krait_cache_devfreq_profile = {
++      .target = krait_cache_target,
++      .get_dev_status = krait_cache_get_dev_status,
++      .get_cur_freq = krait_cache_get_cur_freq
++};
++
++static struct devfreq_passive_data devfreq_gov_data = {
++      .parent_type = CPUFREQ_PARENT_DEV,
++};
++
++static int krait_cache_probe(struct platform_device *pdev)
++{
++      struct dev_pm_opp_config config = { };
++      struct device *dev = &pdev->dev;
++      struct krait_cache_data *data;
++      struct devfreq *devfreq;
++      struct dev_pm_opp *opp;
++      struct clk *clk;
++      int ret, token;
++
++      data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
++      if (!data)
++              return -ENOMEM;
++
++      clk = devm_clk_get(dev, "l2");
++      if (IS_ERR(clk))
++              return PTR_ERR(clk);
++
++      config.regulator_names = (const char *[]){ "l2", NULL };
++      config.clk_names = (const char *[]){ "l2", NULL };
++      config.config_clks = krait_cache_config_clk;
++
++      token = dev_pm_opp_set_config(dev, &config);
++      if (token < 0)
++              return token;
++
++      ret = devm_pm_opp_of_add_table(dev);
++      if (ret)
++              goto free_opp;
++
++      opp = dev_pm_opp_find_freq_ceil(dev, &data->idle_freq);
++      if (IS_ERR(opp)) {
++              ret = PTR_ERR(opp);
++              goto free_opp;
++      }
++      dev_pm_opp_put(opp);
++
++      data->token = token;
++      data->clk = clk;
++      dev_set_drvdata(dev, data);
++      devfreq = devm_devfreq_add_device(dev, &krait_cache_devfreq_profile,
++                                        DEVFREQ_GOV_PASSIVE, &devfreq_gov_data);
++      if (IS_ERR(devfreq)) {
++              ret = PTR_ERR(devfreq);
++              goto free_opp;
++      }
++
++      return 0;
++
++free_opp:
++      dev_pm_opp_clear_config(token);
++      return ret;
++};
++
++static int krait_cache_remove(struct platform_device *pdev)
++{
++      struct krait_cache_data *data = dev_get_drvdata(&pdev->dev);
++
++      dev_pm_opp_clear_config(data->token);
++
++      return 0;
++};
++
++static const struct of_device_id krait_cache_match_table[] = {
++      { .compatible = "qcom,krait-cache" },
++      {}
++};
++
++static struct platform_driver krait_cache_driver = {
++      .probe          = krait_cache_probe,
++      .remove         = krait_cache_remove,
++      .driver         = {
++              .name   = "krait-cache-scaling",
++              .of_match_table = krait_cache_match_table,
++      },
++};
++module_platform_driver(krait_cache_driver);
++
++MODULE_DESCRIPTION("Krait CPU Cache Scaling driver");
++MODULE_AUTHOR("Christian Marangi <[email protected]>");
++MODULE_LICENSE("GPL v2");

diff --git a/target/linux/ipq806x/patches-6.0/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch b/target/linux/ipq806x/patches-6.0/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch
new file mode 100644 (file)
index 0000000..f42729f
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch
@@ -0,0 +1,50 @@
+From ef124ad0ff8abfbf4ebe3fe6d7dcef4541dec13a Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 16 Jun 2022 18:39:21 +0200
+Subject: [PATCH] ARM: dts: qcom: add krait-cache compatible for ipq806x dtsi
+
+Add qcom,krait-cache compatible to enable cache devfreq driver for
+ipq806x SoC and move the L2 node to the soc node to make the devfreq
+driver correctly probe.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 22 +++++++++++-----------
+ 1 file changed, 11 insertions(+), 11 deletions(-)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -69,16 +69,6 @@
+                               min-residency-us = <3000>;
+                       };
+               };
+-
+-              L2: l2-cache {
+-                      compatible = "cache";
+-                      cache-level = <2>;
+-                      qcom,saw = <&saw_l2>;
+-
+-                      clocks = <&kraitcc 4>;
+-                      clock-names = "l2";
+-                      operating-points-v2 = <&opp_table_l2>;
+-              };
+       };
+ 
+       opp_table_l2: opp_table_l2 {
+@@ -470,6 +460,16 @@
+               ranges;
+               compatible = "simple-bus";
+ 
++              L2: l2-cache {
++                      compatible = "cache", "qcom,krait-cache";
++                      cache-level = <2>;
++                      qcom,saw = <&saw_l2>;
++
++                      clocks = <&kraitcc 4>;
++                      clock-names = "l2";
++                      operating-points-v2 = <&opp_table_l2>;
++              };
++
+               lpass@28100000 {
+                       compatible = "qcom,lpass-cpu";
+                       status = "disabled";

diff --git a/target/linux/ipq806x/patches-6.0/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch b/target/linux/ipq806x/patches-6.0/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch
new file mode 100644 (file)
index 0000000..340c58a
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/115-01-devfreq-add-ipq806x-fabric-scaling-driver.patch
@@ -0,0 +1,203 @@
+From 13f075999935bb696dbab63243923179f06fa05e Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 16 Jun 2022 19:56:08 +0200
+Subject: [PATCH 3/4] devfreq: add ipq806x fabric scaling driver
+
+Add ipq806x fabric scaling driver using the devfreq passive governor.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/devfreq/Kconfig               |  11 ++
+ drivers/devfreq/Makefile              |   1 +
+ drivers/devfreq/ipq806x-fab-devfreq.c | 155 ++++++++++++++++++++++++++
+ 3 files changed, 167 insertions(+)
+ create mode 100644 drivers/devfreq/ipq806x-fab-devfreq.c
+
+--- a/drivers/devfreq/Kconfig
++++ b/drivers/devfreq/Kconfig
+@@ -143,6 +143,17 @@ config ARM_KRAIT_CACHE_DEVFREQ
+         based on the max frequency across all core and the range set in the device
+         dts. If provided this scale also the regulator attached to the l2 cache.
+ 
++config ARM_IPQ806X_FAB_DEVFREQ
++      tristate "Scaling support for ipq806x Soc Fabric"
++      depends on ARCH_QCOM || COMPILE_TEST
++      select DEVFREQ_GOV_PASSIVE
++      help
++        This adds the DEVFREQ driver for the ipq806x Soc Fabric.
++
++        The driver register with the cpufreq notifier and find the right frequency
++        based on the max frequency across all core and the range set in the device
++        dts.
++
+ source "drivers/devfreq/event/Kconfig"
+ 
+ endif # PM_DEVFREQ
+--- a/drivers/devfreq/Makefile
++++ b/drivers/devfreq/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) +=
+ obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ)  += rk3399_dmc.o
+ obj-$(CONFIG_ARM_TEGRA_DEVFREQ)               += tegra30-devfreq.o
+ obj-$(CONFIG_ARM_KRAIT_CACHE_DEVFREQ) += krait-cache-devfreq.o
++obj-$(CONFIG_ARM_IPQ806X_FAB_DEVFREQ) += ipq806x-fab-devfreq.o
+ 
+ # DEVFREQ Event Drivers
+ obj-$(CONFIG_PM_DEVFREQ_EVENT)                += event/
+--- /dev/null
++++ b/drivers/devfreq/ipq806x-fab-devfreq.c
+@@ -0,0 +1,155 @@
++// SPDX-License-Identifier: GPL-2.0
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/cpufreq.h>
++#include <linux/devfreq.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++#include <linux/slab.h>
++#include <linux/pm_opp.h>
++
++#include "governor.h"
++
++struct ipq806x_fab_data {
++      struct clk *fab_clk;
++      struct clk *ddr_clk;
++};
++
++static int ipq806x_fab_get_cur_freq(struct device *dev, unsigned long *freq)
++{
++      struct ipq806x_fab_data *data = dev_get_drvdata(dev);
++
++      *freq = clk_get_rate(data->fab_clk);
++
++      return 0;
++};
++
++static int ipq806x_fab_target(struct device *dev, unsigned long *freq,
++                            u32 flags)
++{
++      struct ipq806x_fab_data *data = dev_get_drvdata(dev);
++      struct dev_pm_opp *opp;
++      int ret;
++
++      opp = dev_pm_opp_find_freq_ceil(dev, freq);
++      if (unlikely(IS_ERR(opp)))
++              return PTR_ERR(opp);
++
++      dev_pm_opp_put(opp);
++
++      ret = clk_set_rate(data->fab_clk, *freq);
++      if (ret)
++              return ret;
++
++      return clk_set_rate(data->ddr_clk, *freq);
++};
++
++static int ipq806x_fab_get_dev_status(struct device *dev,
++                                    struct devfreq_dev_status *stat)
++{
++      struct ipq806x_fab_data *data = dev_get_drvdata(dev);
++
++      stat->busy_time = 0;
++      stat->total_time = 0;
++      stat->current_frequency = clk_get_rate(data->fab_clk);
++
++      return 0;
++};
++
++static struct devfreq_dev_profile ipq806x_fab_devfreq_profile = {
++      .target = ipq806x_fab_target,
++      .get_dev_status = ipq806x_fab_get_dev_status,
++      .get_cur_freq = ipq806x_fab_get_cur_freq
++};
++
++static struct devfreq_passive_data devfreq_gov_data = {
++      .parent_type = CPUFREQ_PARENT_DEV,
++};
++
++static int ipq806x_fab_probe(struct platform_device *pdev)
++{
++      struct device *dev = &pdev->dev;
++      struct ipq806x_fab_data *data;
++      struct devfreq *devfreq;
++      struct clk *clk;
++      int ret;
++
++      data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
++      if (!data)
++              return -ENOMEM;
++
++      clk = devm_clk_get(dev, "apps-fab-clk");
++      if (IS_ERR(clk)) {
++              dev_err_probe(dev, PTR_ERR(clk), "failed to get apps fab clk\n");
++              return PTR_ERR(clk);
++      }
++
++      clk_prepare_enable(clk);
++      data->fab_clk = clk;
++
++      clk = devm_clk_get(dev, "ddr-fab-clk");
++      if (IS_ERR(clk)) {
++              dev_err_probe(dev, PTR_ERR(clk), "failed to get ddr fab clk\n");
++              goto err_ddr;
++      }
++
++      clk_prepare_enable(clk);
++      data->ddr_clk = clk;
++
++      ret = dev_pm_opp_of_add_table(dev);
++      if (ret) {
++              dev_err(dev, "failed to parse fab freq thresholds\n");
++              return ret;
++      }
++
++      dev_set_drvdata(dev, data);
++
++      devfreq = devm_devfreq_add_device(&pdev->dev, &ipq806x_fab_devfreq_profile,
++                                        DEVFREQ_GOV_PASSIVE, &devfreq_gov_data);
++      if (IS_ERR(devfreq))
++              dev_pm_opp_remove_table(dev);
++
++      return PTR_ERR_OR_ZERO(devfreq);
++
++err_ddr:
++      clk_unprepare(data->fab_clk);
++      clk_put(data->fab_clk);
++      return PTR_ERR(clk);
++};
++
++static int ipq806x_fab_remove(struct platform_device *pdev)
++{
++      struct ipq806x_fab_data *data = dev_get_drvdata(&pdev->dev);
++
++      clk_unprepare(data->fab_clk);
++      clk_put(data->fab_clk);
++
++      clk_unprepare(data->ddr_clk);
++      clk_put(data->ddr_clk);
++
++      dev_pm_opp_remove_table(&pdev->dev);
++
++      return 0;
++};
++
++static const struct of_device_id ipq806x_fab_match_table[] = {
++      { .compatible = "qcom,fab-scaling" },
++      {}
++};
++
++static struct platform_driver ipq806x_fab_driver = {
++      .probe          = ipq806x_fab_probe,
++      .remove         = ipq806x_fab_remove,
++      .driver         = {
++              .name   = "ipq806x-fab-scaling",
++              .of_match_table = ipq806x_fab_match_table,
++      },
++};
++module_platform_driver(ipq806x_fab_driver);
++
++MODULE_DESCRIPTION("ipq806x Fab Scaling driver");
++MODULE_AUTHOR("Christian Marangi <[email protected]>");
++MODULE_LICENSE("GPL v2");

diff --git a/target/linux/ipq806x/patches-6.0/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch b/target/linux/ipq806x/patches-6.0/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch
new file mode 100644 (file)
index 0000000..f4de1db
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/115-02-ARM-dts-qcom-add-fab-scaling-node-for-ipq806x.patch
@@ -0,0 +1,48 @@
+From c3573f0907dadb0a6e9933aae2a46a489abcbd48 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 16 Jun 2022 20:03:05 +0200
+Subject: [PATCH 4/4] ARM: dts: qcom: add fab scaling node for ipq806x
+
+Add fabric scaling node for ipq806x to correctly scale apps and ddr
+fabric clk.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -170,6 +170,18 @@
+               };
+       };
+ 
++      opp_table_fab: opp_table_fab {
++              compatible = "operating-points-v2";
++
++              opp-533000000 {
++                      opp-hz = /bits/ 64 <533000000>;
++              };
++
++              opp-400000000 {
++                      opp-hz = /bits/ 64 <400000000>;
++              };
++      };
++
+       thermal-zones {
+               tsens_tz_sensor0 {
+                       polling-delay-passive = <0>;
+@@ -470,6 +482,13 @@
+                       operating-points-v2 = <&opp_table_l2>;
+               };
+ 
++              fab-scaling {
++                      compatible = "qcom,fab-scaling";
++                      clocks = <&rpmcc RPM_APPS_FABRIC_A_CLK>, <&rpmcc RPM_EBI1_A_CLK>;
++                      clock-names = "apps-fab-clk", "ddr-fab-clk";
++                      operating-points-v2 = <&opp_table_fab>;
++              };
++
+               lpass@28100000 {
+                       compatible = "qcom,lpass-cpu";
+                       status = "disabled";

diff --git a/target/linux/ipq806x/patches-6.0/118-03-clk-introduce-devm_-hw_register_mux_parent_data_tabl.patch b/target/linux/ipq806x/patches-6.0/118-03-clk-introduce-devm_-hw_register_mux_parent_data_tabl.patch
new file mode 100644 (file)
index 0000000..a0a9e5e
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/118-03-clk-introduce-devm_-hw_register_mux_parent_data_tabl.patch
@@ -0,0 +1,55 @@
+From 1fd0ad808a44d5443bb8cef3bd08f1a6a22ebe09 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Tue, 12 Apr 2022 16:48:39 +0200
+Subject: [PATCH v2 1/2] clk: introduce
+ (devm_)hw_register_mux_parent_data_table API
+
+Introduce (devm_)hw_register_mux_parent_data_table new API. We have
+basic support for clk_register_mux using parent_data but we lack any API
+to provide a custom parent_map. Add these 2 new API to correctly handle
+these special configuration instead of using the generic
+__(devm_)clk_hw_register_mux API.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+v2:
+- Rebase on top of linux-next/master
+
+ include/linux/clk-provider.h | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
+index 1615010aa0ec..65b70f0d62c5 100644
+--- a/include/linux/clk-provider.h
++++ b/include/linux/clk-provider.h
+@@ -974,6 +974,13 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
+       __clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, NULL, \
+                             (parent_data), (flags), (reg), (shift),         \
+                             BIT((width)) - 1, (clk_mux_flags), NULL, (lock))
++#define clk_hw_register_mux_parent_data_table(dev, name, parent_data,       \
++                                            num_parents, flags, reg, shift, \
++                                            width, clk_mux_flags, table,    \
++                                            lock)                           \
++      __clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, NULL, \
++                            (parent_data), (flags), (reg), (shift),         \
++                            BIT((width)) - 1, (clk_mux_flags), table, (lock))
+ #define devm_clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, \
+                           shift, width, clk_mux_flags, lock)                \
+       __devm_clk_hw_register_mux((dev), NULL, (name), (num_parents),        \
+@@ -987,6 +994,13 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
+                                  (parent_hws), NULL, (flags), (reg),        \
+                                  (shift), BIT((width)) - 1,                 \
+                                  (clk_mux_flags), NULL, (lock))
++#define devm_clk_hw_register_mux_parent_data_table(dev, name, parent_data,    \
++                                            num_parents, flags, reg, shift, \
++                                            width, clk_mux_flags, table,    \
++                                            lock)                           \
++      __devm_clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL,  \
++                            NULL, (parent_data), (flags), (reg), (shift),   \
++                            BIT((width)) - 1, (clk_mux_flags), table, (lock))
+ 
+ int clk_mux_val_to_index(struct clk_hw *hw, const u32 *table, unsigned int flags,
+                        unsigned int val);
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/118-04-clk-qcom-kpss-xcc-convert-to-parent-data-API.patch b/target/linux/ipq806x/patches-6.0/118-04-clk-qcom-kpss-xcc-convert-to-parent-data-API.patch
new file mode 100644 (file)
index 0000000..eec5b26
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/118-04-clk-qcom-kpss-xcc-convert-to-parent-data-API.patch
@@ -0,0 +1,78 @@
+From dbee59bb360f475bd8c21ad3513ad653392056ce Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 17 Feb 2022 22:43:34 +0100
+Subject: [PATCH v2 2/2] clk: qcom: kpss-xcc: convert to parent data API
+
+Convert the driver to parent data API. From the Documentation pll8_vote
+and pxo should be declared in the DTS so fw_name can be used instead of
+parent_names. .name is changed to the legacy pxo_board following how
+it's declared in other drivers.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+v2:
+- Change .name from pxo to pxo_board following other driver
+
+ drivers/clk/qcom/kpss-xcc.c | 26 +++++++++-----------------
+ 1 file changed, 9 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/clk/qcom/kpss-xcc.c b/drivers/clk/qcom/kpss-xcc.c
+index 88d4b33ac0cc..b1b370274ec4 100644
+--- a/drivers/clk/qcom/kpss-xcc.c
++++ b/drivers/clk/qcom/kpss-xcc.c
+@@ -12,9 +12,9 @@
+ #include <linux/clk.h>
+ #include <linux/clk-provider.h>
+ 
+-static const char *aux_parents[] = {
+-      "pll8_vote",
+-      "pxo",
++static const struct clk_parent_data aux_parents[] = {
++      { .fw_name = "pll8_vote", .name = "pll8_vote" },
++      { .fw_name = "pxo", .name = "pxo_board" },
+ };
+ 
+ static const u32 aux_parent_map[] = {
+@@ -32,8 +32,8 @@ MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
+ static int kpss_xcc_driver_probe(struct platform_device *pdev)
+ {
+       const struct of_device_id *id;
+-      struct clk *clk;
+       void __iomem *base;
++      struct clk_hw *hw;
+       const char *name;
+ 
+       id = of_match_device(kpss_xcc_match_table, &pdev->dev);
+@@ -55,24 +55,16 @@ static int kpss_xcc_driver_probe(struct platform_device *pdev)
+               base += 0x28;
+       }
+ 
+-      clk = clk_register_mux_table(&pdev->dev, name, aux_parents,
+-                                   ARRAY_SIZE(aux_parents), 0, base, 0, 0x3,
+-                                   0, aux_parent_map, NULL);
++      hw = devm_clk_hw_register_mux_parent_data_table(&pdev->dev, name, aux_parents,
++                                                      ARRAY_SIZE(aux_parents), 0,
++                                                      base, 0, 0x3,
++                                                      0, aux_parent_map, NULL);
+ 
+-      platform_set_drvdata(pdev, clk);
+-
+-      return PTR_ERR_OR_ZERO(clk);
+-}
+-
+-static int kpss_xcc_driver_remove(struct platform_device *pdev)
+-{
+-      clk_unregister_mux(platform_get_drvdata(pdev));
+-      return 0;
++      return PTR_ERR_OR_ZERO(hw);
+ }
+ 
+ static struct platform_driver kpss_xcc_driver = {
+       .probe = kpss_xcc_driver_probe,
+-      .remove = kpss_xcc_driver_remove,
+       .driver = {
+               .name = "kpss-xcc",
+               .of_match_table = kpss_xcc_match_table,
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/119-04-clk-qcom-gcc-ipq806x-remove-cc_register_board-for.patch b/target/linux/ipq806x/patches-6.0/119-04-clk-qcom-gcc-ipq806x-remove-cc_register_board-for.patch
new file mode 100644 (file)
index 0000000..20e7440
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/119-04-clk-qcom-gcc-ipq806x-remove-cc_register_board-for.patch
@@ -0,0 +1,31 @@
+From ac84ac819a2e8fd3d87122b452c502a386c54437 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Tue, 5 Jul 2022 18:30:18 +0200
+Subject: [PATCH v2 4/4] clk: qcom: gcc-ipq806x: remove cc_register_board for
+ pxo and cxo
+
+Now that these clock are defined as fixed clk in dts, we can drop the
+register_board_clk for cxo_board and pxo_board in gcc_ipq806x_probe.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/gcc-ipq806x.c | 8 --------
+ 1 file changed, 8 deletions(-)
+
+--- a/drivers/clk/qcom/gcc-ipq806x.c
++++ b/drivers/clk/qcom/gcc-ipq806x.c
+@@ -3384,14 +3384,6 @@ static int gcc_ipq806x_probe(struct plat
+       struct regmap *regmap;
+       int ret;
+ 
+-      ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000);
+-      if (ret)
+-              return ret;
+-
+-      ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000);
+-      if (ret)
+-              return ret;
+-
+       if (of_machine_is_compatible("qcom,ipq8065")) {
+               ubi32_core1_src_clk.freq_tbl = clk_tbl_nss_ipq8065;
+               ubi32_core2_src_clk.freq_tbl = clk_tbl_nss_ipq8065;

diff --git a/target/linux/ipq806x/patches-6.0/120-01-regulator-qcom_rpm-fix-wrong-freq-table-for-switch-m.patch b/target/linux/ipq806x/patches-6.0/120-01-regulator-qcom_rpm-fix-wrong-freq-table-for-switch-m.patch
new file mode 100644 (file)
index 0000000..b72db20
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/120-01-regulator-qcom_rpm-fix-wrong-freq-table-for-switch-m.patch
@@ -0,0 +1,98 @@
+From 3a2eda673a09fbe474c7a3bd26026927f5ea3dbf Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Sun, 7 Aug 2022 20:17:17 +0200
+Subject: [PATCH 1/2] regulator: qcom_rpm: fix wrong freq table for
+ switch-mode-frequency
+
+Fix wrong freq table used for qcom,switch-mode-frequency to parse the
+swich freq.
+
+We currently parse the index value on a wrong table that lacks of
+some values. This cause the wrong index to be set in the RPM request.
+
+smb208 regulator for example can run at max 500 or 1000 kHz and this
+freq is not present in the current table. Checking really old code
+permits to get the real table and set the correct value.
+
+Fixes: 2720386ec5d4 ("regulator: qcom-rpm: Regulator driver for the Qualcomm RPM")
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/regulator/qcom_rpm-regulator.c | 56 +++++++++++++++++++++-----
+ 1 file changed, 47 insertions(+), 9 deletions(-)
+
+--- a/drivers/regulator/qcom_rpm-regulator.c
++++ b/drivers/regulator/qcom_rpm-regulator.c
+@@ -640,16 +640,54 @@ static int rpm_reg_set(struct qcom_rpm_r
+       return 0;
+ }
+ 
++enum rpm_reg_freqs {
++      RPM_VREG_FREQ_NONE,
++      RPM_VREG_FREQ_0p50,
++      RPM_VREG_FREQ_1p00,
++      RPM_VREG_FREQ_19p20,
++      RPM_VREG_FREQ_9p60,
++      RPM_VREG_FREQ_6p40,
++      RPM_VREG_FREQ_4p80,
++      RPM_VREG_FREQ_3p84,
++      RPM_VREG_FREQ_3p20,
++      RPM_VREG_FREQ_2p74,
++      RPM_VREG_FREQ_2p40,
++      RPM_VREG_FREQ_2p13,
++      RPM_VREG_FREQ_1p92,
++      RPM_VREG_FREQ_1p75,
++      RPM_VREG_FREQ_1p60,
++      RPM_VREG_FREQ_1p48,
++      RPM_VREG_FREQ_1p37,
++      RPM_VREG_FREQ_1p28,
++      RPM_VREG_FREQ_1p20,
++};
++
++static const int rpm_reg_freq_tbl[] = {
++      [RPM_VREG_FREQ_NONE] = 0,
++      [RPM_VREG_FREQ_0p50] = 500000,
++      [RPM_VREG_FREQ_1p00] = 1000000,
++      [RPM_VREG_FREQ_19p20] = 19200000,
++      [RPM_VREG_FREQ_9p60] = 9600000,
++      [RPM_VREG_FREQ_6p40] = 6400000,
++      [RPM_VREG_FREQ_4p80] = 4800000,
++      [RPM_VREG_FREQ_3p84] = 3840000,
++      [RPM_VREG_FREQ_3p20] = 3200000,
++      [RPM_VREG_FREQ_2p74] = 2740000,
++      [RPM_VREG_FREQ_2p40] = 2400000,
++      [RPM_VREG_FREQ_2p13] = 2130000,
++      [RPM_VREG_FREQ_1p92] = 1920000,
++      [RPM_VREG_FREQ_1p75] = 1750000,
++      [RPM_VREG_FREQ_1p60] = 1600000,
++      [RPM_VREG_FREQ_1p48] = 1480000,
++      [RPM_VREG_FREQ_1p37] = 1370000,
++      [RPM_VREG_FREQ_1p28] = 1280000,
++      [RPM_VREG_FREQ_1p20] = 1200000,
++};
++
+ static int rpm_reg_of_parse_freq(struct device *dev,
+                                struct device_node *node,
+                                struct qcom_rpm_reg *vreg)
+ {
+-      static const int freq_table[] = {
+-              19200000, 9600000, 6400000, 4800000, 3840000, 3200000, 2740000,
+-              2400000, 2130000, 1920000, 1750000, 1600000, 1480000, 1370000,
+-              1280000, 1200000,
+-
+-      };
+       const char *key;
+       u32 freq;
+       int ret;
+@@ -662,9 +700,9 @@ static int rpm_reg_of_parse_freq(struct
+               return -EINVAL;
+       }
+ 
+-      for (i = 0; i < ARRAY_SIZE(freq_table); i++) {
+-              if (freq == freq_table[i]) {
+-                      rpm_reg_set(vreg, &vreg->parts->freq, i + 1);
++      for (i = 0; i < ARRAY_SIZE(rpm_reg_freq_tbl); i++) {
++              if (freq == rpm_reg_freq_tbl[i]) {
++                      rpm_reg_set(vreg, &vreg->parts->freq, i);
+                       return 0;
+               }
+       }

diff --git a/target/linux/ipq806x/patches-6.0/120-02-regulator-qcom_rpm-add-support-to-set-regulator-syst.patch b/target/linux/ipq806x/patches-6.0/120-02-regulator-qcom_rpm-add-support-to-set-regulator-syst.patch
new file mode 100644 (file)
index 0000000..79ecc69
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/120-02-regulator-qcom_rpm-add-support-to-set-regulator-syst.patch
@@ -0,0 +1,46 @@
+From 78e96cd2d710b041bab8073698d93d6aa41cccce Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Sun, 7 Aug 2022 21:42:16 +0200
+Subject: [PATCH 2/2] regulator: qcom_rpm: add support to set regulator system
+ load
+
+Add support to set regulator system load by setting the regulator
+peak mA regs. If the provided value exceed the reg mask, the max
+possible value is set instead of the DT value.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/regulator/qcom_rpm-regulator.c | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+--- a/drivers/regulator/qcom_rpm-regulator.c
++++ b/drivers/regulator/qcom_rpm-regulator.c
+@@ -803,6 +803,28 @@ static int rpm_reg_of_parse(struct devic
+               }
+       }
+ 
++      if (vreg->parts->ip.mask) {
++              u32 max_uA = (vreg->parts->ip.mask >> vreg->parts->ip.shift) * 1000;
++              key = "regulator-system-load";
++
++              ret = of_property_read_u32(node, key, &val);
++              if (ret == -EINVAL) {
++                      val = max_uA;
++              } else if (ret < 0) {
++                      dev_err(dev, "failed to read %s\n", key);
++                      return ret;
++              }
++
++              if (val > max_uA)
++                      val = max_uA;
++
++              ret = rpm_reg_set(vreg, &vreg->parts->ip, val / 1000);
++              if (ret) {
++                      dev_err(dev, "failed to set peak mA\n");
++                      return ret;
++              }
++      }
++
+       return 0;
+ }
+ 

diff --git a/target/linux/ipq806x/patches-6.0/121-01-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch b/target/linux/ipq806x/patches-6.0/121-01-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch
new file mode 100644 (file)
index 0000000..80c6d20
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/121-01-clk-qcom-kpss-xcc-register-it-as-clk-provider.patch
@@ -0,0 +1,63 @@
+From 09930efb4f4fb81019ca33bf64827ce258eca66f Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 15 Sep 2022 01:58:12 +0200
+Subject: [PATCH 1/9] clk: qcom: kpss-xcc: register it as clk provider
+
+krait-cc use this driver for the secondary mux. Register it as a clk
+provider to correctly use this clk in other drivers.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/kpss-xcc.c | 13 +++++++++----
+ 1 file changed, 9 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/clk/qcom/kpss-xcc.c b/drivers/clk/qcom/kpss-xcc.c
+index b1b370274ec4..97358c98c6c9 100644
+--- a/drivers/clk/qcom/kpss-xcc.c
++++ b/drivers/clk/qcom/kpss-xcc.c
+@@ -31,12 +31,13 @@ MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
+ 
+ static int kpss_xcc_driver_probe(struct platform_device *pdev)
+ {
++      struct device *dev = &pdev->dev;
+       const struct of_device_id *id;
+       void __iomem *base;
+       struct clk_hw *hw;
+       const char *name;
+ 
+-      id = of_match_device(kpss_xcc_match_table, &pdev->dev);
++      id = of_match_device(kpss_xcc_match_table, dev);
+       if (!id)
+               return -ENODEV;
+ 
+@@ -45,7 +46,7 @@ static int kpss_xcc_driver_probe(struct platform_device *pdev)
+               return PTR_ERR(base);
+ 
+       if (id->data) {
+-              if (of_property_read_string_index(pdev->dev.of_node,
++              if (of_property_read_string_index(dev->of_node,
+                                                 "clock-output-names",
+                                                 0, &name))
+                       return -ENODEV;
+@@ -55,12 +56,16 @@ static int kpss_xcc_driver_probe(struct platform_device *pdev)
+               base += 0x28;
+       }
+ 
+-      hw = devm_clk_hw_register_mux_parent_data_table(&pdev->dev, name, aux_parents,
++      hw = devm_clk_hw_register_mux_parent_data_table(dev, name, aux_parents,
+                                                       ARRAY_SIZE(aux_parents), 0,
+                                                       base, 0, 0x3,
+                                                       0, aux_parent_map, NULL);
++      if (IS_ERR(hw))
++              return PTR_ERR(hw);
+ 
+-      return PTR_ERR_OR_ZERO(hw);
++      of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, hw);
++
++      return 0;
+ }
+ 
+ static struct platform_driver kpss_xcc_driver = {
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/121-02-clk-qcom-krait-cc-convert-to-parent_data-API.patch b/target/linux/ipq806x/patches-6.0/121-02-clk-qcom-krait-cc-convert-to-parent_data-API.patch
new file mode 100644 (file)
index 0000000..26f8333
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/121-02-clk-qcom-krait-cc-convert-to-parent_data-API.patch
@@ -0,0 +1,269 @@
+From 334c1540d5753a3c83a4cb84d935d606cb47a03b Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 17 Feb 2022 23:02:59 +0100
+Subject: [PATCH 2/9] clk: qcom: krait-cc: convert to parent_data API
+
+Modernize the krait-cc driver to parent-data API and refactor to drop
+any use of clk_names. From Documentation all the required clocks should
+be declared in DTS so fw_name can be correctly used to get the parents
+for all the muxes. .name is also declared to save compatibility with old
+implementation.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/krait-cc.c | 126 +++++++++++++++++++-----------------
+ 1 file changed, 66 insertions(+), 60 deletions(-)
+
+diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
+index cfd961d5cc45..84f0048961f5 100644
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -69,21 +69,22 @@ static int krait_notifier_register(struct device *dev, struct clk *clk,
+       return ret;
+ }
+ 
+-static int
++static struct clk *
+ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
+ {
+       struct krait_div2_clk *div;
++      static struct clk_parent_data p_data[1];
+       struct clk_init_data init = {
+-              .num_parents = 1,
++              .num_parents = ARRAY_SIZE(p_data),
+               .ops = &krait_div2_clk_ops,
+               .flags = CLK_SET_RATE_PARENT,
+       };
+-      const char *p_names[1];
+       struct clk *clk;
++      char *parent_name;
+ 
+       div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
+       if (!div)
+-              return -ENOMEM;
++              return ERR_PTR(-ENOMEM);
+ 
+       div->width = 2;
+       div->shift = 6;
+@@ -93,43 +94,49 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset)
+ 
+       init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
+       if (!init.name)
+-              return -ENOMEM;
++              return ERR_PTR(-ENOMEM);
+ 
+-      init.parent_names = p_names;
+-      p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
+-      if (!p_names[0]) {
+-              kfree(init.name);
+-              return -ENOMEM;
++      init.parent_data = p_data;
++      parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
++      if (!parent_name) {
++              clk = ERR_PTR(-ENOMEM);
++              goto err_parent_name;
+       }
+ 
++      p_data[0].fw_name = parent_name;
++      p_data[0].name = parent_name;
++
+       clk = devm_clk_register(dev, &div->hw);
+-      kfree(p_names[0]);
++
++      kfree(parent_name);
++err_parent_name:
+       kfree(init.name);
+ 
+-      return PTR_ERR_OR_ZERO(clk);
++      return clk;
+ }
+ 
+-static int
++static struct clk *
+ krait_add_sec_mux(struct device *dev, int id, const char *s,
+                 unsigned int offset, bool unique_aux)
+ {
+       int ret;
+       struct krait_mux_clk *mux;
+-      static const char *sec_mux_list[] = {
+-              "acpu_aux",
+-              "qsb",
++      static struct clk_parent_data sec_mux_list[2] = {
++              { .name = "qsb", .fw_name = "qsb" },
++              {},
+       };
+       struct clk_init_data init = {
+-              .parent_names = sec_mux_list,
++              .parent_data = sec_mux_list,
+               .num_parents = ARRAY_SIZE(sec_mux_list),
+               .ops = &krait_mux_clk_ops,
+               .flags = CLK_SET_RATE_PARENT,
+       };
+       struct clk *clk;
++      char *parent_name;
+ 
+       mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+       if (!mux)
+-              return -ENOMEM;
++              return ERR_PTR(-ENOMEM);
+ 
+       mux->offset = offset;
+       mux->lpl = id >= 0;
+@@ -149,44 +156,51 @@ krait_add_sec_mux(struct device *dev, int id, const char *s,
+ 
+       init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
+       if (!init.name)
+-              return -ENOMEM;
++              return ERR_PTR(-ENOMEM);
+ 
+       if (unique_aux) {
+-              sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
+-              if (!sec_mux_list[0]) {
++              parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s);
++              if (!parent_name) {
+                       clk = ERR_PTR(-ENOMEM);
+                       goto err_aux;
+               }
++              sec_mux_list[1].fw_name = parent_name;
++              sec_mux_list[1].name = parent_name;
++      } else {
++              sec_mux_list[1].name = "apu_aux";
+       }
+ 
+       clk = devm_clk_register(dev, &mux->hw);
++      if (IS_ERR(clk))
++              goto err_clk;
+ 
+       ret = krait_notifier_register(dev, clk, mux);
+       if (ret)
+-              goto unique_aux;
++              clk = ERR_PTR(ret);
+ 
+-unique_aux:
++err_clk:
+       if (unique_aux)
+-              kfree(sec_mux_list[0]);
++              kfree(parent_name);
+ err_aux:
+       kfree(init.name);
+-      return PTR_ERR_OR_ZERO(clk);
++      return clk;
+ }
+ 
+ static struct clk *
+-krait_add_pri_mux(struct device *dev, int id, const char *s,
+-                unsigned int offset)
++krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux,
++                int id, const char *s, unsigned int offset)
+ {
+       int ret;
+       struct krait_mux_clk *mux;
+-      const char *p_names[3];
++      static struct clk_parent_data p_data[3];
+       struct clk_init_data init = {
+-              .parent_names = p_names,
+-              .num_parents = ARRAY_SIZE(p_names),
++              .parent_data = p_data,
++              .num_parents = ARRAY_SIZE(p_data),
+               .ops = &krait_mux_clk_ops,
+               .flags = CLK_SET_RATE_PARENT,
+       };
+       struct clk *clk;
++      char *hfpll_name;
+ 
+       mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
+       if (!mux)
+@@ -204,36 +218,29 @@ krait_add_pri_mux(struct device *dev, int id, const char *s,
+       if (!init.name)
+               return ERR_PTR(-ENOMEM);
+ 
+-      p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s);
+-      if (!p_names[0]) {
++      hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s);
++      if (!hfpll_name) {
+               clk = ERR_PTR(-ENOMEM);
+-              goto err_p0;
++              goto err_hfpll;
+       }
+ 
+-      p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s);
+-      if (!p_names[1]) {
+-              clk = ERR_PTR(-ENOMEM);
+-              goto err_p1;
+-      }
++      p_data[0].fw_name = hfpll_name;
++      p_data[0].name = hfpll_name;
+ 
+-      p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
+-      if (!p_names[2]) {
+-              clk = ERR_PTR(-ENOMEM);
+-              goto err_p2;
+-      }
++      p_data[1].hw = __clk_get_hw(hfpll_div);
++      p_data[2].hw = __clk_get_hw(sec_mux);
+ 
+       clk = devm_clk_register(dev, &mux->hw);
++      if (IS_ERR(clk))
++              goto err_clk;
+ 
+       ret = krait_notifier_register(dev, clk, mux);
+       if (ret)
+-              goto err_p3;
+-err_p3:
+-      kfree(p_names[2]);
+-err_p2:
+-      kfree(p_names[1]);
+-err_p1:
+-      kfree(p_names[0]);
+-err_p0:
++              clk = ERR_PTR(ret);
++
++err_clk:
++      kfree(hfpll_name);
++err_hfpll:
+       kfree(init.name);
+       return clk;
+ }
+@@ -241,11 +248,10 @@ krait_add_pri_mux(struct device *dev, int id, const char *s,
+ /* id < 0 for L2, otherwise id == physical CPU number */
+ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux)
+ {
+-      int ret;
+       unsigned int offset;
+       void *p = NULL;
+       const char *s;
+-      struct clk *clk;
++      struct clk *hfpll_div, *sec_mux, *clk;
+ 
+       if (id >= 0) {
+               offset = 0x4501 + (0x1000 * id);
+@@ -257,19 +263,19 @@ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux)
+               s = "_l2";
+       }
+ 
+-      ret = krait_add_div(dev, id, s, offset);
+-      if (ret) {
+-              clk = ERR_PTR(ret);
++      hfpll_div = krait_add_div(dev, id, s, offset);
++      if (IS_ERR(hfpll_div)) {
++              clk = hfpll_div;
+               goto err;
+       }
+ 
+-      ret = krait_add_sec_mux(dev, id, s, offset, unique_aux);
+-      if (ret) {
+-              clk = ERR_PTR(ret);
++      sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux);
++      if (IS_ERR(sec_mux)) {
++              clk = sec_mux;
+               goto err;
+       }
+ 
+-      clk = krait_add_pri_mux(dev, id, s, offset);
++      clk = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset);
+ err:
+       kfree(p);
+       return clk;
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/121-03-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch b/target/linux/ipq806x/patches-6.0/121-03-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch
new file mode 100644 (file)
index 0000000..a8bf748
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/121-03-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch
@@ -0,0 +1,52 @@
+From 666c1b745e93ccddde841d5057c33f97b29a316a Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 15 Sep 2022 02:19:28 +0200
+Subject: [PATCH 3/9] clk: qcom: krait-cc: handle qsb clock defined in DTS
+
+qsb fixed clk may be defined in DTS and correctly passed in the clocks
+list. Add related code to handle this and modify the logic to
+dynamically read qsb clock frequency.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/krait-cc.c | 14 +++++++++++---
+ 1 file changed, 11 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
+index 84f0048961f5..f1d64b16cac3 100644
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -305,7 +305,7 @@ static int krait_cc_probe(struct platform_device *pdev)
+ {
+       struct device *dev = &pdev->dev;
+       const struct of_device_id *id;
+-      unsigned long cur_rate, aux_rate;
++      unsigned long cur_rate, aux_rate, qsb_rate;
+       int cpu;
+       struct clk *clk;
+       struct clk **clks;
+@@ -315,11 +315,19 @@ static int krait_cc_probe(struct platform_device *pdev)
+       if (!id)
+               return -ENODEV;
+ 
+-      /* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */
+-      clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);
++      /*
++       * Per Documentation qsb should be provided from DTS.
++       * To address old implementation, register the fixed clock anyway.
++       * Rate is 1 because 0 causes problems for __clk_mux_determine_rate
++       */
++      clk = clk_get(dev, "qsb");
++      if (IS_ERR(clk))
++              clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);
+       if (IS_ERR(clk))
+               return PTR_ERR(clk);
+ 
++      qsb_rate = clk_get_rate(clk);
++
+       if (!id->data) {
+               clk = clk_register_fixed_factor(dev, "acpu_aux",
+                                               "gpll0_vote", 0, 1, 2);
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/121-04-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch b/target/linux/ipq806x/patches-6.0/121-04-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch
new file mode 100644 (file)
index 0000000..cf0c7e5
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/121-04-clk-qcom-krait-cc-register-REAL-qsb-fixed-clock.patch
@@ -0,0 +1,59 @@
+From fca6f185a9d9ef0892a719bc6da955b22d326ec7 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 15 Sep 2022 02:24:33 +0200
+Subject: [PATCH 4/9] clk: qcom: krait-cc: register REAL qsb fixed clock
+
+With some tools it was discovered the real frequency of the qsb fixed
+clock. While not 100% correct it's still better than using 1 as a dummy
+frequency.
+Correctly register the qsb fixed clock with the frequency of 225 MHz
+instead of 1.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/krait-cc.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
+index f1d64b16cac3..e91275663973 100644
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -15,6 +15,8 @@
+ 
+ #include "clk-krait.h"
+ 
++#define QSB_RATE      2250000000
++
+ static unsigned int sec_mux_map[] = {
+       2,
+       0,
+@@ -322,7 +324,7 @@ static int krait_cc_probe(struct platform_device *pdev)
+        */
+       clk = clk_get(dev, "qsb");
+       if (IS_ERR(clk))
+-              clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);
++              clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, QSB_RATE);
+       if (IS_ERR(clk))
+               return PTR_ERR(clk);
+ 
+@@ -378,7 +380,7 @@ static int krait_cc_probe(struct platform_device *pdev)
+        */
+       cur_rate = clk_get_rate(l2_pri_mux_clk);
+       aux_rate = 384000000;
+-      if (cur_rate == 1) {
++      if (cur_rate == qsb_rate) {
+               pr_info("L2 @ QSB rate. Forcing new rate.\n");
+               cur_rate = aux_rate;
+       }
+@@ -389,7 +391,7 @@ static int krait_cc_probe(struct platform_device *pdev)
+       for_each_possible_cpu(cpu) {
+               clk = clks[cpu];
+               cur_rate = clk_get_rate(clk);
+-              if (cur_rate == 1) {
++              if (cur_rate == qsb_rate) {
+                       pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu);
+                       cur_rate = aux_rate;
+               }
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/121-05-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch b/target/linux/ipq806x/patches-6.0/121-05-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch
new file mode 100644 (file)
index 0000000..a624443
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/121-05-clk-qcom-krait-cc-use-devm-variant-for-clk-notifier-.patch
@@ -0,0 +1,30 @@
+From ff65b60fa89be06ba68e3e22702dd71700afb6a5 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 15 Sep 2022 02:34:58 +0200
+Subject: [PATCH 5/9] clk: qcom: krait-cc: use devm variant for clk notifier
+ register
+
+Use devm variant for clk notifier register and correctly handle free
+resource on driver remove.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/krait-cc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
+index e91275663973..33a78b7de0bd 100644
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -64,7 +64,7 @@ static int krait_notifier_register(struct device *dev, struct clk *clk,
+       int ret = 0;
+ 
+       mux->clk_nb.notifier_call = krait_notifier_cb;
+-      ret = clk_notifier_register(clk, &mux->clk_nb);
++      ret = devm_clk_notifier_register(dev, clk, &mux->clk_nb);
+       if (ret)
+               dev_err(dev, "failed to register clock notifier: %d\n", ret);
+ 
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/121-06-clk-qcom-krait-cc-fix-never-enabled-secondary-mux.patch b/target/linux/ipq806x/patches-6.0/121-06-clk-qcom-krait-cc-fix-never-enabled-secondary-mux.patch
new file mode 100644 (file)
index 0000000..bac7db9
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/121-06-clk-qcom-krait-cc-fix-never-enabled-secondary-mux.patch
@@ -0,0 +1,52 @@
+From a0f6d7abe7f5da1a9b435eed89acace7cde4add6 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 15 Sep 2022 02:39:11 +0200
+Subject: [PATCH 6/9] clk: qcom: krait-cc: fix never enabled secondary mux
+
+While never actually used as a pure mux, the secondary mux is used as a
+safe selection for the primary mux to switch while the hfpll are
+reprogrammed.
+The secondary muxes were never enabled and this cause the krait-clk
+drivers to silently ignore any set parent request without any error.
+Enable the secondary mux to actually apply the parent and apply the
+requested frequency.
+
+Fixes: bb5c4a85051e ("clk: qcom: Add Krait clock controller driver")
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/krait-cc.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
+index 33a78b7de0bd..b71067a49ee7 100644
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -121,7 +121,7 @@ static struct clk *
+ krait_add_sec_mux(struct device *dev, int id, const char *s,
+                 unsigned int offset, bool unique_aux)
+ {
+-      int ret;
++      int ret, cpu;
+       struct krait_mux_clk *mux;
+       static struct clk_parent_data sec_mux_list[2] = {
+               { .name = "qsb", .fw_name = "qsb" },
+@@ -180,6 +180,16 @@ krait_add_sec_mux(struct device *dev, int id, const char *s,
+       if (ret)
+               clk = ERR_PTR(ret);
+ 
++      /* The secondary mux MUST be enabled or clk-krait silently
++       * ignore any request.
++       * Increase refcount for every CPU if it's the L2 secondary mux.
++       */
++      if (id < 0)
++              for_each_possible_cpu(cpu)
++                      clk_prepare_enable(clk);
++      else
++              clk_prepare_enable(clk);
++
+ err_clk:
+       if (unique_aux)
+               kfree(parent_name);
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/121-07-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch b/target/linux/ipq806x/patches-6.0/121-07-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch
new file mode 100644 (file)
index 0000000..cd2b2d7
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/121-07-clk-qcom-krait-cc-drop-pr_info-and-use-dev_info.patch
@@ -0,0 +1,49 @@
+From 2399d181557d94ae9a2686926cd25768f132e4b4 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Fri, 18 Mar 2022 16:12:14 +0100
+Subject: [PATCH 7/9] clk: qcom: krait-cc: drop pr_info and use dev_info
+
+Replace pr_info() with dev_info() to provide better diagnostics.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/krait-cc.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
+index b71067a49ee7..e4fb3ff2b5b5 100644
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -391,25 +391,25 @@ static int krait_cc_probe(struct platform_device *pdev)
+       cur_rate = clk_get_rate(l2_pri_mux_clk);
+       aux_rate = 384000000;
+       if (cur_rate == qsb_rate) {
+-              pr_info("L2 @ QSB rate. Forcing new rate.\n");
++              dev_info(dev, "L2 @ QSB rate. Forcing new rate.\n");
+               cur_rate = aux_rate;
+       }
+       clk_set_rate(l2_pri_mux_clk, aux_rate);
+       clk_set_rate(l2_pri_mux_clk, 2);
+       clk_set_rate(l2_pri_mux_clk, cur_rate);
+-      pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
++      dev_info(dev, "L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
+       for_each_possible_cpu(cpu) {
+               clk = clks[cpu];
+               cur_rate = clk_get_rate(clk);
+               if (cur_rate == qsb_rate) {
+-                      pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu);
++                      dev_info(dev, "CPU%d @ QSB rate. Forcing new rate.\n", cpu);
+                       cur_rate = aux_rate;
+               }
+ 
+               clk_set_rate(clk, aux_rate);
+               clk_set_rate(clk, 2);
+               clk_set_rate(clk, cur_rate);
+-              pr_info("CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000);
++              dev_info(dev, "CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000);
+       }
+ 
+       of_clk_add_provider(dev->of_node, krait_of_get, clks);
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/121-08-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch b/target/linux/ipq806x/patches-6.0/121-08-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch
new file mode 100644 (file)
index 0000000..9e7081b
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/121-08-clk-qcom-krait-cc-handle-secondary-mux-sourcing-out-.patch
@@ -0,0 +1,75 @@
+From b6655ca513b3f1b40417287ab7f706409455fe48 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 15 Sep 2022 02:56:47 +0200
+Subject: [PATCH 8/9] clk: qcom: krait-cc: handle secondary mux sourcing out of
+ PXO
+
+The secondary mux can sourc out of PXO as the secondary MUX is attached
+to QSB and to another mux that can source out of PXO or PLL8_VOTE.
+
+Many device may run with uncorrect configuration with the mux sourcing
+out of PXO instead of PLL8_VOTE.
+
+To handle this case we add also PXO as required clocks and we check if
+the frequency is currently set to PXO and force a correct rate if it's
+the case.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/krait-cc.c | 19 ++++++++++++++++++-
+ 1 file changed, 18 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
+index e4fb3ff2b5b5..717eff44b6a4 100644
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -317,7 +317,7 @@ static int krait_cc_probe(struct platform_device *pdev)
+ {
+       struct device *dev = &pdev->dev;
+       const struct of_device_id *id;
+-      unsigned long cur_rate, aux_rate, qsb_rate;
++      unsigned long cur_rate, aux_rate, qsb_rate, pxo_rate;
+       int cpu;
+       struct clk *clk;
+       struct clk **clks;
+@@ -327,6 +327,15 @@ static int krait_cc_probe(struct platform_device *pdev)
+       if (!id)
+               return -ENODEV;
+ 
++      clk = clk_get(dev, "pxo");
++      if (IS_ERR(clk))
++              clk = __clk_lookup("pxo_board");
++
++      if (IS_ERR_OR_NULL(clk))
++              return clk == NULL ? -ENODEV : PTR_ERR(clk);
++
++      pxo_rate = clk_get_rate(clk);
++
+       /*
+        * Per Documentation qsb should be provided from DTS.
+        * To address old implementation, register the fixed clock anyway.
+@@ -394,6 +403,10 @@ static int krait_cc_probe(struct platform_device *pdev)
+               dev_info(dev, "L2 @ QSB rate. Forcing new rate.\n");
+               cur_rate = aux_rate;
+       }
++      if (cur_rate == pxo_rate) {
++              dev_info(dev, "L2 @ PXO rate. Forcing new rate.\n");
++              cur_rate = aux_rate;
++      }
+       clk_set_rate(l2_pri_mux_clk, aux_rate);
+       clk_set_rate(l2_pri_mux_clk, 2);
+       clk_set_rate(l2_pri_mux_clk, cur_rate);
+@@ -405,6 +418,10 @@ static int krait_cc_probe(struct platform_device *pdev)
+                       dev_info(dev, "CPU%d @ QSB rate. Forcing new rate.\n", cpu);
+                       cur_rate = aux_rate;
+               }
++              if (cur_rate ==pxo_rate) {
++                      dev_info(dev, "CPU%d @ PXO rate. Forcing new rate.\n", cpu);
++                      cur_rate = aux_rate;
++              }
+ 
+               clk_set_rate(clk, aux_rate);
+               clk_set_rate(clk, 2);
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/121-09-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch b/target/linux/ipq806x/patches-6.0/121-09-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch
new file mode 100644 (file)
index 0000000..fb5cb14
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/121-09-clk-qcom-krait-cc-rework-mux-reset-logic-and-reset-h.patch
@@ -0,0 +1,102 @@
+From 6a77cf3f5f95ec0058e1b4d1ada018748cb0b83b Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 15 Sep 2022 03:33:13 +0200
+Subject: [PATCH 9/9] clk: qcom: krait-cc: rework mux reset logic and reset
+ hfpll
+
+Rework and clean mux reset logic.
+Compact it to a for loop to handle both CPU and L2 in one place.
+Move hardcoded aux_rate to define and add a new hfpll_rate value to
+reset hfpll settings.
+Change logic to now reset the hfpll to the lowest value of 600 Mhz and
+then restoring the previous frequency. This permits to reset the hfpll if
+the primary mux was set to source out of the secondary mux.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/qcom/krait-cc.c | 50 +++++++++++++++++--------------------
+ 1 file changed, 23 insertions(+), 27 deletions(-)
+
+diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
+index 717eff44b6a4..90dee71e7c38 100644
+--- a/drivers/clk/qcom/krait-cc.c
++++ b/drivers/clk/qcom/krait-cc.c
+@@ -15,7 +15,9 @@
+ 
+ #include "clk-krait.h"
+ 
+-#define QSB_RATE      2250000000
++#define QSB_RATE      225000000
++#define AUX_RATE      384000000
++#define HFPLL_RATE    600000000
+ 
+ static unsigned int sec_mux_map[] = {
+       2,
+@@ -317,7 +319,7 @@ static int krait_cc_probe(struct platform_device *pdev)
+ {
+       struct device *dev = &pdev->dev;
+       const struct of_device_id *id;
+-      unsigned long cur_rate, aux_rate, qsb_rate, pxo_rate;
++      unsigned long cur_rate, qsb_rate, pxo_rate;
+       int cpu;
+       struct clk *clk;
+       struct clk **clks;
+@@ -397,36 +399,30 @@ static int krait_cc_probe(struct platform_device *pdev)
+        * two different rates to force a HFPLL reinit under all
+        * circumstances.
+        */
+-      cur_rate = clk_get_rate(l2_pri_mux_clk);
+-      aux_rate = 384000000;
+-      if (cur_rate == qsb_rate) {
+-              dev_info(dev, "L2 @ QSB rate. Forcing new rate.\n");
+-              cur_rate = aux_rate;
+-      }
+-      if (cur_rate == pxo_rate) {
+-              dev_info(dev, "L2 @ PXO rate. Forcing new rate.\n");
+-              cur_rate = aux_rate;
+-      }
+-      clk_set_rate(l2_pri_mux_clk, aux_rate);
+-      clk_set_rate(l2_pri_mux_clk, 2);
+-      clk_set_rate(l2_pri_mux_clk, cur_rate);
+-      dev_info(dev, "L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000);
+-      for_each_possible_cpu(cpu) {
++      for (cpu = 0; cpu < 5; cpu++) {
++              const char *l2_s = "L2";
++              char cpu_s[5];
++
+               clk = clks[cpu];
++              if (!clk)
++                      continue;
++
++              if (cpu < 4)
++                      snprintf(cpu_s, 5, "CPU%d", cpu);
++
+               cur_rate = clk_get_rate(clk);
+-              if (cur_rate == qsb_rate) {
+-                      dev_info(dev, "CPU%d @ QSB rate. Forcing new rate.\n", cpu);
+-                      cur_rate = aux_rate;
+-              }
+-              if (cur_rate ==pxo_rate) {
+-                      dev_info(dev, "CPU%d @ PXO rate. Forcing new rate.\n", cpu);
+-                      cur_rate = aux_rate;
++              if (cur_rate == qsb_rate || cur_rate == pxo_rate) {
++                      dev_info(dev, "%s @ %s rate. Forcing new rate.\n",
++                               cpu < 4 ? cpu_s : l2_s,
++                               cur_rate == qsb_rate ? "QSB" : "PXO");
++                      cur_rate = AUX_RATE;
+               }
+ 
+-              clk_set_rate(clk, aux_rate);
+-              clk_set_rate(clk, 2);
++              clk_set_rate(clk, AUX_RATE);
++              clk_set_rate(clk, HFPLL_RATE);
+               clk_set_rate(clk, cur_rate);
+-              dev_info(dev, "CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000);
++              dev_info(dev, "%s @ %lu KHz\n", cpu < 4 ? cpu_s : l2_s,
++                       clk_get_rate(clk) / 1000);
+       }
+ 
+       of_clk_add_provider(dev->of_node, krait_of_get, clks);
+-- 
+2.37.2
+

diff --git a/target/linux/ipq806x/patches-6.0/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq806x/patches-6.0/850-soc-add-qualcomm-syscon.patch
new file mode 100644 (file)
index 0000000..ec9027a
--- /dev/null
+++ b/target/linux/ipq806x/patches-6.0/850-soc-add-qualcomm-syscon.patch
@@ -0,0 +1,121 @@
+From: Christian Lamparter <[email protected]>
+Subject: SoC: add qualcomm syscon
+--- a/drivers/soc/qcom/Makefile
++++ b/drivers/soc/qcom/Makefile
+@@ -21,6 +21,7 @@ obj-$(CONFIG_QCOM_SMP2P)     += smp2p.o
+ obj-$(CONFIG_QCOM_SMSM)       += smsm.o
+ obj-$(CONFIG_QCOM_SOCINFO)    += socinfo.o
+ obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
++obj-$(CONFIG_QCOM_TCSR)        += qcom_tcsr.o
+ obj-$(CONFIG_QCOM_APR) += apr.o
+ obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
+ obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
+--- a/drivers/soc/qcom/Kconfig
++++ b/drivers/soc/qcom/Kconfig
+@@ -190,6 +190,13 @@ config QCOM_SOCINFO
+        Say yes here to support the Qualcomm socinfo driver, providing
+        information about the SoC to user space.
+ 
++config QCOM_TCSR
++      tristate "QCOM Top Control and Status Registers"
++      depends on ARCH_QCOM
++      help
++        Say y here to enable TCSR support.  The TCSR provides control
++        functions for various peripherals.
++
+ config QCOM_WCNSS_CTRL
+       tristate "Qualcomm WCNSS control driver"
+       depends on ARCH_QCOM || COMPILE_TEST
+--- /dev/null
++++ b/drivers/soc/qcom/qcom_tcsr.c
+@@ -0,0 +1,64 @@
++/*
++ * Copyright (c) 2014, The Linux foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License rev 2 and
++ * only rev 2 as published by the free Software foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/of_platform.h>
++#include <linux/platform_device.h>
++
++#define TCSR_USB_PORT_SEL     0xb0
++
++static int tcsr_probe(struct platform_device *pdev)
++{
++      struct resource *res;
++      const struct device_node *node = pdev->dev.of_node;
++      void __iomem *base;
++      u32 val;
++
++      res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++      base = devm_ioremap_resource(&pdev->dev, res);
++      if (IS_ERR(base))
++              return PTR_ERR(base);
++
++      if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) {
++              dev_err(&pdev->dev, "setting usb port select = %d\n", val);
++              writel(val, base + TCSR_USB_PORT_SEL);
++      }
++
++      return 0;
++}
++
++static const struct of_device_id tcsr_dt_match[] = {
++      { .compatible = "qcom,tcsr", },
++      { },
++};
++
++MODULE_DEVICE_TABLE(of, tcsr_dt_match);
++
++static struct platform_driver tcsr_driver = {
++      .driver = {
++              .name           = "tcsr",
++              .owner          = THIS_MODULE,
++              .of_match_table = tcsr_dt_match,
++      },
++      .probe = tcsr_probe,
++};
++
++module_platform_driver(tcsr_driver);
++
++MODULE_AUTHOR("Andy Gross <[email protected]>");
++MODULE_DESCRIPTION("QCOM TCSR driver");
++MODULE_LICENSE("GPL v2");
+--- /dev/null
++++ b/include/dt-bindings/soc/qcom,tcsr.h
+@@ -0,0 +1,23 @@
++/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++#ifndef __DT_BINDINGS_QCOM_TCSR_H
++#define __DT_BINDINGS_QCOM_TCSR_H
++
++#define TCSR_USB_SELECT_USB3_P0               0x1
++#define TCSR_USB_SELECT_USB3_P1               0x2
++#define TCSR_USB_SELECT_USB3_DUAL     0x3
++
++/* TCSR A/B REG */
++#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL     0
++#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL     1
++
++#endif