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(parent: c27e917) | patch
drm/i915/icl: compute the combo PHY (DPLL) HDMI registers
authorPaulo Zanoni <[email protected]>
Wed, 28 Mar 2018 21:57:59 +0000 (14:57 -0700)
committerPaulo Zanoni <[email protected]>
Mon, 7 May 2018 23:44:08 +0000 (16:44 -0700)
commitfebafb93181e4fb4de19f4484df62ce2d04155aa
tree322fc1f1b3dca941ed7f7137664905981eaeee51tree | snapshot
parentc27e917e2bda748777b7927d7cb7c911bc2027c8commit | diff
drm/i915/icl: compute the combo PHY (DPLL) HDMI registers

HDMI mode DPLL programming on ICL is the same as CNL, so just reuse
the CNL code.

v2:
 - Properly detect HDMI crtcs.
 - Rebase after changes to the cnl function (clock * 1000).
v3:
 - Add a comment to clarify why we treat 38.4 as 19.2 (James).

Reviewed-by: James Ausmus <[email protected]>
Signed-off-by: Paulo Zanoni <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
drivers/gpu/drm/i915/intel_dpll_mgr.c diff | blob | history
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