arm64: pmuv3: handle pmuv3+
authorMark Rutland <[email protected]>
Tue, 25 Apr 2017 11:08:50 +0000 (12:08 +0100)
committerCatalin Marinas <[email protected]>
Tue, 25 Apr 2017 14:12:59 +0000 (15:12 +0100)
commitfaa9a08397f5034efad75b06879ac0ead83bd714
treecc6cfee64e98d9cd067e310334e279bb34067c68
parent9842119a238bfb92cbab63258dabb54f0e7b111b
arm64: pmuv3: handle pmuv3+

Commit f1b36dcb5c316c27 ("arm64: pmuv3: handle !PMUv3 when probing") is
a little too restrictive, and prevents the use of of backwards
compatible PMUv3 extenstions, which have a PMUver value other than 1.

For instance, ARMv8.1 PMU extensions (as implemented by ThunderX2) are
reported with PMUver value 4.

Per the usual ID register principles, at least 0x1-0x7 imply a
PMUv3-compatible PMU. It's not currently clear whether 0x8-0xe imply the
same.

For the time being, treat the value as signed, and with 0x1-0x7 treated
as meaning PMUv3 is implemented. This may be relaxed by future patches.

Reported-by: Jayachandran C <[email protected]>
Tested-by: Jayachandran C <[email protected]>
Acked-by: Will Deacon <[email protected]>
Signed-off-by: Mark Rutland <[email protected]>
Signed-off-by: Catalin Marinas <[email protected]>
arch/arm64/kernel/perf_event.c