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SPEAr: Correct SoC ID offset in misc configuration space
authorShiraz Hashim <[email protected]>
Mon, 7 May 2012 07:37:00 +0000 (13:07 +0530)
committerAlbert ARIBAUD <[email protected]>
Sat, 7 Jul 2012 12:07:42 +0000 (14:07 +0200)
commitf28e5c946d6c88b1c8639896863c7ad7d8889bf4
tree532ae86ae7cf78b9b60e73444e296c57b21ee59ctree | snapshot
parent7c885a0e5532abcd6bc802d21a7858420e5c127bcommit | diff
SPEAr: Correct SoC ID offset in misc configuration space

SoC Core ID offset is 0x30 in miscellaneous configuration address
space. It was wrongly mentioned as periph2 clk enable.

Signed-off-by: Shiraz Hashim <[email protected]>
Signed-off-by: Amit Virdi <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
arch/arm/include/asm/arch-spear/spr_misc.h diff | blob | history
Broadcom-s U-Boot