EDAC/sb_edac: Fix computation of channel address
authorLuck, Tony <[email protected]>
Thu, 10 Mar 2016 00:40:48 +0000 (16:40 -0800)
committerIngo Molnar <[email protected]>
Thu, 10 Mar 2016 17:31:55 +0000 (18:31 +0100)
commiteb1af3b71f9d83e45f2fd2fd649356e98e1c582c
tree8ec477e17a6ca49a91aa1a9379a255ed0e6c0c9b
parent92b0729c34cab1f46d89aace3e66015f0bb4a682
EDAC/sb_edac: Fix computation of channel address

Large memory Haswell-EX systems with multiple DIMMs per channel were
sometimes reporting the wrong DIMM.

Found three problems:

 1) Debug printouts for socket and channel interleave were not interpreting
    the register fields correctly. The socket interleave field is a 2^X
    value (0=1, 1=2, 2=4, 3=8). The channel interleave is X+1 (0=1, 1=2,
    2=3. 3=4).

 2) Actual use of the socket interleave value didn't interpret as 2^X

 3) Conversion of address to channel address was complicated, and wrong.

Signed-off-by: Tony Luck <[email protected]>
Acked-by: Aristeu Rozanski <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Mauro Carvalho Chehab <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Ingo Molnar <[email protected]>
drivers/edac/sb_edac.c