clk: sunxi: Implement A31 USB clock
authorMaxime Ripard <[email protected]>
Tue, 13 May 2014 15:44:15 +0000 (17:44 +0200)
committerMaxime Ripard <[email protected]>
Wed, 11 Jun 2014 07:58:43 +0000 (09:58 +0200)
commite0e7943c55984e7dbae3d7d4c65f6b7ca2e61b81
tree93dcb75d5095e9bca81e44fbb752440b0504e6e9
parent3f6eec9969d24f91a3909d51e86e007ca5efd4c4
clk: sunxi: Implement A31 USB clock

The A31 USB clock slightly differ from its older counterparts, mostly
because it has a different gate for each PHY, while the older one had
a single gate for all the phy.

Signed-off-by: Maxime Ripard <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
Acked-by: Mike Turquette <[email protected]>
Signed-off-by: Emilio López <[email protected]>
drivers/clk/sunxi/clk-sunxi.c