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author	Hadi Asyrafi <[email protected]>
	Thu, 1 Aug 2019 07:21:20 +0000 (15:21 +0800)
committer	Hadi Asyrafi <[email protected]>
	Thu, 1 Aug 2019 08:39:27 +0000 (16:39 +0800)
commit	d8820789ca2530e34ea4dff5d22bb6b7064d6737
tree	af252cb1d8b75922e4f4d1f517f9f1c09210b21c	tree \| snapshot
parent	3ee48f40f50bd3cea6fbb824bbc5ce0a43802d78	commit \| diff

intel: Platform common code refactor

Pull out common code from agilex and stratix10

Signed-off-by: Hadi Asyrafi <[email protected]>
Change-Id: Iddc0a9e6eccb30823d7b15615d5ce9c6bedb2abc

14 files changed:

plat/intel/soc/agilex/bl2_plat_mem_params_desc.c	[deleted file]	blob \| history
plat/intel/soc/agilex/platform.mk		diff \| blob \| history
plat/intel/soc/agilex/socfpga_delay_timer.c	[deleted file]	blob \| history
plat/intel/soc/agilex/socfpga_image_load.c	[deleted file]	blob \| history
plat/intel/soc/agilex/socfpga_topology.c	[deleted file]	blob \| history
plat/intel/soc/common/bl2_plat_mem_params_desc.c	[new file with mode: 0644]	blob
plat/intel/soc/common/socfpga_delay_timer.c	[new file with mode: 0644]	blob
plat/intel/soc/common/socfpga_image_load.c	[new file with mode: 0644]	blob
plat/intel/soc/common/socfpga_topology.c	[new file with mode: 0644]	blob
plat/intel/soc/stratix10/bl2_plat_mem_params_desc.c	[deleted file]	blob \| history
plat/intel/soc/stratix10/plat_delay_timer.c	[deleted file]	blob \| history
plat/intel/soc/stratix10/plat_topology.c	[deleted file]	blob \| history
plat/intel/soc/stratix10/platform.mk		diff \| blob \| history
plat/intel/soc/stratix10/stratix10_image_load.c	[deleted file]	blob \| history

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