MIPS: Loongson 3: Add HT-linked PCI support
authorHuacai Chen <[email protected]>
Fri, 21 Mar 2014 10:44:03 +0000 (18:44 +0800)
committerRalf Baechle <[email protected]>
Mon, 31 Mar 2014 16:17:12 +0000 (18:17 +0200)
commitc7d3555ac07503d471d0ef75495c7370f7ec7aa1
treebcf2c94a7194f42bd0ab34bf4b452888d092b400
parent1a08f1524d2ee4d4239e56ee1b3f6da0df929563
MIPS: Loongson 3: Add HT-linked PCI support

Loongson family machines use Hyper-Transport bus for inter-core
connection and device connection. The PCI bus is a subordinate
linked at HT1.

With LEFI firmware interface, We don't need fixup for PCI irq routing
(except providing a VBIOS of the integrated GPU).

Signed-off-by: Huacai Chen <[email protected]>
Signed-off-by: Hongliang Tao <[email protected]>
Signed-off-by: Hua Yan <[email protected]>
Tested-by: Alex Smith <[email protected]>
Reviewed-by: Alex Smith <[email protected]>
Cc: John Crispin <[email protected]>
Cc: Steven J. Hill <[email protected]>
Cc: Aurelien Jarno <[email protected]>
Cc: [email protected]
Cc: Fuxin Zhang <[email protected]>
Cc: Zhangjin Wu <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/6633
Signed-off-by: Ralf Baechle <[email protected]>
arch/mips/include/asm/mach-loongson/loongson.h
arch/mips/include/asm/mach-loongson/pci.h
arch/mips/pci/Makefile
arch/mips/pci/fixup-loongson3.c [new file with mode: 0644]
arch/mips/pci/ops-loongson3.c [new file with mode: 0644]