irqchip: mips-gic: Setup EIC mode on each CPU if it's in use
authorPaul Burton <[email protected]>
Tue, 17 May 2016 14:31:06 +0000 (15:31 +0100)
committerRalf Baechle <[email protected]>
Sat, 28 May 2016 10:35:03 +0000 (12:35 +0200)
commitba01cf0e1244fc3e4a24b4a111148c0d70025b36
tree1535064a6b8b401193e06add5dcabca8f6b7a1d5
parentd642e4e7b42f379fb9383ef1505f9d67895fb815
irqchip: mips-gic: Setup EIC mode on each CPU if it's in use

When EIC mode is in use (cpu_has_veic is true) enable it on each CPU
during GIC initialisation. Otherwise there may be a mismatch between the
hardware default interrupt model & that expected by the kernel.

Signed-off-by: Paul Burton <[email protected]>
Reviewed-by: Matt Redfearn <[email protected]>
Tested-by: Matt Redfearn <[email protected]>
Acked-by: Thomas Gleixner <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13274/
Signed-off-by: Ralf Baechle <[email protected]>
drivers/irqchip/irq-mips-gic.c