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(parent: 01f411e) | patch
ramips: add rt3352 SPI_CS1 pinmux
authorMathias Kresin <[email protected]>
Wed, 22 Aug 2018 06:02:20 +0000 (08:02 +0200)
committerJo-Philipp Wich <[email protected]>
Tue, 18 Dec 2018 16:47:51 +0000 (17:47 +0100)
commita43190b5ce31f26f2facf66d7ebe2e302086b15c
tree52e9fd95a10f20a914875dd65a3eea918b7a1dc5tree | snapshot
parent01f411e6b32f069de07c6ada553793bb67818221commit | diff
ramips: add rt3352 SPI_CS1 pinmux

The rt3352 has a pin that can be used as second spi chip select,
watchdog reset or GPIO. The pinmux setup was missing the definition of
said pin but it is already used in the SoC dtsi.

Signed-off-by: Mathias Kresin <[email protected]>
(backported from 1d08951628ace1d3c3d2bced6aea582e5ca3fe79)
(rebased patches)
Signed-off-by: Jo-Philipp Wich <[email protected]>
target/linux/ramips/patches-4.14/0001-MIPS-ralink-Add-rt3352-SPI_CS1-pinmux.patch [new file with mode: 0644] blob
target/linux/ramips/patches-4.14/0024-GPIO-add-named-gpio-exports.patch diff | blob | history
target/linux/ramips/patches-4.14/0032-USB-dwc2-add-device_reset.patch diff | blob | history
target/linux/ramips/patches-4.14/0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch diff | blob | history
target/linux/ramips/patches-4.14/0054-mtd-spi-nor-w25q256-respect-default-mode.patch diff | blob | history
target/linux/ramips/patches-4.14/302-spi-nor-add-gd25q512.patch diff | blob | history
target/linux/ramips/patches-4.14/303-spi-nor-enable-4B-opcodes-for-mx66l51235l.patch diff | blob | history
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