Workaround for Neoverse N1 erratum 1220197
authorlauwal01 <[email protected]>
Mon, 24 Jun 2019 16:38:53 +0000 (11:38 -0500)
committerlauwal01 <[email protected]>
Tue, 2 Jul 2019 14:16:10 +0000 (09:16 -0500)
commit9eceb020d79614cf41d64f6eae4086f3b5390203
treec0d19c0446266b7ac3d4a6fb5df0132140e0c334
parentef5fa7d47741d008f8786f971fc138e6331fb46d
Workaround for Neoverse N1 erratum 1220197

Neoverse N1 erratum 1220197 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set two bits in the implementation defined
CPUECTLR_EL1 system register, which disables write streaming to the L2.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html

Change-Id: I9c3373f1b6d67d21ee71b2b80aec5e96826818e8
Signed-off-by: Lauren Wehrmeister <[email protected]>
docs/design/cpu-specific-build-macros.rst
include/lib/cpus/aarch64/neoverse_n1.h
lib/cpus/aarch64/neoverse_n1.S
lib/cpus/cpu-ops.mk