Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"

Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"

This reverts commit b63b46313ed29e9b0c36b3d6b9407f6eade40c8f.

This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.

Signed-off-by: Simon Goldschmidt <[email protected]>
Signed-off-by: Vignesh R <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Reviewed-by: Jason Rush <[email protected]>
Acked-by: Jason Rush <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>