projects / openwrt / staging / blocktrron.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: a158e7e) | patch
rockchip: dw-rockchip: Fix initial PERST# GPIO value
authorDaniel Golle <[email protected]>
Mon, 29 Jul 2024 23:37:21 +0000 (00:37 +0100)
committerDaniel Golle <[email protected]>
Tue, 30 Jul 2024 00:04:43 +0000 (01:04 +0100)
commit940f83cc8d899551dec22e3d9142e9e7022c29ac
tree1613acea88cc8a35a89519b61e556e1f0f585b8btree | snapshot
parenta158e7ed4397ae0239c880f408cc12a89a3f18d8commit | diff
rockchip: dw-rockchip: Fix initial PERST# GPIO value

Import patch from mainline Linux to fix issue with PERST# signal
polarity.

Quote from commit message:
"This extra, very short, PERST# assertion + deassertion has been
reported to cause issues with certain WLAN controllers, e.g. RTL8822CE."

Signed-off-by: Daniel Golle <[email protected]>
target/linux/rockchip/patches-6.6/310-PCI-dw-rockchip-Fix-initial-PERST-GPIO-value.patch [new file with mode: 0644] blob
Staging tree of David Bauer