MIPS: Octeon: Expose support for mips32r1, mips32r2 and mips64r1

MIPS: Octeon: Expose support for mips32r1, mips32r2 and mips64r1

Define Cavium Octeon as a CPU that has support for mips32r1, mips32r2 and
mips64r1. This will affect show_cpuinfo() that will now correctly expose
mips32r1, mips32r2 and mips64r1 as supported ISAs.

Signed-off-by: Petar Jovanovic <[email protected]>
Reviewed-by: Maciej W. Rozycki <[email protected]>
Acked-by: David Daney <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/15749/
Signed-off-by: Ralf Baechle <[email protected]>